133 lines
4.1 KiB
C++
133 lines
4.1 KiB
C++
/*
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* This file is part of the 65816 Emulator Library.
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* Copyright (c) 2018 Francesco Rigoni.
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*
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* https://github.com/FrancescoRigoni/Lib65816
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, version 3.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "../Cpu65816.hpp"
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#define LOG_TAG "Cpu::executeLSR"
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#define DO_LSR_8_BIT(value) { \
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bool newCarry = value & 0x01; \
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value = value >> 1; \
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if (newCarry) mCpuStatus.setCarryFlag(); \
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else mCpuStatus.clearCarryFlag(); \
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mCpuStatus.updateSignAndZeroFlagFrom8BitValue(value); \
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}
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#define DO_LSR_16_BIT(value) { \
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bool newCarry = value & 0x0001; \
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value = value >> 1; \
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if (newCarry) mCpuStatus.setCarryFlag(); \
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else mCpuStatus.clearCarryFlag(); \
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mCpuStatus.updateSignAndZeroFlagFrom16BitValue(value); \
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}
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/**
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* This file contains implementations for all LSR OpCodes.
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*/
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void Cpu65816::executeMemoryLSR(OpCode &opCode) {
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Address opCodeDataAddress = getAddressOfOpCodeData(opCode);
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if(accumulatorIs8BitWide()) {
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uint8_t value = mSystemBus.readByte(opCodeDataAddress);
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DO_LSR_8_BIT(value);
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mSystemBus.storeByte(opCodeDataAddress, value);
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} else {
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uint16_t value = mSystemBus.readTwoBytes(opCodeDataAddress);
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DO_LSR_16_BIT(value);
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mSystemBus.storeTwoBytes(opCodeDataAddress, value);
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}
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}
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void Cpu65816::executeAccumulatorLSR(OpCode &opCode) {
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if(accumulatorIs8BitWide()) {
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uint8_t value = Binary::lower8BitsOf(mA);
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DO_LSR_8_BIT(value);
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Binary::setLower8BitsOf16BitsValue(&mA, value);
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} else {
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DO_LSR_16_BIT(mA);
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}
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}
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void Cpu65816::executeLSR(OpCode &opCode) {
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switch (opCode.getCode()) {
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case (0x4A): // LSR Accumulator
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{
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executeAccumulatorLSR(opCode);
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addToProgramAddressAndCycles(1, 2);
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break;
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}
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case (0x4E): // LSR Absolute
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{
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executeMemoryLSR(opCode);
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if (accumulatorIs16BitWide()) {
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addToCycles(2);
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}
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addToProgramAddressAndCycles(3, 6);
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break;
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}
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case (0x46): // LSR Direct Page
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{
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executeMemoryLSR(opCode);
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if (accumulatorIs16BitWide()) {
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addToCycles(2);
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}
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if (Binary::lower8BitsOf(mD) != 0) {
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addToCycles(1);
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}
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addToProgramAddressAndCycles(2, 5);
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break;
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}
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case (0x5E): // LSR Absolute Indexed, X
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{
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executeMemoryLSR(opCode);
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if (accumulatorIs16BitWide()) {
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addToCycles(2);
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}
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#ifdef EMU_65C02
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if (!opCodeAddressingCrossesPageBoundary(opCode)) {
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subtractFromCycles(1);
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}
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#endif
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addToProgramAddressAndCycles(3, 7);
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break;
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}
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case (0x56): // LSR Direct Page Indexed, X
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{
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executeMemoryLSR(opCode);
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if (accumulatorIs16BitWide()) {
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addToCycles(2);
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}
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if (Binary::lower8BitsOf(mD) != 0) {
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addToCycles(1);
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}
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addToProgramAddressAndCycles(2, 6);
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break;
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}
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default:
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{
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LOG_UNEXPECTED_OPCODE(opCode);
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}
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}
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}
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