Introduce wide-mode override opcodes.

This solves the --no-collapse problem by letting you force
Absolute mode on an instruction by instruction bases, which is
usually going to be what you want anyway.
This commit is contained in:
Michael Martin 2012-06-06 05:13:19 -07:00
parent 4891849e4a
commit 23700276a6
4 changed files with 89 additions and 45 deletions

View File

@ -129,6 +129,8 @@ def lex(point, line):
add_token(value)
value = ""
break
elif c == '.' and value != "":
value = value + c
elif c.isspace():
add_token(value)
value = ""

View File

@ -35,10 +35,16 @@ lengths = [0, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1]
opcodes = {
'adc': [None, 0x69, 0x65, 0x75, None, 0x6D, 0x7D, 0x79,
None, None, None, None, 0x61, 0x71, None],
'adc.w': [None, None, None, None, None, 0x6D, 0x7D, 0x79,
None, None, None, None, None, None, None],
'and': [None, 0x29, 0x25, 0x35, None, 0x2D, 0x3D, 0x39,
None, None, None, None, 0x21, 0x31, None],
'and.w': [None, None, None, None, None, 0x2D, 0x3D, 0x39,
None, None, None, None, None, None, None],
'asl': [0x0A, None, 0x06, 0x16, None, 0x0E, 0x1E, None,
None, None, None, None, None, None, None],
'asl.w': [None, None, None, None, None, 0x0E, 0x1E, None,
None, None, None, None, None, None, None],
'bcc': [None, None, None, None, None, None, None, None,
None, None, None, None, None, None, 0x90],
'bcs': [None, None, None, None, None, None, None, None,
@ -47,6 +53,8 @@ opcodes = {
None, None, None, None, None, None, 0xF0],
'bit': [None, None, 0x24, None, None, 0x2C, None, None,
None, None, None, None, None, None, None],
'bit.w': [None, None, None, None, None, 0x2C, None, None,
None, None, None, None, None, None, None],
'bmi': [None, None, None, None, None, None, None, None,
None, None, None, None, None, None, 0x30],
'bne': [None, None, None, None, None, None, None, None,
@ -69,20 +77,32 @@ opcodes = {
None, None, None, None, None, None, None],
'cmp': [None, 0xC9, 0xC5, 0xD5, None, 0xCD, 0xDD, 0xD9,
None, None, None, None, 0xC1, 0xD1, None],
'cmp.w': [None, None, None, None, None, 0xCD, 0xDD, 0xD9,
None, None, None, None, None, None, None],
'cpx': [None, 0xE0, 0xE4, None, None, 0xEC, None, None,
None, None, None, None, None, None, None],
'cpx.w': [None, None, None, None, None, 0xEC, None, None,
None, None, None, None, None, None, None],
'cpy': [None, 0xC0, 0xC4, None, None, 0xCC, None, None,
None, None, None, None, None, None, None],
'cpy.w': [None, None, None, None, None, 0xCC, None, None,
None, None, None, None, None, None, None],
'dec': [None, None, 0xC6, 0xD6, None, 0xCE, 0xDE, None,
None, None, None, None, None, None, None],
'dec.w': [None, None, None, None, None, 0xCE, 0xDE, None,
None, None, None, None, None, None, None],
'dex': [0xCA, None, None, None, None, None, None, None,
None, None, None, None, None, None, None],
'dey': [0x88, None, None, None, None, None, None, None,
None, None, None, None, None, None, None],
'eor': [None, 0x49, 0x45, 0x55, None, 0x4D, 0x5D, 0x59,
None, None, None, None, 0x41, 0x51, None],
'eor.w': [None, None, None, None, None, 0x4D, 0x5D, 0x59,
None, None, None, None, None, None, None],
'inc': [None, None, 0xE6, 0xF6, None, 0xEE, 0xFE, None,
None, None, None, None, None, None, None],
'inc.w': [None, None, None, None, None, 0xEE, 0xFE, None,
None, None, None, None, None, None, None],
'inx': [0xE8, None, None, None, None, None, None, None,
None, None, None, None, None, None, None],
'iny': [0xC8, None, None, None, None, None, None, None,
@ -93,16 +113,26 @@ opcodes = {
None, None, None, None, None, None, None],
'lda': [None, 0xA9, 0xA5, 0xB5, None, 0xAD, 0xBD, 0xB9,
None, None, None, None, 0xA1, 0xB1, None],
'lda.w': [None, None, None, None, None, 0xAD, 0xBD, 0xB9,
None, None, None, None, None, None, None],
'ldx': [None, 0xA2, 0xA6, None, 0xB6, 0xAE, None, 0xBE,
None, None, None, None, None, None, None],
'ldx.w': [None, None, None, None, None, 0xAE, None, 0xBE,
None, None, None, None, None, None, None],
'ldy': [None, 0xA0, 0xA4, 0xB4, None, 0xAC, 0xBC, None,
None, None, None, None, None, None, None],
'ldy.w': [None, None, None, None, None, 0xAC, 0xBC, None,
None, None, None, None, None, None, None],
'lsr': [0x4A, None, 0x46, 0x56, None, 0x4E, 0x5E, None,
None, None, None, None, None, None, None],
'lsr.w': [None, None, None, None, None, 0x4E, 0x5E, None,
None, None, None, None, None, None, None],
'nop': [0xEA, None, None, None, None, None, None, None,
None, None, None, None, None, None, None],
'ora': [None, 0x09, 0x05, 0x15, None, 0x0D, 0x1D, 0x19,
None, None, None, None, 0x01, 0x11, None],
'ora.w': [None, None, None, None, None, 0x0D, 0x1D, 0x19,
None, None, None, None, None, None, None],
'pha': [0x48, None, None, None, None, None, None, None,
None, None, None, None, None, None, None],
'php': [0x08, None, None, None, None, None, None, None,
@ -113,14 +143,20 @@ opcodes = {
None, None, None, None, None, None, None],
'rol': [0x2A, None, 0x26, 0x36, None, 0x2E, 0x3E, None,
None, None, None, None, None, None, None],
'rol.w': [None, None, None, None, None, 0x2E, 0x3E, None,
None, None, None, None, None, None, None],
'ror': [0x6A, None, 0x66, 0x76, None, 0x6E, 0x7E, None,
None, None, None, None, None, None, None],
'ror.w': [None, None, None, None, None, 0x6E, 0x7E, None,
None, None, None, None, None, None, None],
'rti': [0x40, None, None, None, None, None, None, None,
None, None, None, None, None, None, None],
'rts': [0x60, None, None, None, None, None, None, None,
None, None, None, None, None, None, None],
'sbc': [None, 0xE9, 0xE5, 0xF5, None, 0xED, 0xFD, 0xF9,
None, None, None, None, 0xE1, 0xF1, None],
'sbc.w': [None, None, None, None, None, 0xED, 0xFD, 0xF9,
None, None, None, None, None, None, None],
'sec': [0x38, None, None, None, None, None, None, None,
None, None, None, None, None, None, None],
'sed': [0xF8, None, None, None, None, None, None, None,
@ -129,10 +165,16 @@ opcodes = {
None, None, None, None, None, None, None],
'sta': [None, None, 0x85, 0x95, None, 0x8D, 0x9D, 0x99,
None, None, None, None, 0x81, 0x91, None],
'sta.w': [None, None, None, None, None, 0x8D, 0x9D, 0x99,
None, None, None, None, None, None, None],
'stx': [None, None, 0x86, None, 0x96, 0x8E, None, None,
None, None, None, None, None, None, None],
'stx.w': [None, None, None, None, None, 0x8E, None, None,
None, None, None, None, None, None, None],
'sty': [None, None, 0x84, 0x94, None, 0x8C, None, None,
None, None, None, None, None, None, None],
'sty.w': [None, None, None, None, None, 0x8C, None, None,
None, None, None, None, None, None, None],
'tax': [0xAA, None, None, None, None, None, None, None,
None, None, None, None, None, None, None],
'tay': [0xA8, None, None, None, None, None, None, None,

0
tools/opcodes/gensets.py Normal file → Executable file
View File

View File

@ -11,8 +11,8 @@
0A: ASL - Implied
0B:
0C:
0D: ORA - Absolute
0E: ASL - Absolute
0D: ORA - Absolute; ORA.W - Absolute
0E: ASL - Absolute; ASL.W - Absolute
0F:
10: BPL - Relative
11: ORA - (Zero Page), Y
@ -23,12 +23,12 @@
16: ASL - Zero Page, X
17:
18: CLC - Implied
19: ORA - Absolute, Y
19: ORA - Absolute, Y; ORA.W - Absolute, Y
1A:
1B:
1C:
1D: ORA - Absolute, X
1E: ASL - Absolute, X
1D: ORA - Absolute, X; ORA.W - Absolute, X
1E: ASL - Absolute, X; ASL.W - Absolute, X
1F:
20: JSR - Absolute
21: AND - (Zero Page, X)
@ -42,9 +42,9 @@
29: AND - Immediate
2A: ROL - Implied
2B:
2C: BIT - Absolute
2D: AND - Absolute
2E: ROL - Absolute
2C: BIT - Absolute; BIT.W - Absolute
2D: AND - Absolute; AND.W - Absolute
2E: ROL - Absolute; ROL.W - Absolute
2F:
30: BMI - Relative
31: AND - (Zero Page), Y
@ -55,12 +55,12 @@
36: ROL - Zero Page, X
37:
38: SEC - Implied
39: AND - Absolute, Y
39: AND - Absolute, Y; AND.W - Absolute, Y
3A:
3B:
3C:
3D: AND - Absolute, X
3E: ROL - Absolute, X
3D: AND - Absolute, X; AND.W - Absolute, X
3E: ROL - Absolute, X; ROL.W - Absolute, X
3F:
40: RTI - Implied
41: EOR - (Zero Page, X)
@ -75,8 +75,8 @@
4A: LSR - Implied
4B:
4C: JMP - Absolute
4D: EOR - Absolute
4E: LSR - Absolute
4D: EOR - Absolute; EOR.W - Absolute
4E: LSR - Absolute; LSR.W - Absolute
4F:
50: BVC - Relative
51: EOR - (Zero Page), Y
@ -87,12 +87,12 @@
56: LSR - Zero Page, X
57:
58: CLI - Implied
59: EOR - Absolute, Y
59: EOR - Absolute, Y; EOR.W - Absolute, Y
5A:
5B:
5C:
5D: EOR - Absolute, X
5E: LSR - Absolute, X
5D: EOR - Absolute, X; EOR.W - Absolute, X
5E: LSR - Absolute, X; LSR.W - Absolute, X
5F:
60: RTS - Implied
61: ADC - (Zero Page, X)
@ -107,8 +107,8 @@
6A: ROR - Implied
6B:
6C: JMP - (Absolute)
6D: ADC - Absolute
6E: ROR - Absolute
6D: ADC - Absolute; ADC.W - Absolute
6E: ROR - Absolute; ROR.W - Absolute
6F:
70: BVS - Relative
71: ADC - (Zero Page), Y
@ -119,12 +119,12 @@
76: ROR - Zero Page, X
77:
78: SEI - Implied
79: ADC - Absolute, Y
79: ADC - Absolute, Y; ADC.W - Absolute, Y
7A:
7B:
7C:
7D: ADC - Absolute, X
7E: ROR - Absolute, X
7D: ADC - Absolute, X; ADC.W - Absolute, X
7E: ROR - Absolute, X; ROR.W - Absolute, X
7F:
80:
81: STA - (Zero Page, X)
@ -138,9 +138,9 @@
89:
8A: TXA - Implied
8B:
8C: STY - Absolute
8D: STA - Absolute
8E: STX - Absolute
8C: STY - Absolute; STY.W - Absolute
8D: STA - Absolute; STA.W - Absolute
8E: STX - Absolute; STX.W - Absolute
8F:
90: BCC - Relative
91: STA - (Zero Page), Y
@ -151,11 +151,11 @@
96: STX - Zero Page, Y
97:
98: TYA - Implied
99: STA - Absolute, Y
99: STA - Absolute, Y; STA.W - Absolute, Y
9A: TXS - Implied
9B:
9C:
9D: STA - Absolute, X
9D: STA - Absolute, X; STA.W - Absolute, X
9E:
9F:
A0: LDY - Immediate
@ -170,9 +170,9 @@
A9: LDA - Immediate
AA: TAX - Implied
AB:
AC: LDY - Absolute
AD: LDA - Absolute
AE: LDX - Absolute
AC: LDY - Absolute; LDY.W - Absolute
AD: LDA - Absolute; LDA.W - Absolute
AE: LDX - Absolute; LDX.W - Absolute
AF:
B0: BCS - Relative
B1: LDA - (Zero Page), Y
@ -183,12 +183,12 @@
B6: LDX - Zero Page, Y
B7:
B8: CLV - Implied
B9: LDA - Absolute, Y
B9: LDA - Absolute, Y; LDA.W - Absolute, Y
BA: TSX - Implied
BB:
BC: LDY - Absolute, X
BD: LDA - Absolute, X
BE: LDX - Absolute, Y
BC: LDY - Absolute, X; LDY.W - Absolute, X
BD: LDA - Absolute, X; LDA.W - Absolute, X
BE: LDX - Absolute, Y; LDX.W - Absolute, Y
BF:
C0: CPY - Immediate
C1: CMP - (Zero Page, X)
@ -202,9 +202,9 @@
C9: CMP - Immediate
CA: DEX - Implied
CB:
CC: CPY - Absolute
CD: CMP - Absolute
CE: DEC - Absolute
CC: CPY - Absolute; CPY.W - Absolute
CD: CMP - Absolute; CMP.W - Absolute
CE: DEC - Absolute; DEC.W - Absolute
CF:
D0: BNE - Relative
D1: CMP - (Zero Page), Y
@ -215,12 +215,12 @@
D6: DEC - Zero Page, X
D7:
D8: CLD - Implied
D9: CMP - Absolute, Y
D9: CMP - Absolute, Y; CMP.W - Absolute, Y
DA:
DB:
DC:
DD: CMP - Absolute, X
DE: DEC - Absolute, X
DD: CMP - Absolute, X; CMP.W - Absolute, X
DE: DEC - Absolute, X; DEC.W - Absolute, X
DF:
E0: CPX - Immediate
E1: SBC - (Zero Page, X)
@ -234,9 +234,9 @@
E9: SBC - Immediate
EA: NOP - Implied
EB:
EC: CPX - Absolute
ED: SBC - Absolute
EE: INC - Absolute
EC: CPX - Absolute; CPX.W - Absolute
ED: SBC - Absolute; SBC.W - Absolute
EE: INC - Absolute; INC.W - Absolute
EF:
F0: BEQ - Relative
F1: SBC - (Zero Page), Y
@ -247,10 +247,10 @@
F6: INC - Zero Page, X
F7:
F8: SED - Implied
F9: SBC - Absolute, Y
F9: SBC - Absolute, Y; SBC.W - Absolute, Y
FA:
FB:
FC:
FD: SBC - Absolute, X
FE: INC - Absolute, X
FD: SBC - Absolute, X; SBC.W - Absolute, X
FE: INC - Absolute, X; INC.W - Absolute, X
FF: