Add the NOP Zero Page undocumented opcode.

This seems to be one of the preferred undocced ops in the Atari
2600 VCS development community.
This commit is contained in:
Michael C. Martin 2012-05-29 18:18:33 -07:00
parent 196cb47f05
commit af50326e39
5 changed files with 372 additions and 363 deletions

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@ -7,6 +7,10 @@
# You may use, modify, and distribute this file under the MIT
# license: See README for details.
# DO NOT EDIT THIS FILE DIRECTLY.
# This file was automatically generated by gensets.py based on the
# the tables in tools/opcodes. Edit those tables, not these.
# Names of addressing modes
modes = ["Implied", # 0
"Immediate", # 1
@ -96,6 +100,7 @@ undocops = {
'las': [None, None, None, None, None, None, None, 0xBB, None, None, None, None, None, None, None],
'lax': [None, None, 0xA7, None, 0xB7, 0xAF, None, 0xBF, None, None, None, None, 0xA3, 0xB3, None],
'lxa': [None, 0xAB, None, None, None, None, None, None, None, None, None, None, None, None, None],
'nop': [0xEA, None, 0x04, None, None, None, None, None, None, None, None, None, None, None, None],
'rla': [None, None, 0x27, 0x37, None, 0x2F, 0x3F, 0x3B, None, None, None, None, 0x23, 0x33, None],
'rra': [None, None, 0x67, 0x77, None, 0x6F, 0x7F, 0x7B, None, None, None, None, 0x63, 0x73, None],
'sax': [None, None, 0x87, None, 0x97, 0x8F, None, None, None, None, None, None, 0x83, None, None],

Binary file not shown.

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@ -1,78 +1,79 @@
; Test file for base 6510 undocumented opcode compliance
; This odd little source file uses every addressing mode
; of every opcode, and uses the opcode itself as the argument
; to each instruction that takes one. The resulting binary's
; bytes are thus in strictly increasing numerical order.
; Many mnemonics have multiple opcodes with identical
; effects; Ophis chooses one of them and the arguments
; herein assume that any assembler will choose as Ophis
; does.
; This file also doesn't include the 6502's *documented*
; opcodes - see testbase.oph for those.
SLO ($03, X)
SLO $07
ANC #$0B
SLO $0F0F
SLO ($13), Y
SLO $17, X
SLO $1B1B, Y
SLO $1F1F, X
RLA ($23, X)
RLA $27
RLA $2F2F
RLA ($33), Y
RLA $37, X
RLA $3B3B, Y
RLA $3F3F, X
SRE ($43, X)
SRE $47
ASR #$4B
SRE $4F4F
SRE ($53), Y
SRE $57, X
SRE $5B5B, Y
SRE $5F5F, X
RRA ($63, X)
RRA $67
ARR #$6B
RRA $6F6F
RRA ($73), Y
RRA $77, X
RRA $7B7B, Y
RRA $7F7F, X
SAX ($83, X)
SAX $87
ANE #$8B
SAX $8F8F
SHA ($93), Y
SAX $97, Y
SHS $9B9B, Y
SHX $9E9E, Y
SHA $9F9F, Y
LAX ($A3, X)
LAX $A7
LXA #$AB
LAX $AFAF
LAX ($B3), Y
LAX $B7, Y
LAS $BBBB, Y
LAX $BFBF, Y
DCP ($C3, X)
DCP $C7
SBX #$CB
DCP $CFCF
DCP ($D3), Y
DCP $D7, X
DCP $DBDB, Y
DCP $DFDF, X
ISB ($E3, X)
ISB $E7
ISB $EFEF
ISB ($F3), Y
ISB $F7, X
ISB $FBFB, Y
ISB $FFFF, X
; Test file for base 6510 undocumented opcode compliance
; This odd little source file uses every addressing mode
; of every opcode, and uses the opcode itself as the argument
; to each instruction that takes one. The resulting binary's
; bytes are thus in strictly increasing numerical order.
; Many mnemonics have multiple opcodes with identical
; effects; Ophis chooses one of them and the arguments
; herein assume that any assembler will choose as Ophis
; does.
; This file also doesn't include the 6502's *documented*
; opcodes - see testbase.oph for those.
SLO ($03, X)
NOP $04
SLO $07
ANC #$0B
SLO $0F0F
SLO ($13), Y
SLO $17, X
SLO $1B1B, Y
SLO $1F1F, X
RLA ($23, X)
RLA $27
RLA $2F2F
RLA ($33), Y
RLA $37, X
RLA $3B3B, Y
RLA $3F3F, X
SRE ($43, X)
SRE $47
ASR #$4B
SRE $4F4F
SRE ($53), Y
SRE $57, X
SRE $5B5B, Y
SRE $5F5F, X
RRA ($63, X)
RRA $67
ARR #$6B
RRA $6F6F
RRA ($73), Y
RRA $77, X
RRA $7B7B, Y
RRA $7F7F, X
SAX ($83, X)
SAX $87
ANE #$8B
SAX $8F8F
SHA ($93), Y
SAX $97, Y
SHS $9B9B, Y
SHX $9E9E, Y
SHA $9F9F, Y
LAX ($A3, X)
LAX $A7
LXA #$AB
LAX $AFAF
LAX ($B3), Y
LAX $B7, Y
LAS $BBBB, Y
LAX $BFBF, Y
DCP ($C3, X)
DCP $C7
SBX #$CB
DCP $CFCF
DCP ($D3), Y
DCP $D7, X
DCP $DBDB, Y
DCP $DFDF, X
ISB ($E3, X)
ISB $E7
ISB $EFEF
ISB ($F3), Y
ISB $F7, X
ISB $FBFB, Y
ISB $FFFF, X

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@ -3,31 +3,35 @@ import sys
verbose = 0
prologue = '"""' + """Opcodes file.
prologue = '"""' +"""Opcodes file.
Tables for the assembly of 6502-family instructions, mapping
opcodes and addressing modes to binary instructions.""" + '"""' + """
Tables for the assembly of 6502-family instructions, mapping
opcodes and addressing modes to binary instructions.""" + '"""' + """
# Copyright 2002 Michael C. Martin.
# You may use, modify, and distribute this file under the BSD
# license: See LICENSE.txt for details.
# Copyright 2002-2012 Michael C. Martin and additional contributors.
# You may use, modify, and distribute this file under the MIT
# license: See README for details.
# DO NOT EDIT THIS FILE DIRECTLY.
# This file was automatically generated by gensets.py based on the
# the tables in tools/opcodes. Edit those tables, not these.
# Names of addressing modes
modes = ["Implied", # 0
"Immediate", # 1
"Zero Page", # 2
"Zero Page, X", # 3
"Zero Page, Y", # 4
"Absolute", # 5
"Absolute, X", # 6
"Absolute, Y", # 7
"(Absolute)", # 8
"Immediate", # 1
"Zero Page", # 2
"Zero Page, X", # 3
"Zero Page, Y", # 4
"Absolute", # 5
"Absolute, X", # 6
"Absolute, Y", # 7
"(Absolute)", # 8
"(Absolute, X)", # 9
"(Absolute), Y", # 10
"(Zero Page)", # 11
"(Zero Page, X)", # 12
"(Zero Page), Y", # 13
"Relative"] # 14
"(Zero Page, X)", # 12
"(Zero Page), Y", # 13
"Relative"] # 14
# Lengths of the argument
lengths = [0, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1]
@ -35,20 +39,20 @@ lengths = [0, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1]
# These values should match the ones in the prologue string.
modes = ["Implied", # 0
"Immediate", # 1
"Zero Page", # 2
"Zero Page, X", # 3
"Zero Page, Y", # 4
"Absolute", # 5
"Absolute, X", # 6
"Absolute, Y", # 7
"(Absolute)", # 8
"Immediate", # 1
"Zero Page", # 2
"Zero Page, X", # 3
"Zero Page, Y", # 4
"Absolute", # 5
"Absolute, X", # 6
"Absolute, Y", # 7
"(Absolute)", # 8
"(Absolute, X)", # 9
"(Absolute), Y", # 10
"(Zero Page)", # 11
"(Zero Page, X)", # 12
"(Zero Page), Y", # 13
"Relative"] # 14
"(Zero Page, X)", # 12
"(Zero Page), Y", # 13
"Relative"] # 14
flatmodes = [x.lower() for x in modes]
@ -150,4 +154,3 @@ if __name__=='__main__':
dump_map (instruction_map, ' ' * (len(field) + 4))
print "%s}" % (' ' * (len(field) + 3))
print ""

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@ -1,256 +1,256 @@
00: BRK - Implied
01: ORA - (Zero Page, X)
02:
03: SLO - (Zero Page, X)
04:
05: ORA - Zero Page
06: ASL - Zero Page
07: SLO - Zero Page
08: PHP - Implied
09: ORA - Immediate
0A: ASL - Implied
0B: ANC - Immediate
0C:
0D: ORA - Absolute
0E: ASL - Absolute
0F: SLO - Absolute
10: BPL - Relative
11: ORA - (Zero Page), Y
12:
13: SLO - (Zero Page), Y
14:
15: ORA - Zero Page, X
16: ASL - Zero Page, X
17: SLO - Zero Page, X
18: CLC - Implied
19: ORA - Absolute, Y
1A:
1B: SLO - Absolute, Y
1C:
1D: ORA - Absolute, X
1E: ASL - Absolute, X
1F: SLO - Absolute, X
20: JSR - Absolute
21: AND - (Zero Page, X)
22:
23: RLA - (Zero Page, X)
24: BIT - Zero Page
25: AND - Zero Page
26: ROL - Zero Page
27: RLA - Zero Page
28: PLP - Implied
29: AND - Immediate
2A: ROL - Implied
2B:
2C: BIT - Absolute
2D: AND - Absolute
2E: ROL - Absolute
2F: RLA - Absolute
30: BMI - Relative
31: AND - (Zero Page), Y
32:
33: RLA - (Zero Page), Y
34:
35: AND - Zero Page, X
36: ROL - Zero Page, X
37: RLA - Zero Page, X
38: SEC - Implied
39: AND - Absolute, Y
3A:
3B: RLA - Absolute, Y
3C:
3D: AND - Absolute, X
3E: ROL - Absolute, X
3F: RLA - Absolute, X
40: RTI - Implied
41: EOR - (Zero Page, X)
42:
43: SRE - (Zero Page, X)
44:
45: EOR - Zero Page
46: LSR - Zero Page
47: SRE - Zero Page
48: PHA - Implied
49: EOR - Immediate
4A: LSR - Implied
4B: ASR - Immediate
4C: JMP - Absolute
4D: EOR - Absolute
4E: LSR - Absolute
4F: SRE - Absolute
50: BVC - Relative
51: EOR - (Zero Page), Y
52:
53: SRE - (Zero Page), Y
54:
55: EOR - Zero Page, X
56: LSR - Zero Page, X
57: SRE - Zero Page, X
58: CLI - Implied
59: EOR - Absolute, Y
5A:
5B: SRE - Absolute, Y
5C:
5D: EOR - Absolute, X
5E: LSR - Absolute, X
5F: SRE - Absolute, X
60: RTS - Implied
61: ADC - (Zero Page, X)
62:
63: RRA - (Zero Page, X)
64:
65: ADC - Zero Page
66: ROR - Zero Page
67: RRA - Zero Page
68: PLA - Implied
69: ADC - Immediate
6A: ROR - Implied
6B: ARR - Immediate
6C: JMP - (Absolute)
6D: ADC - Absolute
6E: ROR - Absolute
6F: RRA - Absolute
70: BVS - Relative
71: ADC - (Zero Page), Y
72:
73: RRA - (Zero Page), Y
74:
75: ADC - Zero Page, X
76: ROR - Zero Page, X
77: RRA - Zero Page, X
78: SEI - Implied
79: ADC - Absolute, Y
7A:
7B: RRA - Absolute, Y
7C:
7D: ADC - Absolute, X
7E: ROR - Absolute, X
7F: RRA - Absolute, X
80:
81: STA - (Zero Page, X)
82:
83: SAX - (Zero Page, X)
84: STY - Zero Page
85: STA - Zero Page
86: STX - Zero Page
87: SAX - Zero Page
88: DEY - Implied
89:
8A: TXA - Implied
8B: ANE - Immediate
8C: STY - Absolute
8D: STA - Absolute
8E: STX - Absolute
8F: SAX - Absolute
90: BCC - Relative
91: STA - (Zero Page), Y
92:
93: SHA - (Zero Page), Y
94: STY - Zero Page, X
95: STA - Zero Page, X
96: STX - Zero Page, Y
97: SAX - Zero Page, Y
98: TYA - Implied
99: STA - Absolute, Y
9A: TXS - Implied
9B: SHS - Absolute, Y
9C:
9D: STA - Absolute, X
9E: SHX - Absolute, Y
9F: SHA - Absolute, Y
A0: LDY - Immediate
A1: LDA - (Zero Page, X)
A2: LDX - Immediate
A3: LAX - (Zero Page, X)
A4: LDY - Zero Page
A5: LDA - Zero Page
A6: LDX - Zero Page
A7: LAX - Zero Page
A8: TAY - Implied
A9: LDA - Immediate
AA: TAX - Implied
AB: LXA - Immediate
AC: LDY - Absolute
AD: LDA - Absolute
AE: LDX - Absolute
AF: LAX - Absolute
B0: BCS - Relative
B1: LDA - (Zero Page), Y
B2:
B3: LAX - (Zero Page), Y
B4: LDY - Zero Page, X
B5: LDA - Zero Page, X
B6: LDX - Zero Page, Y
B7: LAX - Zero Page, Y
B8: CLV - Implied
B9: LDA - Absolute, Y
BA: TSX - Implied
BB: LAS - Absolute, Y
BC: LDY - Absolute, X
BD: LDA - Absolute, X
BE: LDX - Absolute, Y
BF: LAX - Absolute, Y
C0: CPY - Immediate
C1: CMP - (Zero Page, X)
C2:
C3: DCP - (Zero Page, X)
C4: CPY - Zero Page
C5: CMP - Zero Page
C6: DEC - Zero Page
C7: DCP - Zero Page
C8: INY - Implied
C9: CMP - Immediate
CA: DEX - Implied
CB: SBX - Immediate
CC: CPY - Absolute
CD: CMP - Absolute
CE: DEC - Absolute
CF: DCP - Absolute
D0: BNE - Relative
D1: CMP - (Zero Page), Y
D2:
D3: DCP - (Zero Page), Y
D4:
D5: CMP - Zero Page, X
D6: DEC - Zero Page, X
D7: DCP - Zero Page, X
D8: CLD - Implied
D9: CMP - Absolute, Y
DA:
DB: DCP - Absolute, Y
DC:
DD: CMP - Absolute, X
DE: DEC - Absolute, X
DF: DCP - Absolute, X
E0: CPX - Immediate
E1: SBC - (Zero Page, X)
E2:
E3: ISB - (Zero Page, X)
E4: CPX - Zero Page
E5: SBC - Zero Page
E6: INC - Zero Page
E7: ISB - Zero Page
E8: INX - Implied
E9: SBC - Immediate
EA: NOP - Implied
EB:
EC: CPX - Absolute
ED: SBC - Absolute
EE: INC - Absolute
EF: ISB - Absolute
F0: BEQ - Relative
F1: SBC - (Zero Page), Y
F2:
F3: ISB - (Zero Page), Y
F4:
F5: SBC - Zero Page, X
F6: INC - Zero Page, X
F7: ISB - Zero Page, X
F8: SED - Implied
F9: SBC - Absolute, Y
FA:
FB: ISB - Absolute, Y
FC:
FD: SBC - Absolute, X
FE: INC - Absolute, X
FF: ISB - Absolute, X
00: BRK - Implied
01: ORA - (Zero Page, X)
02:
03: SLO - (Zero Page, X)
04: NOP - Zero Page
05: ORA - Zero Page
06: ASL - Zero Page
07: SLO - Zero Page
08: PHP - Implied
09: ORA - Immediate
0A: ASL - Implied
0B: ANC - Immediate
0C:
0D: ORA - Absolute
0E: ASL - Absolute
0F: SLO - Absolute
10: BPL - Relative
11: ORA - (Zero Page), Y
12:
13: SLO - (Zero Page), Y
14:
15: ORA - Zero Page, X
16: ASL - Zero Page, X
17: SLO - Zero Page, X
18: CLC - Implied
19: ORA - Absolute, Y
1A:
1B: SLO - Absolute, Y
1C:
1D: ORA - Absolute, X
1E: ASL - Absolute, X
1F: SLO - Absolute, X
20: JSR - Absolute
21: AND - (Zero Page, X)
22:
23: RLA - (Zero Page, X)
24: BIT - Zero Page
25: AND - Zero Page
26: ROL - Zero Page
27: RLA - Zero Page
28: PLP - Implied
29: AND - Immediate
2A: ROL - Implied
2B:
2C: BIT - Absolute
2D: AND - Absolute
2E: ROL - Absolute
2F: RLA - Absolute
30: BMI - Relative
31: AND - (Zero Page), Y
32:
33: RLA - (Zero Page), Y
34:
35: AND - Zero Page, X
36: ROL - Zero Page, X
37: RLA - Zero Page, X
38: SEC - Implied
39: AND - Absolute, Y
3A:
3B: RLA - Absolute, Y
3C:
3D: AND - Absolute, X
3E: ROL - Absolute, X
3F: RLA - Absolute, X
40: RTI - Implied
41: EOR - (Zero Page, X)
42:
43: SRE - (Zero Page, X)
44:
45: EOR - Zero Page
46: LSR - Zero Page
47: SRE - Zero Page
48: PHA - Implied
49: EOR - Immediate
4A: LSR - Implied
4B: ASR - Immediate
4C: JMP - Absolute
4D: EOR - Absolute
4E: LSR - Absolute
4F: SRE - Absolute
50: BVC - Relative
51: EOR - (Zero Page), Y
52:
53: SRE - (Zero Page), Y
54:
55: EOR - Zero Page, X
56: LSR - Zero Page, X
57: SRE - Zero Page, X
58: CLI - Implied
59: EOR - Absolute, Y
5A:
5B: SRE - Absolute, Y
5C:
5D: EOR - Absolute, X
5E: LSR - Absolute, X
5F: SRE - Absolute, X
60: RTS - Implied
61: ADC - (Zero Page, X)
62:
63: RRA - (Zero Page, X)
64:
65: ADC - Zero Page
66: ROR - Zero Page
67: RRA - Zero Page
68: PLA - Implied
69: ADC - Immediate
6A: ROR - Implied
6B: ARR - Immediate
6C: JMP - (Absolute)
6D: ADC - Absolute
6E: ROR - Absolute
6F: RRA - Absolute
70: BVS - Relative
71: ADC - (Zero Page), Y
72:
73: RRA - (Zero Page), Y
74:
75: ADC - Zero Page, X
76: ROR - Zero Page, X
77: RRA - Zero Page, X
78: SEI - Implied
79: ADC - Absolute, Y
7A:
7B: RRA - Absolute, Y
7C:
7D: ADC - Absolute, X
7E: ROR - Absolute, X
7F: RRA - Absolute, X
80:
81: STA - (Zero Page, X)
82:
83: SAX - (Zero Page, X)
84: STY - Zero Page
85: STA - Zero Page
86: STX - Zero Page
87: SAX - Zero Page
88: DEY - Implied
89:
8A: TXA - Implied
8B: ANE - Immediate
8C: STY - Absolute
8D: STA - Absolute
8E: STX - Absolute
8F: SAX - Absolute
90: BCC - Relative
91: STA - (Zero Page), Y
92:
93: SHA - (Zero Page), Y
94: STY - Zero Page, X
95: STA - Zero Page, X
96: STX - Zero Page, Y
97: SAX - Zero Page, Y
98: TYA - Implied
99: STA - Absolute, Y
9A: TXS - Implied
9B: SHS - Absolute, Y
9C:
9D: STA - Absolute, X
9E: SHX - Absolute, Y
9F: SHA - Absolute, Y
A0: LDY - Immediate
A1: LDA - (Zero Page, X)
A2: LDX - Immediate
A3: LAX - (Zero Page, X)
A4: LDY - Zero Page
A5: LDA - Zero Page
A6: LDX - Zero Page
A7: LAX - Zero Page
A8: TAY - Implied
A9: LDA - Immediate
AA: TAX - Implied
AB: LXA - Immediate
AC: LDY - Absolute
AD: LDA - Absolute
AE: LDX - Absolute
AF: LAX - Absolute
B0: BCS - Relative
B1: LDA - (Zero Page), Y
B2:
B3: LAX - (Zero Page), Y
B4: LDY - Zero Page, X
B5: LDA - Zero Page, X
B6: LDX - Zero Page, Y
B7: LAX - Zero Page, Y
B8: CLV - Implied
B9: LDA - Absolute, Y
BA: TSX - Implied
BB: LAS - Absolute, Y
BC: LDY - Absolute, X
BD: LDA - Absolute, X
BE: LDX - Absolute, Y
BF: LAX - Absolute, Y
C0: CPY - Immediate
C1: CMP - (Zero Page, X)
C2:
C3: DCP - (Zero Page, X)
C4: CPY - Zero Page
C5: CMP - Zero Page
C6: DEC - Zero Page
C7: DCP - Zero Page
C8: INY - Implied
C9: CMP - Immediate
CA: DEX - Implied
CB: SBX - Immediate
CC: CPY - Absolute
CD: CMP - Absolute
CE: DEC - Absolute
CF: DCP - Absolute
D0: BNE - Relative
D1: CMP - (Zero Page), Y
D2:
D3: DCP - (Zero Page), Y
D4:
D5: CMP - Zero Page, X
D6: DEC - Zero Page, X
D7: DCP - Zero Page, X
D8: CLD - Implied
D9: CMP - Absolute, Y
DA:
DB: DCP - Absolute, Y
DC:
DD: CMP - Absolute, X
DE: DEC - Absolute, X
DF: DCP - Absolute, X
E0: CPX - Immediate
E1: SBC - (Zero Page, X)
E2:
E3: ISB - (Zero Page, X)
E4: CPX - Zero Page
E5: SBC - Zero Page
E6: INC - Zero Page
E7: ISB - Zero Page
E8: INX - Implied
E9: SBC - Immediate
EA: NOP - Implied
EB:
EC: CPX - Absolute
ED: SBC - Absolute
EE: INC - Absolute
EF: ISB - Absolute
F0: BEQ - Relative
F1: SBC - (Zero Page), Y
F2:
F3: ISB - (Zero Page), Y
F4:
F5: SBC - Zero Page, X
F6: INC - Zero Page, X
F7: ISB - Zero Page, X
F8: SED - Implied
F9: SBC - Absolute, Y
FA:
FB: ISB - Absolute, Y
FC:
FD: SBC - Absolute, X
FE: INC - Absolute, X
FF: ISB - Absolute, X