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Add the NOP Zero Page undocumented opcode.
This seems to be one of the preferred undocced ops in the Atari 2600 VCS development community.
This commit is contained in:
Michael C. Martin
parent
196cb47f05
commit
af50326e39
@ -7,6 +7,10 @@
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# You may use, modify, and distribute this file under the MIT
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# You may use, modify, and distribute this file under the MIT
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# license: See README for details.
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# license: See README for details.
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# DO NOT EDIT THIS FILE DIRECTLY.
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# This file was automatically generated by gensets.py based on the
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# the tables in tools/opcodes. Edit those tables, not these.
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# Names of addressing modes
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# Names of addressing modes
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modes = ["Implied", # 0
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modes = ["Implied", # 0
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"Immediate", # 1
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"Immediate", # 1
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@ -96,6 +100,7 @@ undocops = {
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'las': [None, None, None, None, None, None, None, 0xBB, None, None, None, None, None, None, None],
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'las': [None, None, None, None, None, None, None, 0xBB, None, None, None, None, None, None, None],
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'lax': [None, None, 0xA7, None, 0xB7, 0xAF, None, 0xBF, None, None, None, None, 0xA3, 0xB3, None],
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'lax': [None, None, 0xA7, None, 0xB7, 0xAF, None, 0xBF, None, None, None, None, 0xA3, 0xB3, None],
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'lxa': [None, 0xAB, None, None, None, None, None, None, None, None, None, None, None, None, None],
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'lxa': [None, 0xAB, None, None, None, None, None, None, None, None, None, None, None, None, None],
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'nop': [0xEA, None, 0x04, None, None, None, None, None, None, None, None, None, None, None, None],
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'rla': [None, None, 0x27, 0x37, None, 0x2F, 0x3F, 0x3B, None, None, None, None, 0x23, 0x33, None],
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'rla': [None, None, 0x27, 0x37, None, 0x2F, 0x3F, 0x3B, None, None, None, None, 0x23, 0x33, None],
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'rra': [None, None, 0x67, 0x77, None, 0x6F, 0x7F, 0x7B, None, None, None, None, 0x63, 0x73, None],
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'rra': [None, None, 0x67, 0x77, None, 0x6F, 0x7F, 0x7B, None, None, None, None, 0x63, 0x73, None],
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'sax': [None, None, 0x87, None, 0x97, 0x8F, None, None, None, None, None, None, 0x83, None, None],
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'sax': [None, None, 0x87, None, 0x97, 0x8F, None, None, None, None, None, None, 0x83, None, None],
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@ -1 +1 @@
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##''///3377;;;???CCGGKKOOOSSWW[[[___ccggkkooossww{{{儍噰媼弿彄摋棝洓灋灍煙＃Ё<EFBC83><D081><EFBFBD>撤坊换靠棵们撬讼舷佑鬃圹圻哌沣珑镲矬篦鼷<E7AFA6><E9BCB7><EFBFBD><EFBFBD>
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##''///3377;;;???CCGGKKOOOSSWW[[[___ccggkkooossww{{{儍噰媼弿彄摋棝洓灋灍煙＃Ё<EFBC83><D081><EFBFBD>撤坊换靠棵们撬讼舷佑鬃圹圻哌沣珑镲矬篦鼷<E7AFA6><E9BCB7><EFBFBD><EFBFBD>
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@ -1,78 +1,79 @@
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; Test file for base 6510 undocumented opcode compliance
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; Test file for base 6510 undocumented opcode compliance
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; This odd little source file uses every addressing mode
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; This odd little source file uses every addressing mode
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; of every opcode, and uses the opcode itself as the argument
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; of every opcode, and uses the opcode itself as the argument
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; to each instruction that takes one. The resulting binary's
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; to each instruction that takes one. The resulting binary's
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; bytes are thus in strictly increasing numerical order.
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; bytes are thus in strictly increasing numerical order.
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; Many mnemonics have multiple opcodes with identical
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; Many mnemonics have multiple opcodes with identical
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; effects; Ophis chooses one of them and the arguments
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; effects; Ophis chooses one of them and the arguments
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; herein assume that any assembler will choose as Ophis
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; herein assume that any assembler will choose as Ophis
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; does.
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; does.
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; This file also doesn't include the 6502's *documented*
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; This file also doesn't include the 6502's *documented*
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; opcodes - see testbase.oph for those.
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; opcodes - see testbase.oph for those.
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SLO ($03, X)
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SLO ($03, X)
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SLO $07
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NOP $04
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ANC #$0B
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SLO $07
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SLO $0F0F
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ANC #$0B
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SLO ($13), Y
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SLO $0F0F
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SLO $17, X
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SLO ($13), Y
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SLO $1B1B, Y
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SLO $17, X
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SLO $1F1F, X
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SLO $1B1B, Y
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RLA ($23, X)
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SLO $1F1F, X
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RLA $27
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RLA ($23, X)
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RLA $2F2F
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RLA $27
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RLA ($33), Y
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RLA $2F2F
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RLA $37, X
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RLA ($33), Y
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RLA $3B3B, Y
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RLA $37, X
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RLA $3F3F, X
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RLA $3B3B, Y
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SRE ($43, X)
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RLA $3F3F, X
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SRE $47
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SRE ($43, X)
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ASR #$4B
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SRE $47
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SRE $4F4F
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ASR #$4B
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SRE ($53), Y
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SRE $4F4F
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SRE $57, X
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SRE ($53), Y
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SRE $5B5B, Y
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SRE $57, X
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SRE $5F5F, X
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SRE $5B5B, Y
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RRA ($63, X)
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SRE $5F5F, X
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RRA $67
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RRA ($63, X)
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ARR #$6B
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RRA $67
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RRA $6F6F
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ARR #$6B
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RRA ($73), Y
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RRA $6F6F
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RRA $77, X
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RRA ($73), Y
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RRA $7B7B, Y
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RRA $77, X
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RRA $7F7F, X
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RRA $7B7B, Y
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SAX ($83, X)
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RRA $7F7F, X
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SAX $87
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SAX ($83, X)
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ANE #$8B
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SAX $87
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SAX $8F8F
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ANE #$8B
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SHA ($93), Y
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SAX $8F8F
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SAX $97, Y
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SHA ($93), Y
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SHS $9B9B, Y
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SAX $97, Y
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SHX $9E9E, Y
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SHS $9B9B, Y
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SHA $9F9F, Y
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SHX $9E9E, Y
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LAX ($A3, X)
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SHA $9F9F, Y
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LAX $A7
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LAX ($A3, X)
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LXA #$AB
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LAX $A7
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LAX $AFAF
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LXA #$AB
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LAX ($B3), Y
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LAX $AFAF
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LAX $B7, Y
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LAX ($B3), Y
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LAS $BBBB, Y
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LAX $B7, Y
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LAX $BFBF, Y
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LAS $BBBB, Y
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DCP ($C3, X)
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LAX $BFBF, Y
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DCP $C7
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DCP ($C3, X)
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SBX #$CB
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DCP $C7
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DCP $CFCF
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SBX #$CB
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DCP ($D3), Y
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DCP $CFCF
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DCP $D7, X
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DCP ($D3), Y
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DCP $DBDB, Y
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DCP $D7, X
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DCP $DFDF, X
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DCP $DBDB, Y
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ISB ($E3, X)
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DCP $DFDF, X
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ISB $E7
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ISB ($E3, X)
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ISB $EFEF
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ISB $E7
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ISB ($F3), Y
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ISB $EFEF
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ISB $F7, X
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ISB ($F3), Y
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ISB $FBFB, Y
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ISB $F7, X
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ISB $FFFF, X
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ISB $FBFB, Y
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ISB $FFFF, X
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@ -3,31 +3,35 @@ import sys
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verbose = 0
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verbose = 0
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prologue = '"""' + """Opcodes file.
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prologue = '"""' +"""Opcodes file.
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Tables for the assembly of 6502-family instructions, mapping
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Tables for the assembly of 6502-family instructions, mapping
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opcodes and addressing modes to binary instructions.""" + '"""' + """
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opcodes and addressing modes to binary instructions.""" + '"""' + """
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# Copyright 2002 Michael C. Martin.
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# Copyright 2002-2012 Michael C. Martin and additional contributors.
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# You may use, modify, and distribute this file under the BSD
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# You may use, modify, and distribute this file under the MIT
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# license: See LICENSE.txt for details.
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# license: See README for details.
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# DO NOT EDIT THIS FILE DIRECTLY.
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# This file was automatically generated by gensets.py based on the
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# the tables in tools/opcodes. Edit those tables, not these.
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# Names of addressing modes
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# Names of addressing modes
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modes = ["Implied", # 0
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modes = ["Implied", # 0
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"Immediate", # 1
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"Immediate", # 1
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"Zero Page", # 2
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"Zero Page", # 2
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"Zero Page, X", # 3
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"Zero Page, X", # 3
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"Zero Page, Y", # 4
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"Zero Page, Y", # 4
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"Absolute", # 5
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"Absolute", # 5
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"Absolute, X", # 6
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"Absolute, X", # 6
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"Absolute, Y", # 7
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"Absolute, Y", # 7
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"(Absolute)", # 8
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"(Absolute)", # 8
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"(Absolute, X)", # 9
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"(Absolute, X)", # 9
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"(Absolute), Y", # 10
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"(Absolute), Y", # 10
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"(Zero Page)", # 11
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"(Zero Page)", # 11
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"(Zero Page, X)", # 12
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"(Zero Page, X)", # 12
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"(Zero Page), Y", # 13
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"(Zero Page), Y", # 13
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"Relative"] # 14
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"Relative"] # 14
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# Lengths of the argument
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# Lengths of the argument
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lengths = [0, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1]
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lengths = [0, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1]
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@ -35,20 +39,20 @@ lengths = [0, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1]
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# These values should match the ones in the prologue string.
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# These values should match the ones in the prologue string.
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modes = ["Implied", # 0
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modes = ["Implied", # 0
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"Immediate", # 1
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"Immediate", # 1
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"Zero Page", # 2
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"Zero Page", # 2
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"Zero Page, X", # 3
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"Zero Page, X", # 3
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"Zero Page, Y", # 4
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"Zero Page, Y", # 4
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"Absolute", # 5
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"Absolute", # 5
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"Absolute, X", # 6
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"Absolute, X", # 6
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"Absolute, Y", # 7
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"Absolute, Y", # 7
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"(Absolute)", # 8
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"(Absolute)", # 8
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"(Absolute, X)", # 9
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"(Absolute, X)", # 9
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"(Absolute), Y", # 10
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"(Absolute), Y", # 10
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"(Zero Page)", # 11
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"(Zero Page)", # 11
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"(Zero Page, X)", # 12
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"(Zero Page, X)", # 12
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"(Zero Page), Y", # 13
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"(Zero Page), Y", # 13
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"Relative"] # 14
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"Relative"] # 14
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flatmodes = [x.lower() for x in modes]
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flatmodes = [x.lower() for x in modes]
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@ -150,4 +154,3 @@ if __name__=='__main__':
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dump_map (instruction_map, ' ' * (len(field) + 4))
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dump_map (instruction_map, ' ' * (len(field) + 4))
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print "%s}" % (' ' * (len(field) + 3))
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print "%s}" % (' ' * (len(field) + 3))
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print ""
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print ""
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@ -1,256 +1,256 @@
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00: BRK - Implied
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00: BRK - Implied
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01: ORA - (Zero Page, X)
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01: ORA - (Zero Page, X)
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02:
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02:
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03: SLO - (Zero Page, X)
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03: SLO - (Zero Page, X)
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04:
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04: NOP - Zero Page
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05: ORA - Zero Page
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05: ORA - Zero Page
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06: ASL - Zero Page
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06: ASL - Zero Page
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07: SLO - Zero Page
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07: SLO - Zero Page
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08: PHP - Implied
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08: PHP - Implied
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09: ORA - Immediate
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09: ORA - Immediate
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0A: ASL - Implied
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0A: ASL - Implied
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0B: ANC - Immediate
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0B: ANC - Immediate
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0C:
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0C:
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0D: ORA - Absolute
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0D: ORA - Absolute
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0E: ASL - Absolute
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0E: ASL - Absolute
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0F: SLO - Absolute
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0F: SLO - Absolute
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10: BPL - Relative
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10: BPL - Relative
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11: ORA - (Zero Page), Y
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11: ORA - (Zero Page), Y
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12:
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12:
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13: SLO - (Zero Page), Y
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13: SLO - (Zero Page), Y
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14:
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14:
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15: ORA - Zero Page, X
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15: ORA - Zero Page, X
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16: ASL - Zero Page, X
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16: ASL - Zero Page, X
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17: SLO - Zero Page, X
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17: SLO - Zero Page, X
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18: CLC - Implied
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18: CLC - Implied
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19: ORA - Absolute, Y
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19: ORA - Absolute, Y
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1A:
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1A:
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1B: SLO - Absolute, Y
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1B: SLO - Absolute, Y
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1C:
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1C:
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1D: ORA - Absolute, X
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1D: ORA - Absolute, X
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1E: ASL - Absolute, X
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1E: ASL - Absolute, X
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1F: SLO - Absolute, X
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1F: SLO - Absolute, X
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20: JSR - Absolute
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20: JSR - Absolute
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21: AND - (Zero Page, X)
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21: AND - (Zero Page, X)
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22:
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22:
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23: RLA - (Zero Page, X)
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23: RLA - (Zero Page, X)
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24: BIT - Zero Page
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24: BIT - Zero Page
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25: AND - Zero Page
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25: AND - Zero Page
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26: ROL - Zero Page
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26: ROL - Zero Page
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27: RLA - Zero Page
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27: RLA - Zero Page
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28: PLP - Implied
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28: PLP - Implied
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29: AND - Immediate
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29: AND - Immediate
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2A: ROL - Implied
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2A: ROL - Implied
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2B:
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2B:
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2C: BIT - Absolute
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2C: BIT - Absolute
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2D: AND - Absolute
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2D: AND - Absolute
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2E: ROL - Absolute
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2E: ROL - Absolute
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2F: RLA - Absolute
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2F: RLA - Absolute
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30: BMI - Relative
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30: BMI - Relative
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31: AND - (Zero Page), Y
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31: AND - (Zero Page), Y
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32:
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32:
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33: RLA - (Zero Page), Y
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33: RLA - (Zero Page), Y
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34:
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34:
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35: AND - Zero Page, X
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35: AND - Zero Page, X
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36: ROL - Zero Page, X
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36: ROL - Zero Page, X
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37: RLA - Zero Page, X
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37: RLA - Zero Page, X
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38: SEC - Implied
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38: SEC - Implied
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39: AND - Absolute, Y
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39: AND - Absolute, Y
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3A:
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3A:
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3B: RLA - Absolute, Y
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3B: RLA - Absolute, Y
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3C:
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3C:
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3D: AND - Absolute, X
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3D: AND - Absolute, X
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3E: ROL - Absolute, X
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3E: ROL - Absolute, X
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3F: RLA - Absolute, X
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3F: RLA - Absolute, X
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40: RTI - Implied
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40: RTI - Implied
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41: EOR - (Zero Page, X)
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41: EOR - (Zero Page, X)
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42:
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42:
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43: SRE - (Zero Page, X)
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43: SRE - (Zero Page, X)
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44:
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44:
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45: EOR - Zero Page
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45: EOR - Zero Page
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46: LSR - Zero Page
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46: LSR - Zero Page
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47: SRE - Zero Page
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47: SRE - Zero Page
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48: PHA - Implied
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48: PHA - Implied
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49: EOR - Immediate
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49: EOR - Immediate
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4A: LSR - Implied
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4A: LSR - Implied
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4B: ASR - Immediate
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4B: ASR - Immediate
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4C: JMP - Absolute
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4C: JMP - Absolute
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4D: EOR - Absolute
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4D: EOR - Absolute
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4E: LSR - Absolute
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4E: LSR - Absolute
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4F: SRE - Absolute
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4F: SRE - Absolute
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50: BVC - Relative
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50: BVC - Relative
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51: EOR - (Zero Page), Y
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51: EOR - (Zero Page), Y
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52:
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52:
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53: SRE - (Zero Page), Y
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53: SRE - (Zero Page), Y
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54:
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54:
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55: EOR - Zero Page, X
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55: EOR - Zero Page, X
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56: LSR - Zero Page, X
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56: LSR - Zero Page, X
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57: SRE - Zero Page, X
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57: SRE - Zero Page, X
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58: CLI - Implied
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58: CLI - Implied
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59: EOR - Absolute, Y
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59: EOR - Absolute, Y
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5A:
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5A:
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5B: SRE - Absolute, Y
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5B: SRE - Absolute, Y
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5C:
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5C:
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5D: EOR - Absolute, X
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5D: EOR - Absolute, X
|
||||||
5E: LSR - Absolute, X
|
5E: LSR - Absolute, X
|
||||||
5F: SRE - Absolute, X
|
5F: SRE - Absolute, X
|
||||||
60: RTS - Implied
|
60: RTS - Implied
|
||||||
61: ADC - (Zero Page, X)
|
61: ADC - (Zero Page, X)
|
||||||
62:
|
62:
|
||||||
63: RRA - (Zero Page, X)
|
63: RRA - (Zero Page, X)
|
||||||
64:
|
64:
|
||||||
65: ADC - Zero Page
|
65: ADC - Zero Page
|
||||||
66: ROR - Zero Page
|
66: ROR - Zero Page
|
||||||
67: RRA - Zero Page
|
67: RRA - Zero Page
|
||||||
68: PLA - Implied
|
68: PLA - Implied
|
||||||
69: ADC - Immediate
|
69: ADC - Immediate
|
||||||
6A: ROR - Implied
|
6A: ROR - Implied
|
||||||
6B: ARR - Immediate
|
6B: ARR - Immediate
|
||||||
6C: JMP - (Absolute)
|
6C: JMP - (Absolute)
|
||||||
6D: ADC - Absolute
|
6D: ADC - Absolute
|
||||||
6E: ROR - Absolute
|
6E: ROR - Absolute
|
||||||
6F: RRA - Absolute
|
6F: RRA - Absolute
|
||||||
70: BVS - Relative
|
70: BVS - Relative
|
||||||
71: ADC - (Zero Page), Y
|
71: ADC - (Zero Page), Y
|
||||||
72:
|
72:
|
||||||
73: RRA - (Zero Page), Y
|
73: RRA - (Zero Page), Y
|
||||||
74:
|
74:
|
||||||
75: ADC - Zero Page, X
|
75: ADC - Zero Page, X
|
||||||
76: ROR - Zero Page, X
|
76: ROR - Zero Page, X
|
||||||
77: RRA - Zero Page, X
|
77: RRA - Zero Page, X
|
||||||
78: SEI - Implied
|
78: SEI - Implied
|
||||||
79: ADC - Absolute, Y
|
79: ADC - Absolute, Y
|
||||||
7A:
|
7A:
|
||||||
7B: RRA - Absolute, Y
|
7B: RRA - Absolute, Y
|
||||||
7C:
|
7C:
|
||||||
7D: ADC - Absolute, X
|
7D: ADC - Absolute, X
|
||||||
7E: ROR - Absolute, X
|
7E: ROR - Absolute, X
|
||||||
7F: RRA - Absolute, X
|
7F: RRA - Absolute, X
|
||||||
80:
|
80:
|
||||||
81: STA - (Zero Page, X)
|
81: STA - (Zero Page, X)
|
||||||
82:
|
82:
|
||||||
83: SAX - (Zero Page, X)
|
83: SAX - (Zero Page, X)
|
||||||
84: STY - Zero Page
|
84: STY - Zero Page
|
||||||
85: STA - Zero Page
|
85: STA - Zero Page
|
||||||
86: STX - Zero Page
|
86: STX - Zero Page
|
||||||
87: SAX - Zero Page
|
87: SAX - Zero Page
|
||||||
88: DEY - Implied
|
88: DEY - Implied
|
||||||
89:
|
89:
|
||||||
8A: TXA - Implied
|
8A: TXA - Implied
|
||||||
8B: ANE - Immediate
|
8B: ANE - Immediate
|
||||||
8C: STY - Absolute
|
8C: STY - Absolute
|
||||||
8D: STA - Absolute
|
8D: STA - Absolute
|
||||||
8E: STX - Absolute
|
8E: STX - Absolute
|
||||||
8F: SAX - Absolute
|
8F: SAX - Absolute
|
||||||
90: BCC - Relative
|
90: BCC - Relative
|
||||||
91: STA - (Zero Page), Y
|
91: STA - (Zero Page), Y
|
||||||
92:
|
92:
|
||||||
93: SHA - (Zero Page), Y
|
93: SHA - (Zero Page), Y
|
||||||
94: STY - Zero Page, X
|
94: STY - Zero Page, X
|
||||||
95: STA - Zero Page, X
|
95: STA - Zero Page, X
|
||||||
96: STX - Zero Page, Y
|
96: STX - Zero Page, Y
|
||||||
97: SAX - Zero Page, Y
|
97: SAX - Zero Page, Y
|
||||||
98: TYA - Implied
|
98: TYA - Implied
|
||||||
99: STA - Absolute, Y
|
99: STA - Absolute, Y
|
||||||
9A: TXS - Implied
|
9A: TXS - Implied
|
||||||
9B: SHS - Absolute, Y
|
9B: SHS - Absolute, Y
|
||||||
9C:
|
9C:
|
||||||
9D: STA - Absolute, X
|
9D: STA - Absolute, X
|
||||||
9E: SHX - Absolute, Y
|
9E: SHX - Absolute, Y
|
||||||
9F: SHA - Absolute, Y
|
9F: SHA - Absolute, Y
|
||||||
A0: LDY - Immediate
|
A0: LDY - Immediate
|
||||||
A1: LDA - (Zero Page, X)
|
A1: LDA - (Zero Page, X)
|
||||||
A2: LDX - Immediate
|
A2: LDX - Immediate
|
||||||
A3: LAX - (Zero Page, X)
|
A3: LAX - (Zero Page, X)
|
||||||
A4: LDY - Zero Page
|
A4: LDY - Zero Page
|
||||||
A5: LDA - Zero Page
|
A5: LDA - Zero Page
|
||||||
A6: LDX - Zero Page
|
A6: LDX - Zero Page
|
||||||
A7: LAX - Zero Page
|
A7: LAX - Zero Page
|
||||||
A8: TAY - Implied
|
A8: TAY - Implied
|
||||||
A9: LDA - Immediate
|
A9: LDA - Immediate
|
||||||
AA: TAX - Implied
|
AA: TAX - Implied
|
||||||
AB: LXA - Immediate
|
AB: LXA - Immediate
|
||||||
AC: LDY - Absolute
|
AC: LDY - Absolute
|
||||||
AD: LDA - Absolute
|
AD: LDA - Absolute
|
||||||
AE: LDX - Absolute
|
AE: LDX - Absolute
|
||||||
AF: LAX - Absolute
|
AF: LAX - Absolute
|
||||||
B0: BCS - Relative
|
B0: BCS - Relative
|
||||||
B1: LDA - (Zero Page), Y
|
B1: LDA - (Zero Page), Y
|
||||||
B2:
|
B2:
|
||||||
B3: LAX - (Zero Page), Y
|
B3: LAX - (Zero Page), Y
|
||||||
B4: LDY - Zero Page, X
|
B4: LDY - Zero Page, X
|
||||||
B5: LDA - Zero Page, X
|
B5: LDA - Zero Page, X
|
||||||
B6: LDX - Zero Page, Y
|
B6: LDX - Zero Page, Y
|
||||||
B7: LAX - Zero Page, Y
|
B7: LAX - Zero Page, Y
|
||||||
B8: CLV - Implied
|
B8: CLV - Implied
|
||||||
B9: LDA - Absolute, Y
|
B9: LDA - Absolute, Y
|
||||||
BA: TSX - Implied
|
BA: TSX - Implied
|
||||||
BB: LAS - Absolute, Y
|
BB: LAS - Absolute, Y
|
||||||
BC: LDY - Absolute, X
|
BC: LDY - Absolute, X
|
||||||
BD: LDA - Absolute, X
|
BD: LDA - Absolute, X
|
||||||
BE: LDX - Absolute, Y
|
BE: LDX - Absolute, Y
|
||||||
BF: LAX - Absolute, Y
|
BF: LAX - Absolute, Y
|
||||||
C0: CPY - Immediate
|
C0: CPY - Immediate
|
||||||
C1: CMP - (Zero Page, X)
|
C1: CMP - (Zero Page, X)
|
||||||
C2:
|
C2:
|
||||||
C3: DCP - (Zero Page, X)
|
C3: DCP - (Zero Page, X)
|
||||||
C4: CPY - Zero Page
|
C4: CPY - Zero Page
|
||||||
C5: CMP - Zero Page
|
C5: CMP - Zero Page
|
||||||
C6: DEC - Zero Page
|
C6: DEC - Zero Page
|
||||||
C7: DCP - Zero Page
|
C7: DCP - Zero Page
|
||||||
C8: INY - Implied
|
C8: INY - Implied
|
||||||
C9: CMP - Immediate
|
C9: CMP - Immediate
|
||||||
CA: DEX - Implied
|
CA: DEX - Implied
|
||||||
CB: SBX - Immediate
|
CB: SBX - Immediate
|
||||||
CC: CPY - Absolute
|
CC: CPY - Absolute
|
||||||
CD: CMP - Absolute
|
CD: CMP - Absolute
|
||||||
CE: DEC - Absolute
|
CE: DEC - Absolute
|
||||||
CF: DCP - Absolute
|
CF: DCP - Absolute
|
||||||
D0: BNE - Relative
|
D0: BNE - Relative
|
||||||
D1: CMP - (Zero Page), Y
|
D1: CMP - (Zero Page), Y
|
||||||
D2:
|
D2:
|
||||||
D3: DCP - (Zero Page), Y
|
D3: DCP - (Zero Page), Y
|
||||||
D4:
|
D4:
|
||||||
D5: CMP - Zero Page, X
|
D5: CMP - Zero Page, X
|
||||||
D6: DEC - Zero Page, X
|
D6: DEC - Zero Page, X
|
||||||
D7: DCP - Zero Page, X
|
D7: DCP - Zero Page, X
|
||||||
D8: CLD - Implied
|
D8: CLD - Implied
|
||||||
D9: CMP - Absolute, Y
|
D9: CMP - Absolute, Y
|
||||||
DA:
|
DA:
|
||||||
DB: DCP - Absolute, Y
|
DB: DCP - Absolute, Y
|
||||||
DC:
|
DC:
|
||||||
DD: CMP - Absolute, X
|
DD: CMP - Absolute, X
|
||||||
DE: DEC - Absolute, X
|
DE: DEC - Absolute, X
|
||||||
DF: DCP - Absolute, X
|
DF: DCP - Absolute, X
|
||||||
E0: CPX - Immediate
|
E0: CPX - Immediate
|
||||||
E1: SBC - (Zero Page, X)
|
E1: SBC - (Zero Page, X)
|
||||||
E2:
|
E2:
|
||||||
E3: ISB - (Zero Page, X)
|
E3: ISB - (Zero Page, X)
|
||||||
E4: CPX - Zero Page
|
E4: CPX - Zero Page
|
||||||
E5: SBC - Zero Page
|
E5: SBC - Zero Page
|
||||||
E6: INC - Zero Page
|
E6: INC - Zero Page
|
||||||
E7: ISB - Zero Page
|
E7: ISB - Zero Page
|
||||||
E8: INX - Implied
|
E8: INX - Implied
|
||||||
E9: SBC - Immediate
|
E9: SBC - Immediate
|
||||||
EA: NOP - Implied
|
EA: NOP - Implied
|
||||||
EB:
|
EB:
|
||||||
EC: CPX - Absolute
|
EC: CPX - Absolute
|
||||||
ED: SBC - Absolute
|
ED: SBC - Absolute
|
||||||
EE: INC - Absolute
|
EE: INC - Absolute
|
||||||
EF: ISB - Absolute
|
EF: ISB - Absolute
|
||||||
F0: BEQ - Relative
|
F0: BEQ - Relative
|
||||||
F1: SBC - (Zero Page), Y
|
F1: SBC - (Zero Page), Y
|
||||||
F2:
|
F2:
|
||||||
F3: ISB - (Zero Page), Y
|
F3: ISB - (Zero Page), Y
|
||||||
F4:
|
F4:
|
||||||
F5: SBC - Zero Page, X
|
F5: SBC - Zero Page, X
|
||||||
F6: INC - Zero Page, X
|
F6: INC - Zero Page, X
|
||||||
F7: ISB - Zero Page, X
|
F7: ISB - Zero Page, X
|
||||||
F8: SED - Implied
|
F8: SED - Implied
|
||||||
F9: SBC - Absolute, Y
|
F9: SBC - Absolute, Y
|
||||||
FA:
|
FA:
|
||||||
FB: ISB - Absolute, Y
|
FB: ISB - Absolute, Y
|
||||||
FC:
|
FC:
|
||||||
FD: SBC - Absolute, X
|
FD: SBC - Absolute, X
|
||||||
FE: INC - Absolute, X
|
FE: INC - Absolute, X
|
||||||
FF: ISB - Absolute, X
|
FF: ISB - Absolute, X
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user