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Tito Hinostroza
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14
CPUCore.pas
14
CPUCore.pas
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@ -99,14 +99,13 @@ type
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maxUsed : dword; //Dirección mayor de la ROM usdas
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hexLines : TStringList; //Uusado para crear archivo *.hex
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public //Memories
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ram : TCPURam; //memoria RAM
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ram : TCPURam; //RAM memory
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iRam : integer; //puntero a la memoria RAM, para escribir cuando se ensambla o compila código.
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function DisassemblerAt(addr: word; out nBytesProc: byte; useVarName: boolean
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): string; virtual; abstract; //Desensambla la instrucción actual
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public //RAM memory functions
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hasDataAdrr: integer; //Flag/index to indicate a Data block has defined.
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dataAddr1: integer; //Start address for Data variables (-1 if not used)
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dataAddr2: integer;
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dataAddr1: integer; //Start address for Data variables (-1 if not used). Used too as flag.
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dataAddr2: integer; //End address for Data variables (-1 if not used)
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procedure ClearMemRAM;
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procedure DisableAllRAM;
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procedure SetStatRAM(i1, i2: word; status0: TCPUCellState);
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@ -129,7 +128,7 @@ type
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procedure Exec; virtual; abstract; //Ejecuta instrucción actual
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procedure ExecTo(endAdd: word); virtual; abstract; //Ejecuta hasta cierta dirección
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procedure ExecStep; virtual; abstract; //Execute one instruction considering CALL as one instruction
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procedure ExecNCycles(nCyc: integer; out stopped: boolean); virtual; abstract; //Ejecuta hasta cierta dirección
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procedure ExecNCycles(nCyc: integer; out stopped: boolean); virtual; abstract; //Execute "n" cycles
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procedure Reset(hard: boolean); virtual; abstract;
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function ReadPC: dword; virtual; abstract; //Defined DWORD to cover the 18F PC register
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procedure WritePC(AValue: dword); virtual; abstract;
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@ -312,7 +311,7 @@ begin
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com := UpCase(trim(strDef));
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if com='' then begin
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hasDataAdrr := -1; //Disable
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dataAddr1 := -1; //Disable
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exit;
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end;
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//Find Address1
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@ -328,7 +327,6 @@ begin
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exit(false);
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end;
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//Ya se tienen los parámetros, para definir la memoria
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hasDataAdrr := add1; //Set flag
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dataAddr1 := add1; //Save
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dataAddr2 := add2; //Save end
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end;
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@ -466,7 +464,7 @@ end;
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//Initialization
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constructor TCPUCore.Create;
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begin
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hasDataAdrr := -1; //Disable
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dataAddr1 := -1; //Disable
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hexLines := TStringList.Create;
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frequen := 1000000; //4MHz
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end;
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@ -1,3 +1,8 @@
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0.3
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===
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Se elimina la bandera hasDataAdrr y se pasa a usar dataAddr1, como bandera y dirección inicial.
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Se corrige un error en la ejecución de la instrucción ROL.
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0.2
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===
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Se cambian variables a tipo dword para evitar desborde en TP6502.GetFreeBytes().
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@ -12,7 +12,7 @@
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<WindowIndex Value="-1"/>
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<TopLine Value="-1"/>
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<CursorPos X="-1" Y="-1"/>
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<UsageCount Value="61"/>
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<UsageCount Value="74"/>
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</Unit0>
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<Unit1>
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<Filename Value="unit1.pas"/>
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@ -21,19 +21,19 @@
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<HasResources Value="True"/>
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<ResourceBaseClass Value="Form"/>
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<UnitName Value="Unit1"/>
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<IsVisibleTab Value="True"/>
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<TopLine Value="135"/>
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<CursorPos X="20" Y="154"/>
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<UsageCount Value="61"/>
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<UsageCount Value="74"/>
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<Loaded Value="True"/>
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<LoadedDesigner Value="True"/>
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</Unit1>
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<Unit2>
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<Filename Value="..\P6502utils.pas"/>
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<IsVisibleTab Value="True"/>
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<EditorIndex Value="1"/>
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<TopLine Value="178"/>
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<CursorPos X="15" Y="202"/>
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<UsageCount Value="32"/>
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<TopLine Value="171"/>
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<CursorPos Y="171"/>
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<UsageCount Value="38"/>
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<Bookmarks Count="1">
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<Item0 Y="1211" ID="1"/>
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</Bookmarks>
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@ -42,9 +42,9 @@
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<Unit3>
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<Filename Value="..\CPUCore.pas"/>
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<EditorIndex Value="2"/>
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<TopLine Value="98"/>
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<TopLine Value="124"/>
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<CursorPos X="31" Y="121"/>
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<UsageCount Value="25"/>
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<UsageCount Value="31"/>
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<Bookmarks Count="1">
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<Item0 Y="117" ID="3"/>
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</Bookmarks>
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@ -55,123 +55,127 @@
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<EditorIndex Value="-1"/>
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<TopLine Value="2838"/>
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<CursorPos Y="2861"/>
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<UsageCount Value="10"/>
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<UsageCount Value="9"/>
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</Unit4>
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</Units>
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<JumpHistory Count="29" HistoryIndex="28">
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<JumpHistory Count="30" HistoryIndex="29">
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<Position1>
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<Filename Value="..\p6502utils.pas"/>
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<RunParams>
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<FormatVersion Value="2"/>
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625
P6502utils.pas
625
P6502utils.pas
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@ -539,7 +539,8 @@ Global variables used: "idIns", "modIns".
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}
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var
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nemo: String;
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opCode, par1, par2: Byte;
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opCode, par1: Byte;
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par2: word;
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begin
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if addr>CPUMAXRAM-1 then exit('');
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opCode := ram[addr].value;
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@ -564,11 +565,19 @@ begin
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aAbsolute: begin
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nBytesProc := 3;
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if addr+2>CPUMAXRAM-1 then exit('');
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par2 := ram[addr+2].value;
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Result := nemo + '$'+IntToHex(par1 + par2*256, 4);
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par2 := ram[addr+2].value<<8 + par1;
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if useVarName and (ram[par2].name<>'') then begin
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Result := nemo + ram[par2].name;
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end else begin
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Result := nemo + '$'+IntToHex(par2, 4);
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end;
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end;
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aZeroPage: begin
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Result := nemo + '$'+IntToHex(par1, 2);
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if useVarName and (ram[par1].name<>'') then begin
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Result := nemo + ram[par1].name;
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end else begin
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Result := nemo + '$'+IntToHex(par1, 2);
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end;
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nBytesProc := 2;
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end;
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aRelative: begin
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@ -633,8 +642,10 @@ Falta implementar las operaciones, cuando acceden al registro INDF, el Watchdog
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los contadores, las interrupciones}
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var
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opc: byte;
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nCycles, nBytes, tmp: byte;
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nCycles, nBytes, tmp, off: byte;
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target , addr: word;
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C_tmp: Boolean;
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tmpRes: integer;
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begin
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//Decodifica instrucción
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aPC := PC.W;
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@ -661,35 +672,233 @@ begin
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end;
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//Execute
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case idIns of
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i_ADC:; //add with carry
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i_AND:; //and (with accumulator)
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i_ASL:; //arithmetic shift left
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i_BCC:; //branch on carry clear
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i_BCS:; //branch on carry set
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i_BEQ:; //branch on equal (zero set)
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i_BIT:; //bit test
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i_BMI:; //branch on minus (negative set)
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i_BNE: begin
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i_ADC: begin //add with carry
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if STATUS_C then begin
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tmpRes := W + ram[addr].value + 1;
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end else begin
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tmpRes := W + ram[addr].value;
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end;
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W := tmpRes and $FF;
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STATUS_Z := W = 0;
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STATUS_N := W > 127;
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STATUS_C := tmpRes>255;
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end;
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i_AND: begin //and (with accumulator)
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W := W and ram[addr].value;
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STATUS_Z := W = 0;
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STATUS_N := W > 127;
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end;
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i_ASL: begin //arithmetic shift left
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if modIns = aAcumulat then tmp := W
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else tmp := ram[addr].value;
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end; //branch on not equal (zero clear)
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i_BPL:; //branch on plus (negative clear)
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i_BRK:; //break / interrupt
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i_BVC:; //branch on overflow clear
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i_BVS:; //branch on overflow set
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i_CLC: STATUS_C := false; //clear carry
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i_CLD: STATUS_D := false; //clear decimal
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i_CLI: STATUS_I := false; //clear interrupt disable
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i_CLV: STATUS_V := false; //clear overflow
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i_CMP:; //compare (with accumulator)
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i_CPX:; //compare with X
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i_CPY:; //compare with Y
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i_DEC:; //decrement
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i_DEX:; //decrement X
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i_DEY:; //decrement Y
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i_EOR:; //exclusive or (with accumulator)
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i_INC:; //increment
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i_INX:; //increment X
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i_INY:; //increment Y
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STATUS_C := (tmp and $80) <> 0; //Read bit 7
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tmp := tmp << 1;
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STATUS_Z := tmp = 0;
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STATUS_N := tmp > 127;
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if modIns = aAcumulat then W := tmp
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else ram[addr].value := tmp;
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end;
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i_BCC: begin //branch on carry clear
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if not STATUS_C then begin
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off := ram[aPC+1].value;
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Inc(PC.W, nBytes); //Normal Increase PC
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if off>127 then begin
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PC.W := (PC.W + off - 256) and $FFFF;
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end else begin
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PC.W := (PC.W + off) and $FFFF;
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end;
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//Inc(PC.W, nBytes); //No apply
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Inc(nClck, nCycles);
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exit;
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end;
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end;
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i_BCS: begin //branch on carry set
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if STATUS_C then begin
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off := ram[aPC+1].value;
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Inc(PC.W, nBytes); //Normal Increase PC
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if off>127 then begin
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PC.w := (PC.W + off - 256) and $FFFF;
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end else begin
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PC.W := (PC.W + off) and $FFFF;
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end;
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//Inc(PC.W, nBytes); //No apply
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Inc(nClck, nCycles);
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exit;
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end;
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end;
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i_BNE: begin //branch on not equal (zero clear)
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if not STATUS_Z then begin
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off := ram[aPC+1].value;
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Inc(PC.W, nBytes); //Normal Increase PC
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if off>127 then begin
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PC.W := (PC.W + off - 256) and $FFFF;
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end else begin
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PC.W := (PC.W + off) and $FFFF;
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end;
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//Inc(PC.W, nBytes); //No apply
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Inc(nClck, nCycles);
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exit;
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end;
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end;
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i_BEQ: begin //branch on equal (zero set)
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if STATUS_Z then begin
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off := ram[aPC+1].value;
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Inc(PC.W, nBytes); //Normal Increase PC
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if off>127 then begin
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PC.w := (PC.W + off - 256) and $FFFF;
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end else begin
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PC.W := (PC.W + off) and $FFFF;
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end;
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//Inc(PC.W, nBytes); //No apply
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Inc(nClck, nCycles);
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exit;
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end;
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end;
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i_BIT: begin //bit test
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STATUS_N := (ram[addr].value AND $80) <> 0;
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STATUS_V := (ram[addr].value AND $40) <> 0;
|
||||
STATUS_Z := (W and ram[addr].value) <> 0;
|
||||
end;
|
||||
i_BPL: begin //branch on plus (negative clear)
|
||||
if not STATUS_N then begin
|
||||
off := ram[aPC+1].value;
|
||||
Inc(PC.W, nBytes); //Normal Increase PC
|
||||
if off>127 then begin
|
||||
PC.W := (PC.W + off - 256) and $FFFF;
|
||||
end else begin
|
||||
PC.W := (PC.W + off) and $FFFF;
|
||||
end;
|
||||
//Inc(PC.W, nBytes); //No apply
|
||||
Inc(nClck, nCycles);
|
||||
exit;
|
||||
end;
|
||||
end;
|
||||
i_BMI: begin //branch on minus (negative set)
|
||||
if STATUS_N then begin
|
||||
off := ram[aPC+1].value;
|
||||
Inc(PC.W, nBytes); //Normal Increase PC
|
||||
if off>127 then begin
|
||||
PC.w := (PC.W + off - 256) and $FFFF;
|
||||
end else begin
|
||||
PC.W := (PC.W + off) and $FFFF;
|
||||
end;
|
||||
//Inc(PC.W, nBytes); //No apply
|
||||
Inc(nClck, nCycles);
|
||||
exit;
|
||||
end;
|
||||
end;
|
||||
i_BRK: begin //break / interrupt
|
||||
ram[$100 + SP].value := PC.L;
|
||||
if SP = $00 then SP := $FF else dec(SP);
|
||||
ram[$100 + SP].value := PC.H;
|
||||
if SP = $00 then SP := $FF else dec(SP);
|
||||
STATUS_I := true;
|
||||
ram[$100 + SP].value := SR;
|
||||
if SP = $00 then SP := $FF else dec(SP);
|
||||
PC.L := ram[$FFFE].value;
|
||||
PC.H := ram[$FFFF].value;
|
||||
end;
|
||||
i_BVC: begin //branch on overflow clear
|
||||
if not STATUS_V then begin
|
||||
off := ram[aPC+1].value;
|
||||
Inc(PC.W, nBytes); //Normal Increase PC
|
||||
if off>127 then begin
|
||||
PC.W := (PC.W + off - 256) and $FFFF;
|
||||
end else begin
|
||||
PC.W := (PC.W + off) and $FFFF;
|
||||
end;
|
||||
//Inc(PC.W, nBytes); //No apply
|
||||
Inc(nClck, nCycles);
|
||||
exit;
|
||||
end;
|
||||
end;
|
||||
i_BVS: begin //branch on overflow set
|
||||
if STATUS_V then begin
|
||||
off := ram[aPC+1].value;
|
||||
Inc(PC.W, nBytes); //Normal Increase PC
|
||||
if off>127 then begin
|
||||
PC.w := (PC.W + off - 256) and $FFFF;
|
||||
end else begin
|
||||
PC.W := (PC.W + off) and $FFFF;
|
||||
end;
|
||||
//Inc(PC.W, nBytes); //No apply
|
||||
Inc(nClck, nCycles);
|
||||
exit;
|
||||
end;
|
||||
end;
|
||||
i_CLC: STATUS_C := false; //clear carry
|
||||
i_CLD: STATUS_D := false; //clear decimal
|
||||
i_CLI: STATUS_I := false; //clear interrupt disable
|
||||
i_CLV: STATUS_V := false; //clear overflow
|
||||
i_CMP: begin //Compare (with accumulator)
|
||||
tmp := ram[addr].value;
|
||||
STATUS_Z := W = tmp;
|
||||
STATUS_C := W >= tmp;
|
||||
if W = tmp then begin
|
||||
STATUS_N := false;
|
||||
end else begin
|
||||
STATUS_N := ((W-tmp) and $80) <> 0; //Copy bit 7
|
||||
end;
|
||||
end;
|
||||
i_CPX: begin; //compare with X
|
||||
tmp := ram[addr].value;
|
||||
STATUS_Z := X = tmp;
|
||||
STATUS_C := X >= tmp;
|
||||
if X = tmp then begin
|
||||
STATUS_N := false;
|
||||
end else begin
|
||||
STATUS_N := ((X-tmp) and $80) <> 0; //Copy bit 7
|
||||
end;
|
||||
end;
|
||||
i_CPY: begin //compare with Y
|
||||
tmp := ram[addr].value;
|
||||
STATUS_Z := Y = tmp;
|
||||
STATUS_C := Y >= tmp;
|
||||
if Y = tmp then begin
|
||||
STATUS_N := false;
|
||||
end else begin
|
||||
STATUS_N := ((Y-tmp) and $80) <> 0; //Copy bit 7
|
||||
end;
|
||||
end;
|
||||
i_DEC: begin //decrement
|
||||
tmp := (ram[addr].value - 1) and $FF;
|
||||
ram[addr].value := tmp;
|
||||
STATUS_Z := tmp = 0;
|
||||
STATUS_N := tmp > 127;
|
||||
end;
|
||||
i_DEX: begin //decrement X
|
||||
X := (X - 1) and $FF;
|
||||
STATUS_Z := X = 0;
|
||||
STATUS_N := X > 127;
|
||||
end;
|
||||
i_DEY: begin //decrement Y
|
||||
Y := (Y - 1) and $FF;
|
||||
STATUS_Z := Y = 0;
|
||||
STATUS_N := Y > 127;
|
||||
end;
|
||||
i_EOR: begin //exclusive or (with accumulator)
|
||||
W := W xor ram[addr].value;
|
||||
STATUS_Z := W = 0;
|
||||
STATUS_N := W > 127;
|
||||
end;
|
||||
i_INC: begin //increment
|
||||
tmp := (ram[addr].value + 1) and $FF;
|
||||
ram[addr].value := tmp;
|
||||
STATUS_Z := tmp = 0;
|
||||
STATUS_N := tmp > 127;
|
||||
end;
|
||||
i_INX: begin //increment X
|
||||
X := (X + 1) and $FF;
|
||||
STATUS_Z := X = 0;
|
||||
STATUS_N := X > 127;
|
||||
end;
|
||||
i_INY: begin //increment Y
|
||||
Y := (Y + 1) and $FF;
|
||||
STATUS_Z := Y = 0;
|
||||
STATUS_N := Y > 127;
|
||||
end;
|
||||
i_JMP: begin //jump
|
||||
case modIns of
|
||||
aAbsolute : begin
|
||||
|
|
@ -734,22 +943,81 @@ begin
|
|||
STATUS_Z := Y = 0;
|
||||
STATUS_N := Y > 127;
|
||||
end;
|
||||
i_LSR:; //logical shift right
|
||||
i_NOP:; //no operation
|
||||
i_ORA:; //or with accumulator
|
||||
i_LSR: begin
|
||||
STATUS_N := false;
|
||||
if modIns = aAcumulat then tmp := W
|
||||
else tmp := ram[addr].value;
|
||||
|
||||
STATUS_C := (tmp and $01) <> 0;
|
||||
tmp := tmp >> 1;
|
||||
STATUS_Z := tmp = 0;
|
||||
|
||||
if modIns = aAcumulat then W := tmp
|
||||
else ram[addr].value := tmp;
|
||||
end; //logical shift right
|
||||
i_NOP: ; //no operation
|
||||
i_ORA: begin //or with accumulator
|
||||
W := W or ram[addr].value;
|
||||
STATUS_Z := W = 0;
|
||||
STATUS_N := W > 127;
|
||||
end;
|
||||
i_PHA: begin //push accumulator
|
||||
ram[$100 + SP].value := W;
|
||||
if SP = $00 then SP := $FF else dec(SP);
|
||||
end;
|
||||
i_PHP:; //push processor status (SR)
|
||||
i_PHP: begin //push processor status (SR)
|
||||
ram[$100 + SP].value := STATUS;
|
||||
if SP = $00 then SP := $FF else dec(SP);
|
||||
end;
|
||||
i_PLA: begin //pull accumulator
|
||||
if SP = $FF then SP := $00 else inc(SP);
|
||||
W := ram[$100 + SP].value;
|
||||
end;
|
||||
i_PLP:; //pull processor status (SR)
|
||||
i_ROL:; //rotate left
|
||||
i_ROR:; //rotate right
|
||||
i_RTI:; //return from interrupt
|
||||
i_PLP: begin //pull processor status (SR)
|
||||
if SP = $FF then SP := $00 else inc(SP);
|
||||
SR := ram[$100 + SP].value;
|
||||
end;
|
||||
i_ROL: begin //rotate left
|
||||
STATUS_N := false;
|
||||
if modIns = aAcumulat then tmp := W
|
||||
else tmp := ram[addr].value;
|
||||
|
||||
C_tmp := STATUS_C;
|
||||
STATUS_C := (tmp and $07) <> 0; //Get bit 7
|
||||
tmp := byte(tmp << 1);
|
||||
if C_tmp then tmp := tmp or $01; //Insert bit 0
|
||||
STATUS_Z := tmp = 0;
|
||||
STATUS_N := tmp > 127;
|
||||
|
||||
if modIns = aAcumulat then W := tmp
|
||||
else ram[addr].value := tmp;
|
||||
end;
|
||||
i_ROR: begin //rotate right
|
||||
STATUS_N := false;
|
||||
if modIns = aAcumulat then tmp := W
|
||||
else tmp := ram[addr].value;
|
||||
|
||||
C_tmp := STATUS_C; //Save previos C
|
||||
STATUS_C := (tmp and $01) <> 0; //Get bit 0
|
||||
tmp := tmp >> 1;
|
||||
if C_tmp then tmp := tmp or $80; //Insert bit 7
|
||||
STATUS_Z := tmp = 0;
|
||||
STATUS_N := tmp > 127;
|
||||
|
||||
if modIns = aAcumulat then W := tmp
|
||||
else ram[addr].value := tmp;
|
||||
end;
|
||||
i_RTI: begin //return from interrupt
|
||||
if SP = $FF then SP := $00 else inc(SP);
|
||||
SR := ram[$100 + SP].value;
|
||||
if SP = $FF then SP := $00 else inc(SP);
|
||||
PC.L := ram[$100 + SP].value;
|
||||
if SP = $FF then SP := $00 else inc(SP);
|
||||
PC.H := ram[$100 + SP].value;
|
||||
//Inc(PC.W, nBytes); //No apply
|
||||
Inc(nClck, nCycles);
|
||||
exit;
|
||||
end;
|
||||
i_RTS: begin //return from subroutine
|
||||
if SP = $FF then SP := $00 else inc(SP);
|
||||
PC.L := ram[$100 + SP].value;
|
||||
|
|
@ -759,7 +1027,17 @@ begin
|
|||
Inc(nClck, nCycles);
|
||||
exit;
|
||||
end;
|
||||
i_SBC:; //subtract with carry
|
||||
i_SBC: begin //subtract with carry
|
||||
if STATUS_C then begin
|
||||
tmpRes := W - ram[addr].value - 1;
|
||||
end else begin
|
||||
tmpRes := W - ram[addr].value;
|
||||
end;
|
||||
W := tmpRes and $FF;
|
||||
STATUS_Z := W = 0;
|
||||
STATUS_N := W > 127;
|
||||
STATUS_C := tmpRes<0;
|
||||
end;
|
||||
i_SEC: STATUS_C := true; //set carry
|
||||
i_SED: STATUS_D := true; //set decimal
|
||||
i_SEI: STATUS_I := true; //set interrupt disable
|
||||
|
|
@ -787,260 +1065,23 @@ begin
|
|||
STATUS_Z := X = 0;
|
||||
STATUS_N := X > 127;
|
||||
end;
|
||||
i_TXA:; //transfer X to accumulator
|
||||
i_TXS:; //transfer X to stack pointer
|
||||
i_TYA:; //transfer Y to accumulator
|
||||
i_TXA: begin //transfer X to accumulator
|
||||
W := X;
|
||||
STATUS_Z := W = 0;
|
||||
STATUS_N := W > 127;
|
||||
end;
|
||||
i_TXS: begin //transfer X to stack pointer
|
||||
SP := X;
|
||||
end;
|
||||
i_TYA: begin //transfer Y to accumulator
|
||||
W := Y;
|
||||
STATUS_Z := W = 0;
|
||||
STATUS_N := W > 127;
|
||||
end;
|
||||
i_Inval: begin
|
||||
MsjError := 'Invalid Opcode';
|
||||
end;
|
||||
end;
|
||||
|
||||
{ i_ADDWF: begin
|
||||
resByte := FRAM;
|
||||
resWord := W + resByte;
|
||||
resNib := (W and $0F) + (resByte and $0F);
|
||||
if modIns = toF then begin
|
||||
FRAM := resWord and $FF;
|
||||
end else begin //toW
|
||||
w := resWord and $FF;
|
||||
end;
|
||||
STATUS_Z := (resWord and $ff) = 0;
|
||||
STATUS_C := (resWord > 255);
|
||||
STATUS_N := (resNib > 15);
|
||||
end;
|
||||
i_ANDWF: begin
|
||||
resByte := W and FRAM;
|
||||
if modIns = toF then begin
|
||||
FRAM := resByte;
|
||||
end else begin //toW
|
||||
w := resByte;
|
||||
end;
|
||||
STATUS_Z := resByte = 0;
|
||||
end;
|
||||
i_CLRF: begin
|
||||
FRAM := 0;
|
||||
STATUS_Z := true;
|
||||
end;
|
||||
i_CLRW: begin
|
||||
W := 0;
|
||||
STATUS_Z := true;
|
||||
end;
|
||||
i_COMF : begin
|
||||
resByte := not FRAM;
|
||||
if modIns = toF then begin
|
||||
FRAM := resByte;
|
||||
end else begin //toW
|
||||
w := resByte;
|
||||
end;
|
||||
STATUS_Z := resByte = 0;
|
||||
end;
|
||||
i_DECF : begin
|
||||
resByte := FRAM;
|
||||
if resByte = 0 then resByte := $FF else dec(resByte);
|
||||
if modIns = toF then begin
|
||||
FRAM := resByte;
|
||||
end else begin //toW
|
||||
w := resByte;
|
||||
end;
|
||||
STATUS_Z := resByte = 0;
|
||||
end;
|
||||
i_DECFSZ: begin
|
||||
resByte := FRAM;
|
||||
if resByte = 0 then resByte := $FF else dec(resByte);
|
||||
if modIns = toF then begin
|
||||
FRAM := resByte;
|
||||
end else begin //toW
|
||||
w := resByte;
|
||||
end;
|
||||
STATUS_Z := resByte = 0;
|
||||
if STATUS_Z then begin
|
||||
Inc(PC.W); //Jump one instrucción
|
||||
Inc(nClck); //In this case it takes one more cicle
|
||||
end;
|
||||
end;
|
||||
i_INCF: begin
|
||||
resByte := FRAM;
|
||||
if resByte = 255 then resByte := 0 else inc(resByte);
|
||||
if modIns = toF then begin
|
||||
FRAM := resByte;
|
||||
end else begin //toW
|
||||
w := resByte;
|
||||
end;
|
||||
STATUS_Z := resByte = 0;
|
||||
end;
|
||||
i_INCFSZ: begin
|
||||
resByte := FRAM;
|
||||
if resByte = 255 then resByte := 0 else inc(resByte);
|
||||
if modIns = toF then begin
|
||||
FRAM := resByte;
|
||||
end else begin //toW
|
||||
w := resByte;
|
||||
end;
|
||||
STATUS_Z := resByte = 0;
|
||||
if STATUS_Z then begin
|
||||
Inc(PC.W); //Jump one instrucción
|
||||
Inc(nClck); //In this case it takes one more cicle
|
||||
end;
|
||||
end;
|
||||
i_IORWF: begin
|
||||
resByte := W or FRAM;
|
||||
if modIns = toF then begin
|
||||
FRAM := resByte;
|
||||
end else begin //toW
|
||||
w := resByte;
|
||||
end;
|
||||
STATUS_Z := resByte <> 0;
|
||||
end;
|
||||
i_MOVF: begin
|
||||
resByte := FRAM;
|
||||
if modIns = toF then begin
|
||||
//no mueve, solo verifica
|
||||
STATUS_Z := (resByte = 0);
|
||||
end else begin //toW
|
||||
w := resByte;
|
||||
STATUS_Z := (resByte = 0);
|
||||
end;
|
||||
end;
|
||||
i_MOVWF: begin
|
||||
FRAM := W; //escribe a donde esté mapeado, (si está mapeado)
|
||||
if parIns = $02 then begin //Es el PCL
|
||||
PC.H := PCLATH; //Cuando se escribe en PCL, se carga PCH con PCLATH
|
||||
end;
|
||||
end;
|
||||
i_NOP: begin
|
||||
end;
|
||||
i_RLF: begin
|
||||
resByte := FRAM;
|
||||
bit7 := resByte and $80; //guarda bit 7
|
||||
resByte := (resByte << 1) and $ff; //desplaza
|
||||
//pone C en bit bajo
|
||||
if STATUS_C then begin //C era 1
|
||||
resByte := resByte or $01; //pone a 1 el bit 0
|
||||
end else begin //C era 0
|
||||
//no es necesario agregarlo, porque por defecto se agrega 0
|
||||
end;
|
||||
//Actualiza C
|
||||
if bit7 = 0 then STATUS_C := false
|
||||
else STATUS_C := true;
|
||||
if modIns = toF then begin
|
||||
FRAM := resByte;
|
||||
end else begin //toW
|
||||
w := resByte;
|
||||
end;
|
||||
end;
|
||||
i_RRF: begin
|
||||
resByte := FRAM;
|
||||
bit0 := resByte and $01; //guarda bit 0
|
||||
resByte := resByte >> 1; //desplaza
|
||||
//pone C en bit alto
|
||||
if STATUS_C then begin //C era 1
|
||||
resByte := resByte or $80; //pone a 1 el bit 0
|
||||
end else begin //C era 0
|
||||
//no es necesario agregarlo, porque por defecto se agrega 0
|
||||
end;
|
||||
//Actualiza C
|
||||
if bit0 = 0 then STATUS_C := false
|
||||
else STATUS_C := true;
|
||||
if modIns = toF then begin
|
||||
FRAM := resByte;
|
||||
end else begin //toW
|
||||
w := resByte;
|
||||
end;
|
||||
end;
|
||||
i_SUBWF: begin
|
||||
resByte := FRAM;
|
||||
resInt := resByte - W;
|
||||
if modIns = toF then begin
|
||||
FRAM := resInt and $FF;
|
||||
end else begin //toW
|
||||
w := resInt and $FF;
|
||||
end;
|
||||
STATUS_Z := (resInt = 0);
|
||||
if resInt < 0 then STATUS_C := false //negativo
|
||||
else STATUS_C := true;
|
||||
resInt := (resByte and $0F) - (W and $0F);
|
||||
if resInt < 0 then STATUS_N := false //negativo
|
||||
else STATUS_N := true;
|
||||
end;
|
||||
i_SWAPF: begin
|
||||
resByte := FRAM;
|
||||
FRAM := (resByte >> 4) or (resByte << 4);
|
||||
end;
|
||||
i_XORWF: begin
|
||||
resByte := W xor FRAM;
|
||||
if modIns = toF then begin
|
||||
FRAM := resByte;
|
||||
end else begin //toW
|
||||
w := resByte;
|
||||
end;
|
||||
STATUS_Z := resByte <> 0;
|
||||
end;
|
||||
//BIT-ORIENTED FILE REGISTER OPERATIONS
|
||||
i_BCF: begin
|
||||
msk := $1 << b_;
|
||||
msk := not msk;
|
||||
FRAM := FRAM and msk;
|
||||
end;
|
||||
i_BSF: begin
|
||||
msk := $1 << b_;
|
||||
FRAM := FRAM or msk;// b_
|
||||
end;
|
||||
i_BTFSC: begin
|
||||
msk := $1 << b_;
|
||||
if (FRAM and msk) = 0 then begin
|
||||
Inc(PC.W); //Jump one instrucción
|
||||
Inc(nClck); //In this case it takes one more cicle
|
||||
end;
|
||||
end;
|
||||
i_BTFSS: begin
|
||||
msk := $1 << b_;
|
||||
if (FRAM and msk) <> 0 then begin
|
||||
Inc(PC.W); //Jump one instrucción
|
||||
Inc(nClck); //In this case it takes one more cicle
|
||||
end;
|
||||
end;
|
||||
//LITERAL AND CONTROL OPERATIONS
|
||||
i_ADDLW: begin
|
||||
resWord := W + k_;
|
||||
resNib := (W and $0F) + (k_ and $0F);
|
||||
w := resWord and $FF;
|
||||
STATUS_Z := (resWord and $ff) = 0;
|
||||
STATUS_C := (resWord > 255);
|
||||
STATUS_N := (resNib > 15);
|
||||
end;
|
||||
i_ANDLW: begin
|
||||
resByte := W and K_;
|
||||
w := resByte;
|
||||
STATUS_Z := resByte = 0;
|
||||
end;
|
||||
i_IORLW: begin
|
||||
resByte := W or k_;
|
||||
w := resByte;
|
||||
STATUS_Z := resByte <> 0;
|
||||
end;
|
||||
i_MOVLW: begin
|
||||
W := k_;
|
||||
end;
|
||||
i_SUBLW: begin
|
||||
resInt := k_ - W;
|
||||
w := resInt and $FF;
|
||||
STATUS_Z := (resInt = 0);
|
||||
if resInt < 0 then STATUS_C := false //negativo
|
||||
else STATUS_C := true;
|
||||
resInt := (k_ and $0F) - (W and $0F);
|
||||
if resInt < 0 then STATUS_N := false //negativo
|
||||
else STATUS_N := true;
|
||||
end;
|
||||
i_XORLW: begin
|
||||
resByte := W xor k_;
|
||||
w := resByte;
|
||||
STATUS_Z := resByte <> 0;
|
||||
end;
|
||||
i_Inval: begin
|
||||
MsjError := 'Invalid Opcode';
|
||||
end;
|
||||
end;
|
||||
}
|
||||
//Increase counters
|
||||
Inc(PC.W, nBytes);
|
||||
Inc(nClck, nCycles);
|
||||
|
|
|
|||
Loading…
Reference in New Issue