6502/PLASMA
1
0
Fork 0
mirror of https://github.com/dschmenk/PLASMA.git synced 2025-02-22 15:29:01 +00:00
Code Issues Projects Releases Wiki Activity

Clean-up around call/return

Browse Source
This commit is contained in:
Dave Schmenk 2020-06-30 15:16:21 -07:00
parent 337c6557e2
commit 21f926a763
1 changed files with 51 additions and 215 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

266
src/vmsrc/apple/plvm802.s
View File

@ -92,44 +92,6 @@ NOS = $03 ; TOS-1
REP #$10 ; 16 BIT X/Y REP #$10 ; 16 BIT X/Y
!AL !AL
} }
;*
;* HW STACK <-> ZP STACK COPIES
;*
!MACRO STACKTOZP {
+ACCMEM8 ; 8 BIT A/M
TSC ; MOVE HW EVAL STACK TO ZP EVAL STACK
SEC
SBC HWSP ; STACK DEPTH = (HWSP - SP)/2
LSR ; CARRY BETTER BE CLEAR AFTER THIS
ADC ESP ; ESP - STACK DEPTH
TAX
CPX ESP
BEQ +
TAY
- PLA
STA ESTKL,Y
PLA
STA ESTKH,Y
INY
CPY ESP
BNE -
+
}
!MACRO ZPTOSTACK {
TSX ; RESTORE BASELINE HWSP
STX HWSP
CPY TMPL
BEQ +
TYX
- DEX
LDA ESTKH,X
PHA
LDA ESTKL,X
PHA
CPX TMPL
BNE -
+
}
;****************************** ;******************************
;* * ;* *
;* INTERPRETER INITIALIZATION * ;* INTERPRETER INITIALIZATION *
@ -1632,26 +1594,19 @@ ICAL PLA
CALL INY ;+INC_IP CALL INY ;+INC_IP
LDA (IP),Y LDA (IP),Y
INY INY
EMUSTK STA TMP ; CALL THROUGH JMPTMP LATER EMUSTK STA TMP
TYA ; FLATTEN IP TYA ; FLATTEN IP
SEC SEC
ADC IP ADC IP
STA IP STA IP
+ACCMEM8 ; 8 BIT A/M SEC ; SWITCH TO EMULATION MODE
XCE
!AS
TSC ; MOVE HW EVAL STACK TO ZP EVAL STACK TSC ; MOVE HW EVAL STACK TO ZP EVAL STACK
EOR #$FF
SEC
ADC HWSP ; STACK DEPTH = (HWSP - SP)/2
LSR
!IF DEBUG {
PHA
CLC
ADC #$80+'0'
STA $7D0+31
PLA
}
EOR #$FF
SEC SEC
SBC HWSP ; STACK DEPTH = (HWSP - SP)/2
CMP #$80
ROR
ADC ESP ; ESP - STACK DEPTH ADC ESP ; ESP - STACK DEPTH
TAX TAX
TAY TAY
@ -1664,24 +1619,11 @@ EMUSTK STA TMP ; CALL THROUGH JMPTMP LATER
INY INY
CPY ESP CPY ESP
BNE - BNE -
+ + PEI (IP) ; SAVE INSTRUCTION POINTER
!IF DEBUG {
TXA
TSX
CPX HWSP
BEQ +
LDX #$80+'C'
STX $7D0+30
- LDX $C000
BPL -
LDX $C010
+ TAX
}
PEI (IP) ; SAVE INSTRUCTION POINTER
PHY ; SAVE BASELINE ESP PHY ; SAVE BASELINE ESP
LDA PSR LDA PSR
PHA PHA
PLP ; CALL IN EMULATION MODE PLP
JSR JMPTMP JSR JMPTMP
PHP PHP
PLA PLA
@ -1689,44 +1631,26 @@ EMUSTK STA TMP ; CALL THROUGH JMPTMP LATER
SEI SEI
CLC ; SWITCH BACK TO NATIVE MODE CLC ; SWITCH BACK TO NATIVE MODE
XCE XCE
+ACCMEM16 ; 16 BIT A/M
PLY ; MOVE RETURN VALUES TO HW EVAL STACK PLY ; MOVE RETURN VALUES TO HW EVAL STACK
STY ESP ; RESTORE BASELINE ESP STY ESP ; RESTORE BASELINE ESP
PLA PLA
STA IPL STA IP
PLA
STA IPH
!IF DEBUG {
TXA
EOR #$FF
SEC
ADC ESP
CLC
ADC #$80+'0'
STA $7D0+32
}
STX TMPL STX TMPL
TSX ; RESTORE BASELINE HWSP TSX ; RESTORE BASELINE HWSP
STX HWSP STX HWSP
CPY TMPL CPY TMPL
BEQ + BEQ +
- DEY - DEY
LDA ESTKH,Y LDX ESTKH,Y
PHA PHX
LDA ESTKL,Y LDX ESTKL,Y
PHA PHX
CPY TMPL CPY TMPL
BNE - BNE -
+ LDX #>OPTBL ; MAKE SURE WE'RE INDEXING THE RIGHT TABLE + LDX #>OPTBL ; MAKE SURE WE'RE INDEXING THE RIGHT TABLE
!IF DEBUG {
LDY LCRWEN+LCBNK2
LDY LCRWEN+LCBNK2
STX DBG_OP+2
LDY LCRDEN+LCBNK2
LDX #>DBGTBL
}
STX OPPAGE STX OPPAGE
LDY #$00 LDY #$00
+ACCMEM16 ; 16 BIT A/M
JMP FETCHOP JMP FETCHOP
;* ;*
;* INDIRECT CALL TO ADDRESS (NATIVE CODE) ;* INDIRECT CALL TO ADDRESS (NATIVE CODE)
@ -1739,26 +1663,19 @@ ICALX PLA
CALLX INY ;+INC_IP CALLX INY ;+INC_IP
LDA (IP),Y LDA (IP),Y
INY INY
EMUSTKX STA TMP ; CALL THROUGH JMPTMP LATER EMUSTKX STA TMP
TYA ; FLATTEN IP TYA ; FLATTEN IP
SEC SEC
ADC IP ADC IP
STA IP STA IP
+ACCMEM8 ; 8 BIT A/M SEC ; SWITCH TO EMULATION MODE
XCE
!AS
TSC ; MOVE HW EVAL STACK TO ZP EVAL STACK TSC ; MOVE HW EVAL STACK TO ZP EVAL STACK
EOR #$FF
SEC
ADC HWSP ; STACK DEPTH = (HWSP - SP)/2
LSR
!IF DEBUG {
PHA
CLC
ADC #$80+'0'
STA $7D0+31
PLA
}
EOR #$FF
SEC SEC
SBC HWSP ; STACK DEPTH = (HWSP - SP)/2
CMP #$80
ROR
ADC ESP ; ESP - STACK DEPTH ADC ESP ; ESP - STACK DEPTH
TAX TAX
TAY TAY
@ -1771,25 +1688,12 @@ EMUSTKX STA TMP ; CALL THROUGH JMPTMP LATER
INY INY
CPY ESP CPY ESP
BNE - BNE -
+ + PEI (IP) ; SAVE INSTRUCTION POINTER
!IF DEBUG {
TXA
TSX
CPX HWSP
BEQ +
LDX #$80+'X'
STX $7D0+30
- LDX $C000
BPL -
LDX $C010
+ TAX
}
PEI (IP) ; SAVE INSTRUCTION POINTER
PHY ; SAVE BASELINE ESP PHY ; SAVE BASELINE ESP
STX ALTRDOFF STA ALTRDOFF
LDA PSR LDA PSR
PHA PHA
PLP ; CALL IN EMULATION MODE PLP
JSR JMPTMP JSR JMPTMP
PHP PHP
PLA PLA
@ -1798,50 +1702,28 @@ EMUSTKX STA TMP ; CALL THROUGH JMPTMP LATER
STX ALTRDON STX ALTRDON
CLC ; SWITCH BACK TO NATIVE MODE CLC ; SWITCH BACK TO NATIVE MODE
XCE XCE
+ACCMEM16 ; 16 BIT A/M
PLY ; MOVE RETURN VALUES TO HW EVAL STACK PLY ; MOVE RETURN VALUES TO HW EVAL STACK
STY ESP ; RESTORE BASELINE ESP STY ESP ; RESTORE BASELINE ESP
PLA PLA
STA IPL STA IP
PLA
STA IPH
!IF DEBUG {
TXA
EOR #$FF
SEC
ADC ESP
CLC
ADC #$80+'0'
STA $7D0+32
}
STX TMPL STX TMPL
TSX ; RESTORE BASELINE HWSP TSX ; RESTORE BASELINE HWSP
STX HWSP STX HWSP
CPY TMPL CPY TMPL
BEQ + BEQ +
- DEY - DEY
LDA ESTKH,Y LDX ESTKH,Y
PHA PHX
LDA ESTKL,Y LDX ESTKL,Y
PHA PHX
CPY TMPL CPY TMPL
BNE - BNE -
+ LDX #>OPXTBL ; MAKE SURE WE'RE INDEXING THE RIGHT TABLE + LDX #>OPXTBL ; MAKE SURE WE'RE INDEXING THE RIGHT TABLE
!IF DEBUG {
LDY LCRWEN+LCBNK2
LDY LCRWEN+LCBNK2
STX DBG_OP+2
LDY LCRDEN+LCBNK2
LDX #>DBGTBL
}
STX OPPAGE STX OPPAGE
LDY #$00 LDY #$00
+ACCMEM16 ; 16 BIT A/M
JMP FETCHOP JMP FETCHOP
;* ;*
;* JUMP INDIRECT THROUGH TMP
;*
;JMPTMP JMP (TMP)
;*
;* ENTER FUNCTION WITH FRAME SIZE AND PARAM COUNT ;* ENTER FUNCTION WITH FRAME SIZE AND PARAM COUNT
;* ;*
ENTER PEI (IFP) ; SAVE ON STACK FOR LEAVE ENTER PEI (IFP) ; SAVE ON STACK FOR LEAVE
@ -1850,15 +1732,6 @@ ENTER PEI (IFP) ; SAVE ON STACK FOR LEAVE
INY INY
LDA (IP),Y LDA (IP),Y
AND #$00FF AND #$00FF
!IF DEBUG {
+ACCMEM8 ; 8 BIT A/M
PHA
CLC
ADC #$80+'0'
STA $7D0+31
PLA
+ACCMEM16 ; 16 BIT A/M
}
EOR #$FFFF ; ALLOCATE FRAME EOR #$FFFF ; ALLOCATE FRAME
SEC SEC
ADC PP ADC PP
@ -1896,19 +1769,10 @@ LEAVEX INY ;+INC_IP
STA ALTRDOFF STA ALTRDOFF
+ STA TMPL + STA TMPL
TSC ; MOVE HW EVAL STACK TO ZP EVAL STACK TSC ; MOVE HW EVAL STACK TO ZP EVAL STACK
EOR #$FF
SEC
ADC HWSP ; STACK DEPTH = (HWSP - SP)/2
LSR
!IF DEBUG {
PHA
CLC
ADC #$80+'0'
STA $7D0+31
PLA
}
EOR #$FF
SEC SEC
SBC HWSP ; STACK DEPTH = (HWSP - SP)/2
CMP #$80
ROR
ADC ESP ; ESP - STACK DEPTH ADC ESP ; ESP - STACK DEPTH
TAX TAX
CPX ESP CPX ESP
@ -1921,18 +1785,6 @@ LEAVEX INY ;+INC_IP
INY INY
CPY ESP CPY ESP
BNE - BNE -
!IF DEBUG {
PHX
TSX
CPX HWSP
BEQ +
LDX #$80+'L'
STX $7D0+30
- LDX $C000
BPL -
LDX $C010
+ PLX
}
++ +ACCMEM16 ; 16 BIT A/M ++ +ACCMEM16 ; 16 BIT A/M
LDY TMPL ; DEALLOCATE POOL + FRAME LDY TMPL ; DEALLOCATE POOL + FRAME
TYA TYA
@ -1941,26 +1793,23 @@ LEAVEX INY ;+INC_IP
STA PP STA PP
PLA ; RESTORE PREVIOUS FRAME PLA ; RESTORE PREVIOUS FRAME
STA IFP STA IFP
LDY PSR SEC ; SWITCH TO EMULATION MODE
PHY XCE
PLP ; RETURN IN EMULATION MODE !AS
RTS LDA PSR
RETX STX ALTRDOFF
RET +ACCMEM8 ; 8 BIT A/M
TSC ; MOVE HW EVAL STACK TO ZP EVAL STACK
EOR #$FF
SEC
ADC HWSP ; STACK DEPTH = (HWSP - SP)/2
LSR
!IF DEBUG {
PHA PHA
CLC PLP
ADC #$80+'0' RTS ; RETURN IN EMULATION MODE
STA $7D0+31 !AL
PLA RETX STX ALTRDOFF
} RET SEC ; SWITCH TO EMULATION MODE
EOR #$FF XCE
!AS
TSC ; MOVE HW EVAL STACK TO ZP EVAL STACK
SEC SEC
SBC HWSP ; STACK DEPTH = (HWSP - SP)/2
CMP #$80
ROR
ADC ESP ; ESP - STACK DEPTH ADC ESP ; ESP - STACK DEPTH
TAX TAX
CPX ESP CPX ESP
@ -1973,26 +1822,13 @@ RET +ACCMEM8 ; 8 BIT A/M
INY INY
CPY ESP CPY ESP
BNE - BNE -
!IF DEBUG {
PHX
TSX
CPX HWSP
BEQ +
LDX #$80+'X'
STX $7D0+30
- LDX $C000
BPL -
LDX $C010
+ PLX
}
++ LDA PSR ++ LDA PSR
PHA PHA
PLP ; RETURN IN EMULATION MODE PLP
RTS RTS ; RETURN IN EMULATION MODE
;* ;*
;* RETURN TO NATIVE CODE ;* RETURN TO NATIVE CODE
;* ;*
!AL
NATV TYA ; FLATTEN IP NATV TYA ; FLATTEN IP
SEC SEC
ADC IP ADC IP