mirror of
https://github.com/catseye/SixtyPical.git
synced 2024-06-18 03:29:32 +00:00
6502 opcodes are Emittables. Can compile simple programs now!
This commit is contained in:
Chris Pressey
parent
c0243ee6ba
commit
5b429adfd9
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@ -33,6 +33,9 @@ if __name__ == '__main__':
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optparser.add_option("--compile",
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action="store_true", dest="compile", default=False,
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help="")
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optparser.add_option("--debug",
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action="store_true", dest="debug", default=False,
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help="")
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optparser.add_option("--traceback",
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action="store_true", dest="traceback", default=False,
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help="")
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@ -61,7 +64,10 @@ if __name__ == '__main__':
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if options.compile:
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emitter = Emitter(41952)
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compile_program(program, emitter)
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emitter.serialize(sys.stdout)
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if options.debug:
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print repr(emitter.accum)
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else:
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emitter.serialize(sys.stdout)
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if options.execute:
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context = eval_program(program)
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@ -5,33 +5,41 @@ from sixtypical.model import (
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ConstantRef, LocationRef,
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REG_A, REG_X, REG_Y, FLAG_Z, FLAG_N, FLAG_V, FLAG_C
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)
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from sixtypical.gen6502 import Generator
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from sixtypical.emitter import Byte
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from sixtypical.gen6502 import (
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Immediate, Absolute,
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LDA, LDX, LDY, STA, STX, STY, CLC, SEC, ADC, RTS
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)
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class UnsupportedOpcodeError(KeyError):
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pass
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def compile_program(program, emitter):
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assert isinstance(program, Program)
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generator = Generator(emitter)
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routines = {r.name: r for r in program.routines}
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for routine in program.routines:
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compile_routine(routine, generator, routines)
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compile_routine(routine, emitter, routines)
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def compile_routine(routine, generator, routines):
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def compile_routine(routine, emitter, routines):
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assert isinstance(routine, Routine)
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label = generator.emitter.make_label(routine.name)
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compile_block(routine.block, generator, routines)
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label = emitter.make_label(routine.name)
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compile_block(routine.block, emitter, routines)
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emitter.emit(RTS())
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return label
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def compile_block(block, generator, routines):
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def compile_block(block, emitter, routines):
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assert isinstance(block, Block)
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label = generator.emitter.make_label()
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label = emitter.make_label()
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for instr in block.instrs:
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compile_instr(instr, generator, routines)
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compile_instr(instr, emitter, routines)
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return label
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def compile_instr(instr, generator, routines):
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def compile_instr(instr, emitter, routines):
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assert isinstance(instr, Instr)
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opcode = instr.opcode
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dest = instr.dest
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@ -40,26 +48,36 @@ def compile_instr(instr, generator, routines):
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if opcode == 'ld':
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if dest == REG_A:
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if isinstance(src, ConstantRef):
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# LDA #...
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pass
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emitter.emit(LDA(Immediate(Byte(src.value))))
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else:
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# LDA abs
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pass
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emitter.emit(LDA(Absolute(src.label)))
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elif dest == REG_X:
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pass
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elif dest == REG_Y:
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pass
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else:
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raise KeyError
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raise UnsupportedOpcodeError(instr)
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elif opcode == 'st':
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if src == REG_A:
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# assert isinstance(dest, MemoryRef)
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# generate STA
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pass
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if dest == FLAG_C and src == ConstantRef(0):
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emitter.emit(CLC())
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elif dest == FLAG_C and src == ConstantRef(1):
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emitter.emit(SEC())
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elif src == REG_A:
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emitter.emit(STA(Absolute(dest.label)))
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elif src == REG_X:
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emitter.emit(STX(Absolute(dest.label)))
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elif src == REG_Y:
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emitter.emit(STY(Absolute(dest.label)))
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else:
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raise KeyError
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raise UnsupportedOpcodeError(instr)
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elif opcode == 'add':
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raise NotImplementedError
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if dest == REG_A:
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if isinstance(src, ConstantRef):
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emitter.emit(ADC(Immediate(Byte(src.value))))
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else:
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emitter.emit(ADC(Absolute(src.label)))
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else:
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raise UnsupportedOpcodeError(instr)
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elif opcode == 'sub':
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raise NotImplementedError
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elif opcode == 'inc':
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@ -1,5 +1,33 @@
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class Word(object):
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class Emittable(object):
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def size(self):
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"""Default implementation may not be very efficient."""
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return len(self.serialize())
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def serialize(self):
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raise NotImplementedError
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class Byte(Emittable):
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def __init__(self, value):
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if value < -127 or value > 255:
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raise IndexError(thing)
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if value < 0:
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value += 256
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self.value = value
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def size(self):
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return 1
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def serialize(self):
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return chr(self.value)
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def __repr__(self):
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return "%s(%r)" % (self.__class__.__name__, self.value)
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class Word(Emittable):
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def __init__(self, value):
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# TODO: range-checking
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self.value = value
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def size(self):
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@ -11,8 +39,11 @@ class Word(object):
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high = (word >> 8) & 255
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return chr(low) + chr(high)
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def __repr__(self):
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return "%s(%r)" % (self.__class__.__name__, self.value)
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class Label(object):
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class Label(Emittable):
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def __init__(self, name, addr=None):
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self.name = name
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self.addr = addr
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@ -24,8 +55,7 @@ class Label(object):
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return 2
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def serialize(self):
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if self.addr is None:
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raise ValueError(self.addr)
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assert self.addr is not None, "unresolved label: %s" % self.name
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return Word(self.addr).serialize()
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@ -35,25 +65,16 @@ class Emitter(object):
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self.addr = addr
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self.name_counter = 0
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def gen(self, *things):
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def emit(self, *things):
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for thing in things:
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if isinstance(thing, int):
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if thing < -127 or thing > 255:
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raise ValueError(thing)
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if thing < 0:
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thing += 256
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self.accum.append(thing)
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self.addr += 1
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else:
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self.accum.append(thing)
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self.addr += thing.size()
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thing = Byte(thing)
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self.accum.append(thing)
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self.addr += thing.size()
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def serialize(self, stream):
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for thing in self.accum:
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if isintance(thing, int):
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stream.write(chr(thing))
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else:
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stream.write(thing.serialize())
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for emittable in self.accum:
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stream.write(emittable.serialize())
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def make_label(self, name=None):
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if name is None:
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@ -1,91 +1,212 @@
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"""This is just a sketch for now."""
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from sixtypical.emitter import Emitter, Word, Label
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from sixtypical.emitter import Emittable, Byte, Word, Label
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class Generator(object):
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def __init__(self, emitter):
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self.emitter = emitter
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class AddressingMode(object):
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def size(self):
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"""Size of the operand for the mode (not including the opcode)"""
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raise NotImplementedError
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### ld ###
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def gen_lda_imm(self, b):
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self.emitter.emit(0xa9, b)
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class Implied(AddressingMode):
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def size(self):
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return 0
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def gen_lda_abs(self, addr):
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self.emitter.emit(0xad, addr)
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def serialize(self):
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return ''
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def gen_ldx_imm(self, b):
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self.emitter.emit(0xa2, b)
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def __repr__(self):
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return "%s()" % (self.__class__.__name__)
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def gen_ldx_abs(self, addr):
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self.emitter.emit(0xae, addr)
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def gen_tax(self):
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self.emitter.emit(0xaa)
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class Immediate(AddressingMode):
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def __init__(self, value):
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assert isinstance(value, Byte)
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self.value = value
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def gen_tay(self):
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self.emitter.emit(0xa8)
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def size(self):
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return 1
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def gen_txa(self):
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self.emitter.emit(0x8a)
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def serialize(self):
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return self.value.serialize()
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def gen_tya(self):
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self.emitter.emit(0x98)
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def __repr__(self):
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return "%s(%r)" % (self.__class__.__name__, self.value)
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### st ###
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def gen_sta_abs(self, addr):
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self.emitter.emit(0x8d, addr)
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class Absolute(AddressingMode):
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def __init__(self, value):
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assert isinstance(value, (Word, Label))
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self.value = value
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def gen_stx_abs(self, addr):
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self.emitter.emit(0x8e, addr)
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def size(self):
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return 2
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def gen_sty_abs(self, addr):
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self.emitter.emit(0x8c, addr)
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def serialize(self):
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return self.value.serialize()
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### add ###
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def __repr__(self):
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return "%s(%r)" % (self.__class__.__name__, self.value)
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def gen_adc_imm(self, b):
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self.emitter.emit(0x69, b)
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def gen_adc_abs(self, addr):
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self.emitter.emit(0x6d, addr)
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class Opcode(Emittable):
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def __init__(self, operand=None):
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self.operand = operand or Implied()
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### sub ###
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def size(self):
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return 1 + self.operand.size() if self.operand else 0
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def gen_sbc_imm(self, b):
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self.emitter.emit(0xe9, b)
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def serialize(self):
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return (
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chr(self.opcodes[self.operand.__class__]) +
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self.operand.serialize()
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)
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def gen_sbc_abs(self, addr):
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self.emitter.emit(0xed, addr)
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def __repr__(self):
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return "%s(%r)" % (self.__class__.__name__, self.operand)
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### inc ###
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def gen_inc_abs(self, addr):
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self.emitter.emit(0xee, addr)
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class ADC(Opcode):
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opcodes = {
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Immediate: 0x69,
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Absolute: 0x6d,
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}
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def gen_inx(self):
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self.emitter.emit(0xe8)
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def gen_iny(self):
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self.emitter.emit(0xc8)
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class ADD(Opcode):
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opcodes = {
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Immediate: 0x29,
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Absolute: 0x2d,
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}
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### dec ###
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def gen_dec_abs(self, addr):
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self.emitter.emit(0xce, addr)
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class CLC(Opcode):
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opcodes = {
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Implied: 0x18
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}
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def gen_dex(self):
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self.emitter.emit(0xca)
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def gen_dey(self):
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self.emitter.emit(0x88)
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class DEC(Opcode):
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opcodes = {
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Absolute: 0xce,
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}
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### and ###
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def gen_and_imm(self, b):
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self.emitter.emit(0x29, b)
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class DEX(Opcode):
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opcodes = {
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Implied: 0xca,
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}
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def gen_and_abs(self, addr):
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self.emitter.emit(0x2d, addr)
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class DEY(Opcode):
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opcodes = {
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Implied: 0x88,
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}
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class INC(Opcode):
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opcodes = {
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Absolute: 0xee,
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}
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class INX(Opcode):
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opcodes = {
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Implied: 0xe8,
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}
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class INY(Opcode):
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opcodes = {
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Implied: 0xc8,
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}
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class LDA(Opcode):
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opcodes = {
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Immediate: 0xa9,
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Absolute: 0xad,
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}
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class LDX(Opcode):
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opcodes = {
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Immediate: 0xa2,
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Absolute: 0xae,
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}
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class LDY(Opcode):
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opcodes = {
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Immediate: 0xa0,
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Absolute: 0xac,
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}
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class ORA(Opcode):
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opcodes = {
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Immediate: 0x09,
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Absolute: 0x0d,
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}
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class RTS(Opcode):
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opcodes = {
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Implied: 0x60,
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}
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class SBC(Opcode):
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opcodes = {
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Immediate: 0xe9,
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Absolute: 0xed,
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}
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class SEC(Opcode):
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opcodes = {
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Implied: 0x38,
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}
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class STA(Opcode):
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opcodes = {
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Absolute: 0x8d,
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}
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class STX(Opcode):
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opcodes = {
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Absolute: 0x8e,
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}
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class STY(Opcode):
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opcodes = {
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Absolute: 0x8c,
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}
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class TAX(Opcode):
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opcodes = {
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Implied: 0xaa,
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}
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class TAY(Opcode):
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opcodes = {
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Implied: 0xa8,
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}
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class TXA(Opcode):
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opcodes = {
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Implied: 0x8a,
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}
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class TYA(Opcode):
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opcodes = {
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Implied: 0x98,
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}
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