2019-07-28 22:16:51 +00:00
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;ACME 0.96.4
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2012-11-26 23:11:45 +00:00
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!ifdef lib_cbm_c64_cia2_a !eof
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lib_cbm_c64_cia2_a = 1
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2019-07-28 22:16:51 +00:00
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!source <cbm/cia.a> ; chip stuff (same for both cias)
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; stuff for cia 2 only:
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!addr cia2_base = $dd00
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cia2_pra = cia2_base + cia_port_a
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2018-06-30 20:59:42 +00:00
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; %7....... DATA in (0 means GND)
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; %.6...... CLK in (0 means GND)
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2019-07-29 14:24:33 +00:00
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; %..5..... DATA out (gets inverted, so 1 means GND)
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; %...4.... CLK out (gets inverted, so 1 means GND)
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; %....3... ATN out (gets inverted, so 1 means GND)
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2018-06-30 20:59:42 +00:00
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; %.....2.. PA2 (pin M at user port, 0 means GND)
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2019-07-29 14:24:33 +00:00
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; %......10 VIC bank (gets inverted, so value %11 means address $0000)
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2019-07-28 22:16:51 +00:00
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cia2_prb = cia2_base + cia_port_b
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2021-08-11 16:55:40 +00:00
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; %7....... PB7 (pin L at user port, 0 means GND)
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; %.6...... PB6 (pin K at user port, 0 means GND)
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; %..5..... PB5 (pin J at user port, 0 means GND)
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; %...4.... PB4 (pin H at user port, 0 means GND)
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; %....3... PB3 (pin F at user port, 0 means GND)
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; %.....2.. PB2 (pin E at user port, 0 means GND)
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; %......1. PB1 (pin D at user port, 0 means GND)
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; %.......0 PB0 (pin C at user port, 0 means GND)
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cia2_ddra = cia2_base + cia_data_direction_a ; kernal writes $3f
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cia2_ddrb = cia2_base + cia_data_direction_b ; kernal writes $00 (all input)
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2019-07-28 22:16:51 +00:00
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cia2_ta_lo = cia2_base + cia_timer_a_low
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cia2_ta_hi = cia2_base + cia_timer_a_high
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cia2_tb_lo = cia2_base + cia_timer_b_low
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cia2_tb_hi = cia2_base + cia_timer_b_high
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cia2_tod10ths = cia2_base + cia_timeofday_10ths
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cia2_todsec = cia2_base + cia_timeofday_seconds
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cia2_todmin = cia2_base + cia_timeofday_minutes
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cia2_todhr = cia2_base + cia_timeofday_hours
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cia2_sdr = cia2_base + cia_serial_data
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cia2_icr = cia2_base + cia_interrupt_control
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cia2_cra = cia2_base + cia_control_a
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cia2_crb = cia2_base + cia_control_b
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; the interrupt output is connected to CPU's /NMI input
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