2019-07-28 22:16:51 +00:00
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;ACME 0.96.4
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!ifdef lib_cbm_cia_a !eof
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lib_cbm_cia_a = 1
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; CBM's "complex interface adapter" chip, known as 6526.
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; A newer version of this chip was initially called 8521, but later the name was
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; changed back to 6526 again.
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; There are two of these in a C64/128 computer, and one in 1570/1571 drives.
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; pinout:
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; ____ ____
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; | V |
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; GND | 1 40 | cnt clock for shift register
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; / pa0 | 2 39 | sp data for shift register
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; | pa1 | 3 38 | a0 \
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; | pa2 | 4 37 | a1 |_ address
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; Port _| pa3 | 5 36 | a2 | bus
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; A | pa4 | 6 35 | a3 /
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; | pa5 | 7 34 | /reset
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; | pa6 | 8 33 | d0 \
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; \ pa7 | 9 32 | d1 |
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; / pb0 | 10 31 | d2 |
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; | pb1 | 11 30 | d3 |_ data
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; | pb2 | 12 29 | d4 | bus
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; Port _| pb3 | 13 28 | d5 |
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; B | pb4 | 14 27 | d6 |
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; | pb5 | 15 26 | d7 /
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; | pb6 | 16 25 | 0in clock
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; \ pb7 | 17 24 | /flag
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; /pc | 18 23 | /cs chip select
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; tod_clk | 19 22 | r/w
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; +5V | 20 21 | /irq
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; |_________|
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; register offsets:
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; two 8-bit ports:
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cia_port_a = $0
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cia_port_b = $1
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cia_data_direction_a = $2 ; clear means input,
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cia_data_direction_b = $3 ; set means output
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; two 16-bit timers, can be combined to form a single 32-bit timer:
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cia_timer_a_low = $4
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cia_timer_a_high = $5
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cia_timer_b_low = $6
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cia_timer_b_high = $7
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; reading returns current counter value,
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; writing sets start value.
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; in 32-bit mode, timer A is "low word" and timer B is "high word".
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; TOD (time of day) clock, clocked with 50 or 60 Hz:
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; (CAUTION, registers use binary coded decimal format)
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cia_timeofday_10ths = $8 ; %....3210 0..9, counts 10ths of seconds
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cia_timeofday_seconds = $9 ; %.6543210 0..59, as two BCD digits:
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; %.654.... 0..5 "tens"
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; %....3210 0..9 "ones"
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cia_timeofday_minutes = $a ; %.6543210 0..59, as two BCD digits:
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; %.654.... 0..5 "tens"
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; %....3210 0..9 "ones"
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cia_timeofday_hours = $b ; %7..43210 AM/PM and 1..12 as two BCD digits:
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; %7....... 0 means AM, 1 means PM
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; %...4.... 0..1 "tens"
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; %....3210 0..9 "ones"
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; when reading or writing time, start with hours and end with 10ths:
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; accessing hours uncouples registers from clock, accessing 10ths re-couples them.
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; if your read access does not start with the hours register,
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; you have a race condition!
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; shift register:
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; msb is sent/received first. send clock is half of timer A's underflow rate.
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cia_serial_data = $c
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; control registers:
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cia_interrupt_control = $d
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2020-02-28 20:40:18 +00:00
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; %7....... read: 1 = interrupt requested (reading clears register)
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2019-07-28 22:16:51 +00:00
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; write: 0 = disable interrupts indicated by set bits
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; 1 = enable interrupts indicated by set bits
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; %.65..... unused
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; %...4.... negative edge on /flag detected
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; %....3... shift register has finished sending or receiving
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; %.....2.. time of day alarm
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; %......1. timer B underflow
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; %.......0 timer A underflow
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cia_control_a = $e
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; %7....... TOD clock: 0 means 60 Hz, 1 means 50 Hz
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; %.6...... shift register direction: 0 = input, 1 = output
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; %..5..... timer A clock: 0 = system clock, 1 = CNT
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; %...4.... 1 = force load timer start value
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; %....3... timer mode: 0 = continuous, 1 = one-shot (needs restart via bit 0)
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; %.....2.. 0 = pulse on PB6, 1 = invert PB6
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; %......1. 1 = timer underflow shows on PB6 (this forces PB6 to output)
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; %.......0 0 stops timer, 1 starts timer
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cia_control_b = $f
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; %7....... TOD write mode: 0 = actual time, 1 = alarm time (it is not possible to _read_ the alarm time!)
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; %.65..... timer B clock:
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; %00 = system clock
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; %01 = CNT
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; %10 = underflow of timer A
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; %11 = combination of %01 and %10
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; %...4.... 1 = force load timer start value
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; %....3... timer mode: 0 = continuous, 1 = one-shot (needs restart via bit 0)
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; %.....2.. 0 = pulse on PB7, 1 = invert PB7
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; %......1. 1 = timer underflow shows on PB7 (this forces PB7 to output)
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; %.......0 0 stops timer, 1 starts timer
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