more test sources and expected outputs

git-svn-id: https://svn.code.sf.net/p/acme-crossass/code-0/trunk@280 4df02467-bbd4-4a76-a152-e7ce94205b78

testing/cpus/include-65c02.a

@@ -0,0 +1,29 @@
+;ACME 0.97
+	; extensions in CMOS re-design (65c02):
+		tsb $04		; 04
+		tsb $0c0c	; 0c
+		ora ($12)	; 12
+		trb $04		; 14
+		inc		; 1a
+		trb $0c0c	; 1c
+		and ($12)	; 32
+		bit $34, x	; 34
+		dec		; 3a
+		bit $3c3c, x	; 3c
+		eor ($12)	; 52
+		phy		; 5a
+		stz $04		; 64
+		adc ($12)	; 72
+		stz $34, x	; 74
+		ply		; 7a
+		jmp ($7c7c, x)	; 7c
+		bra * + 2	; 80
+		bit #$89	; 89
+		sta ($12)	; 92
+		stz $0c0c	; 9c
+		stz $3c3c, x	; 9e
+		lda ($12)	; b2
+		cmp ($12)	; d2
+		phx		; da
+		sbc ($12)	; f2
+		plx		; fa

testing/cpus/include-65ce02.a

@@ -0,0 +1,76 @@
+;ACME 0.97
+	; extensions of CMOS re-design (65c02), but with Z reg of 65ce02:
+		tsb $04		; 04
+		tsb $0c0c	; 0c
+		ora ($12), z	; 12	!
+		trb $04		; 14
+		inc		; 1a
+		trb $0c0c	; 1c
+		and ($12), z	; 32	!
+		bit $34, x	; 34
+		dec		; 3a
+		bit $3c3c, x	; 3c
+		eor ($12), z	; 52	!
+		phy		; 5a
+		stz $04		; 64
+		adc ($12), z	; 72	!
+		stz $34, x	; 74
+		ply		; 7a
+		jmp ($7c7c, x)	; 7c
+		bra * + 2	; 80
+		bit #$89	; 89
+		sta ($12), z	; 92	!
+		stz $0c0c	; 9c
+		stz $3c3c, x	; 9e
+		lda ($12), z	; b2	!
+		cmp ($12), z	; d2	!
+		phx		; da
+		sbc ($12), z	; f2	!
+		plx		; fa
+	; extensions of 65ce02:
+		cle		; 02
+		see		; 03
+		tsy		; 0b
+		lbpl * + 2	; 13
+		inz		; 1b
+		jsr ($2222)	; 22
+		jsr ($2323, x)	; 23
+		tys		; 2b
+		lbmi * + 2	; 33
+		dez		; 3b
+		neg		; 42
+		asr		; 43
+		asr $44		; 44
+		taz		; 4b
+		lbvc * + 2	; 53
+		asr $54, x	; 54
+		tab		; 5b
+;		aug		; 5c	this is different between 65ce02 and 4502
+		rtn #$62	; 62
+		bsr * + 2	; 63
+		tza		; 6b
+		lbvs * + 2	; 73
+		tba		; 7b
+		sta ($82, s), y	; 82
+		lbra * + 2	; 83
+		sty $8b8b, x	; 8b
+		lbcc * + 2	; 93
+		stx $9b9b, y	; 9b
+		ldz #$62	; a3
+		ldz $abab	; ab
+		lbcs * + 2	; b3
+		ldz $8b8b, x	; bb
+		cpz #$62	; c2
+		dew $44		; c3
+		asw $abab	; cb
+		lbne * + 2	; d3
+		cpz $44		; d4
+		phz		; db
+		cpz $abab	; dc
+		lda ($82, s), y	; e2
+		inw $44		; e3
+		row $abab	; eb
+		lbeq * + 2	; f3
+		phw #$f4f4	; f4
+		plz		; fb
+		phw $abab	; fc

testing/cpus/include-bitmanips.a

@@ -0,0 +1,34 @@
+;ACME 0.97
+	; bit-manipulation instructions:
+		rmb0 $07	; 07
+		bbr0 $0f, * + 3	; 0f
+		rmb1 $07	; 17
+		bbr1 $0f, * + 3	; 1f
+		rmb2 $07	; 27
+		bbr2 $0f, * + 3	; 2f
+		rmb3 $07	; 37
+		bbr3 $0f, * + 3	; 3f
+		rmb4 $07	; 47
+		bbr4 $0f, * + 3	; 4f
+		rmb5 $07	; 57
+		bbr5 $0f, * + 3	; 5f
+		rmb6 $07	; 67
+		bbr6 $0f, * + 3	; 6f
+		rmb7 $07	; 77
+		bbr7 $0f, * + 3	; 7f
+		smb0 $07	; 87
+		bbs0 $0f, * + 3	; 8f
+		smb1 $07	; 97
+		bbs1 $0f, * + 3	; 9f
+		smb2 $07	; a7
+		bbs2 $0f, * + 3	; af
+		smb3 $07	; b7
+		bbs3 $0f, * + 3	; bf
+		smb4 $07	; c7
+		bbs4 $0f, * + 3	; cf
+		smb5 $07	; d7
+		bbs5 $0f, * + 3	; df
+		smb6 $07	; e7
+		bbs6 $0f, * + 3	; ef
+		smb7 $07	; f7
+		bbs7 $0f, * + 3	; ff

testing/cpus/include-undoc.a

@@ -0,0 +1,74 @@
+;ACME 0.97
+; undocumented opcodes of NMOS 6502:
+		jam		; 02
+		slo ($03, x)	; 03
+		nop $04		; 04
+		slo $04		; 07
+	!ifndef C64DTV2 {
+		anc #$0b	; 0b	(dtv does not support this)
+	}
+		nop $0c0f	; 0c
+		slo $0c0f	; 0f
+		slo ($13), y	; 13
+		nop $14, x	; 14
+		slo $14, x	; 17
+		slo $1b1b, y	; 1b
+		nop $1c1f, x	; 1c
+		slo $1c1f, x	; 1f
+		rla ($03, x)	; 23
+		rla $04		; 27
+		rla $0c0f	; 2f
+		rla ($13), y	; 33
+		rla $14, x	; 37
+		rla $1b1b, y	; 3b
+		rla $1c1f, x	; 3f
+		sre ($03, x)	; 43
+		sre $04	; 47
+		asr #$0b	; 4b
+		sre $0c0f	; 4f
+		sre ($13), y	; 53
+		sre $14, x	; 57
+		sre $1b1b, y	; 5b
+		sre $1c1f, x	; 5f
+		rra ($03, x)	; 63
+		rra $04	; 67
+		arr #$0b	; 6b
+		rra $0c0f	; 6f
+		rra ($13), y	; 73
+		rra $14, x	; 77
+		rra $1b1b, y	; 7b
+		rra $1c1f, x	; 7f
+		nop #$0b	; 80
+		sax ($03, x)	; 83
+		sax $04	; 87
+		ane #0		; 8b (anything non-zero gives a warning)
+		sax $0c0f	; 8f
+		sha ($13), y	; 93
+		sax $97, y	; 97
+		tas $1b1b, y	; 9b
+		shy $1c1f, x	; 9c
+		shx $1b1b, y	; 9e
+		sha $1b1b, y	; 9f
+		lax ($03, x)	; a3
+		lax $04	; a7
+		lxa #0		; ab (anything non-zero gives a warning)
+		lax $0c0f	; af
+		lax ($13), y	; b3
+		lax $97, y	; b7
+		las $1b1b, y	; bb
+		lax $1b1b, y	; bf
+		dcp ($03, x)	; c3
+		dcp $04	; c7
+		sbx #$0b	; cb
+		dcp $0c0f	; cf
+		dcp ($13), y	; d3
+		dcp $14, x	; d7
+		dcp $1b1b, y	; db
+		dcp $1c1f, x	; df
+		isc ($03, x)	; e3
+		isc $04	; e7
+		isc $0c0f	; ef
+		isc ($13), y	; f3
+		isc $14, x	; f7
+		isc $1b1b, y	; fb
+		isc $1c1f, x	; ff

testing/cpus/test-6502.a

@@ -2,4 +2,4 @@
 	!cpu 6502
 	!to "out-6502.o", plain
 	*=$1000
-	!src "std.a"
+	!src "include-6502.a"

testing/cpus/test-65c02.a

@@ -0,0 +1,6 @@
+;ACME 0.97
+	!cpu 65c02
+	!to "out-65c02.o", plain
+	*=$1000
+	!src "include-6502.a"
+	!src "include-65c02.a"

testing/cpus/test-65ce02.a

@@ -0,0 +1,10 @@
+;ACME 0.97
+	!cpu 65ce02
+	!to "out-65ce02.o", plain
+	*=$1000
+	!src "include-6502.a"
+;	!src "include-65c02.a"	; not used, because 65ce02 changes "(zp)" to "(zp), z"
+	!src "include-bitmanips.a"
+	!src "include-65ce02.a"
+; this differs between 65ce02 and 4502:
+		aug		; $5c ("4-byte NOP reserved for future expansion")

testing/cpus/test-c64dtv2.a

@@ -0,0 +1,11 @@
+;ACME 0.97
+	!cpu c64dtv2
+	!to "out-c64dtv2.o", plain
+	*=$1000
+	!src "include-6502.a"
+C64DTV2 = 1	; make next include skip the ANC instruction (not supported by C64DTV2)
+	!src "include-undoc.a"
+; additional instructions of C64DTV2:
+		bra * + 2	; 12, branch always
+		sac #$32	; 32, set accumulator mapping
+		sir #$42	; 42, set index register mapping

testing/cpus/test-nmos6502.a

@@ -2,75 +2,5 @@
 	!cpu nmos6502
 	!to "out-nmos6502.o", plain
 	*=$1000
-	!src "std.a"
-; nmos6502 additions:
-		jam		; 02
-		slo ($03, x)	; 03
-		nop $04		; 04
-		slo $04		; 07
-		anc #$0b	; 0b
-		nop $0c0f	; 0c
-		slo $0c0f	; 0f
-		slo ($13), y	; 13
-		nop $14, x	; 14
-		slo $14, x	; 17
-		slo $1b1b, y	; 1b
-		nop $1c1f, x	; 1c
-		slo $1c1f, x	; 1f
-		rla ($03, x)	; 23
-		rla $04		; 27
-		rla $0c0f	; 2f
-		rla ($13), y	; 33
-		rla $14, x	; 37
-		rla $1b1b, y	; 3b
-		rla $1c1f, x	; 3f
-		sre ($03, x)	; 43
-		sre $04	; 47
-		asr #$0b	; 4b
-		sre $0c0f	; 4f
-		sre ($13), y	; 53
-		sre $14, x	; 57
-		sre $1b1b, y	; 5b
-		sre $1c1f, x	; 5f
-		rra ($03, x)	; 63
-		rra $04	; 67
-		arr #$0b	; 6b
-		rra $0c0f	; 6f
-		rra ($13), y	; 73
-		rra $14, x	; 77
-		rra $1b1b, y	; 7b
-		rra $1c1f, x	; 7f
-		nop #$0b	; 80
-		sax ($03, x)	; 83
-		sax $04	; 87
-		ane #0		; 8b (anything non-zero gives a warning)
-		sax $0c0f	; 8f
-		sha ($13), y	; 93
-		sax $97, y	; 97
-		tas $1b1b, y	; 9b
-		shy $1c1f, x	; 9c
-		shx $1b1b, y	; 9e
-		sha $1b1b, y	; 9f
-		lax ($03, x)	; a3
-		lax $04	; a7
-		lxa #0		; ab (anything non-zero gives a warning)
-		lax $0c0f	; af
-		lax ($13), y	; b3
-		lax $97, y	; b7
-		las $1b1b, y	; bb
-		lax $1b1b, y	; bf
-		dcp ($03, x)	; c3
-		dcp $04	; c7
-		sbx #$0b	; cb
-		dcp $0c0f	; cf
-		dcp ($13), y	; d3
-		dcp $14, x	; d7
-		dcp $1b1b, y	; db
-		dcp $1c1f, x	; df
-		isc ($03, x)	; e3
-		isc $04	; e7
-		isc $0c0f	; ef
-		isc ($13), y	; f3
-		isc $14, x	; f7
-		isc $1b1b, y	; fb
-		isc $1c1f, x	; ff
+	!src "include-6502.a"
+	!src "include-undoc.a"

testing/cpus/test-r65c02.a

@@ -0,0 +1,7 @@
+;ACME 0.97
+	!cpu r65c02
+	!to "out-r65c02.o", plain
+	*=$1000
+	!src "include-6502.a"
+	!src "include-65c02.a"
+	!src "include-bitmanips.a"

testing/cpus/test-w65c02.a

@@ -0,0 +1,10 @@
+;ACME 0.97
+	!cpu w65c02
+	!to "out-w65c02.o", plain
+	*=$1000
+	!src "include-6502.a"
+	!src "include-65c02.a"
+	!src "include-bitmanips.a"
+	; WDC extensions:
+		wai	; cb
+		stp	; db