mirror of
https://github.com/uffejakobsen/acme.git
synced 2024-11-25 07:31:52 +00:00
added new library files and fixed comments in others
git-svn-id: https://svn.code.sf.net/p/acme-crossass/code-0/trunk@324 4df02467-bbd4-4a76-a152-e7ce94205b78
This commit is contained in:
marcobaye
parent
dac562b84f
commit
e8df8af5c7
@ -5,24 +5,48 @@ lib_6502_rc4_a = 1
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; this is an implementation of the stream cipher algorithm known as RC4.
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; you need to define these symbols in your code:
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; rc4_length a single byte to hold key/chunk lengths
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; rc4_count a single byte (tmp var for iteration counter)
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; rc4_ii a single byte to hold state
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; rc4_jj a single byte to hold state
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; rc4_state a full page of memory (256 bytes)
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; you need to define these addresses in your code:
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; single bytes:
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; rc4_length key/chunk length (only used temporarily)
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; rc4_count iteration count (only used temporarily)
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; rc4_ii holds internal state (do not touch!)
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; rc4_jj holds internal state (do not touch!)
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; multi-byte areas:
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; rc4_state 256 bytes of internal state (do not touch!)
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; rc4_key key buffer
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; rc4_in input buffer
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; rc4_out output buffer
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; the size of the buffers limits how much data you can pass to the functions.
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; the sizes of the buffers limit how much data you can pass to the functions.
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; all three buffer addresses may be identical, in that case the output will
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; overwrite the input (and/or the key).
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; functions you can then call:
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; rc4_init initialise state
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; rc4_usekey_X use key (in key buffer, length in X) to change state
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; rc4_reset reset ii and jj (call between keying and processing)
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; rc4_process_X de/encrypt data from input to output buffer (length in X)
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; here's some example code:
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!if 0 {
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!src <6502/rc4.a> ; include this file
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entrypoint
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jsr rc4_init ; (re-)init rc4 internal state
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[copy user-supplied key (or its hash) to key buf]
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[maybe append some salt to keybuf]
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; do this at least once, but some
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; algorithms need you to do this N times:
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ldx #TOTALKEYLENGTH
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jsr rc4_usekey_X
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; end of (optional) loop
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jsr rc4_reset
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[copy chunk of input data to input buffer]
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ldx #CHUNKSIZE
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jsr rc4_process_X
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[read from output buffer]
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rts
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+rc4_code ; place actual code
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}
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!macro rc4_code {
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; create shorter names
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.length = rc4_length
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54
ACME_Lib/cbm/c128/keys.a
Normal file
54
ACME_Lib/cbm/c128/keys.a
Normal file
@ -0,0 +1,54 @@
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;ACME 0.97
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!ifdef lib_cbm_c128_keys_a !eof
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lib_cbm_c128_keys_a = 1
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; bit in $dc01:
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; 7 6 5 4 3 2 1 0
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;(Joy1: BUT RGHT LFT DWN UP)
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; | c64 keys:
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; | bit in $dc00:
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; | (Joy2:)
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; DOWN F5 F3 F1 F7 RGHT CR DEL | 0 (UP)
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; LSHF E S Z 4 A W 3 | 1 (DOWN)
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; X T F C 6 D R 5 | 2 (LEFT)
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; V U H B 8 G Y 7 | 3 (RIGHT)
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; N O K M 0 J I 9 | 4 (BUTTON)
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; , @ : . - L P + | 5
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; / ^ = RSHF HOME ; * POUND | 6
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; STOP Q CBM SPC 2 CTRL <- 1 | 7
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;
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; | additional c128 keys:
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; | bit in $d02f:
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; 1 7 4 2 TAB 5 8 HELP | 0
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; 3 9 6 ENTER LF - + ESC | 1
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; NS RGHT LFT DWN UP . 0 ALT | 2
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; values for "current key number" in C128 zeropage location $d4:
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!src <cbm/c64/keys.a> ; values 00..63 are compatible to C64
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keynumber_HELP = 64
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keynumber_KEYPAD8 = 65
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keynumber_KEYPAD5 = 66
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keynumber_TAB = 67
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keynumber_KEYPAD2 = 68
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keynumber_KEYPAD4 = 69
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keynumber_KEYPAD7 = 70
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keynumber_KEYPAD1 = 71
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keynumber_ESC = 72
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keynumber_KEYPADPLUS = 73
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keynumber_KEYPADMINUS = 74
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keynumber_LINEFEED = 75
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keynumber_KEYPADENTER = 76
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keynumber_KEYPAD6 = 77
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keynumber_KEYPAD9 = 78
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keynumber_KEYPAD3 = 79
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keynumber_ALT = 80
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keynumber_KEYPAD0 = 81
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keynumber_KEYPADPOINT = 82
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keynumber_CRSR128UP = 83
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keynumber_CRSR128DOWN = 84
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keynumber_CRSR128LEFT = 85
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keynumber_CRSR128RIGHT = 86
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keynumber_NOSCROLL = 87
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keynumberC128_NONE = 88 ; no key pressed (C64 uses 64 instead)
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@ -149,47 +149,47 @@ vdcstate_VERSIONMASK = %...##### ; vdc version (0, 1 or 2)
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; indirect registers (default value, see $e179 in C128 kernal)
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vdcr_htotal = $00 ; 126 (127 for PAL, depends on kernal version) characters per line, minus one
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vdcr_columns = $01 ; 80 characters per line, actually displayed
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vdcr_hdisp = $01
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vdcr_hsync_pos = $02 ; 102 character position to send horizontal sync in
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vdcr_syncwidth = $03 ; $49 4b vertical, 4b horizontal
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vdcr_vtotal = $04 ; 32 (39 or 38 for PAL, depends on kernal version) character lines per screen, minus one
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vdcr_vadjust = $05 ; 0 additional scan lines per screen (to fix timings)
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vdcr_lines = $06 ; 25 character lines per screen, actually displayed
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vdcr_vdisp = $06
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vdcr_vsync_pos = $07 ; 29 (32 for PAL) character line to send vertical sync in
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vdcr_interlace = $08 ; 0 interlace mode (0=2=std, 1=jitter, 3=interlace)
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vdcr_charheight_total = $09 ; 7 5b total, minus one
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vdcr_crsr_start = $0a ; $20 2b mode, 5b scanline
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vdcr_htotal = 0 ; 126 (127 for PAL, depends on kernal version) characters per line, minus one
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vdcr_columns = 1 ; 80 characters per line, actually displayed
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vdcr_hdisp = 1
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vdcr_hsync_pos = 2 ; 102 character position to send horizontal sync in
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vdcr_syncwidth = 3 ; $49 4b vertical, 4b horizontal
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vdcr_vtotal = 4 ; 32 (39 or 38 for PAL, depends on kernal version) character lines per screen, minus one
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vdcr_vadjust = 5 ; 0 additional scan lines per screen (to fix timings)
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vdcr_lines = 6 ; 25 character lines per screen, actually displayed
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vdcr_vdisp = 6
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vdcr_vsync_pos = 7 ; 29 (32 for PAL) character line to send vertical sync in
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vdcr_interlace = 8 ; 0 interlace mode (0=2=std, 1=jitter, 3=interlace)
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vdcr_charheight_total = 9 ; 7 5b total, minus one
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vdcr_crsr_start = 10 ; $20 2b mode, 5b scanline (top line of cursor)
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vdcr_CRSRSTART_MODE_MASK = %.##.....
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; vdcr_CRSRSTART_MODE_FIXED = %........ ; fixed cursor
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vdcr_CRSRSTART_MODE_OFF = %..#..... ; invisible
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vdcr_CRSRSTART_MODE_FAST = %.#...... ; flashing with 1/16 of refresh freq
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vdcr_CRSRSTART_MODE_SLOW = %.##..... ; flashing with 1/32 of refresh freq
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vdcr_crsr_end = $0b ; 7 5b scanline
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vdcr_display_hi = $0c ; 0 RAM address of display buffer
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vdcr_display_lo = $0d ; 0
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vdcr_crsr_hi = $0e ; 0 RAM address of cursor
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vdcr_crsr_lo = $0f ; 0
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vdcr_lp_y = $10 ; -- y position of light pen (lines, plus 1)
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vdcr_lp_x = $11 ; -- x position of light pen (characters, plus 8)
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vdcr_ram_hi = $12 ; -- RAM address of register $1f (reading/writing register $1f automatically increments this address)
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vdcr_ram_lo = $13 ; --
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vdcr_attr_hi = $14 ; $08 RAM address of attribute buffer
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vdcr_attr_lo = $15 ; $00
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vdcr_charwidth = $16 ; $78 4b total minus one, 4b displayed minus one
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vdcr_charheight_disp = $17 ; 8 5b displayed, minus one
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vdcr_control_v = $18 ; $20 vertical scroll and much other stuff
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vdcr_crsr_end = 11 ; 7 5b scanline (bottom line of cursor, plus 1, so should be 8 instead of 7!)
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vdcr_display_hi = 12 ; 0 RAM address of display buffer,
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vdcr_display_lo = 13 ; 0 see "hardscroll" notes below
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vdcr_crsr_hi = 14 ; 0 RAM address of cursor
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vdcr_crsr_lo = 15 ; 0
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vdcr_lp_y = 16 ; -- y position of light pen (lines, plus 1)
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vdcr_lp_x = 17 ; -- x position of light pen (characters, plus 8)
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vdcr_ram_hi = 18 ; -- RAM address of register 31 (reading/writing r31
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vdcr_ram_lo = 19 ; -- automatically increments this address)
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vdcr_attr_hi = 20 ; $08 RAM address of attribute buffer,
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vdcr_attr_lo = 21 ; $00 see "hardscroll" notes below
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vdcr_charwidth = 22 ; $78 4b total minus one, 4b displayed
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vdcr_charheight_disp = 23 ; 8 5b displayed, minus one (so 7 would suffice)
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vdcr_control_v = 24 ; $20 vertical scroll and much other stuff
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vdcr_CONTROLV_BLOCKMODE_MASK = %#.......
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; vdcr_CONTROLV_BLOCKMODE_WRITE = %........ ; writing to register $1e starts block write
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vdcr_CONTROLV_BLOCKMODE_COPY = %#....... ; writing to register $1e starts block copy
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; vdcr_CONTROLV_BLOCKMODE_WRITE = %........ ; writing to register 30 starts block write
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vdcr_CONTROLV_BLOCKMODE_COPY = %#....... ; writing to register 30 starts block copy
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vdcr_CONTROLV_REVERSESCREEN = %.#......
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vdcr_CONTROLV_FLASHFREQ_MASK = %..#.....
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; vdcr_CONTROLV_FLASHFREQ_FAST = %........
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vdcr_CONTROLV_FLASHFREQ_SLOW = %..#.....
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vdcr_CONTROLV_UPSCROLL_MASK = %...#####
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vdcr_control_h = $19 ; $47 ($40 for vdc version 0) horizontal scroll and much other stuff
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vdcr_control_h = 25 ; $47 ($40 for vdc version 0) horizontal scroll and much other stuff
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vdcr_CONTROLH_MODE_MASK = %#.......
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; vdcr_CONTROLH_MODE_TEXT = %........
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vdcr_CONTROLH_MODE_BITMAP = %#.......
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@ -200,25 +200,25 @@ vdcr_control_h = $19 ; $47 ($40 for vdc version 0) horizontal scroll and much o
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vdcr_CONTROLH_PIXELWIDTH_MASK = %...#....
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; vdcr_CONTROLH_PIXELWIDTH_NARROW = %........
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vdcr_CONTROLH_PIXELWIDTH_WIDE = %...#....
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vdcr_CONTROLH_LEFTSCROLL_MASK = %....####
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vdcr_color = $1a ; $f0 4b foreground, 4b background
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vdcr_COLOR_FOREGROUND_MASK = %####.... ; only used if attributes are off (see bit 6 of reg $19)
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vdcr_CONTROLH_RIGHTSCROLL_MASK = %....####
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vdcr_color = 26 ; $f0 4b foreground, 4b background
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vdcr_COLOR_FOREGROUND_MASK = %####.... ; only used if attributes are off (see bit 6 of reg 25)
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vdcr_COLOR_BACKGROUND_MASK = %....####
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vdcr_row_inc = $1b ; 0 address increment per row
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vdcr_charset = $1c ; $20 3b charset pointer, 1b RAM type, 4b unused
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vdcr_row_inc = 27 ; 0 address increment per row
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vdcr_charset = 28 ; $20 3b charset pointer, 1b RAM type, 4b unused
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vdcr_CHARSET_ADRESS_MASK = %###.....
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vdcr_CHARSET_RAMTYPE_MASK = %...#....
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; vdcr_CHARSET_RAMTYPE_16K = %........
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vdcr_CHARSET_RAMTYPE_64K = %...#....
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vdcr_underline = $1d ; 7 5b scanline
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vdcr_cycles = $1e ; -- number of write- or copy-cycles. 0 means 256.
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vdcr_access = $1f ; -- contents of RAM selected by registers $12/$13
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vdcr_source_hi = $20 ; -- start address for block copy
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vdcr_source_lo = $21 ; --
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vdcr_enable_start = $22 ; 125 column to enable display in
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vdcr_enable_end = $23 ; 100 column to disable display in
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vdcr_dram_refresh = $24 ; 5 RAM refresh cycles per line (lower 4 bits)
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vdcr_sync_polarity = $25 ; -- only in VDC 8568
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vdcr_underline = 29 ; 7 5b scanline
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vdcr_cycles = 30 ; -- number of write- or copy-cycles. 0 means 256.
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vdcr_access = 31 ; -- contents of RAM selected by registers 18/19
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vdcr_source_hi = 32 ; -- start address for block copy (block copying
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vdcr_source_lo = 33 ; -- automatically increments this address)
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vdcr_enable_start = 34 ; 125 column to enable display in (6 is left of text)
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vdcr_enable_end = 35 ; 100 column to disable display in (86 is right of text)
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vdcr_dram_refresh = 36 ; 5 RAM refresh cycles per line (lower 4 bits)
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vdcr_sync_polarity = 37 ; -- only in VDC 8568
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vdcr_HSYNC_POLARITY = %#.......
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vdcr_VSYNC_POLARITY = %.#......
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@ -232,3 +232,9 @@ vdcr_sync_polarity = $25 ; -- only in VDC 8568
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rom8_vdc_to_vic_color_table = $81f3 ; 00 0c 06 0e 05 0d 0b 03 02 0a 08 04 09 07 0f 01
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romc_vic_to_vdc_color_table = $ce5c ; 00 0f 08 07 0b 04 02 0d 0a 0c 09 06 01 05 03 0e
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}
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; "hardscroll" notes:
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; the vdc seems to read the values from registers 12/13/20/21 (screen ram and
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; attribute ram) at the _end_ of the display window, so if you change these
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; registers in the lower border, the next frame will still use the old values.
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; this is important if you want to combine hardscroll and softscroll.
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@ -381,7 +381,7 @@ lib_cbm_c128_zeropage_a = 1
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z_vicscn = $0400
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z_system = $0a00
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z_dejavu = $0a02
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z_palnts = $0a03
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z_palnts = $0a03 ; bit7 set means PAL
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z_init_status = $0a04
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z_memstr = $0a05
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z_memsiz = $0a07
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@ -402,7 +402,7 @@ lib_cbm_c128_zeropage_a = 1
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z_rodbs = $0a1a
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z_rodbe = $0a1b
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z_serial = $0a1c
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z_timer = $0a1d
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z_timer = $0a1d ; decrementing counter for SLEEP (low/medium/high)
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z_xmax = $0a20
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z_pause = $0a21
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z_rptflg = $0a22
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@ -426,7 +426,7 @@ lib_cbm_c128_zeropage_a = 1
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z_curcol = $0a33
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z_split = $0a34
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z_fnadrx = $0a35
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z_palcnt = $0a36
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z_palcnt = $0a36 ; countdown timer for TI's PAL adjustment (every fifth PAL irq, have an additional TI tick)
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z_speed = $0a37
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z_sprites = $0a38
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z_blanking = $0a39
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84
ACME_Lib/cbm/c64/keys.a
Normal file
84
ACME_Lib/cbm/c64/keys.a
Normal file
@ -0,0 +1,84 @@
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;ACME 0.97
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!ifdef lib_cbm_c64_keys_a !eof
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lib_cbm_c64_keys_a = 1
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; bit in $dc01: | bit in
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; 7 6 5 4 3 2 1 0 | $dc00:
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;(Joy1: BUT RGHT LFT DWN UP) | (Joy2:)
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;-----------------------------------+---------
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; DOWN F5 F3 F1 F7 RGHT CR DEL | 0 (UP)
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; LSHF E S Z 4 A W 3 | 1 (DOWN)
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; X T F C 6 D R 5 | 2 (LEFT)
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; V U H B 8 G Y 7 | 3 (RIGHT)
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; N O K M 0 J I 9 | 4 (BUTTON)
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; , @ : . - L P + | 5
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; / ^ = RSHF HOME ; * POUND | 6
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; STOP Q CBM SPC 2 CTRL <- 1 | 7
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; values for "current key number" in C64 zeropage location $cb:
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keynumber_DEL = 0
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keynumber_RETURN = 1
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keynumber_CURSORRIGHT = 2
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keynumber_F7 = 3
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keynumber_F1 = 4
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keynumber_F3 = 5
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keynumber_F5 = 6
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keynumber_CURSORDOWN = 7
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keynumber_3 = 8
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keynumber_W = 9
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keynumber_A = 10
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keynumber_4 = 11
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keynumber_Z = 12
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keynumber_S = 13
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keynumber_E = 14
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keynumber_LEFTSHIFT = 15
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keynumber_5 = 16
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keynumber_R = 17
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keynumber_D = 18
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keynumber_6 = 19
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keynumber_C = 20
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keynumber_F = 21
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keynumber_T = 22
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keynumber_X = 23
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keynumber_7 = 24
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keynumber_Y = 25
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keynumber_G = 26
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keynumber_8 = 27
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keynumber_B = 28
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keynumber_H = 29
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keynumber_U = 30
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keynumber_V = 31
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keynumber_9 = 32
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keynumber_I = 33
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keynumber_J = 34
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keynumber_0 = 35
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keynumber_M = 36
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keynumber_K = 37
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keynumber_O = 38
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keynumber_N = 39
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keynumber_PLUS = 40
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keynumber_P = 41
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keynumber_L = 42
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keynumber_MINUS = 43
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keynumber_POINT = 44
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keynumber_COLON = 45
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keynumber_AT = 46
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keynumber_COMMA = 47
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keynumber_POUND = 48
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keynumber_ASTERISK = 49
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keynumber_SEMICOLON = 50
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keynumber_HOME = 51
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keynumber_RIGHTSHIFT = 52
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keynumber_EQUALS = 53
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keynumber_UPARROW = 54
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keynumber_SLASH = 55
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keynumber_1 = 56
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keynumber_LEFTARROW = 57
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keynumber_CTRL = 58
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keynumber_2 = 59
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keynumber_SPACE = 60
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keynumber_CBM = 61
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keynumber_Q = 62
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keynumber_STOP = 63
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keynumberC64_NONE = 64 ; no key pressed (C128 uses 88 instead)
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@ -16,16 +16,16 @@ rec_STATUS_IRQ = %#.......
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rec_STATUS_END = %.#......
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rec_STATUS_ERROR = %..#..... ; for verify command
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rec_STATUS_TYPE = %...#.... ; chip type (do not use to determine unit size!)
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rec_STATUS_VERSION = %....####
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rec_STATUS_VERSION = %....#### ; always zero
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!address {
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; command register
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rec_command = $df01
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}
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rec_COMMAND_EXECUTE = %#.......
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;reserved = %.#......
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rec_COMMAND_RELOAD = %..#.....
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rec_COMMAND_EXECUTE = %#....... ; setting this starts the operation
|
||||
;reserved = %.#...... ; register bit exists, but does nothing
|
||||
rec_COMMAND_RELOAD = %..#..... ; reload address registers when done (do not use in verify mode, because you want the address in case of an error!)
|
||||
rec_COMMAND_IMMEDIATELY = %...#.... ; do not wait for $ff00 write
|
||||
;reserved = %....##..
|
||||
;reserved = %....##.. ; register bits exist, but do nothing
|
||||
rec_COMMAND_MODE_MASK = %......## ; bit mask for the four modes
|
||||
rec_COMMAND_MODE_STASH = %........ ; computer-to-REU
|
||||
rec_COMMAND_MODE_FETCH = %.......# ; REU-to-computer
|
||||
@ -40,7 +40,7 @@ rec_COMMAND_FETCH = %#.#....# ; starting and then reload values.
|
||||
; external address (expansion RAM)
|
||||
rec_ext_low = $df04
|
||||
rec_ext_high = $df05
|
||||
rec_ext_bank = $df06
|
||||
rec_ext_bank = $df06 ; upper five bits always read as 1
|
||||
; A stock 1700 unit has two banks (128 KiB).
|
||||
; A stock 1764 unit has four banks (256 KiB).
|
||||
; A stock 1750 unit has eight banks (512 KiB).
|
||||
@ -50,14 +50,18 @@ rec_COMMAND_FETCH = %#.#....# ; starting and then reload values.
|
||||
rec_amount_low = $df07 ; using $0000 results in
|
||||
rec_amount_high = $df08 ; 64 KiB being transferred
|
||||
; when to request interrupts
|
||||
rec_irqctrl = $df09
|
||||
rec_irqctrl = $df09 ; lower five bits always read as 1
|
||||
}
|
||||
rec_IRQCTRL_ENABLE = %#.......
|
||||
rec_IRQCTRL_ON_END = %.#......
|
||||
rec_IRQCTRL_ON_ERROR = %..#..... ; for verify errors
|
||||
!address {
|
||||
; address control (set to zero for normal operation)
|
||||
rec_addrctrl = $df0a
|
||||
rec_addrctrl = $df0a ; lower six bits always read as 1
|
||||
}
|
||||
rec_ADDRCTRL_FIX_INT = %#.......
|
||||
rec_ADDRCTRL_FIX_EXT = %.#......
|
||||
|
||||
; $df0b..$df1f always read as $ff,
|
||||
; at $df20 the registers repeat.
|
||||
; these "32 registers" are visible 8 times in the $df00 page.
|
||||
|
||||
Loading…
Reference in New Issue
Block a user