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fixed comments in vdc library file
git-svn-id: https://svn.code.sf.net/p/acme-crossass/code-0/trunk@321 4df02467-bbd4-4a76-a152-e7ce94205b78
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@ -173,8 +173,8 @@ vdcr_display_lo = $0d ; 0
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vdcr_crsr_hi = $0e ; 0 RAM address of cursor
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vdcr_crsr_lo = $0f ; 0
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vdcr_lp_y = $10 ; -- y position of light pen (lines, plus 1)
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vdcr_lp_x = $11 ; -- x position if light pen (characters, plus 8)
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vdcr_ram_hi = $12 ; -- RAM address of register $1f
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vdcr_lp_x = $11 ; -- x position of light pen (characters, plus 8)
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vdcr_ram_hi = $12 ; -- RAM address of register $1f (reading/writing register $1f automatically increments this address)
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vdcr_ram_lo = $13 ; --
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vdcr_attr_hi = $14 ; $08 RAM address of attribute buffer
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vdcr_attr_lo = $15 ; $00
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@ -182,8 +182,8 @@ vdcr_charwidth = $16 ; $78 4b total minus one, 4b displayed minus one
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vdcr_charheight_disp = $17 ; 8 5b displayed, minus one
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vdcr_control_v = $18 ; $20 vertical scroll and much other stuff
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vdcr_CONTROLV_BLOCKMODE_MASK = %#.......
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; vdcr_CONTROLV_BLOCKMODE_WRITE = %........
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vdcr_CONTROLV_BLOCKMODE_COPY = %#.......
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; vdcr_CONTROLV_BLOCKMODE_WRITE = %........ ; writing to register $1e starts block write
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vdcr_CONTROLV_BLOCKMODE_COPY = %#....... ; writing to register $1e starts block copy
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vdcr_CONTROLV_REVERSESCREEN = %.#......
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vdcr_CONTROLV_FLASHFREQ_MASK = %..#.....
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; vdcr_CONTROLV_FLASHFREQ_FAST = %........
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@ -202,7 +202,7 @@ vdcr_control_h = $19 ; $47 ($40 for vdc version 0) horizontal scroll and much o
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vdcr_CONTROLH_PIXELWIDTH_WIDE = %...#....
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vdcr_CONTROLH_LEFTSCROLL_MASK = %....####
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vdcr_color = $1a ; $f0 4b foreground, 4b background
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vdcr_COLOR_FOREGROUND_MASK = %####.... ; only used if attributes are off
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vdcr_COLOR_FOREGROUND_MASK = %####.... ; only used if attributes are off (see bit 6 of reg $19)
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vdcr_COLOR_BACKGROUND_MASK = %....####
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vdcr_row_inc = $1b ; 0 address increment per row
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vdcr_charset = $1c ; $20 3b charset pointer, 1b RAM type, 4b unused
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@ -212,12 +212,12 @@ vdcr_charset = $1c ; $20 3b charset pointer, 1b RAM type, 4b unused
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vdcr_CHARSET_RAMTYPE_64K = %...#....
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vdcr_underline = $1d ; 7 5b scanline
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vdcr_cycles = $1e ; -- number of write- or copy-cycles. 0 means 256.
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vdcr_access = $1f ; -- RAM content of address r$12/13
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vdcr_source_hi = $20 ; -- RAM address of cycle start
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vdcr_access = $1f ; -- contents of RAM selected by registers $12/$13
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vdcr_source_hi = $20 ; -- start address for block copy
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vdcr_source_lo = $21 ; --
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vdcr_enable_start = $22 ; 125 column to enable display in
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vdcr_enable_end = $23 ; 100 column to disable display in
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vdcr_dram_refresh = $24 ; 5 RAM refresh rate (lower 4 bits)
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vdcr_dram_refresh = $24 ; 5 RAM refresh cycles per line (lower 4 bits)
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vdcr_sync_polarity = $25 ; -- only in VDC 8568
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vdcr_HSYNC_POLARITY = %#.......
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vdcr_VSYNC_POLARITY = %.#......
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