From f87ddbb5e6a9739190807fb9efe2d589c640a7be Mon Sep 17 00:00:00 2001
From: marcobaye <marcobaye@4df02467-bbd4-4a76-a152-e7ce94205b78>
Date: Mon, 27 Jul 2020 22:58:10 +0000
Subject: [PATCH] added last cpu test source and expected output

git-svn-id: https://svn.code.sf.net/p/acme-crossass/code-0/trunk@282 4df02467-bbd4-4a76-a152-e7ce94205b78
---
 testing/cpus/expected-m65.o | Bin 0 -> 1031 bytes
 testing/cpus/include-6502.a |   4 +-
 testing/cpus/test-m65.a     | 129 ++++++++++++++++++++++++++++++++++++
 3 files changed, 132 insertions(+), 1 deletion(-)
 create mode 100644 testing/cpus/expected-m65.o
 create mode 100644 testing/cpus/test-m65.a

diff --git a/testing/cpus/expected-m65.o b/testing/cpus/expected-m65.o
new file mode 100644
index 0000000000000000000000000000000000000000..30630af658cc2937f7d584a7a12f4655382f1e37
GIT binary patch
literal 1031
zcmWm5eSlU&6vy#%+3C7@X0AI-Ow7=(LKLkn%2RYag(zATp=c>&i<Tm`=pp10T3WI~
z$lDcKLI|O}7A-|6S_%(EYl~2v^T+x9bG{!40wLOnJ))?sR8lFq7bJ->?aY4GTIZej
z?jR*Q1P6<bqLVoEu&DD9N_J7QtCB}Sx1_u2VUF!-ZEx@Tcy~hIpr7b3PCg|XaGH_>
zl^mqx88A2*YKED!hg&<syOG{qFe(@=#)wNUjmB12SC3P2ypmVIgk++bWUiTP?G*2(
zdN(b&NlX_vi(7BIUCEhB-l61OFe|yo%r^D)_sy~P{<+>g9L)<Ji5?U4#pB}1r=q8y
zQF4Kj&no#mEKFWBi_A;)uPnCq)z`gS;@un8z7;JE-WAKla`FBL(T5)^xkAa6N`4Bf
zlGSF7`Esqb>%3d<-FMN3;0Li$Y!W~H9Q~@~W+k^M`8#Y)wwdkbuN~Iz^lq1TVHn4-
zZ+Kt~hlEGQa7=i73@3%B$8c77ehe3fm&b5*czq1Fgm=bpZ}?CQPlV6K@N)QO4DW@X
z#PCJ<Z45t#zs2xp_+JbqC7Db{>wQYvACSqE>xznA*=)8_pL0=3jlQbl+S=OM8(_wa
zI{iQ<^I$gHsGIaxE&A`>cHeVvfc;BLOUug24nG>;I6N_zJM~O}Aw$lss=5&1vMT|u
z%ja(dC=?2J12i-=JX)2e=?eg_6$)=xy_5SWO+N$pJooiCY1*9sKKDzS{sGY1+WODG
zX?k7}F$fTaKx{+T7EvmRsCbeDQENnF5ZlpNYZ2QcI`0rYPY0qMiFKmujM#-$SDtP}
z%ZYX;)`PAm(_V<ZS@q%ROSB)c{&WKn2eKN(Gni;4(V@hK(G6!hg2_mpQRGIG8ACS~
zaU7HJJQK*(kef(m65V8WQ<zNUnMN+3N1RS>Cik<bucLl8wR5<g%h^22=2NnOlZBKt
zQnHAW#hfhRWGN-fC|ORog0q!8tEg?Fb~UwY=+<(-j{EgI8wfQwBW@(LiEcBSEj(KZ
zwh-J#Xgl2whCA8p@~)_Lv0N7`b+JYl>vXYE7n^jEbNbMf^HlQG@YL}%@-*?Z=>Gv$
C^Cq1D

literal 0
HcmV?d00001

diff --git a/testing/cpus/include-6502.a b/testing/cpus/include-6502.a
index c9726fa..fa8f755 100644
--- a/testing/cpus/include-6502.a
+++ b/testing/cpus/include-6502.a
@@ -139,7 +139,9 @@
 		inc $05		; e6
 		inx		; e8
 		sbc #$09	; e9
-		nop		; ea
+	!ifndef M65 {
+		nop		; ea	(m65 re-uses this opcode as a prefix)
+	}
 		cpx $0d0e	; ec
 		sbc $0d0e	; ed
 		inc $0d0e	; ee
diff --git a/testing/cpus/test-m65.a b/testing/cpus/test-m65.a
new file mode 100644
index 0000000..8e8a4a3
--- /dev/null
+++ b/testing/cpus/test-m65.a
@@ -0,0 +1,129 @@
+;ACME 0.97
+	!cpu m65
+	!to "out-m65.o", plain
+	*=$1000
+M65 = 1	; make next include skip the NOP mnemonic (re-used as prefix code by M65)
+	!src "include-6502.a"
+;	!src "include-65c02.a"	; not used, because 65ce02 changes "(zp)" to "(zp), z"
+	!src "include-bitmanips.a"
+	!src "include-65ce02.a"
+; this differs between 65ce02 and 4502:
+		map		; $5c
+; this is an alias for NOP:
+		eom		; $ea, "end of mapping"
+
+; "quad mode" m65 extension using NEG:NEG prefix:
+		orq ($01, x)	; 01
+		orq $05		; 05
+		aslq $05	; 06
+		aslq		; 0a
+		orq $0d0e	; 0d
+		aslq $0d0e	; 0e
+		orq ($11), y	; 11
+		orq ($12)	; 12
+		orq $15, x	; 15
+		aslq $15, x	; 16
+		orq $1919, y	; 19
+		inq		; 1a
+		orq $1d1e, x	; 1d
+		aslq $1d1e, x	; 1e
+		andq ($01, x)	; 21
+		andq $05	; 25
+		rolq $05	; 26
+		rolq		; 2a
+		andq $0d0e	; 2d
+		rolq $0d0e	; 2e
+		andq ($11), y	; 31
+		andq ($12)	; 32
+		andq $15, x	; 35
+		rolq $15, x	; 36
+		andq $1919, y	; 39
+		deq		; 3a
+		andq $1d1e, x	; 3d
+		rolq $1d1e, x	; 3e
+		eorq ($01, x)	; 41
+		eorq $05	; 45
+		lsrq $05	; 46
+		lsrq		; 4a
+		eorq $0d0e	; 4d
+		lsrq $0d0e	; 4e
+		eorq ($11), y	; 51
+		eorq ($12)	; 52
+		eorq $15, x	; 55
+		lsrq $15, x	; 56
+		eorq $1919, y	; 59
+		eorq $1d1e, x	; 5d
+		lsrq $1d1e, x	; 5e
+		adcq ($01, x)	; 61
+		adcq $05	; 65
+		rorq $05	; 66
+		rorq		; 6a
+		adcq $0d0e	; 6d
+		rorq $0d0e	; 6e
+		adcq ($11), y	; 71
+		adcq ($12)	; 72
+		adcq $15, x	; 75
+		rorq $15, x	; 76
+		adcq $1919, y	; 79
+		adcq $1d1e, x	; 7d
+		rorq $1d1e, x	; 7e
+		stq ($01, x)	; 81
+		stq ($82, s), y	; 82
+		stq $05		; 85
+		stq $0d0e	; 8d
+		stq ($11), y	; 91
+		stq ($12)	; 92
+		stq $15, x	; 95
+		stq $1919, y	; 99
+		stq $1d1e, x	; 9d
+		ldq ($01, x)	; a1
+		ldq $05		; a5
+		ldq $0d0e	; ad
+		ldq ($11), y	; b1
+		ldq ($12)	; b2
+		ldq $15, x	; b5
+		ldq $1919, y	; b9
+		ldq $1d1e, x	; bd
+		cpq ($01, x)	; c1
+		cpq $05		; c5
+		deq $05		; c6
+		cpq $0d0e	; cd
+		deq $0d0e	; ce
+		cpq ($11), y	; d1
+		cpq ($12)	; d2
+		cpq $15, x	; d5
+		deq $15, x	; d6
+		cpq $1919, y	; d9
+		cpq $1d1e, x	; dd
+		deq $1d1e, x	; de
+		sbcq ($01, x)	; e1
+		ldq ($e2, s), y	; e2
+		sbcq $05	; e5
+		inq $05		; e6
+		sbcq $0d0e	; ed
+		inq $0d0e	; ee
+		sbcq ($11), y	; f1
+		sbcq ($12)	; f2
+		sbcq $15, x	; f5
+		inq $15, x	; f6
+		sbcq $1919, y	; f9
+		sbcq $1d1e, x	; fd
+		inq $1d1e, x	; fe
+; "long mode" m65 extension using NOP prefix:
+		ora [$12], z	; 12
+		and [$12], z	; 32
+		eor [$12], z	; 52
+		adc [$12], z	; 72
+		sta [$12], z	; 92
+		lda [$12], z	; b2
+		cmp [$12], z	; d2
+		sbc [$12], z	; f2
+; "quad mode" and "long mode" combined using NEG:NEG:NOP prefix:
+		orq [$12]	; 12
+		andq [$12]	; 32
+		eorq [$12]	; 52
+		adcq [$12]	; 72
+		stq [$12]	; 92
+		ldq [$12]	; b2
+		cpq [$12]	; d2
+		sbcq [$12]	; f2