Commit Graph

3 Commits

Author SHA1 Message Date
marcobaye
6dd15f7116 added BITQ and ASRQ to m65 cpu.
git-svn-id: https://svn.code.sf.net/p/acme-crossass/code-0/trunk@283 4df02467-bbd4-4a76-a152-e7ce94205b78
2020-07-27 23:37:36 +00:00
marcobaye
70b9ee222d tweaked docs and removed some comments, no change in functionality
git-svn-id: https://svn.code.sf.net/p/acme-crossass/code-0/trunk@273 4df02467-bbd4-4a76-a152-e7ce94205b78
2020-06-30 09:24:30 +00:00
marcobaye
a7dd713d93 cleaned up list of cpu types and added opcode table(s) for m65 cpu
git-svn-id: https://svn.code.sf.net/p/acme-crossass/code-0/trunk@272 4df02467-bbd4-4a76-a152-e7ce94205b78
2020-06-29 15:10:42 +00:00