mirror of
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be4580af53
runtime. I added a hard limit of 64 MiB, but that value is completely arbitrary. git-svn-id: https://svn.code.sf.net/p/acme-crossass/code-0/trunk@402 4df02467-bbd4-4a76-a152-e7ce94205b78
103 lines
3.9 KiB
Plaintext
103 lines
3.9 KiB
Plaintext
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ACME
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...the ACME Crossassembler for Multiple Environments
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--- 65816 support ---
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This text contains information about the 65816-specific features of
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ACME.
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----------------------------------------------------------------------
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Section: Aliases for "long" JMPs and JSRs
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----------------------------------------------------------------------
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In addition to the mnemonics JMP and JSR, the 65816 processor also
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knows JML and JSL, which are JMP and JSR using new (long) addressing
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modes. ACME also accepts the new addressing modes when using the old
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mnemonics JMP and JSR, but the old addressing modes cannot be used
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with the new mnemonics JML and JSL.
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----------------------------------------------------------------------
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Section: Argument order of MVN/MVP
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----------------------------------------------------------------------
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According to WDC's official syntax for 65816 assembly language, the
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argument order of the MVN and MVP instructions differs between
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assembly language and machine code.
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To copy bytes from bank $ab to bank $cd, use the following statement:
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mvn $ab, $cd ; source bank $ab, destination bank $cd
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or
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mvn #$ab, #$cd ; source bank $ab, destination bank $cd
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ACME will then produce the following machine code:
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$54 $cd $ab ; opcode mvn, destination bank $cd, source bank $ab
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ACME 0.05 and earlier did it the wrong way.
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----------------------------------------------------------------------
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Section: Register lengths
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----------------------------------------------------------------------
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When assembling "lda #5" for example, ACME has to know whether to
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create an 8-bit argument or a 16-bit argument. This depends on the
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current register length.
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On startup, ACME assumes all registers are 8 bits wide. You can change
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this at any time using the following pseudo opcodes:
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!al ; switch to long accumulator
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!as ; switch to short accumulator
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!rl ; switch to long index registers
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!rs ; switch to short index registers
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Please note that ACME, unlike some other assemblers, does *not* track
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SEP/REP instructions: I don't like that method - it fails when
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encountering PLPs, for example. So if it doesn't work reliably in the
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first place, why use it? :)
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If you don't like that you always have to use a pseudo opcode
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alongside SEP/REP instructions, then have a look at the library file
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<65816/std.a> which has some predefined macros you can use.
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----------------------------------------------------------------------
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Section: Postfixing stuff
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----------------------------------------------------------------------
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You can also use the postfix method (which is explained in the file
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"AddrModes.txt") to specify the immediate argument's length:
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ldx+2 #5
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will always be assembled to a 16-bit argument, regardless of the
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currently configured index register width. Use at your own risk - this
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method obviously is not a good example on structured programming. :)
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----------------------------------------------------------------------
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Section: Miscellaneous
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----------------------------------------------------------------------
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The 65816 CPU has an address space of 16 MBytes, but that is still
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split up into 256 "banks" of 64 KBytes each: A simple "JMP $1234"
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instruction does not necessarily jump to $001234, it rather jumps to
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address $1234 _in_the_bank_where_the_code_is_currently_running_.
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Therefore, it does not make sense to use 24-bit values for most
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labels. On the other hand, when jumping between banks, you need the
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full 24-bit address.
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One solution for this problem would be something like this:
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; this code is supposed to run at $1000 in bank 2:
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* = $021000 ; we use the correct 24-bit address, but we
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!pseudopc * & $ffff { ; restrict the pc to 16 bits
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start lda some_var ; now "start" is $1000
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beq some_label
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...
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}
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This way, referencing "start" will give you the 16-bit value ($1000),
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but referencing "&start" will give the full 24-bit value ($021000).
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