marcobaye b03b217979 disabled all indexed addressing for m65's "quad" mode, except for LDQ. ... git-svn-id: https://svn.code.sf.net/p/acme-crossass/code-0/trunk@287 4df02467-bbd4-4a76-a152-e7ce94205b78		2020-07-29 23:30:33 +00:00
..
check-all-cpus.sh
expected-65c02.o
expected-65ce02.o
expected-4502.o
expected-6502.o
expected-65816.o	small change in tests, improved 65816 register length checking	2020-07-28 13:13:26 +00:00
expected-c64dtv2.o	nmos6502 mode now also accepts ALR mnemonic (alias for ASR)	2020-07-28 23:08:07 +00:00
expected-m65.o	disabled all indexed addressing for m65's "quad" mode, except for LDQ.	2020-07-29 23:30:33 +00:00
expected-nmos6502.o	nmos6502 mode now also accepts ALR mnemonic (alias for ASR)	2020-07-28 23:08:07 +00:00
expected-r65c02.o
expected-w65c02.o
include-65c02.a
include-65ce02.a
include-6502.a
include-bitmanips.a
include-undoc.a	nmos6502 mode now also accepts ALR mnemonic (alias for ASR)	2020-07-28 23:08:07 +00:00
test-65c02.a
test-65ce02.a
test-4502.a
test-6502.a
test-65816.a	small change in tests, improved 65816 register length checking	2020-07-28 13:13:26 +00:00
test-c64dtv2.a
test-m65.a	disabled all indexed addressing for m65's "quad" mode, except for LDQ.	2020-07-29 23:30:33 +00:00
test-nmos6502.a
test-r65c02.a
test-w65c02.a