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8d2719db8a
message now includes symbol name, fixed bug in type system (!for loop counters), added address() as alternative to addr(), fixed bug in report listing generator (CR in input caused additional blank lines in output). git-svn-id: https://svn.code.sf.net/p/acme-crossass/code-0/trunk@63 4df02467-bbd4-4a76-a152-e7ce94205b78
137 lines
6.6 KiB
Plaintext
137 lines
6.6 KiB
Plaintext
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ACME
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...the ACME Crossassembler for Multiple Environments
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--- Undocumented ("illegal") opcodes ---
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In release 0.87, support for some of the undocumented opcodes of the
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6502 processor was added.
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In release 0.89, some more were added.
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In release 0.94.8, another one was added (lxa).
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In release 0.95.3, C64DTV2 support was added, which includes these
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opcodes as well.
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In release 0.95.4, the remaining seven were added.
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In release 0.95.6, "ANC" was removed from C64DTV2 mode.
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Here are the new mnemonics, possible addressing modes and generated
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opcodes (mnemonics in parentheses are used by other sources):
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| addressing mode |
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mnemonic | 8 8,x 8,y 16 16,x 16,y (8,x) (8),y | performs:
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----------------+--------------------------------------+-----------
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slo (aso) | 07 17 0f 1f 1b 03 13 | asl + ora
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rla | 27 37 2f 3f 3b 23 33 | rol + and
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sre (lse) | 47 57 4f 5f 5b 43 53 | lsr + eor
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rra | 67 77 6f 7f 7b 63 73 | ror + adc
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sax (axs, aax) | 87 97 8f 83 | stx + sta
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lax | a7 b7 af bf a3 b3 | ldx + lda
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dcp (dcm) | c7 d7 cf df db c3 d3 | dec + cmp
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isc (isb, ins) | e7 f7 ef ff fb e3 f3 | inc + sbc
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las (lar, lae) | bb | A,X,S = {addr} & S
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These five are said to be unstable:
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tas (shs, xas) | 9b | S = A & X {addr} = A&X& {H+1}
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sha (axa, ahx) | 9f 93 | {addr} = A & X & {H+1}
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shx (xas, sxa) | 9e | {addr} = X & {H+1}
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shy (say, sya) | 9c | {addr} = Y & {H+1}
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| addressing mode |
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mnemonic | implied #8 8 8,x 16 16,x | performs:
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----------------+---------------------------------+-----------------------
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anc | 0b* | A = A & arg, then C=N
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asr (alr) | 4b | A = A & arg, then lsr
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arr | 6b | A = A & arg, then ror
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sbx (axs, sax) | cb | X = (A & X) - arg
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dop (nop, skb) | 80** 80 04 14 | skips next byte
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top (nop, skw) | 0c** 0c 1c | skips next two bytes
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jam (kil, hlt) | 02 | crash (wait for reset)
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These two are somewhat unstable, because they involve an arbitrary value:
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ane (xaa) | 8b*** | A = (A | ??) & X & arg
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lxa (lax, atx) | ab*** | A,X = (A | ??) & arg
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Example:
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!cpu 6510 ; activate additional mnemonics...
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lax (some_zp_label,x) ; ...and use them. No, this
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dcp (other_zp_label),y ; example does not make sense.
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*) Up until ACME version 0.95.1, anc#8 generated opcode 0x2b. Since
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ACME version 0.95.2, anc#8 generates opcode 0x0b. Both opcodes work
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the same way on a real 6510 CPU, but they do not work on the C64DTV2.
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**) Note that DOP ("double nop") and TOP ("triple nop") can be used
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with implied addressing, but the generated opcodes are those for
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immediate and 16-bit absolute addressing, respectively. Using dop/top
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with x-indexed addressing might have its uses when timing is critical
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(crossing a page border adds a penalty cycle).
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***) ANE and LXA first perform an ORA with an arbitrary(!) value and
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then perform an AND with the given argument. So they are unstable and
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therefore useless - unless the given argument is zero:
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ANE #0 reliably clears A - which is still useless; just use LDA #0.
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LXA #0 reliably clears both A and X.
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ACME will output a warning if these opcodes get assembled with a
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nonzero argument.
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There is no guarantee that these opcodes actually work on a given 6502
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(or 6510, or 8500, or 8502) CPU. But as far as I know, nobody ever
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found an unmodified C64/C128 where these illegals didn't work. That's
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why I used "6510" as the CPU keyword instead of "6502illegal" or
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something like that.
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These illegals will definitely *not* work on 65c02 and 65816 CPUs. But
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I really should not have to tell you that ;)
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Because there are no official mnemonics for these opcodes, different
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people use different names for them. I hope my choices are not too
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exotic for your taste.
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Just for the sake of completeness: Here are all the remaining opcodes
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(the ones ACME won't generate even with "6510" cpu):
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Opcode| Description C64DTV2
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------+--------------------------------------------------------------
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12 | same as 02 and others jam CRASH bra rel
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1a | same as (*legal*) ea nop
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22 | same as 02 and others jam CRASH
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2b | same as 0b anc #8 dop
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32 | same as 02 and others jam CRASH sac #8
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34 | same as 14 and others dop 8,x
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3a | same as (*legal*) ea nop
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3c | same as 1c and others top 16,x
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42 | same as 02 and others jam CRASH sir #8
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44 | same as 04 dop 8
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52 | same as 02 and others jam CRASH
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54 | same as 14 and others dop 8,x
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5a | same as (*legal*) ea nop
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5c | same as 1c and others top 16,x
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62 | same as 02 and others jam CRASH
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64 | same as 04 dop 8
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72 | same as 02 and others jam CRASH
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74 | same as 14 and others dop 8,x
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7a | same as (*legal*) ea nop
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7c | same as 1c and others top 16,x
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82 | same as c2/e2 dop #8, but said to CRASH sometimes
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89 | same as 80 dop #8
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92 | same as 02 and others jam CRASH
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b2 | same as 02 and others jam CRASH
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c2 | same as 82/e2 dop #8, but said to CRASH sometimes
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d2 | same as 02 and others jam CRASH
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d4 | same as 14 and others dop 8,x
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da | same as (*legal*) ea nop
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dc | same as 1c and others top 16,x
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e2 | same as 82/c2 dop #8, but said to CRASH sometimes
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eb | same as (*legal*) e9 sbc #8
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f2 | same as 02 and others jam CRASH
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f4 | same as 14 and others dop 8,x
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fa | same as (*legal*) ea nop
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fc | same as 1c and others top 16,x
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For more information about what these opcodes do, see these documents:
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John West, Marko Mäkelä. '64doc' file, 1994/06/03.
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Extra Instructions Of The 65XX Series CPU, Adam Vardy, 27 Sept. 1996
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6502 Undocumented Opcodes, by Freddy Offenga, 5/17/1997
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AAY64 (All About Your 64)
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NMOS 6510 Unintended Opcodes
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