Opcode Tests:
-------------

These testcases are inspired by the ones now removed from test/assembler.
The main purpose is to have each possible opcode generated at least once,
either by an Assembly instruction or a ".byte"-placeholder. Typically
generated by disassembling a binary dump that contains data in the form
of the pattern that each opcode is stated once in order followed by easy
to recognise:

00 00 EA 00
01 00 EA 00
02 00 EA 00
[...]
fe 00 EA 00
ff 00 EA 00

The disassembly is then put in a better readable form by replacing the
leftover dummy opcode parameters with something more recognizable.

The testcases for 6502, 6502x, 65sc02, 65c02, 4510, and huc6280 have been
put together by Sven Oliver ("SvOlli") Moll, as well as a template for the
m740 instructions set. Later 6502dtv support was also added.

Still to do is to find a way to implement an opcode testcase for the 65816
processor, since it's capable of executing instructions with an 8-bit and
a 16-bit operator alike, distinguished by only one processor flag.


