From 5493c9e7c2595b85d4dd7eb50c57b767ef72e06a Mon Sep 17 00:00:00 2001
From: Oliver Schmidt
Date: Thu, 8 Sep 2022 17:11:30 +0200
Subject: [PATCH] Don't empty the Receive Data Register on filling the Transmit
Data Register
The Receive Data Register and the Transmit Data Register share share a single address. Accessing that address with STA abs,X in order to fill the Transmit Data Register causes a 6502 false read which causes the Receive Data Register to be emptied.
The simplest way to work around that issue - which I chose here - is to move the base address for all ACIA accesses from page $C0 to page $BF. However, that adds an additional cycle to all read accesses. An alternative approach would be to only modify the single line `sta ACIA_DATA,x`.
---
libsrc/apple2/ser/a2.ssc.s | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/libsrc/apple2/ser/a2.ssc.s b/libsrc/apple2/ser/a2.ssc.s
index a32110ef2..e0cd94597 100644
--- a/libsrc/apple2/ser/a2.ssc.s
+++ b/libsrc/apple2/ser/a2.ssc.s
@@ -57,7 +57,9 @@
;----------------------------------------------------------------------------
; I/O definitions
-ACIA = $C088
+Offset = $8F ; Move 6502 false read out of I/O to page $BF
+
+ACIA = $C088-Offset
ACIA_DATA = ACIA+0 ; Data register
ACIA_STATUS = ACIA+1 ; Status register
ACIA_CMD = ACIA+2 ; Command register
@@ -197,6 +199,7 @@ SER_OPEN:
asl
asl
asl
+ adc Offset ; Assume carry to be clear
tax
; Check if the handshake setting is valid