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https://github.com/cc65/cc65.git
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some more changes -- atarixl target basically works now
This commit is contained in:
Christian Groessler
parent
9228b002b0
commit
8e632b2847
@ -13,8 +13,12 @@
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.import initlib, donelib
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.import callmain, zerobss
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.import __STARTUP_LOAD__, __ZPSAVE_LOAD__
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.import __STARTUP_LOAD__, __ZPSAVE_LOAD__, __BSS_LOAD__
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.import __RESERVED_MEMORY__
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.import __RAM_START__, __RAM_SIZE__
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.import zpsave
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.import sram_init
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.include "zeropage.inc"
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.include "atari.inc"
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@ -32,7 +36,11 @@
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.endif
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.word __STARTUP_LOAD__
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.if .defined(__ATARIXL__)
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.word __BSS_LOAD__ - 1
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.else
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.word __ZPSAVE_LOAD__ - 1
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.endif
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; ------------------------------------------------------------------------
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; Actual code
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@ -46,6 +54,8 @@
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; Real entry point:
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.if .not .defined(__ATARIXL__) ; already done in previous load chunk
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; Save the zero page locations we need
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ldx #zpspace-1
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@ -54,6 +64,12 @@ L1: lda sp,x
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dex
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bpl L1
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.else
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jsr sram_init
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.endif
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; Clear the BSS data
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jsr zerobss
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@ -84,16 +100,17 @@ L1: lda sp,x
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.else
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; for now... needs to use value from linker script later
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lda MEMTOP
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sta sp
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lda MEMTOP+1
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sta sp+1
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lda #<(__RAM_START__ + __RAM_SIZE__ - 1)
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sta sp
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lda #>(__RAM_START__ + __RAM_SIZE__ - 1)
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sta sp+1
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.endif
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; Call module constructors
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; brk
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jsr initlib
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; Set left margin to 0
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@ -184,12 +201,6 @@ L2: lda zpsave,x
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; ------------------------------------------------------------------------
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.segment "ZPSAVE"
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zpsave: .res zpspace
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; ------------------------------------------------------------------------
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.bss
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spsave: .res 1
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@ -3,6 +3,7 @@
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;
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; Tasks:
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; - move screen memory below load address
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; - copy ROM chargen to its new place
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; - copy shadow RAM contents to their destination
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;
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; Christian Groessler, chris@groessler.org, 2013
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@ -13,8 +14,10 @@
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.export sramprep
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.import __SRPREP_LOAD__, __SRPREP_SIZE__
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.import __SHADOW_RAM_LOAD__, __SHADOW_RAM_SIZE__
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.import __CHARGEN_LOAD__, __CHARGEN_SIZE__
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.import __SHADOW_RAM_RUN__
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.import __CHARGEN_START__, __CHARGEN_SIZE__
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.import __SAVEAREA_LOAD__
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.import zpsave
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.include "zeropage.inc"
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.include "atari.inc"
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@ -35,7 +38,7 @@ cont: ldx #0 ; channel 0
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sta ICBLH,x
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lda #PUTCHR
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sta ICCOM,x
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jsr CIOV
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jsr CIOV_org
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.endmacro
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; ------------------------------------------------------------------------
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@ -55,6 +58,7 @@ sramprep:
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print_string "in sramprep"
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; save values of modified system variables and ports
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lda RAMTOP
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sta RAMTOP_save
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lda MEMTOP
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@ -67,6 +71,31 @@ sramprep:
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sta APPMHI_save+1
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lda PORTB
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sta PORTB_save
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lda CIOV ; zero-page wrapper
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sta ZP_CIOV_save
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lda CIOV+1
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sta ZP_CIOV_save+1
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lda CIOV+2
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sta ZP_CIOV_save+2
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lda SIOV ; zero-page wrapper
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sta ZP_SIOV_save
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lda SIOV+1
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sta ZP_SIOV_save+1
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lda SIOV+2
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sta ZP_SIOV_save+2
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lda $fffe
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sta IRQ_save
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lda $ffff
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sta IRQ_save+1
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lda $fffc
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sta RESET_save
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lda $fffd
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sta RESET_save+1
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lda $fffa
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sta NMI_save
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lda $fffb
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sta NMI_save+1
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; disable BASIC
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@ -75,7 +104,7 @@ sramprep:
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sta PORTB
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; ... change memory bla
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; ... change system memory variables bla
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CMPVAL = 64+255+992 ; you may ask, why these values... @@@ document
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@ -91,10 +120,10 @@ sys_ok: lda #<__SAVEAREA_LOAD__
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lda #>__SAVEAREA_LOAD__ - 1
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sta RAMTOP
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; ... issue ar GRAPHICS 0 call (copied'n'pasted from TGI drivers)
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; ... issue a GRAPHICS 0 call (copied'n'pasted from TGI drivers)
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ldx #$50 ; take any IOCB, hopefully free (@@@ fixme)
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@ -114,7 +143,7 @@ sys_ok: lda #<__SAVEAREA_LOAD__
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sta ICBLL,x
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lda #>screen_device_length
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sta ICBLH,x
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jsr CIOV
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jsr CIOV_org
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bpl okoko
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print_string "GR 0 FAILED"
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@ -122,7 +151,8 @@ sys_ok: lda #<__SAVEAREA_LOAD__
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jsr delay
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jsr delay
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jmp xxx
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jmp (DOSVEC) ; abort loading
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okoko:
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@ -130,24 +160,147 @@ okoko:
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; Now close it again; we don't need it anymore :)
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lda #CLOSE
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sta ICCOM,x
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jsr CIOV
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jsr CIOV_org
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print_string "GR 0 OKOKO"
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jsr delay
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; Save the zero page locations we need
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ldx #zpspace-1
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L1: lda sp,x
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sta zpsave,x
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dex
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bpl L1
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; copy chargen to low memory
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lda #>(__SRPREP_LOAD__ + __SRPREP_SIZE__)
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sta ptr3+1
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lda #<(__SRPREP_LOAD__ + __SRPREP_SIZE__)
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sta ptr3
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beq cg_addr_ok
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xxx:
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; page align the new chargen address
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inc ptr3+1
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lda #0
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sta ptr3
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cg_addr_ok:
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lda #<DCSORG
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sta ptr1
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lda #>DCSORG
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sta ptr1+1
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lda ptr3
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sta ptr2
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lda ptr3+1
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sta ptr2+1
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lda #>__CHARGEN_SIZE__
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sta tmp2
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lda #<__CHARGEN_SIZE__
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sta tmp2+1
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jsr memcopy
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; TODO: switch to this temp. chargen
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; disable ROMs
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sei
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ldx #0
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stx NMIEN ; disable NMI
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lda PORTB
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and #$fe
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sta PORTB ; now ROM is mapped out
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; copy shadow RAM contents to their destination
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lda #<__SHADOW_RAM_SIZE__
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bne do_copy
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lda #>__SHADOW_RAM_SIZE__
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beq no_copy ; we have no shadow RAM contents
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; ptr1 - src; ptr2 - dest; tmp1, tmp2 - len
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do_copy:lda #<__SHADOW_RAM_LOAD__
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sta ptr1
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lda #>__SHADOW_RAM_LOAD__
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sta ptr1+1
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lda #<__SHADOW_RAM_RUN__
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sta ptr2
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lda #>__SHADOW_RAM_RUN__
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sta ptr2+1
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lda #<__SHADOW_RAM_SIZE__
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sta tmp1
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lda #>__SHADOW_RAM_SIZE__
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sta tmp2
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jsr memcopy
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no_copy:
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; copy chargen to its new location
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lda ptr3
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sta ptr1
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lda ptr3+1
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sta ptr1+1
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lda #<__CHARGEN_START__
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sta ptr2
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lda #>__CHARGEN_START__
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sta ptr2+1
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lda #>__CHARGEN_SIZE__
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sta tmp2
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lda #<__CHARGEN_SIZE__
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sta tmp2+1
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jsr memcopy
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; re-enable ROM
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lda PORTB
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ora #1
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sta PORTB
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lda #$40
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sta NMIEN ; enable VB again
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cli ; and enable IRQs
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rts
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; my 6502 fu is rusty, so I took a routine from the internet (http://www.obelisk.demon.co.uk/6502/algorithms.html)
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; copy memory
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; ptr1 - source
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; ptr2 - destination
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; tmp2:tmp1 - len
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.proc memcopy
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ldy #0
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ldx tmp2
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beq last
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pagecp: lda (ptr1),y
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sta (ptr2),y
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iny
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bne pagecp
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inc ptr1+1
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inc ptr2+1
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dex
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bne pagecp
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last: cpy tmp1
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beq done
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lda (ptr1),y
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sta (ptr2),y
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iny
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bne last
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done: rts
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.endproc
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.byte "HERE ****************** HERE ***************>>>>>>"
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sramsize:
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.word __SHADOW_RAM_SIZE__
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; short delay
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.proc delay
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@ -173,6 +326,13 @@ screen_device_length = * - screen_device
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.byte " ** srprep ** end-->"
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; ------------------------------------------------------------------------
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; Provide an empty SHADOW_RAM segment in order that the linker is happy
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; if the user program doesn't have a SHADOW_RAM segment.
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.segment "SHADOW_RAM"
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; ------------------------------------------------------------------------
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; Chunk "trailer" - sets INITAD
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