From 074ec82126c16a14da2579c6994eec9b7417e119 Mon Sep 17 00:00:00 2001 From: Olli Savia Date: Tue, 2 Apr 2024 19:25:15 +0300 Subject: [PATCH] Added missing EXEHDR --- cfg/vic20-asm-32k.cfg | 1 + cfg/vic20-asm-3k.cfg | 1 + cfg/vic20-asm.cfg | 1 + 3 files changed, 3 insertions(+) diff --git a/cfg/vic20-asm-32k.cfg b/cfg/vic20-asm-32k.cfg index 622cfb26f..3d0341e71 100644 --- a/cfg/vic20-asm-32k.cfg +++ b/cfg/vic20-asm-32k.cfg @@ -14,6 +14,7 @@ MEMORY { SEGMENTS { ZEROPAGE: load = ZP, type = zp, optional = yes; LOADADDR: load = LOADADDR, type = ro; + EXEHDR: load = MAIN, type = ro, optional = yes; CODE: load = MAIN, type = ro; RODATA: load = MAIN, type = ro; DATA: load = MAIN, type = rw; diff --git a/cfg/vic20-asm-3k.cfg b/cfg/vic20-asm-3k.cfg index 1afaf0b30..6ef06957e 100644 --- a/cfg/vic20-asm-3k.cfg +++ b/cfg/vic20-asm-3k.cfg @@ -14,6 +14,7 @@ MEMORY { SEGMENTS { ZEROPAGE: load = ZP, type = zp, optional = yes; LOADADDR: load = LOADADDR, type = ro; + EXEHDR: load = MAIN, type = ro, optional = yes; CODE: load = MAIN, type = ro; RODATA: load = MAIN, type = ro; DATA: load = MAIN, type = rw; diff --git a/cfg/vic20-asm.cfg b/cfg/vic20-asm.cfg index 5f6c7cc74..531d3f010 100644 --- a/cfg/vic20-asm.cfg +++ b/cfg/vic20-asm.cfg @@ -14,6 +14,7 @@ MEMORY { SEGMENTS { ZEROPAGE: load = ZP, type = zp, optional = yes; LOADADDR: load = LOADADDR, type = ro; + EXEHDR: load = MAIN, type = ro, optional = yes; CODE: load = MAIN, type = ro; RODATA: load = MAIN, type = ro; DATA: load = MAIN, type = rw;