From e85339dada4cccd18cc64020cb488074bb09b634 Mon Sep 17 00:00:00 2001
From: mrdudz <mrdudz@users.noreply.github.com>
Date: Sun, 29 Jun 2025 19:51:22 +0200
Subject: [PATCH] add sweet16 to the opcodes test as well

---
 test/asm/opcodes/sweet16-opcodes.ref | Bin 0 -> 295 bytes
 test/asm/opcodes/sweet16-opcodes.s   |  34 +++++++++++++++++++++++++++
 test/asm/val/ismnemonic.s            |   1 +
 3 files changed, 35 insertions(+)
 create mode 100644 test/asm/opcodes/sweet16-opcodes.ref
 create mode 100644 test/asm/opcodes/sweet16-opcodes.s

diff --git a/test/asm/opcodes/sweet16-opcodes.ref b/test/asm/opcodes/sweet16-opcodes.ref
new file mode 100644
index 0000000000000000000000000000000000000000..af128b55f2728a79baab393f2bdd4fa3e73e8a38
GIT binary patch
literal 295
zcmV+?0oeWk0Tcof0}uob1q=oX2M7oT2?PoY3;+-`5+E=@P+)L?kf5-@(BSY9G!h{(
zK~Z6GfsvuH!O`LI5;PJbGD1>fa)Oegvcl5h@)I-?BQrx&V{?O(qqD=)<MR|W5+pQ4
zRAh97l%%x8)a3LPG!i8>MO9^Wg_WhX#nt8Y7BmtjHbz!vc7~Rww#L@x_7^k~CpSk|
zXLpB}r?<z~=l2*i5-2!GSZH{Nn5ekO*y#8fG!iK}Nm*%miJ7Un$=T`o8Z;6rI!an<
zdWxE=y2{$>`WrM7D?3YDYkP~EtGmnF>-!uu5-dDSTx@)doUFXe-0b`vG!iX6O<iq$
tjh(H%&E4(&9yAgzK2Bb4evY25zRuq6{vR|FFF#LTZ-0-UufNaV@BbS<gd+d|

literal 0
HcmV?d00001

diff --git a/test/asm/opcodes/sweet16-opcodes.s b/test/asm/opcodes/sweet16-opcodes.s
new file mode 100644
index 000000000..f283c6093
--- /dev/null
+++ b/test/asm/opcodes/sweet16-opcodes.s
@@ -0,0 +1,34 @@
+.setcpu "SWEET16"
+
+    RTN                 ; $00      Return to 6502 code.
+    BR   LABEL          ; $01 ea   Unconditional Branch.
+    BNC  LABEL          ; $02 ea   Branch if Carry=0.
+    BC   LABEL          ; $03 ea   Branch if Carry=1.
+    BP   LABEL          ; $04 ea   Branch if last result positive.
+    BM   LABEL          ; $0S ea   Branch if last result negative.
+    BZ   LABEL          ; $06 ea   Branch if last result zero.
+    BNZ  LABEL          ; $07 ea   Branch if last result non-zero.
+    BM1  LABEL          ; $08 ea   Branch if last result = -1.
+    BNM1 LABEL          ; $09 ea   Branch if last result not -1.
+    BK                  ; $0A      Execute 6502 BRK instruction.
+    RS                  ; $0B      Return from SWEET-16 subroutine.
+    BS   LABEL          ; $0C ea   Call SWEET-16 subroutine.
+LABEL:
+
+.repeat 16, count
+    SET  count,$1234    ; $1n lo hi  Rn <-- value.
+    LD   count          ; $2n        R0 <-- (Rn).
+    ST   count          ; $3n        Rn <-- (R0).
+    LD   @count         ; $4n        MA = (Rn), ROL <-- (MA), Rn <-- MA+1, R0H <-- 0.
+    ST   @count         ; $5n        MA = (Rn), MA <-- (R0L), Rn <-- MA+1.
+    LDD  @count         ; $6n        MA = (Rn), R0 <-- (MA, MA+1), Rn <-- MA+2.
+    STD  @count         ; $7n        MA = (Rn), MA,MA+l <-- (R0), Rn <-- MA+2.
+    POP  @count         ; $8n        MA = (Rn)-1, R0L <-- (MA), R0H <-- 0, Rn <-- MA.
+    STP  @count         ; $9n        MA <-- (Rn)-1, (MA) <-- R0L, Rn <-- MA.
+    ADD  count          ; $An        R0 <-- (R0) + (Rn).
+    SUB  count          ; $Bn        R0 <-- (R0) - (Rn).
+    POPD @count         ; $Cn        MA = (Rn)-2, MA,MA+l <-- R0, Rn <-- MA.
+    CPR  count          ; $Dn        R13 <-- (R0) - (Rn), R14 <-- status flags.
+    INR  count          ; $En        Rn <-- (Rn) + 1.
+    DCR  count          ; $Fn        Rn <-- (Rn) - 1.
+.endrepeat
diff --git a/test/asm/val/ismnemonic.s b/test/asm/val/ismnemonic.s
index 2b679abbe..831a8a3c7 100644
--- a/test/asm/val/ismnemonic.s
+++ b/test/asm/val/ismnemonic.s
@@ -8,6 +8,7 @@
 ;    "6502DTV"
 ;    "65SC02"
 ;    "65C02"
+;    "65CE02"
 ;    "W65C02"
 ;    "4510"
 ;    "45GS02"