From f1b0fbebd53d3a94e80be5702e3855aec004c40f Mon Sep 17 00:00:00 2001
From: Colin Leroy-Mira <colin@colino.net>
Date: Thu, 23 Nov 2023 20:01:47 +0100
Subject: [PATCH] Remove all indexed accesses to SCC registers

Some IIgs models had issues sending bytes out.
Also make channel tests clearer.
---
 libsrc/apple2/ser/a2.gs.s | 39 +++++++++++++++++++++++++++++++--------
 1 file changed, 31 insertions(+), 8 deletions(-)

diff --git a/libsrc/apple2/ser/a2.gs.s b/libsrc/apple2/ser/a2.gs.s
index 20018abe4..3a2db1926 100644
--- a/libsrc/apple2/ser/a2.gs.s
+++ b/libsrc/apple2/ser/a2.gs.s
@@ -154,6 +154,11 @@ SCCBDATA   := $C03A
 
 SER_FLAG   := $E10104
 
+; ------------------------------------------------------------------------
+; Channels
+CHANNEL_B              = 0
+CHANNEL_A              = 1
+
 ; ------------------------------------------------------------------------
 ; Write registers, read registers, and values that interest us
 
@@ -377,7 +382,7 @@ SER_OPEN:
         ldy     #WR_TX_RX_CTRL          ; Setup stop & parity bits
         jsr     writeSCCReg
 
-        cpx     #$00
+        cpx     #CHANNEL_B
         bne     ClockA
 ClockB:
         ldy     #WR_CLOCK_CTRL
@@ -470,7 +475,7 @@ BaudOK:
         lda     SER_FLAG                ; Get SerFlag's current value
         sta     SerFlagOrig             ; and save it
 
-        cpx     #$00
+        cpx     #CHANNEL_B
         bne     IntA
 IntB:
         ora     #SER_FLAG_CH_B          ; Inform firmware we want channel B IRQs
@@ -568,7 +573,8 @@ SER_PUT:
 
 SER_STATUS:
         ldx     Channel
-        lda     SCCBREG,x
+        ldy     #RR_INIT_STATUS
+        jsr     readSSCReg
         ldx     #$00
         sta     (ptr1)
         .assert SER_ERR_OK = 0, error
@@ -617,7 +623,12 @@ SER_IRQ:
         beq     CheckSpecial
 
         ldx     Channel
-        lda     SCCBDATA,x              ; Get byte
+        beq     ReadBdata
+        lda     SCCADATA
+        bra     ReadDone
+ReadBdata:
+        lda     SCCBDATA                ; Get byte
+ReadDone:
         ldx     RecvFreeCnt             ; Check if we have free space left
         beq     Flow                    ; Jump if no space in receive buffer
         ldy     RecvTail                ; Load buffer pointer
@@ -678,7 +689,13 @@ Special:ldx     Channel
         rts
 
 BadChar:
-        lda     SCCBDATA,x              ; Remove char in error
+        cpx     #CHANNEL_B
+        beq     BadCharB
+        lda     SCCADATA
+        bra     BadCharDone
+BadCharB:
+        lda     SCCBDATA                ; Remove char in error
+BadCharDone:
         sec
         rts
 
@@ -695,7 +712,8 @@ Again:  lda     SendFreeCnt             ; Anything to send?
         bne     Quit                    ; Bail out if it is
 
 Wait:
-        lda     SCCBREG,x               ; Check that we're ready to send
+        ldy     #RR_INIT_STATUS
+        jsr     readSSCReg              ; Check that we're ready to send
         tay
         and     #INIT_STATUS_READY
         beq     NotReady
@@ -712,8 +730,13 @@ Quit:   rts
 Send:   ldy     SendHead                ; Send byte
         lda     SendBuf,y
 
-        sta     SCCBDATA,x
-
+        cpx     #CHANNEL_B
+        beq     WriteBdata
+        sta     SCCADATA
+        bra     WriteDone
+WriteBdata:
+        sta     SCCBDATA
+WriteDone:
         inc     SendHead
         inc     SendFreeCnt
         jmp     Again                   ; Continue flushing TX buffer