195 lines
7.3 KiB
Rust
195 lines
7.3 KiB
Rust
use super::cpu::{Cpu, Flags};
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use super::error;
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use super::opcodes;
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use super::OpcodeType;
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use super::{addressing_modes::get_size, AddressingMode};
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fn invalid_mode<T>(mode_used: AddressingMode) -> T {
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panic!("The addressign mode used ({:?}) is either not valid for this opcode, or expects an argument which was not provided",mode_used)
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}
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static RESET_VEC_ADDR: usize = 0xFFFC;
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macro_rules! fetch {
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($self:ident PC+$off:expr) => {
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$self.ram[$self.cpu.PC as usize + $off]
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};
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($self:ident $addr:expr) => {
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$self.ram[$addr as usize]
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};
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($self:ident D $addr:expr) => {
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($self.ram[$addr as usize + 1] as u16) << 8 | $self.ram[$addr as usize] as u16
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};
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}
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macro_rules! operation {
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($self:ident A+$b:expr) => {
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$self.cpu.A.wrapping_add($b as u8)
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};
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($self:ident X+$b:expr) => {
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$self.cpu.X.wrapping_add($b as u8)
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};
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(unwrap $arg:ident $addr:ident) => {
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$arg.unwrap_or_else(|| invalid_mode($addr.addr_mode))
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};
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}
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pub struct Emulator {
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pub cycles: usize,
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pub ram: [u8; 0x10000],
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pub cpu: Cpu,
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}
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impl Emulator {
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pub fn new() -> Self {
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Self {
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cycles: 0,
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ram: [0x00; 0x10000],
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cpu: Cpu::default(),
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}
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}
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pub fn init(&mut self) -> Result<(), error::EmulatorError> {
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let lo: u16 = self.ram[RESET_VEC_ADDR] as u16;
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let hi: u16 = self.ram[RESET_VEC_ADDR + 1] as u16;
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let addr = hi << 8 | lo;
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self.cpu.PC = addr;
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Ok(())
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}
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pub fn step(&mut self) -> Result<(), error::EmulatorError> {
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if self.cycles == 0 {
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println!("Initializing");
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self.init()?;
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}
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if self.cpu.test(Flags::Break) {
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return Err(error::EmulatorError::Break);
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}
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println!("Step on {:04X}", self.cpu.PC);
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let code = self.ram[self.cpu.PC as usize];
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let code = match opcodes::from_code(code) {
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None => return Err(error::EmulatorError::UnknownOp(code)),
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Some(v) => v,
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};
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println!(" Opcode {:?}", code.name);
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let arg: Option<u16> = match code.addr_mode {
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AddressingMode::IMPL => None, // No argument
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AddressingMode::A => None, // No argument
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AddressingMode::IMM => {
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// Next byte is the argument
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let addr = fetch!(self PC+1);
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Some(addr as u16)
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}
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AddressingMode::ABS => {
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// Next 2 bytes are an address from where to fetch the real argument
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let addr = self.cpu.PC as usize + 1;
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Some(fetch!(self D addr) as u16)
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}
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AddressingMode::ZPG => {
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// Next byte is an address from the range 0x0000-0x00FF
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let addr = self.cpu.PC as usize + 1;
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Some(fetch!(self addr) as u16)
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}
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AddressingMode::INDX => {
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// Take the next byte and add it to X,
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// then use the result as an address and fetch 2 bytes
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let arg = fetch!(self PC+1); // Opcode arg
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let addr: u8 = operation!(self X+arg); // Zero-page addr
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let addr_lo = self.ram[addr as usize] as usize;
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let addr_hi = self.ram[addr.wrapping_add(1) as usize] as usize;
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let res_addr = addr_hi << 8 | addr_lo;
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Some(res_addr as u16)
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}
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AddressingMode::REL => {
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// Add PC with the next byte
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let arg = fetch!(self PC+1) as u8 as i8 as isize;
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let pc = self.cpu.PC as usize as isize;
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let new_pc = (arg + pc) & 0xFFFF;
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Some(new_pc as u16)
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}
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_ => {
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unimplemented!("Unimplemented addressing mode {:?}", code.addr_mode);
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}
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};
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let mut branch_taken = false; // Don't update PC if we take a branch
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println!(" Argument: {:#04X?}", arg);
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match code.name {
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OpcodeType::BRK => {
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println!("Stepped on break. Ending");
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println!("{:#?}", self.cpu);
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return Err(error::EmulatorError::Break);
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}
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OpcodeType::NOP => {}
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OpcodeType::LDA => match code.addr_mode {
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AddressingMode::IMM => self.cpu.set_a(operation!(unwrap arg code) as u8),
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AddressingMode::ABS => self.cpu.set_a(fetch!(self operation!(unwrap arg code))),
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AddressingMode::ZPG => self.cpu.set_a(fetch!(self operation!(unwrap arg code))),
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_ => panic!("Invalid addressing mode for {:?}", code.name),
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},
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OpcodeType::STA => match code.addr_mode {
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AddressingMode::ABS => self.ram[operation!(unwrap arg code) as usize] = self.cpu.A,
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AddressingMode::ZPG => self.ram[operation!(unwrap arg code) as usize] = self.cpu.A,
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AddressingMode::INDX => self.ram[operation!(unwrap arg code) as usize] = self.cpu.A,
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_ => panic!("Invalid addressing mode for {:?}", code.name),
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},
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OpcodeType::ADC => match code.addr_mode {
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AddressingMode::IMM => self.cpu.add_a(operation!(unwrap arg code) as u8),
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_ => panic!("Invalid addressing mode for {:?}", code.name),
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},
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OpcodeType::JMP => match code.addr_mode {
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AddressingMode::ABS => self.cpu.PC = operation!(unwrap arg code) as u16,
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_ => panic!("Invalid addressing mode for {:?}", code.name),
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},
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OpcodeType::BEQ if code.addr_mode == AddressingMode::REL => {
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if self.cpu.test(Flags::Zero) {
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self.cpu.PC = operation!(unwrap arg code);
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branch_taken = true;
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}
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}
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OpcodeType::BNE if code.addr_mode == AddressingMode::REL => {
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if !self.cpu.test(Flags::Zero) {
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self.cpu.PC = operation!(unwrap arg code);
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branch_taken = true;
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}
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}
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_ => {
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unimplemented!(
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"Unimplemented opcode {:?} with {:?}",
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code.name,
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code.addr_mode
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);
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}
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}
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if branch_taken || code.name == OpcodeType::JMP {
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println!("Don't increment PC");
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} else {
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self.cpu.PC += get_size(code.addr_mode) as u16;
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}
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self.cycles += 1;
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Ok(())
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}
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pub fn restart(&mut self) {
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self.cycles = 0;
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self.ram = [0x00; 0x10000];
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self.cpu = Cpu::default();
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}
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}
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mod test {
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#[test]
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fn test_flags() {
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use super::{Cpu, Flags};
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let mut cpu: Cpu = Cpu::default();
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cpu.set_flag(Flags::Zero, true);
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assert_eq!(cpu.test(Flags::Zero), true);
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cpu.set_flag(Flags::Zero, false);
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assert_eq!(cpu.test(Flags::Zero), false);
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cpu.set_flag(Flags::Zero, true);
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cpu.set_flag(Flags::Negative, true);
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cpu.set_flag(Flags::Int, true);
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assert_eq!(cpu.test(Flags::Zero), true);
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assert_eq!(cpu.test(Flags::Negative), true);
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assert_eq!(cpu.test(Flags::Int), true);
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cpu.set_flag(Flags::Negative, false);
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assert_eq!(cpu.test(Flags::Zero), true);
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assert_eq!(cpu.test(Flags::Negative), false);
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assert_eq!(cpu.test(Flags::Int), true);
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}
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}
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