From 0d63342137a69629c72cf8effdea5fab9519ea16 Mon Sep 17 00:00:00 2001 From: jborza Date: Sun, 14 Apr 2019 15:07:28 +0200 Subject: [PATCH] opcode and disassembler generatory (python) --- data/6502_ops.csv | 176 ++++++++++++++++++++++++++++++++++ data/generate_disassembler.py | 61 ++++++++++++ data/generate_opcodes.py | 13 +++ 3 files changed, 250 insertions(+) create mode 100644 data/6502_ops.csv create mode 100644 data/generate_disassembler.py create mode 100644 data/generate_opcodes.py diff --git a/data/6502_ops.csv b/data/6502_ops.csv new file mode 100644 index 0000000..b363ad6 --- /dev/null +++ b/data/6502_ops.csv @@ -0,0 +1,176 @@ +opcode,mnemonic,addressing mode,bytes,cycles,flags +0x69,ADC,IMM,2,2,CZidbVN +0x65,ADC,ZP,2,3,CZidbVN +0x75,ADC,ZPX,2,4,CZidbVN +0x6d,ADC,ABS,3,4,CZidbVN +0x7d,ADC,ABSX,3,4,CZidbVN +0x79,ADC,ABSY,3,4,CZidbVN +0x61,ADC,INDX,2,6,CZidbVN +0x71,ADC,INDY,2,5,CZidbVN + +0x29,AND,IMM,2,2,cZidbvN +0x25,AND,ZP,2,3,cZidbvN +0x35,AND,ZPX,2,4,cZidbvN +0x2d,AND,ABS,3,4,cZidbvN +0x3d,AND,ABSX,3,4,cZidbvN +0x39,AND,ABSY,3,4,cZidbvN +0x21,AND,INDX,2,6,cZidbvN +0x31,AND,INDY,2,5,cZidbvN + +0x0a,ASL,ACC,1,2,CZidbvN +0x06,ASL,ZP,2,5,CZidbvN +0x16,ASL,ZPX,2,6,CZidbvN +0x0e,ASL,ABS,3,6,CZidbvN +0x1e,ASL,ABSX,3,7,CZidbvN + +0x90,BCC,REL,2,2/3,czidbvn +0xB0,BCS,REL,2,2/3,czidbvn +0xF0,BEQ,REL,2,2/3,czidbvn +0x30,BMI,REL,2,2/3,czidbvn +0xD0,BNE,REL,2,2/3,czidbvn +0x10,BPL,REL,2,2/3,czidbvn +0x50,BVC,REL,2,2/3,czidbvn +0x70,BVS,REL,2,2/3,czidbvn + +0x24,BIT,ZP,2,3,cZidbVN +0x2c,BIT,ABS,3,4,cZidbVN + +0x00,BRK,IMP,1,7,czidbvn +0x18,CLC,IMP,1,2,Czidbvn +0xd8,CLD,IMP,1,2,cziDbvn +0x58,CLI,IMP,1,2,czIdbvn +0xb8,CLV,IMP,1,2,czidbVn +0xea,NOP,IMP,1,2,czidbvn +0x48,PHA,IMP,1,3,czidbvn +0x68,PLA,IMP,1,4,cZidbvN +0x08,PHP,IMP,1,3,czidbvn +0x28,PLP,IMP,1,4,CZIDBVN +0x40,RTI,IMP,1,6,czidbvn +0x60,RTS,IMP,1,6,czidbvn +0x38,SEC,IMP,1,2,Czidbvn +0xf8,SED,IMP,1,2,cziDbvn +0x78,SEI,IMP,1,2,czIdbvn +0xaa,TAX,IMP,1,2,cZidbvN +0x8a,TXA,IMP,1,2,cZidbvN +0xa8,TAY,IMP,1,2,cZidbvN +0x98,TYA,IMP,1,2,cZidbvN +0xba,TSX,IMP,1,2,cZidbvN +0x9a,TXS,IMP,1,2,czidbvn + +0xc9,CMP,IMM,2,2,CZidbvN +0xc5,CMP,ZP,2,3,CZidbvN +0xd5,CMP,ZPX,2,4,CZidbvN +0xcd,CMP,ABS,3,4,CZidbvN +0xdd,CMP,ABSX,3,4,CZidbvN +0xd9,CMP,ABSY,3,4,CZidbvN +0xc1,CMP,INDX,2,6,CZidbvN +0xd1,CMP,INDY,2,5,CZidbvN + +0xe0,CPX,IMM,2,2,CZidbvN +0xe4,CPX,ZP,2,3,CZidbvN +0xec,CPX,ABS,3,4,CZidbvN + +0xc0,CPY,IMM,2,2,CZidbvN +0xc4,CPY,ZP,2,3,CZidbvN +0xcc,CPY,ABS,3,4,CZidbvN + +0xc6,DEC,ZP,2,5,cZidbvN +0xd6,DEC,ZPX,2,6,cZidbvN +0xce,DEC,ABS,3,6,cZidbvN +0xde,DEC,ABSX,3,7,cZidbvN + +0xca,DEX,IMP,1,2,cZidbvN +0x88,DEY,IMP,1,2,cZidbvN +0xe8,INX,IMP,1,2,cZidbvN +0xc8,INY,IMP,1,2,cZidbvN + +0x49,EOR,IMM,2,2,cZidbvN +0x45,EOR,ZP,2,3,cZidbvN +0x55,EOR,ZPX,2,4,cZidbvN +0x4d,EOR,ABS,3,4,cZidbvN +0x5d,EOR,ABSX,3,4,cZidbvN +0x59,EOR,ABSY,3,4,cZidbvN +0x41,EOR,INDX,2,6,cZidbvN +0x51,EOR,INDY,2,5,cZidbvN + +0xe6,INC,ZP,2,5,cZidbvN +0xf6,INC,ZPX,2,6,cZidbvN +0xee,INC,ABS,3,6,cZidbvN +0xfe,INC,ABSX,3,7,cZidbvN + +0x4c,JMP,ABS,3,3,czidbvn +0x6c,JMP,IND,3,5,czidbvn +0x20,JSR,ABS,3,6,czidbvn + +0xa9,LDA,IMM,2,2,cZidbvN +0xa5,LDA,ZP,2,3,cZidbvN +0xb5,LDA,ZPX,2,4,cZidbvN +0xad,LDA,ABS,3,4,cZidbvN +0xbd,LDA,ABSX,3,4,cZidbvN +0xb9,LDA,ABSY,3,4,cZidbvN +0xa1,LDA,INDX,2,6,cZidbvN +0xb1,LDA,INDY,2,5,cZidbvN + +0xa2,LDX,IMM,2,2,cZidbvN +0xa6,LDX,ZP,2,3,cZidbvN +0xb6,LDX,ZPY,2,4,cZidbvN +0xae,LDX,ABS,3,4,cZidbvN +0xbe,LDX,ABSY,3,4,cZidbvN + +0xa0,LDY,IMM,2,2,cZidbvN +0xa4,LDY,ZP,2,3,cZidbvN +0xb4,LDY,ZPX,2,4,cZidbvN +0xac,LDY,ABS,3,4,cZidbvN +0xbc,LDY,ABSX,3,4,cZidbvN + +0x4a,LSR,ACC,1,2,CZidbvN +0x46,LSR,ZP,2,5,CZidbvN +0x56,LSR,ZPX,2,6,CZidbvN +0x4e,LSR,ABS,3,6,CZidbvN +0x5e,LSR,ABSX,3,7,CZidbvN + +0x09,ORA,IMM,2,2,cZidbvN +0x05,ORA,ZP,2,3,cZidbvN +0x15,ORA,ZPX,2,4,cZidbvN +0x0d,ORA,ABS,3,4,cZidbvN +0x1d,ORA,ABSX,3,4,cZidbvN +0x19,ORA,ABSY,3,4,cZidbvN +0x01,ORA,INDX,2,6,cZidbvN +0x11,ORA,INDY,2,5,cZidbvN + +0x2a,ROL,ACC,1,2,CZidbvN +0x26,ROL,ZP,2,5,CZidbvN +0x36,ROL,ZPX,2,6,CZidbvN +0x2e,ROL,ABS,3,6,CZidbvN +0x3e,ROL,ABSX,3,7,CZidbvN + +0x6a,ROR,ACC,1,2,CZidbvN +0x66,ROR,ZP,2,5,CZidbvN +0x76,ROR,ZPX,2,6,CZidbvN +0x7e,ROR,ABS,3,6,CZidbvN +0x6e,ROR,ABSX,3,7,CZidbvN + +0xe9,SBC,IMM,2,2,CZidbVN +0xe5,SBC,ZP,2,3,CZidbVN +0xf5,SBC,ZPX,2,4,CZidbVN +0xed,SBC,ABS,3,4,CZidbVN +0xfd,SBC,ABSX,3,4,CZidbVN +0xf9,SBC,ABSY,3,4,CZidbVN +0xe1,SBC,INDX,2,6,CZidbVN +0xf1,SBC,INDY,2,5,CZidbVN + +0x85,STA,ZP,2,3,czidbvn +0x95,STA,ZPX,2,4,czidbvn +0x8d,STA,ABS,3,4,czidbvn +0x9d,STA,ABSX,3,5,czidbvn +0x99,STA,ABSY,3,5,czidbvn +0x81,STA,INDX,2,6,czidbvn +0x91,STA,INDY,2,6,czidbvn + +0x86,STX,ZP,2,3,czidbvn +0x96,STX,ZPY,2,4,czidbvn +0x8e,STX,ABS,3,4,czidbvn +0x84,STY,ZP,2,3,czidbvn +0x94,STY,ZPX,2,4,czidbvn +0x8c,STY,ABS,3,4,czidbvn + diff --git a/data/generate_disassembler.py b/data/generate_disassembler.py new file mode 100644 index 0000000..fafe7b8 --- /dev/null +++ b/data/generate_disassembler.py @@ -0,0 +1,61 @@ +import csv + +with open('disassembler.c','w') as outfile: + + with open('6502_ops.csv','r') as file: + reader = csv.DictReader(file) + for op in reader: + print(op) + args = int(op['bytes']) + + addr_mode = op['addressing mode'] + suffix = '_'+ addr_mode if addr_mode != 'IMP' else '' + mnemonic = op['mnemonic'] + name = mnemonic + suffix + + outfile.write('case %s: ' % name) + outfile.write('sprintf(op, ') + if(addr_mode == 'IMP'): + outfile.write('"%s"' % mnemonic) + else: #all other addressing modes use name + suffix + outfile.write('"%s ' % mnemonic) + if(addr_mode == 'IMM'): + outfile.write('#$%02X') + elif(addr_mode == 'ACC'): + outfile.write("A") + elif(addr_mode.startswith('ZP')): + outfile.write("$%02X") + if(addr_mode == 'ZPX'): + outfile.write(",X") + if(addr_mode == 'ZPY'): + outfile.write(",Y") + elif(addr_mode.startswith('ABS')): + outfile.write("$%02X%02X") + if(addr_mode == 'ABSX'): + outfile.write(",X") + if(addr_mode == 'ABSY'): + outfile.write(",Y") + elif(addr_mode == 'IND'): + outfile.write("($%02X%02X)") + elif(addr_mode == 'INDX'): + outfile.write("($%02X,X)") + elif(addr_mode == 'INDY'): + outfile.write("($%02X),Y") + elif(addr_mode == 'REL'): + outfile.write("$%02X") + #end format string + outfile.write("\"") + + #append bytes, reversed as of little endian + if(args > 2): + outfile.write(", code[2]") + if(args > 1): + outfile.write(", code[1]") + + outfile.write(');') + if(args > 1): + outfile.write("bytes = %s;" % args) + #sprintf(op, "%s"' % ()) + #outfile.write('#define %s %s' % (name, op['opcode'])) + outfile.write('break;') + outfile.write('\n') diff --git a/data/generate_opcodes.py b/data/generate_opcodes.py new file mode 100644 index 0000000..2c732c0 --- /dev/null +++ b/data/generate_opcodes.py @@ -0,0 +1,13 @@ +import csv + +with open('opcodes.h','w') as outfile: + with open('6502_ops.csv','r') as file: + reader = csv.DictReader(file) + for op in reader: + print(op) + addr_mode = op['addressing mode'] + suffix = '_'+ addr_mode if addr_mode != 'IMP' else '' + name = op['mnemonic'] + suffix + + outfile.write('#define %s %s' % (name, op['opcode'])) + outfile.write('\n')