diff --git a/data/6502_ops.csv b/data/6502_ops.csv index b363ad6..0356608 100644 --- a/data/6502_ops.csv +++ b/data/6502_ops.csv @@ -147,8 +147,8 @@ opcode,mnemonic,addressing mode,bytes,cycles,flags 0x6a,ROR,ACC,1,2,CZidbvN 0x66,ROR,ZP,2,5,CZidbvN 0x76,ROR,ZPX,2,6,CZidbvN -0x7e,ROR,ABS,3,6,CZidbvN -0x6e,ROR,ABSX,3,7,CZidbvN +0x6e,ROR,ABS,3,6,CZidbvN +0x7e,ROR,ABSX,3,7,CZidbvN 0xe9,SBC,IMM,2,2,CZidbVN 0xe5,SBC,ZP,2,3,CZidbVN diff --git a/data/opcodes.h b/data/opcodes.h new file mode 100644 index 0000000..becf98a --- /dev/null +++ b/data/opcodes.h @@ -0,0 +1,151 @@ +#define ADC_IMM 0x69 +#define ADC_ZP 0x65 +#define ADC_ZPX 0x75 +#define ADC_ABS 0x6d +#define ADC_ABSX 0x7d +#define ADC_ABSY 0x79 +#define ADC_INDX 0x61 +#define ADC_INDY 0x71 +#define AND_IMM 0x29 +#define AND_ZP 0x25 +#define AND_ZPX 0x35 +#define AND_ABS 0x2d +#define AND_ABSX 0x3d +#define AND_ABSY 0x39 +#define AND_INDX 0x21 +#define AND_INDY 0x31 +#define ASL_ACC 0x0a +#define ASL_ZP 0x06 +#define ASL_ZPX 0x16 +#define ASL_ABS 0x0e +#define ASL_ABSX 0x1e +#define BCC_REL 0x90 +#define BCS_REL 0xB0 +#define BEQ_REL 0xF0 +#define BMI_REL 0x30 +#define BNE_REL 0xD0 +#define BPL_REL 0x10 +#define BVC_REL 0x50 +#define BVS_REL 0x70 +#define BIT_ZP 0x24 +#define BIT_ABS 0x2c +#define BRK 0x00 +#define CLC 0x18 +#define CLD 0xd8 +#define CLI 0x58 +#define CLV 0xb8 +#define NOP 0xea +#define PHA 0x48 +#define PLA 0x68 +#define PHP 0x08 +#define PLP 0x28 +#define RTI 0x40 +#define RTS 0x60 +#define SEC 0x38 +#define SED 0xf8 +#define SEI 0x78 +#define TAX 0xaa +#define TXA 0x8a +#define TAY 0xa8 +#define TYA 0x98 +#define TSX 0xba +#define TXS 0x9a +#define CMP_IMM 0xc9 +#define CMP_ZP 0xc5 +#define CMP_ZPX 0xd5 +#define CMP_ABS 0xcd +#define CMP_ABSX 0xdd +#define CMP_ABSY 0xd9 +#define CMP_INDX 0xc1 +#define CMP_INDY 0xd1 +#define CPX_IMM 0xe0 +#define CPX_ZP 0xe4 +#define CPX_ABS 0xec +#define CPY_IMM 0xc0 +#define CPY_ZP 0xc4 +#define CPY_ABS 0xcc +#define DEC_ZP 0xc6 +#define DEC_ZPX 0xd6 +#define DEC_ABS 0xce +#define DEC_ABSX 0xde +#define DEX 0xca +#define DEY 0x88 +#define INX 0xe8 +#define INY 0xc8 +#define EOR_IMM 0x49 +#define EOR_ZP 0x45 +#define EOR_ZPX 0x55 +#define EOR_ABS 0x4d +#define EOR_ABSX 0x5d +#define EOR_ABSY 0x59 +#define EOR_INDX 0x41 +#define EOR_INDY 0x51 +#define INC_ZP 0xe6 +#define INC_ZPX 0xf6 +#define INC_ABS 0xee +#define INC_ABSX 0xfe +#define JMP_ABS 0x4c +#define JMP_IND 0x6c +#define JSR_ABS 0x20 +#define LDA_IMM 0xa9 +#define LDA_ZP 0xa5 +#define LDA_ZPX 0xb5 +#define LDA_ABS 0xad +#define LDA_ABSX 0xbd +#define LDA_ABSY 0xb9 +#define LDA_INDX 0xa1 +#define LDA_INDY 0xb1 +#define LDX_IMM 0xa2 +#define LDX_ZP 0xa6 +#define LDX_ZPY 0xb6 +#define LDX_ABS 0xae +#define LDX_ABSY 0xbe +#define LDY_IMM 0xa0 +#define LDY_ZP 0xa4 +#define LDY_ZPX 0xb4 +#define LDY_ABS 0xac +#define LDY_ABSX 0xbc +#define LSR_ACC 0x4a +#define LSR_ZP 0x46 +#define LSR_ZPX 0x56 +#define LSR_ABS 0x4e +#define LSR_ABSX 0x5e +#define ORA_IMM 0x09 +#define ORA_ZP 0x05 +#define ORA_ZPX 0x15 +#define ORA_ABS 0x0d +#define ORA_ABSX 0x1d +#define ORA_ABSY 0x19 +#define ORA_INDX 0x01 +#define ORA_INDY 0x11 +#define ROL_ACC 0x2a +#define ROL_ZP 0x26 +#define ROL_ZPX 0x36 +#define ROL_ABS 0x2e +#define ROL_ABSX 0x3e +#define ROR_ACC 0x6a +#define ROR_ZP 0x66 +#define ROR_ZPX 0x76 +#define ROR_ABS 0x6e +#define ROR_ABSX 0x7e +#define SBC_IMM 0xe9 +#define SBC_ZP 0xe5 +#define SBC_ZPX 0xf5 +#define SBC_ABS 0xed +#define SBC_ABSX 0xfd +#define SBC_ABSY 0xf9 +#define SBC_INDX 0xe1 +#define SBC_INDY 0xf1 +#define STA_ZP 0x85 +#define STA_ZPX 0x95 +#define STA_ABS 0x8d +#define STA_ABSX 0x9d +#define STA_ABSY 0x99 +#define STA_INDX 0x81 +#define STA_INDY 0x91 +#define STX_ZP 0x86 +#define STX_ZPY 0x96 +#define STX_ABS 0x8e +#define STY_ZP 0x84 +#define STY_ZPX 0x94 +#define STY_ABS 0x8c