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AND instructions and tests
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jborza
parent
555568c10b
commit
8dcea919ed
140
cpu.c
140
cpu.c
@ -39,19 +39,26 @@ byte pop_byte(State6502* state) {
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}
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//bitwise or with accumulator
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void ORA(State6502 * state, byte operand) {
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void ORA(State6502* state, byte operand) {
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byte result = state->a | operand;
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set_NV_flags(state, result);
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state->a = result;
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}
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//bitwise and with accumulator
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void AND(State6502* state, byte operand) {
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byte result = state->a & operand;
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set_NV_flags(state, result);
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state->a = result;
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}
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//load accumulator
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void LDA(State6502 * state, byte operand) {
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void LDA(State6502* state, byte operand) {
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state->a = operand;
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set_NV_flags(state, state->a);
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}
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word pop_word(State6502 * state) {
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word pop_word(State6502* state) {
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byte low = pop_byte(state);
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byte high = pop_byte(state);
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word result = (high << 8) | low;
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@ -62,12 +69,40 @@ word read_word(State6502 * state, word address) {
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return state->memory[address] | state->memory[address + 1] << 8;
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}
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byte get_byte_zero_page(State6502 * state) {
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byte address = pop_byte(state);
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return state->memory[address];
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}
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byte get_byte_zero_page_x(State6502 * state) {
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byte address = pop_byte(state) + state->x;
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return state->memory[address];
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}
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byte get_byte_zero_page_y(State6502 * state) {
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byte address = pop_byte(state) + state->y;
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return state->memory[address];
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}
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byte get_byte_absolute(State6502 * state)
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{
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word address = pop_word(state);
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return state->memory[address];
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}
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byte get_byte_absolute_x(State6502 * state) {
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word address = pop_word(state) + state->x;
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return state->memory[address];
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}
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byte get_byte_absolute_y(State6502 * state) {
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word address = pop_word(state) + state->y;
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return state->memory[address];
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}
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int emulate_6502_op(State6502 * state) {
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byte* opcode = &state->memory[state->pc++];
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switch (*opcode) {
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case ADC_IMM: unimplemented_instruction(state); break;
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case ADC_ZP: unimplemented_instruction(state); break;
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case ADC_ZPX: unimplemented_instruction(state); break;
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@ -76,12 +111,12 @@ int emulate_6502_op(State6502 * state) {
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case ADC_ABSY: unimplemented_instruction(state); break;
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case ADC_INDX: unimplemented_instruction(state); break;
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case ADC_INDY: unimplemented_instruction(state); break;
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case AND_IMM: unimplemented_instruction(state); break;
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case AND_ZP: unimplemented_instruction(state); break;
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case AND_ZPX: unimplemented_instruction(state); break;
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case AND_ABS: unimplemented_instruction(state); break;
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case AND_ABSX: unimplemented_instruction(state); break;
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case AND_ABSY: unimplemented_instruction(state); break;
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case AND_IMM: AND(state, pop_byte(state)); break;
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case AND_ZP: AND(state, get_byte_zero_page(state)); break;
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case AND_ZPX: AND(state, get_byte_zero_page_x(state)); break;
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case AND_ABS: AND(state, get_byte_absolute(state)); break;
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case AND_ABSX: AND(state, get_byte_absolute_x(state)); break;
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case AND_ABSY: AND(state, get_byte_absolute_y(state)); break;
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case AND_INDX: unimplemented_instruction(state); break;
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case AND_INDY: unimplemented_instruction(state); break;
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case ASL_ACC: unimplemented_instruction(state); break;
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@ -159,41 +194,12 @@ int emulate_6502_op(State6502 * state) {
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case JMP_ABS: unimplemented_instruction(state); break;
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case JMP_IND: unimplemented_instruction(state); break;
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case JSR_ABS: unimplemented_instruction(state); break;
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case LDA_IMM:
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{
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LDA(state, pop_byte(state));
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break;
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}
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case LDA_ZP:
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{
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byte address = pop_byte(state);
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LDA(state, state->memory[address]);
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break;
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}
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case LDA_ZPX:
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{
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byte address = pop_byte(state) + state->x;
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LDA(state, state->memory[address]);
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break;
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}
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case LDA_ABS:
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{
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word address = pop_word(state);
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LDA(state, state->memory[address]);
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break;
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}
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case LDA_ABSX:
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{
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word address = pop_word(state) + state->x;
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LDA(state, state->memory[address]);
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break;
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}
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case LDA_ABSY:
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{
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word address = pop_word(state) + state->y;
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LDA(state, state->memory[address]);
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break;
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}
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case LDA_IMM: LDA(state, pop_byte(state)); break;
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case LDA_ZP: LDA(state, get_byte_zero_page(state)); break;
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case LDA_ZPX: LDA(state, get_byte_zero_page_x(state)); break;
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case LDA_ABS: LDA(state, get_byte_absolute(state)); break;
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case LDA_ABSX: LDA(state, get_byte_absolute_x(state)); break;
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case LDA_ABSY: LDA(state, get_byte_absolute_y(state)); break;
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case LDA_INDX:
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{
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//pre-indexed indirect
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@ -229,39 +235,12 @@ int emulate_6502_op(State6502 * state) {
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case LSR_ZPX: unimplemented_instruction(state); break;
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case LSR_ABS: unimplemented_instruction(state); break;
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case LSR_ABSX: unimplemented_instruction(state); break;
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case ORA_IMM:
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ORA(state, pop_byte(state));
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break;
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case ORA_ZP: //ORA, zero page
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{
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byte address = pop_byte(state);
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ORA(state, state->memory[address]);
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break;
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}
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case ORA_ZPX:
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{
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byte address = pop_byte(state) + state->x;
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ORA(state, state->memory[address]);
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break;
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}
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case ORA_ABS:
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{
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word address = pop_word(state);
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ORA(state, state->memory[address]);
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break;
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}
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case ORA_ABSX:
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{
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word address = pop_word(state) + state->x;
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ORA(state, state->memory[address]);
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break;
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}
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case ORA_ABSY:
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{
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word address = pop_word(state) + state->y;
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ORA(state, state->memory[address]);
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break;
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}
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case ORA_IMM: ORA(state, pop_byte(state)); break;
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case ORA_ZP: ORA(state, get_byte_zero_page(state)); break;
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case ORA_ZPX: ORA(state, get_byte_zero_page_x(state)); break;
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case ORA_ABS: ORA(state, get_byte_absolute(state)); break;
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case ORA_ABSX: ORA(state, get_byte_absolute_x(state)); break;
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case ORA_ABSY: ORA(state, get_byte_absolute_y(state)); break;
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case ORA_INDX: //ORA, indirect, x
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{
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//pre-indexed indirect
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@ -319,3 +298,4 @@ int emulate_6502_op(State6502 * state) {
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}
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return 0;
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}
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170
test6502.c
170
test6502.c
@ -390,14 +390,184 @@ void test_ORA_INDY() {
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test_cleanup(&state);
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}
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//// AND
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void test_AND_IMM() {
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//initialize
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State6502 state = create_blank_state();
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state.a = 0xAA;
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//arrange
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char program[] = { AND_IMM, 0xA0 }; //AND #$AA
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memcpy(state.memory, program, sizeof(program));
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//act
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test_step(&state);
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//assert
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assertA(&state, 0xA0);
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test_cleanup(&state);
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}
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void test_AND_ZP() {
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//initialize
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State6502 state = create_blank_state();
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state.a = 0xAA;
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//arrange
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char program[] = { AND_ZP, 0x03, 0x00, 0xA0 }; //AND $3
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memcpy(state.memory, program, sizeof(program));
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//act
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test_step(&state);
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//assert
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assertA(&state, 0xA0);
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//cleanup
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test_cleanup(&state);
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}
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void test_AND_ZPX() {
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//initialize
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State6502 state = create_blank_state();
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state.x = 0x01;
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state.a = 0xAA;
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//arrange
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char program[] = { AND_ZPX, 0x02, 0x00, 0xA0 }; //AND $2,x
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memcpy(state.memory, program, sizeof(program));
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//act
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test_step(&state);
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//assert
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assertA(&state, 0xA0);
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//cleanup
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test_cleanup(&state);
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}
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void test_AND_ABS() {
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//initialize
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State6502 state = create_blank_state();
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state.a = 0xAA;
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//arrange
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char program[] = { AND_ABS, 0x01, 0x04 }; //AND $0401
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memcpy(state.memory, program, sizeof(program));
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state.memory[0x401] = 0xA0;
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//act
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test_step(&state);
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//assert
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assertA(&state, 0xA0);
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//cleanup
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test_cleanup(&state);
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}
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void test_AND_ABSX() {
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//initialize
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State6502 state = create_blank_state();
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state.x = 0x02;
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state.a = 0xAA;
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//arrange
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char program[] = { AND_ABSX, 0x01, 0x04 }; //AND $0401,x
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memcpy(state.memory, program, sizeof(program));
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state.memory[0x403] = 0xA0;
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//act
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test_step(&state);
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//assert
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assertA(&state, 0xA0);
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//cleanup
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test_cleanup(&state);
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}
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void test_AND_ABSY() {
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//initialize
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State6502 state = create_blank_state();
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state.y = 0x02;
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state.a = 0xAA;
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//arrange
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char program[] = { AND_ABSY, 0x01, 0x04 }; //AND $0401,y
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memcpy(state.memory, program, sizeof(program));
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state.memory[0x403] = 0xA0;
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//act
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test_step(&state);
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//assert
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assertA(&state, 0xA0);
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//cleanup
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test_cleanup(&state);
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}
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void test_AND_INDX() {
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//initialize
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State6502 state = create_blank_state();
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state.x = 0x05;
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state.a = 0xAA;
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//arrange
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char program[] = { AND_INDX, 0x3E }; //AND ($3E, x)
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memcpy(state.memory, program, sizeof(program));
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state.memory[0x0043] = 0xA9;
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state.memory[0x0044] = 0x04;
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state.memory[0x04A9] = 0xA0;
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//act
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test_step(&state);
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//assert
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assertA(&state, 0xA0);
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//cleanup
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test_cleanup(&state);
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}
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void test_AND_INDY() {
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//initialize
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State6502 state = create_blank_state();
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state.y = 0x05;
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state.a = 0xAA;
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//arrange
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char program[] = { AND_INDY, 0x3E, 0x04, 0xAA }; //AND ($3E),y
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memcpy(state.memory, program, sizeof(program));
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state.memory[0x3E] = 0xA0; //0x04A0
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state.memory[0x3F] = 0x04;
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state.memory[0x04A5] = 0xA0; //address 0x04A0 + 0x05 = 0x04A5
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//act
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test_step(&state);
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//assert
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assertA(&state, 0xA0);
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//cleanup
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test_cleanup(&state);
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}
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/////////////////////
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typedef void fp();
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fp* tests_lda[] = { test_LDA_IMM, test_LDA_ZP, test_LDA_ZPX, test_LDA_ABS, test_LDA_ABSX, test_LDA_ABSY, test_LDA_INDX, test_LDA_INDY };
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fp* tests_ora[] = { test_ORA_IMM, test_ORA_ZP, test_ORA_ZPX, test_ORA_ABS, test_ORA_ABSX, test_ORA_ABSY, test_ORA_INDX, test_ORA_INDY};
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fp* tests_and[] = { test_AND_IMM, test_AND_ZP, test_AND_ZPX, test_AND_ABS, test_AND_ABSX, test_AND_ABSY, test_AND_INDX, test_AND_INDY };
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void run_tests() {
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for(int i = 0; i < sizeof(tests_lda)/sizeof(fp*); i++)
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tests_lda[i]();
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for (int i = 0; i < sizeof(tests_ora) / sizeof(fp*); i++)
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tests_ora[i]();
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for (int i = 0; i < sizeof(tests_and) / sizeof(fp*); i++)
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tests_and[i]();
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}
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