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ROL implementation
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parent
2d86c1df28
commit
a4a56ddc9f
32
cpu.c
32
cpu.c
@ -194,10 +194,30 @@ void LSR_A(State6502* state) {
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void LSR_MEM(State6502* state, word address) {
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byte operand = state->memory[address];
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state->memory[address] = operand;
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state->memory[address] = lsr(state, operand);
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}
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byte ror(State6502* state, byte operand) {
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//TODO implement
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}
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byte rol(State6502* state, byte operand) {
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word result_word = (operand << 1) | state->flags.c;
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state->flags.c = result_word > 0xFF;
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byte result = result_word & 0xFF;
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set_NV_flags(state, result);
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return result;
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}
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void ROL_A(State6502* state) {
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state->a = rol(state, state->a);
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}
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void ROL_MEM(State6502* state, word address) {
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byte operand = state->memory[address];
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state->memory[address] = rol(state, operand);
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}
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word pop_word(State6502 * state) {
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byte low = pop_byte(state);
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byte high = pop_byte(state);
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@ -444,11 +464,11 @@ int emulate_6502_op(State6502 * state) {
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case ORA_ABSY: ORA(state, get_byte_absolute_y(state)); break;
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case ORA_INDX: ORA(state, get_byte_indirect_x(state)); break;
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case ORA_INDY: ORA(state, get_byte_indirect_y(state)); break;
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case ROL_ACC: unimplemented_instruction(state); break;
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case ROL_ZP: unimplemented_instruction(state); break;
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case ROL_ZPX: unimplemented_instruction(state); break;
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case ROL_ABS: unimplemented_instruction(state); break;
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case ROL_ABSX: unimplemented_instruction(state); break;
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case ROL_ACC: ROL_A(state); break;
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case ROL_ZP: ROL_MEM(state, get_address_zero_page(state)); break;
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case ROL_ZPX: ROL_MEM(state, get_address_zero_page_x(state)); break;
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case ROL_ABS: ROL_MEM(state, get_address_absolute(state)); break;
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case ROL_ABSX: ROL_MEM(state, get_address_absolute_x(state)); break;
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case ROR_ACC: unimplemented_instruction(state); break;
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case ROR_ZP: unimplemented_instruction(state); break;
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case ROR_ZPX: unimplemented_instruction(state); break;
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