2017-12-02 19:05:53 +00:00
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/*
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* mos6502.bits.c
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*/
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#include "mos6502.h"
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#include "mos6502.enums.h"
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2017-12-06 23:16:20 +00:00
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/*
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* The and instruction will assign the bitwise-and of the accumulator
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* and a given operand.
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*/
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2017-12-02 19:05:53 +00:00
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DEFINE_INST(and)
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{
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cpu->A &= oper;
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}
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2017-12-06 23:16:20 +00:00
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/*
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* This is the "arithmetic" shift left instruction.
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*
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* Here we will shift the contents of the given operand left by one bit.
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* If the operand was the accumulator, then we'll store it back there;
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* if not, we will store it in the last effective address in memory.
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*
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* Note that we use the carry bit to help us figure out what the "last
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* bit" is, and whether we should now set the carry bit as a result of
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* our operation.
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*/
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2017-12-02 19:05:53 +00:00
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DEFINE_INST(asl)
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{
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2017-12-04 02:19:17 +00:00
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cpu->P &= ~CARRY;
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2017-12-02 19:05:53 +00:00
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if (oper & 0x80) {
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cpu->P |= CARRY;
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}
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2017-12-04 02:19:17 +00:00
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oper <<= 1;
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2017-12-02 19:05:53 +00:00
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if (cpu->last_addr) {
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vm_segment_set(cpu->memory, cpu->last_addr, oper);
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} else {
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cpu->A = oper;
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}
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}
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2017-12-06 23:16:20 +00:00
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/*
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* The bit instruction will test a given operand for certain
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* characteristics, and assign the negative, overflow, and/or carry bits
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* in the status register as a result.
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*/
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2017-12-02 19:05:53 +00:00
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DEFINE_INST(bit)
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{
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2017-12-04 02:19:17 +00:00
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cpu->P &= ~NEGATIVE;
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2017-12-02 19:05:53 +00:00
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if (oper & NEGATIVE) {
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cpu->P |= NEGATIVE;
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}
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2017-12-04 02:19:17 +00:00
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cpu->P &= ~OVERFLOW;
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2017-12-02 19:05:53 +00:00
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if (oper & OVERFLOW) {
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cpu->P |= OVERFLOW;
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}
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if (oper & cpu->A) {
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cpu->P &= ~ZERO;
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2017-12-04 02:19:17 +00:00
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} else {
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cpu->P |= ZERO;
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2017-12-02 19:05:53 +00:00
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}
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}
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2017-12-06 23:16:20 +00:00
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/*
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* Compute the bitwise-exclusive-or between the accumulator and operand,
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* and store the result in A.
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*/
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2017-12-02 19:05:53 +00:00
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DEFINE_INST(eor)
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{
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cpu->A ^= oper;
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}
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2017-12-06 23:16:20 +00:00
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/*
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* This is pretty similar in spirit to the ASL instruction, except we
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* shift right rather than left.
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*
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* Note that the letters in the instruction stand for "logical" shift
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* right.
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*/
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2017-12-02 19:05:53 +00:00
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DEFINE_INST(lsr)
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{
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2017-12-04 02:19:17 +00:00
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cpu->P &= ~CARRY;
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2017-12-02 19:05:53 +00:00
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if (oper & 0x01) {
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cpu->P |= CARRY;
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}
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2017-12-04 02:19:17 +00:00
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oper >>= 1;
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2017-12-02 19:05:53 +00:00
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if (cpu->last_addr) {
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vm_segment_set(cpu->memory, cpu->last_addr, oper);
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} else {
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cpu->A = oper;
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}
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}
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2017-12-06 23:16:20 +00:00
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/*
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* Compute the bitwise-or of the accumulator and operand, and store the
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* result in the A register.
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*/
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2017-12-02 19:05:53 +00:00
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DEFINE_INST(ora)
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{
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cpu->A |= oper;
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}
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2017-12-06 23:16:20 +00:00
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/*
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* This instruction is interesting; it's a _rotation_ left, which means
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* that what was in the 8th bit will move to the 1st bit, and everything
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* else moves down one place.
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*/
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2017-12-02 19:05:53 +00:00
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DEFINE_INST(rol)
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{
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CARRY_BIT();
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if (oper & 0x80) {
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carry = 1;
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}
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oper <<= 1;
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if (carry) {
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oper |= 0x01;
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}
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if (cpu->last_addr) {
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vm_segment_set(cpu->memory, cpu->last_addr, oper);
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} else {
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cpu->A = oper;
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}
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}
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2017-12-06 23:16:20 +00:00
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/*
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* Here it's a rotation to the right, just like the ROL instruction. All
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* bits are maintained.
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*/
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2017-12-02 19:05:53 +00:00
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DEFINE_INST(ror)
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{
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CARRY_BIT();
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if (oper & 0x01) {
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carry = 1;
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}
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oper >>= 1;
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if (carry) {
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oper |= 0x80;
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}
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if (cpu->last_addr) {
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vm_segment_set(cpu->memory, cpu->last_addr, oper);
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} else {
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cpu->A = oper;
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}
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}
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