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Reimplement idx and idy to use 16-bit addresses
While I have found some conflicting details on how this should be done, it seems pretty clear to me that IDX and IDY work with 16-bit addresses, not 8-bit. The inability to do so was preventing us from probing peripheral ROM (e.g. at $C705, for the disk controller).
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@ -169,11 +169,19 @@ DEFINE_ADDR(ind)
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DEFINE_ADDR(idx)
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{
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vm_8bit addr;
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vm_16bit caddr;
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addr = mos6502_get(cpu, cpu->PC + 1);
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addr = mos6502_get(cpu, addr + cpu->X);
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// The address we are given as an operand must be immediately
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// incremented by the content of the X register.
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addr = mos6502_get(cpu, cpu->PC + 1) + cpu->X;
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EFF_ADDR(addr);
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// And the combined address will then be the point of the LSB to a
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// 16-bit pointer; so addr+1 holds the MSB, and we combined it in
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// the usual, little-endian way.
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caddr = (mos6502_get(cpu, addr + 1) << 8) | mos6502_get(cpu, addr);
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// And that's really it--that's our effective address.
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EFF_ADDR(caddr);
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return mos6502_get(cpu, eff_addr);
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}
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@ -187,11 +195,21 @@ DEFINE_ADDR(idx)
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DEFINE_ADDR(idy)
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{
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vm_8bit addr;
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vm_16bit caddr; // combined address
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// The immediate address we know is the operand following the
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// opcode.
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addr = mos6502_get(cpu, cpu->PC + 1);
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addr = mos6502_get(cpu, addr);
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EFF_ADDR(addr + cpu->Y);
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// But that's just the first part of the combined pointer address we
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// care about; caddr therefore is the combined address pointed at by
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// addr and addr + 1, with respect to little-endian order (ergo
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// mem[addr+1] is the MSB, mem[addr] is the LSB).
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caddr = (mos6502_get(cpu, addr + 1) << 8) | mos6502_get(cpu, addr);
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// But that's not all! We also need to increment that combined
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// address by the content of the Y register.
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EFF_ADDR(caddr + cpu->Y);
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return mos6502_get(cpu, eff_addr);
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}
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