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Add missing tests
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@ -33,6 +33,31 @@ Test(apple2_mem, map)
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}
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}
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}
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}
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Test(apple2_mem, map_bank_switch)
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{
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vm_segment *segments[2];
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segments[0] = mach->main;
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segments[1] = mach->aux;
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for (int i = 0; i < 2; i++) {
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cr_assert_eq(segments[i]->read_table[0xC080], apple2_mem_read_bank_switch);
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cr_assert_eq(segments[i]->read_table[0xC081], apple2_mem_read_bank_switch);
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cr_assert_eq(segments[i]->read_table[0xC082], apple2_mem_read_bank_switch);
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cr_assert_eq(segments[i]->read_table[0xC083], apple2_mem_read_bank_switch);
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cr_assert_eq(segments[i]->read_table[0xC088], apple2_mem_read_bank_switch);
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cr_assert_eq(segments[i]->read_table[0xC089], apple2_mem_read_bank_switch);
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cr_assert_eq(segments[i]->read_table[0xC08A], apple2_mem_read_bank_switch);
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cr_assert_eq(segments[i]->read_table[0xC08B], apple2_mem_read_bank_switch);
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cr_assert_eq(segments[i]->read_table[0xC088], apple2_mem_read_bank_switch);
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cr_assert_eq(segments[i]->read_table[0xC011], apple2_mem_read_bank_switch);
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cr_assert_eq(segments[i]->read_table[0xC012], apple2_mem_read_bank_switch);
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cr_assert_eq(segments[i]->read_table[0xC016], apple2_mem_read_bank_switch);
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cr_assert_eq(segments[i]->write_table[0xC008], apple2_mem_write_bank_switch);
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cr_assert_eq(segments[i]->write_table[0xC009], apple2_mem_write_bank_switch);
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}
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}
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Test(apple2_mem, read_bank)
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Test(apple2_mem, read_bank)
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{
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{
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vm_8bit val;
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vm_8bit val;
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@ -105,7 +130,7 @@ Test(apple2_mem, write_bank)
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cr_assert_eq(vm_segment_get(mach->main, 0x10073), right);
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cr_assert_eq(vm_segment_get(mach->main, 0x10073), right);
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}
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}
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Test(apple2_mem, init_disk2_rom)
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Test(apple2_mem, init_peripheral_rom)
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{
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{
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// FIXME: this isn't working, _and_ it's pretty tightly coupled into
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// FIXME: this isn't working, _and_ it's pretty tightly coupled into
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// the create() function. We could use a better way of testing this.
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// the create() function. We could use a better way of testing this.
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@ -151,3 +151,40 @@ Test(mos6502, get_address_resolver)
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cr_assert_eq(mos6502_get_address_resolver(0x96), mos6502_resolve_zpy);
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cr_assert_eq(mos6502_get_address_resolver(0x96), mos6502_resolve_zpy);
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}
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}
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Test(mos6502, get)
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{
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vm_segment_set(cpu->wmem, 0, 123);
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cr_assert_eq(mos6502_get(cpu, 0), 123);
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}
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Test(mos6502, get16)
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{
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vm_segment_set16(cpu->wmem, 0, 0x3344);
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cr_assert_eq(mos6502_get16(cpu, 0), 0x3344);
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}
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Test(mos6502, set)
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{
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mos6502_set(cpu, 0, 111);
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cr_assert_eq(vm_segment_get(cpu->rmem, 0), 111);
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}
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Test(mos6502, set16)
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{
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mos6502_set16(cpu, 0, 0x2255);
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cr_assert_eq(vm_segment_get16(cpu->rmem, 0), 0x2255);
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}
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Test(mos6502, set_memory)
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{
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vm_segment *rmem, *wmem;
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rmem = (vm_segment *)111;
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wmem = (vm_segment *)222;
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mos6502_set_memory(cpu, rmem, wmem);
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cr_assert_eq(cpu->rmem, rmem);
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cr_assert_eq(cpu->wmem, wmem);
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}
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