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Add pc file for peripheral card ROM
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@ -128,6 +128,30 @@ enum memory_mode {
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*/
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MEMORY_PAGE2 = 0x8,
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MEMORY_HIRES = 0x10,
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/*
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* When this is high, expansion ROM is considered in use. That means
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* that the $C800..$CFFF range will be mapped to the expansion ROM
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* area of the rom segment (which is at the end), vs. the internal
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* ROM area, which is at the $0800..$0FFF range within the rom
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* segment.
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*/
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MEMORY_EXPROM = 0x20,
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/*
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* When SLOTCXROM is high, the entire range of $C100..$C7FF will be
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* mapped to the peripheral ROM area of the rom segment (which is in
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* the $4100..$47FF address range there); otherwise, $C100...$C7FF
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* is mapped to internal ROM, located at $0100..$07FF within the
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* same rom segment.
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*
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* It's not possible to map a single peripheral ROM page, with the
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* exception of slot 3 (via SLOTC3ROM). That page is special because
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* of its use by the 80-column text card. You can have SLOTC3ROM
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* high but SLOTCXROM low.
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*/
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MEMORY_SLOTCXROM = 0x40,
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MEMORY_SLOTC3ROM = 0x80,
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};
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enum bank_switch {
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14
include/apple2.pc.h
Normal file
14
include/apple2.pc.h
Normal file
@ -0,0 +1,14 @@
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#ifndef _APPLE2_PC_H_
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#define _APPLE2_PC_H_
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#include "apple2.h"
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#include "vm_segment.h"
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extern SEGMENT_READER(apple2_pc_read);
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extern SEGMENT_READER(apple2_pc_switch_read);
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extern SEGMENT_WRITER(apple2_pc_switch_write);
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extern SEGMENT_WRITER(apple2_pc_write);
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extern size_t apple2_pc_rom_addr(size_t, vm_8bit);
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extern void apple2_pc_map(vm_segment *);
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#endif
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@ -5,6 +5,7 @@ set(erc_sources
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apple2.dd.c
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apple2.draw.c
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apple2.mem.c
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apple2.pc.c
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log.c
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mos6502.c
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mos6502.addr.c
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@ -4,6 +4,7 @@
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#include "apple2.bank.h"
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#include "apple2.dbuf.h"
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#include "apple2.pc.h"
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#include "apple2.h"
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#include "apple2.mem.h"
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#include "objstore.h"
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@ -25,6 +26,8 @@ apple2_mem_map(apple2 *mach, vm_segment *segment)
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// Here we handle the 80STORE bit for our display buffers.
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apple2_dbuf_map(segment);
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apple2_pc_map(segment);
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// We will do the mapping for the zero page and stack addresses.
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// Accessing those addresses can be affected by bank-switching, but
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// those addresses do not actually exist in the capital
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162
src/apple2.pc.c
162
src/apple2.pc.c
@ -7,8 +7,19 @@
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* (apple2.dd.c).
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*/
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#include "apple2.h"
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#include "vm_segment.h"
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#include "apple2.pc.h"
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static size_t switch_reads[] = {
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0xC015,
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0xC017,
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};
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static size_t switch_writes[] = {
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0xC006,
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0xC007,
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0xC00A,
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0xC00B,
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};
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/*
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* Map all of the peripheral ROM space (and peripheral expansion ROM
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@ -17,24 +28,163 @@
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* $C800..$CFFF.
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*/
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void
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apple2_pc_map(apple2 *mach, vm_segment *seg)
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apple2_pc_map(vm_segment *seg)
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{
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size_t addr;
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int i;
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int rlen, wlen;
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for (addr = 0xC100; addr < 0xD000; addr++) {
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vm_segment_read_map(seg, addr, apple2_pc_read);
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vm_segment_write_map(seg, addr, apple2_pc_write);
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}
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rlen = sizeof(switch_reads) / sizeof(size_t);
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wlen = sizeof(switch_writes) / sizeof(size_t);
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for (i = 0; i < rlen; i++) {
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vm_segment_read_map(seg, switch_reads[i], apple2_pc_switch_read);
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}
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for (i = 0; i < wlen; i++) {
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vm_segment_write_map(seg, switch_writes[i], apple2_pc_switch_write);
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}
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}
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/*
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* This mapper handles the entire potential peripheral ROM space; we
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* either need to return an address from the beginning of memory, or
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* near the end.
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*/
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SEGMENT_READER(apple2_pc_read)
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{
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apple2 *mach = (apple2 *)_mach;
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if (mach->memory_mode & MEMORY_EXPROM) {
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// The address in the rom segment gets translated through a number
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// of factors
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addr = apple2_pc_rom_addr(addr, mach->memory_mode);
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// No matter what we do, the segment we return from will always be
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// the rom segment. This part is non-negotiable.
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return mach->rom->memory[addr];
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}
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if (mach->memory_mode & MEMORY_SLOTCXROM) {
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segment = mach->rom;
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/*
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* Since all of our address spaces are mapped to ROM, we can't write
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* anything!
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*/
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SEGMENT_WRITER(apple2_pc_write)
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{
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return;
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}
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/*
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* Given an address from program code, return the corresponding address
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* in our rom segment. The machine's memory mode is also given as a
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* factor.
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*/
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size_t
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apple2_pc_rom_addr(size_t addr, vm_8bit mode)
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{
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size_t rom_addr;
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// This mapper should only be called from the $C000..$CFFF range;
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// in the rom segment, this group of pages is addressed at
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// $0000..$0FFF. We can assume that regardless of what addr is, a
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// subtraction of $C000 would result in a valid address.
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rom_addr = addr - 0xC000;
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// However, if the EXPROM bit is high, then we want to use expansion
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// ROM which is located at the _end_ of the rom segment; specifically
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// in the $4800..$4FFF range.
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if (rom_addr >= 0x0800 && rom_addr < 0x1000 &&
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mode & MEMORY_EXPROM
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) {
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rom_addr += 0x4000;
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}
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// If SLOTCXROM is high, then we want any byte addressed in this
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// space to reference peripheral ROM (which is again located at the
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// end of the segment, in exactly the same way that expansion ROM is
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// placed).
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if (rom_addr >= 0x0100 && rom_addr < 0x0800 &&
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mode & MEMORY_SLOTCXROM
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) {
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rom_addr += 0x4000;
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}
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// One final thing to account for is if the SLOTC3ROM bit is high.
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// If it is, and if the address has not already been incremented
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// because SLOTCXROM was _also_ high, then we need to increment just
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// for this specific page of memory.
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if (rom_addr >= 0x0300 && rom_addr < 0x0400 &&
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mode & MEMORY_SLOTC3ROM
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) {
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rom_addr += 0x4000;
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}
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return rom_addr;
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}
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/*
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* Handle reads to the slot / peripheral ROM switches. I'm not
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* _entirely_ sure what Apple expects to be returned here, since they
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* don't indicate as clearly as they did with bank-switch modes; there,
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* they said you need to return a byte with the 7 bit high, which you
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* can then use a BPL or a BMI to branch with. Here, they don't specify
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* bit 7, but I'm going to go with that until I see otherwise.
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*/
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SEGMENT_READER(apple2_pc_switch_read)
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{
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apple2 *mach = (apple2 *)_mach;
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switch (addr) {
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case 0xC015:
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return (mach->memory_mode & MEMORY_SLOTCXROM)
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? 0x80
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: 0x00;
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case 0xC017:
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return (mach->memory_mode & MEMORY_SLOTC3ROM)
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? 0x80
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: 0x00;
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}
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// We shouldn't get here for any practical reason, but...
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return 0;
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}
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/*
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* Handle writes to the slot switches. There are separate writes to turn
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* these switches on and off, for each switch, respectively. The value
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* being written doesn't matter (indeed--you won't see us reference the
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* value parameter).
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*/
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SEGMENT_WRITER(apple2_pc_switch_write)
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{
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apple2 *mach = (apple2 *)_mach;
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// We don't care what the value is; if a write happens to any of the
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// following addresses, we must change the peripheral memory
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// behavior accordingly.
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switch (addr) {
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case 0xC00B:
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apple2_set_memory_mode(mach,
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mach->memory_mode | MEMORY_SLOTC3ROM);
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break;
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case 0xC00A:
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apple2_set_memory_mode(mach,
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mach->memory_mode & ~MEMORY_SLOTC3ROM);
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break;
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case 0xC006:
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apple2_set_memory_mode(mach,
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mach->memory_mode | MEMORY_SLOTCXROM);
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break;
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case 0xC007:
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apple2_set_memory_mode(mach,
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mach->memory_mode & ~MEMORY_SLOTCXROM);
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break;
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}
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}
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58
tests/apple2.pc.c
Normal file
58
tests/apple2.pc.c
Normal file
@ -0,0 +1,58 @@
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#include <criterion/criterion.h>
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#include "apple2.h"
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#include "apple2.pc.h"
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static apple2 *mach = NULL;
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static void
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setup()
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{
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mach = apple2_create(100, 100);
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vm_segment_set_map_machine(mach);
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}
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static void
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teardown()
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{
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apple2_free(mach);
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vm_segment_set_map_machine(NULL);
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}
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TestSuite(apple2_pc, .init = setup, .fini = teardown);
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Test(apple2_pc, map)
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{
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size_t addr;
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int i;
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vm_segment *segments[2];
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segments[0] = mach->main;
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segments[1] = mach->aux;
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for (i = 0; i < 2; i++) {
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for (addr = 0xC100; addr < 0xD000; addr++) {
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cr_assert_eq(segments[i]->read_table[addr], apple2_pc_read);
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cr_assert_eq(segments[i]->write_table[addr], apple2_pc_write);
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}
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cr_assert_eq(segments[i]->read_table[0xC015], apple2_pc_switch_read);
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cr_assert_eq(segments[i]->read_table[0xC017], apple2_pc_switch_read);
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cr_assert_eq(segments[i]->write_table[0xC00B], apple2_pc_switch_write);
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cr_assert_eq(segments[i]->write_table[0xC00A], apple2_pc_switch_write);
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cr_assert_eq(segments[i]->write_table[0xC006], apple2_pc_switch_write);
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cr_assert_eq(segments[i]->write_table[0xC007], apple2_pc_switch_write);
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}
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}
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Test(apple2_pc, rom_addr)
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{
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cr_assert_eq(apple2_pc_rom_addr(0xC832, MEMORY_DEFAULT), 0x832);
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cr_assert_eq(apple2_pc_rom_addr(0xC832, MEMORY_SLOTCXROM), 0x832);
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cr_assert_eq(apple2_pc_rom_addr(0xC832, MEMORY_SLOTC3ROM), 0x832);
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cr_assert_eq(apple2_pc_rom_addr(0xC232, MEMORY_EXPROM), 0x0232);
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cr_assert_eq(apple2_pc_rom_addr(0xC832, MEMORY_EXPROM), 0x4832);
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cr_assert_eq(apple2_pc_rom_addr(0xC732, MEMORY_SLOTCXROM), 0x4732);
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cr_assert_eq(apple2_pc_rom_addr(0xC332, MEMORY_SLOTC3ROM), 0x4332);
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}
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