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Change 16-bit references to respect little-endianness

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As the Apple II (or rather the 6502 chip) is little-endian, meaning the
least significant byte is the first byte you read going forward, rather
than the last byte.
This commit is contained in:
Peter Evans 2018-01-08 17:10:26 -06:00
parent 01174b63dd
commit a8bba409c3
5 changed files with 23 additions and 23 deletions
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6
src/mos6502.addr.c
View File

@ -44,8 +44,8 @@ static int addr_modes[] = {
#define ADDR_HILO(cpu) \
vm_16bit addr; \
vm_8bit hi, lo; \
hi = mos6502_next_byte(cpu); \
lo = mos6502_next_byte(cpu); \
hi = mos6502_next_byte(cpu); \
addr = (hi << 8) | lo
/*
@ -155,8 +155,8 @@ DEFINE_ADDR(ind)
ADDR_HILO(cpu);
ind_hi = vm_segment_get(cpu->memory, addr);
ind_lo = vm_segment_get(cpu->memory, addr + 1);
ind_lo = vm_segment_get(cpu->memory, addr);
ind_hi = vm_segment_get(cpu->memory, addr + 1);
EFF_ADDR((ind_hi << 8) | ind_lo);
return vm_segment_get(cpu->memory, eff_addr);

4
src/vm_segment.c
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@ -157,8 +157,8 @@ vm_segment_get16(vm_segment *segment, size_t addr)
{
vm_16bit msb, lsb;
msb = (vm_16bit)vm_segment_get(segment, addr);
lsb = (vm_16bit)vm_segment_get(segment, addr+1);
lsb = (vm_16bit)vm_segment_get(segment, addr);
msb = (vm_16bit)vm_segment_get(segment, addr+1);
return (msb << 8) | lsb;
}

4
tests/apple2.c
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@ -128,8 +128,8 @@ Test(apple2, set_memory)
Test(apple2, reset)
{
apple2_set_memory(mach, MEMORY_BANK_ROM);
vm_segment_set(mach->rom, 0x2FFC, 0x12);
vm_segment_set(mach->rom, 0x2FFD, 0x34);
vm_segment_set(mach->rom, 0x2FFC, 0x34);
vm_segment_set(mach->rom, 0x2FFD, 0x12);
apple2_reset(mach);
cr_assert_eq(mach->cpu->PC, 0x1234);

28
tests/mos6502.addr.c
View File

@ -22,16 +22,16 @@ Test(mos6502_addr, addr_mode_acc)
Test(mos6502_addr, addr_mode_abs)
{
vm_segment_set(cpu->memory, 0x1234, 111);
SET_PC_BYTE(cpu, 0, 0x12);
SET_PC_BYTE(cpu, 1, 0x34);
SET_PC_BYTE(cpu, 0, 0x34);
SET_PC_BYTE(cpu, 1, 0x12);
cr_assert_eq(mos6502_resolve_abs(cpu), 111);
}
Test(mos6502_addr, addr_mode_abx_carry0)
{
vm_segment_set(cpu->memory, 0x1234, 111);
SET_PC_BYTE(cpu, 0, 0x12);
SET_PC_BYTE(cpu, 1, 0x30);
SET_PC_BYTE(cpu, 0, 0x30);
SET_PC_BYTE(cpu, 1, 0x12);
cpu->X = 4;
cr_assert_eq(mos6502_resolve_abx(cpu), 111);
}
@ -39,8 +39,8 @@ Test(mos6502_addr, addr_mode_abx_carry0)
Test(mos6502_addr, addr_mode_abx_carry1)
{
vm_segment_set(cpu->memory, 0x1234, 111);
SET_PC_BYTE(cpu, 0, 0x12);
SET_PC_BYTE(cpu, 1, 0x30);
SET_PC_BYTE(cpu, 0, 0x30);
SET_PC_BYTE(cpu, 1, 0x12);
cpu->X = 3;
cpu->P = cpu->P | MOS_CARRY;
cr_assert_eq(mos6502_resolve_abx(cpu), 111);
@ -49,8 +49,8 @@ Test(mos6502_addr, addr_mode_abx_carry1)
Test(mos6502_addr, addr_mode_aby_carry0)
{
vm_segment_set(cpu->memory, 0x1234, 111);
SET_PC_BYTE(cpu, 0, 0x12);
SET_PC_BYTE(cpu, 1, 0x30);
SET_PC_BYTE(cpu, 0, 0x30);
SET_PC_BYTE(cpu, 1, 0x12);
cpu->Y = 4;
cr_assert_eq(mos6502_resolve_aby(cpu), 111);
}
@ -58,8 +58,8 @@ Test(mos6502_addr, addr_mode_aby_carry0)
Test(mos6502_addr, addr_mode_aby_carry1)
{
vm_segment_set(cpu->memory, 0x1234, 111);
SET_PC_BYTE(cpu, 0, 0x12);
SET_PC_BYTE(cpu, 1, 0x30);
SET_PC_BYTE(cpu, 0, 0x30);
SET_PC_BYTE(cpu, 1, 0x12);
cpu->Y = 3;
cpu->P = cpu->P | MOS_CARRY;
cr_assert_eq(mos6502_resolve_aby(cpu), 111);
@ -93,12 +93,12 @@ Test(mos6502_addr, addr_mode_idy)
Test(mos6502_addr, addr_mode_ind)
{
vm_segment_set(cpu->memory, 0x1234, 0x23);
vm_segment_set(cpu->memory, 0x1235, 0x45);
vm_segment_set(cpu->memory, 0x1234, 0x45);
vm_segment_set(cpu->memory, 0x1235, 0x23);
vm_segment_set(cpu->memory, 0x2345, 123);
SET_PC_BYTE(cpu, 0, 0x12);
SET_PC_BYTE(cpu, 1, 0x34);
SET_PC_BYTE(cpu, 0, 0x34);
SET_PC_BYTE(cpu, 1, 0x12);
cr_assert_eq(mos6502_resolve_ind(cpu), 123);
}

4
tests/vm_segment.c
View File

@ -169,8 +169,8 @@ Test(vm_segment, set_map_machine)
Test(vm_segment, get16)
{
vm_segment_set(segment, 0, 0x12);
vm_segment_set(segment, 1, 0x34);
vm_segment_set(segment, 0, 0x34);
vm_segment_set(segment, 1, 0x12);
cr_assert_eq(vm_segment_get16(segment, 0), 0x1234);
}