diff --git a/include/mos6502.enums.h b/include/mos6502.enums.h
index 5678e7f..7865361 100644
--- a/include/mos6502.enums.h
+++ b/include/mos6502.enums.h
@@ -65,6 +65,7 @@ enum instruction {
     ADC,    // ADd with Carry
     AND,    // bitwise AND
     ASL,    // Arithmetic Shift Left
+    BAD,    // bad instruction
     BCC,    // Branch on Carry Clear
     BCS,    // Branch on Carry Set
     BEQ,    // Branch on EQual to zero
diff --git a/include/mos6502.h b/include/mos6502.h
index 9fb056f..69d29f6 100644
--- a/include/mos6502.h
+++ b/include/mos6502.h
@@ -177,6 +177,7 @@ DECL_ADDR_MODE(zpy);
 DECL_INST(adc);
 DECL_INST(and);
 DECL_INST(asl);
+DECL_INST(bad);
 DECL_INST(bcc);
 DECL_INST(bcs);
 DECL_INST(beq);
diff --git a/src/mos6502.c b/src/mos6502.c
index bb586e6..641a623 100644
--- a/src/mos6502.c
+++ b/src/mos6502.c
@@ -27,22 +27,22 @@
  */
 static int instructions[] = {
 //   00   01   02   03   04   05   06   07   08   09   0A   0B   0C   0D   0E   0F
-    BRK, ORA, NOP, NOP, NOP, ORA, ASL, NOP, PHP, ORA, ASL, NOP, NOP, ORA, ASL, NOP, // 0x
-    BPL, ORA, NOP, NOP, NOP, ORA, ASL, NOP, CLC, ORA, NOP, NOP, NOP, ORA, ASL, NOP, // 1x
-    JSR, AND, NOP, NOP, BIT, AND, ROL, NOP, PLP, AND, ROL, NOP, BIT, AND, ROL, NOP, // 2x
-    BMI, AND, NOP, NOP, NOP, AND, ROL, NOP, SEC, AND, NOP, NOP, NOP, AND, ROL, NOP, // 3x
-    RTI, EOR, NOP, NOP, NOP, EOR, LSR, NOP, PHA, ADC, LSR, NOP, JMP, EOR, LSR, NOP, // 4x
-    BVC, EOR, NOP, NOP, NOP, EOR, LSR, NOP, CLI, EOR, NOP, NOP, NOP, EOR, LSR, NOP, // 5x
-    RTS, ADC, NOP, NOP, NOP, ADC, ROR, NOP, PLA, ADC, ROR, NOP, JMP, ADC, ROR, NOP, // 6x
-    BVS, ADC, NOP, NOP, NOP, ADC, ROR, NOP, SEI, ADC, NOP, NOP, NOP, ADC, ROR, NOP, // 7x
-    NOP, STA, NOP, NOP, STY, STA, STX, NOP, DEY, NOP, TXA, NOP, STY, STA, STX, NOP, // 8x
-    BCC, STA, NOP, NOP, STY, STA, STX, NOP, TYA, STA, TXS, NOP, NOP, STA, NOP, NOP, // 9x
-    LDY, LDA, LDX, NOP, LDY, LDA, LDX, NOP, TAY, LDA, TAX, NOP, LDY, LDA, LDX, NOP, // Ax
-    BCS, LDA, NOP, NOP, LDY, LDA, LDX, NOP, CLV, LDA, TSX, NOP, LDY, LDA, LDX, NOP, // Bx
-    CPY, CMP, NOP, NOP, CPY, CMP, DEC, NOP, INY, CMP, DEX, NOP, CPY, CMP, DEC, NOP, // Cx
-    BNE, CMP, NOP, NOP, NOP, CMP, DEC, NOP, CLD, CMP, NOP, NOP, NOP, CMP, DEC, NOP, // Dx
-    CPX, SBC, NOP, NOP, CPX, SBC, INC, NOP, INX, SBC, NOP, NOP, CPX, SBC, INC, NOP, // Ex
-    BEQ, SBC, NOP, NOP, NOP, SBC, INC, NOP, SED, SBC, NOP, NOP, NOP, SBC, INC, NOP, // Fx
+    BRK, ORA, BAD, BAD, BAD, ORA, ASL, BAD, PHP, ORA, ASL, BAD, BAD, ORA, ASL, BAD, // 0x
+    BPL, ORA, BAD, BAD, BAD, ORA, ASL, BAD, CLC, ORA, BAD, BAD, BAD, ORA, ASL, BAD, // 1x
+    JSR, AND, BAD, BAD, BIT, AND, ROL, BAD, PLP, AND, ROL, BAD, BIT, AND, ROL, BAD, // 2x
+    BMI, AND, BAD, BAD, BAD, AND, ROL, BAD, SEC, AND, BAD, BAD, BAD, AND, ROL, BAD, // 3x
+    RTI, EOR, BAD, BAD, BAD, EOR, LSR, BAD, PHA, ADC, LSR, BAD, JMP, EOR, LSR, BAD, // 4x
+    BVC, EOR, BAD, BAD, BAD, EOR, LSR, BAD, CLI, EOR, BAD, BAD, BAD, EOR, LSR, BAD, // 5x
+    RTS, ADC, BAD, BAD, BAD, ADC, ROR, BAD, PLA, ADC, ROR, BAD, JMP, ADC, ROR, BAD, // 6x
+    BVS, ADC, BAD, BAD, BAD, ADC, ROR, BAD, SEI, ADC, BAD, BAD, BAD, ADC, ROR, BAD, // 7x
+    BAD, STA, BAD, BAD, STY, STA, STX, BAD, DEY, BAD, TXA, BAD, STY, STA, STX, BAD, // 8x
+    BCC, STA, BAD, BAD, STY, STA, STX, BAD, TYA, STA, TXS, BAD, BAD, STA, BAD, BAD, // 9x
+    LDY, LDA, LDX, BAD, LDY, LDA, LDX, BAD, TAY, LDA, TAX, BAD, LDY, LDA, LDX, BAD, // Ax
+    BCS, LDA, BAD, BAD, LDY, LDA, LDX, BAD, CLV, LDA, TSX, BAD, LDY, LDA, LDX, BAD, // Bx
+    CPY, CMP, BAD, BAD, CPY, CMP, DEC, BAD, INY, CMP, DEX, BAD, CPY, CMP, DEC, BAD, // Cx
+    BNE, CMP, BAD, BAD, BAD, CMP, DEC, BAD, CLD, CMP, BAD, BAD, BAD, CMP, DEC, BAD, // Dx
+    CPX, SBC, BAD, BAD, CPX, SBC, INC, BAD, INX, SBC, NOP, BAD, CPX, SBC, INC, BAD, // Ex
+    BEQ, SBC, BAD, BAD, BAD, SBC, INC, BAD, SED, SBC, BAD, BAD, BAD, SBC, INC, BAD, // Fx
 };
 
 /*
@@ -60,6 +60,7 @@ static mos6502_instruction_handler instruction_handlers[] = {
     INST_HANDLER(adc),
     INST_HANDLER(and),
     INST_HANDLER(asl),
+    INST_HANDLER(bad),
     INST_HANDLER(bcc),
     INST_HANDLER(bcs),
     INST_HANDLER(beq),
diff --git a/src/mos6502.dis.c b/src/mos6502.dis.c
index 03ddf04..95a7ba6 100644
--- a/src/mos6502.dis.c
+++ b/src/mos6502.dis.c
@@ -23,6 +23,7 @@ static char *instruction_strings[] = {
     "ADC",
     "AND",
     "ASL",
+    "BAD",
     "BCC",
     "BCS",
     "BEQ",
diff --git a/src/mos6502.exec.c b/src/mos6502.exec.c
index 437558c..e91493f 100644
--- a/src/mos6502.exec.c
+++ b/src/mos6502.exec.c
@@ -5,9 +5,17 @@
  * BRK, and so forth.
  */
 
+#include "log.h"
 #include "mos6502.h"
 #include "mos6502.enums.h"
 
+DEFINE_INST(bad)
+{
+    log_critical("Invalid instruction: %2x @ %4x",
+                  mos6502_get(cpu, cpu->PC), cpu->PC);
+    exit(1);
+}
+
 /*
  * The BRK instruction will set the interrupt bit; will push the current
  * PC address to the stack; and will advance the counter by 2 positions.