2014-08-17 14:49:22 +00:00
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package i6502
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2014-08-17 15:18:14 +00:00
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const (
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aciaData = iota
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aciaStatus
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aciaCommand
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aciaControl
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)
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2014-08-17 14:49:22 +00:00
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/*
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ACIA 6551 Serial IO
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*/
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type Acia6551 struct {
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2014-08-17 15:18:14 +00:00
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Rx chan byte // Reading (Acia Input) line
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Tx chan byte // Transmitting (Acia Output) line
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2014-08-17 20:36:01 +00:00
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rxData byte
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txData byte
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2014-08-17 15:18:14 +00:00
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commandData byte
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controlData byte
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rxFull bool
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txEmpty bool
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rxIrqEnabled bool
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txIrqEnabled bool
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2014-08-17 20:36:01 +00:00
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overrun bool
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2014-08-17 14:49:22 +00:00
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}
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func NewAcia6551(rx chan byte, tx chan byte) (*Acia6551, error) {
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2014-08-17 15:18:14 +00:00
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acia := &Acia6551{Tx: tx, Rx: rx}
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acia.Reset()
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go func() {
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// Handle rx data channel
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}()
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go func() {
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// Handle tx data channel
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}()
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return acia, nil
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2014-08-17 14:49:22 +00:00
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}
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2014-08-17 15:18:14 +00:00
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func (a *Acia6551) Size() uint16 {
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// We have a only 4 addresses, Data, Status, Command and Control
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2014-08-17 14:49:22 +00:00
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return 0x04
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}
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2014-08-17 20:36:01 +00:00
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// Emulates a hardware reset
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2014-08-17 15:18:14 +00:00
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func (a *Acia6551) Reset() {
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a.rxData = 0
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a.rxFull = false
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a.txData = 0
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a.txEmpty = true
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a.rxIrqEnabled = false
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a.txIrqEnabled = false
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2014-08-17 20:36:01 +00:00
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a.overrun = false
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a.setControl(0)
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a.setCommand(0)
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2014-08-17 15:18:14 +00:00
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}
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2014-08-17 20:36:01 +00:00
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func (a *Acia6551) setControl(data byte) {
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2014-08-17 14:49:22 +00:00
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}
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2014-08-17 20:36:01 +00:00
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func (a *Acia6551) setCommand(data byte) {
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}
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func (a *Acia6551) Read(address uint16) byte {
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switch address {
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case aciaData:
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// Read Rx
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case aciaStatus:
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// Read Status reg.
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case aciaCommand:
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// Read command
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case aciaControl:
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// Read control
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}
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return 0x00
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}
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func (a *Acia6551) Write(address uint16, data byte) {
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switch address {
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case aciaData:
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// Write Tx
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case aciaStatus:
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// Reset
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case aciaCommand:
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// Write command
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case aciaControl:
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// Write control
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}
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2014-08-17 14:49:22 +00:00
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}
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