diff --git a/.idea/libraries/Maven__cml_kickass_kickassembler_5_16_65ce02_e.xml b/.idea/libraries/Maven__cml_kickass_kickassembler_5_16_65ce02_g.xml similarity index 57% rename from .idea/libraries/Maven__cml_kickass_kickassembler_5_16_65ce02_e.xml rename to .idea/libraries/Maven__cml_kickass_kickassembler_5_16_65ce02_g.xml index b6ef1ba12..2f40a67bf 100644 --- a/.idea/libraries/Maven__cml_kickass_kickassembler_5_16_65ce02_e.xml +++ b/.idea/libraries/Maven__cml_kickass_kickassembler_5_16_65ce02_g.xml @@ -1,13 +1,13 @@ - + - + - + - + \ No newline at end of file diff --git a/kickc.iml b/kickc.iml index 5162c4488..017380cf2 100644 --- a/kickc.iml +++ b/kickc.iml @@ -18,7 +18,7 @@ - + diff --git a/pom.xml b/pom.xml index e89a9eec5..f127c065c 100644 --- a/pom.xml +++ b/pom.xml @@ -44,7 +44,7 @@ cml.kickass kickassembler - 5.16-65ce02.e + 5.16-65ce02.g info.picocli diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.f/_remote.repositories b/repo/cml/kickass/kickassembler/5.16-65ce02.f/_remote.repositories new file mode 100644 index 000000000..d8d5bbfc4 --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.f/_remote.repositories @@ -0,0 +1,4 @@ +#NOTE: This is a Maven Resolver internal implementation file, its format can be changed without prior notice. +#Fri Jul 31 01:27:42 CEST 2020 +kickassembler-5.16-65ce02.f.pom>= +kickassembler-5.16-65ce02.f.jar>= diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.f/kickassembler-5.16-65ce02.f.jar b/repo/cml/kickass/kickassembler/5.16-65ce02.f/kickassembler-5.16-65ce02.f.jar new file mode 100644 index 000000000..d659ebc25 Binary files /dev/null and b/repo/cml/kickass/kickassembler/5.16-65ce02.f/kickassembler-5.16-65ce02.f.jar differ diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.f/kickassembler-5.16-65ce02.f.jar.md5 b/repo/cml/kickass/kickassembler/5.16-65ce02.f/kickassembler-5.16-65ce02.f.jar.md5 new file mode 100644 index 000000000..83ecdf927 --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.f/kickassembler-5.16-65ce02.f.jar.md5 @@ -0,0 +1 @@ +8f2fc839572e172aa68bd32ba103ebb4 \ No newline at end of file diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.f/kickassembler-5.16-65ce02.f.jar.sha1 b/repo/cml/kickass/kickassembler/5.16-65ce02.f/kickassembler-5.16-65ce02.f.jar.sha1 new file mode 100644 index 000000000..2acea4405 --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.f/kickassembler-5.16-65ce02.f.jar.sha1 @@ -0,0 +1 @@ +08d00ab1a17b81e03b5a22acaa9e6f53713d37a1 \ No newline at end of file diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.f/kickassembler-5.16-65ce02.f.pom b/repo/cml/kickass/kickassembler/5.16-65ce02.f/kickassembler-5.16-65ce02.f.pom new file mode 100644 index 000000000..9048140f5 --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.f/kickassembler-5.16-65ce02.f.pom @@ -0,0 +1,9 @@ + + + 4.0.0 + cml.kickass + kickassembler + 5.16-65ce02.f + POM was created from install:install-file + diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.f/kickassembler-5.16-65ce02.f.pom.md5 b/repo/cml/kickass/kickassembler/5.16-65ce02.f/kickassembler-5.16-65ce02.f.pom.md5 new file mode 100644 index 000000000..d053977d1 --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.f/kickassembler-5.16-65ce02.f.pom.md5 @@ -0,0 +1 @@ +6e6beee8b96c6681c832ed6ffca57967 \ No newline at end of file diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.f/kickassembler-5.16-65ce02.f.pom.sha1 b/repo/cml/kickass/kickassembler/5.16-65ce02.f/kickassembler-5.16-65ce02.f.pom.sha1 new file mode 100644 index 000000000..66ce701bb --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.f/kickassembler-5.16-65ce02.f.pom.sha1 @@ -0,0 +1 @@ +38826370ac61ebc769df62c5d46cbaab7e10de34 \ No newline at end of file diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.g/_remote.repositories b/repo/cml/kickass/kickassembler/5.16-65ce02.g/_remote.repositories new file mode 100644 index 000000000..3d723c9d3 --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.g/_remote.repositories @@ -0,0 +1,4 @@ +#NOTE: This is a Maven Resolver internal implementation file, its format can be changed without prior notice. +#Fri Jul 31 01:33:28 CEST 2020 +kickassembler-5.16-65ce02.g.pom>= +kickassembler-5.16-65ce02.g.jar>= diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.g/kickassembler-5.16-65ce02.g.jar b/repo/cml/kickass/kickassembler/5.16-65ce02.g/kickassembler-5.16-65ce02.g.jar new file mode 100644 index 000000000..31f62d3eb Binary files /dev/null and b/repo/cml/kickass/kickassembler/5.16-65ce02.g/kickassembler-5.16-65ce02.g.jar differ diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.g/kickassembler-5.16-65ce02.g.jar.md5 b/repo/cml/kickass/kickassembler/5.16-65ce02.g/kickassembler-5.16-65ce02.g.jar.md5 new file mode 100644 index 000000000..6649afe39 --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.g/kickassembler-5.16-65ce02.g.jar.md5 @@ -0,0 +1 @@ +16f65570e465946f20c6d02cd896df88 \ No newline at end of file diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.g/kickassembler-5.16-65ce02.g.jar.sha1 b/repo/cml/kickass/kickassembler/5.16-65ce02.g/kickassembler-5.16-65ce02.g.jar.sha1 new file mode 100644 index 000000000..65b76dfeb --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.g/kickassembler-5.16-65ce02.g.jar.sha1 @@ -0,0 +1 @@ +0c1ef7349dbf78c824a7782615fa110b175d23cc \ No newline at end of file diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.g/kickassembler-5.16-65ce02.g.pom b/repo/cml/kickass/kickassembler/5.16-65ce02.g/kickassembler-5.16-65ce02.g.pom new file mode 100644 index 000000000..dfaf1939d --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.g/kickassembler-5.16-65ce02.g.pom @@ -0,0 +1,9 @@ + + + 4.0.0 + cml.kickass + kickassembler + 5.16-65ce02.g + POM was created from install:install-file + diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.g/kickassembler-5.16-65ce02.g.pom.md5 b/repo/cml/kickass/kickassembler/5.16-65ce02.g/kickassembler-5.16-65ce02.g.pom.md5 new file mode 100644 index 000000000..1336c88ce --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.g/kickassembler-5.16-65ce02.g.pom.md5 @@ -0,0 +1 @@ +caa1da8b13085baaa9a481e2bd66607e \ No newline at end of file diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.g/kickassembler-5.16-65ce02.g.pom.sha1 b/repo/cml/kickass/kickassembler/5.16-65ce02.g/kickassembler-5.16-65ce02.g.pom.sha1 new file mode 100644 index 000000000..9cd4dea00 --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.g/kickassembler-5.16-65ce02.g.pom.sha1 @@ -0,0 +1 @@ +9819994e0ee59543d951bdb0d82e1646d2588517 \ No newline at end of file diff --git a/repo/cml/kickass/kickassembler/maven-metadata.xml b/repo/cml/kickass/kickassembler/maven-metadata.xml index 719b9dfd4..73c982da9 100644 --- a/repo/cml/kickass/kickassembler/maven-metadata.xml +++ b/repo/cml/kickass/kickassembler/maven-metadata.xml @@ -3,7 +3,7 @@ cml.kickass kickassembler - 5.16-65ce02.e + 5.16-65ce02.g 4.19 5.7 @@ -18,7 +18,9 @@ 5.16-65ce02.c 5.16-65ce02.d 5.16-65ce02.e + 5.16-65ce02.f + 5.16-65ce02.g - 20200730225045 + 20200730233328 diff --git a/repo/cml/kickass/kickassembler/maven-metadata.xml.md5 b/repo/cml/kickass/kickassembler/maven-metadata.xml.md5 index 6b1d9a934..9ce4e1300 100644 --- a/repo/cml/kickass/kickassembler/maven-metadata.xml.md5 +++ b/repo/cml/kickass/kickassembler/maven-metadata.xml.md5 @@ -1 +1 @@ -50b97bdbdec01718f617ba829a5b7a34 \ No newline at end of file +eb9a688c8421032f2c423c5d756e86c1 \ No newline at end of file diff --git a/repo/cml/kickass/kickassembler/maven-metadata.xml.sha1 b/repo/cml/kickass/kickassembler/maven-metadata.xml.sha1 index 7d5dc49ee..40eba7077 100644 --- a/repo/cml/kickass/kickassembler/maven-metadata.xml.sha1 +++ b/repo/cml/kickass/kickassembler/maven-metadata.xml.sha1 @@ -1 +1 @@ -02f4562d6d64f6c5f0d97d8f443bbafc765445da \ No newline at end of file +9d03b6c6a791a7df649c2a2aa51e03d9f973f1dd \ No newline at end of file diff --git a/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu45GS02.java b/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu45GS02.java index 0d3c7e14b..c2ba0e238 100644 --- a/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu45GS02.java +++ b/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu45GS02.java @@ -17,88 +17,90 @@ public class Cpu45GS02 extends Cpu65xx { public Cpu45GS02() { super(NAME, Cpu65CE02.INSTANCE); - addOpcode(new int[]{0x42, 0x42, 0x5}, "orq", CpuAddressingMode.ZP, 8, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0x6}, "aslq", CpuAddressingMode.ZP, 12, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0xA}, "aslq", CpuAddressingMode.NON, 3, "AXYZcnz"); - addOpcode(new int[]{0x42, 0x42, 0xD}, "orq", CpuAddressingMode.ABS, 9, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0xE}, "aslq", CpuAddressingMode.ABS, 13, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0x12}, "orq", CpuAddressingMode.INZ, 10, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0x16}, "aslq", CpuAddressingMode.ZPX, 13, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0x1A}, "inq", CpuAddressingMode.NON, 3, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0x1E}, "aslq", CpuAddressingMode.ABS, 13, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0x24}, "bitq", CpuAddressingMode.ZP, 8, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0x25}, "andq", CpuAddressingMode.ZP, 8, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0x26}, "rolq", CpuAddressingMode.ZP, 12, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0x2A}, "rolq", CpuAddressingMode.NON, 3, "AXYZcnz"); - addOpcode(new int[]{0x42, 0x42, 0x2C}, "bitq", CpuAddressingMode.ABS, 8, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0x2D}, "andq", CpuAddressingMode.ABS, 9, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0x2E}, "rolq", CpuAddressingMode.ABS, 13, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0x32}, "andq", CpuAddressingMode.INZ, 10, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0x36}, "rolq", CpuAddressingMode.ZPX, 12, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0x3A}, "deq", CpuAddressingMode.NON, 3, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0x3E}, "rolq", CpuAddressingMode.ABS, 13, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0x43}, "asrq", CpuAddressingMode.NON, 3, "AXYZcnz"); - addOpcode(new int[]{0x42, 0x42, 0x44}, "asrq", CpuAddressingMode.ZP, 12, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0x45}, "eorq", CpuAddressingMode.ZP, 8, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0x46}, "lsrq", CpuAddressingMode.ZP, 12, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0x4A}, "lsrq", CpuAddressingMode.NON, 3, "AXYZcnz"); - addOpcode(new int[]{0x42, 0x42, 0x4D}, "eorq", CpuAddressingMode.ABS, 9, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0x4E}, "lsrq", CpuAddressingMode.ABS, 13, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0x52}, "eorq", CpuAddressingMode.INZ, 10, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0x54}, "asrq", CpuAddressingMode.ZPX, 12, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0x56}, "lsrq", CpuAddressingMode.ZPX, 12, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0x5E}, "lsrq", CpuAddressingMode.ABS, 13, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0x65}, "adcq", CpuAddressingMode.ZP, 8, "AXYZcvnz"); - addOpcode(new int[]{0x42, 0x42, 0x66}, "rorq", CpuAddressingMode.ZP, 12, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0x6A}, "rorq", CpuAddressingMode.NON, 3, "AXYZcnz"); - addOpcode(new int[]{0x42, 0x42, 0x6D}, "adcq", CpuAddressingMode.ABS, 9, "AXYZcvnz"); - addOpcode(new int[]{0x42, 0x42, 0x6E}, "rorq", CpuAddressingMode.ABS, 13, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0x72}, "adcq", CpuAddressingMode.INZ, 10, "AXYZcvnz"); - addOpcode(new int[]{0x42, 0x42, 0x76}, "rorq", CpuAddressingMode.ZPX, 12, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0x7E}, "rorq", CpuAddressingMode.ABS, 13, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0x82}, "stq", CpuAddressingMode.ISY, 10, ""); - addOpcode(new int[]{0x42, 0x42, 0x85}, "stq", CpuAddressingMode.ZP, 8, ""); - addOpcode(new int[]{0x42, 0x42, 0x8D}, "stq", CpuAddressingMode.ABS, 9, ""); - addOpcode(new int[]{0x42, 0x42, 0x92}, "stq", CpuAddressingMode.INZ, 10, ""); - addOpcode(new int[]{0x42, 0x42, 0xA1}, "ldq", CpuAddressingMode.ISY, 10, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0xA5}, "ldq", CpuAddressingMode.ZP, 8, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0xAD}, "ldq", CpuAddressingMode.ABS, 9, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0xB1}, "ldq", CpuAddressingMode.INZ, 10, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0xB2}, "ldq", CpuAddressingMode.INZ, 10, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0xB5}, "ldq", CpuAddressingMode.ZPX, 9, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0xB9}, "ldq", CpuAddressingMode.ABS, 10, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0xBD}, "ldq", CpuAddressingMode.ABS, 10, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0xC5}, "cpq", CpuAddressingMode.ZP, 8, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0xC6}, "deq", CpuAddressingMode.ZP, 12, "nz"); - addOpcode(new int[]{0x42, 0x42, 0xCD}, "cpq", CpuAddressingMode.ABS, 9, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0xCE}, "deq", CpuAddressingMode.ABS, 13, "nz"); - addOpcode(new int[]{0x42, 0x42, 0xD2}, "cpq", CpuAddressingMode.INZ, 10, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0xD6}, "deq", CpuAddressingMode.ZPX, 12, "nz"); - addOpcode(new int[]{0x42, 0x42, 0xDE}, "deq", CpuAddressingMode.ABS, 13, "nz"); - addOpcode(new int[]{0x42, 0x42, 0xE2}, "ldq", CpuAddressingMode.ISY, 10, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0xE5}, "sbcq", CpuAddressingMode.ZP, 8, "AXYZcvnz"); - addOpcode(new int[]{0x42, 0x42, 0xE6}, "inq", CpuAddressingMode.ZP, 13, "nz"); - addOpcode(new int[]{0x42, 0x42, 0xea, 0x12}, "orq", CpuAddressingMode.LIN, 13, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0xea, 0x32}, "andq", CpuAddressingMode.LIN, 13, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0xea, 0x52}, "eorq", CpuAddressingMode.LIN, 13, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0xea, 0x72}, "adcq", CpuAddressingMode.LIN, 13, "AXYZcvnz"); - addOpcode(new int[]{0x42, 0x42, 0xea, 0x92}, "stq", CpuAddressingMode.LIN, 13, ""); - addOpcode(new int[]{0x42, 0x42, 0xea, 0xB2}, "ldq", CpuAddressingMode.LIN, 13, "AXYZnz"); - addOpcode(new int[]{0x42, 0x42, 0xea, 0xD2}, "cpq", CpuAddressingMode.LIN, 13, "cnz"); - addOpcode(new int[]{0x42, 0x42, 0xea, 0xF2}, "sbcq", CpuAddressingMode.LIN, 13, "AXYZcvnz"); - addOpcode(new int[]{0x42, 0x42, 0xED}, "sbcq", CpuAddressingMode.ABS, 9, "AXYZcvnz"); - addOpcode(new int[]{0x42, 0x42, 0xEE}, "inq", CpuAddressingMode.ABS, 14, "nz"); - addOpcode(new int[]{0x42, 0x42, 0xF2}, "sbcq", CpuAddressingMode.INZ, 10, "AXYZcvnz"); - addOpcode(new int[]{0x42, 0x42, 0xF6}, "inq", CpuAddressingMode.ZPX, 13, "nz"); - addOpcode(new int[]{0x42, 0x42, 0xFE}, "inq", CpuAddressingMode.ABS, 14, "nz"); - addOpcode(new int[]{0xea, 0x12}, "ora", CpuAddressingMode.LIZ, 7, "Anz"); - addOpcode(new int[]{0xea, 0x32}, "and", CpuAddressingMode.LIZ, 7, "Anz"); - addOpcode(new int[]{0xea, 0x52}, "eor", CpuAddressingMode.LIZ, 7, "Anz"); - addOpcode(new int[]{0xea, 0x72}, "adc", CpuAddressingMode.LIZ, 7, "Acvnz"); - addOpcode(new int[]{0xea, 0x92}, "sta", CpuAddressingMode.LIZ, 8, ""); - addOpcode(new int[]{0xea, 0xB2}, "lda", CpuAddressingMode.LIZ, 7, "Anz"); - addOpcode(new int[]{0xea, 0xD2}, "cmp", CpuAddressingMode.LIZ, 7, "cnz"); - addOpcode(new int[]{0xea, 0xF2}, "sbc", CpuAddressingMode.LIZ, 8, "Acvnz"); + + addOpcode( new int[] {0x42, 0x42, 0x5},"orq",CpuAddressingMode.ZP,8,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0x6},"aslq",CpuAddressingMode.ZP,12,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0xA},"aslq",CpuAddressingMode.NON,3,"AXYZcnz"); + addOpcode( new int[] {0x42, 0x42, 0xD},"orq",CpuAddressingMode.ABS,9,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0xE},"aslq",CpuAddressingMode.ABS,13,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0x12},"orq",CpuAddressingMode.INZ,10,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0x16},"aslq",CpuAddressingMode.ZPX,13,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0x1A},"inq",CpuAddressingMode.NON,3,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0x1E},"aslq",CpuAddressingMode.ABX,13,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0x24},"bitq",CpuAddressingMode.ZP,8,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0x25},"andq",CpuAddressingMode.ZP,8,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0x26},"rolq",CpuAddressingMode.ZP,12,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0x2A},"rolq",CpuAddressingMode.NON,3,"AXYZcnz"); + addOpcode( new int[] {0x42, 0x42, 0x2C},"bitq",CpuAddressingMode.ABS,8,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0x2D},"andq",CpuAddressingMode.ABS,9,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0x2E},"rolq",CpuAddressingMode.ABS,13,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0x32},"andq",CpuAddressingMode.INZ,10,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0x36},"rolq",CpuAddressingMode.ZPX,12,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0x3A},"deq",CpuAddressingMode.NON,3,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0x3E},"rolq",CpuAddressingMode.ABX,13,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0x43},"asrq",CpuAddressingMode.NON,3,"AXYZcnz"); + addOpcode( new int[] {0x42, 0x42, 0x44},"asrq",CpuAddressingMode.ZP,12,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0x45},"eorq",CpuAddressingMode.ZP,8,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0x46},"lsrq",CpuAddressingMode.ZP,12,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0x4A},"lsrq",CpuAddressingMode.NON,3,"AXYZcnz"); + addOpcode( new int[] {0x42, 0x42, 0x4D},"eorq",CpuAddressingMode.ABS,9,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0x4E},"lsrq",CpuAddressingMode.ABS,13,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0x52},"eorq",CpuAddressingMode.INZ,10,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0x54},"asrq",CpuAddressingMode.ZPX,12,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0x56},"lsrq",CpuAddressingMode.ZPX,12,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0x5E},"lsrq",CpuAddressingMode.ABX,13,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0x65},"adcq",CpuAddressingMode.ZP,8,"AXYZcvnz"); + addOpcode( new int[] {0x42, 0x42, 0x66},"rorq",CpuAddressingMode.ZP,12,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0x6A},"rorq",CpuAddressingMode.NON,3,"AXYZcnz"); + addOpcode( new int[] {0x42, 0x42, 0x6D},"adcq",CpuAddressingMode.ABS,9,"AXYZcvnz"); + addOpcode( new int[] {0x42, 0x42, 0x6E},"rorq",CpuAddressingMode.ABS,13,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0x72},"adcq",CpuAddressingMode.INZ,10,"AXYZcvnz"); + addOpcode( new int[] {0x42, 0x42, 0x76},"rorq",CpuAddressingMode.ZPX,12,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0x7E},"rorq",CpuAddressingMode.ABX,13,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0x82},"stq",CpuAddressingMode.ISY,10,""); + addOpcode( new int[] {0x42, 0x42, 0x85},"stq",CpuAddressingMode.ZP,8,""); + addOpcode( new int[] {0x42, 0x42, 0x8D},"stq",CpuAddressingMode.ABS,9,""); + addOpcode( new int[] {0x42, 0x42, 0x92},"stq",CpuAddressingMode.INZ,10,""); + addOpcode( new int[] {0x42, 0x42, 0xA1},"ldq",CpuAddressingMode.IZX,10,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0xA5},"ldq",CpuAddressingMode.ZP,8,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0xAD},"ldq",CpuAddressingMode.ABS,9,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0xB1},"ldq",CpuAddressingMode.IZY,10,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0xB2},"ldq",CpuAddressingMode.INZ,10,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0xB5},"ldq",CpuAddressingMode.ZPX,9,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0xB9},"ldq",CpuAddressingMode.ABY,10,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0xBD},"ldq",CpuAddressingMode.ABX,10,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0xC5},"cpq",CpuAddressingMode.ZP,8,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0xC6},"deq",CpuAddressingMode.ZP,12,"nz"); + addOpcode( new int[] {0x42, 0x42, 0xCD},"cpq",CpuAddressingMode.ABS,9,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0xCE},"deq",CpuAddressingMode.ABS,13,"nz"); + addOpcode( new int[] {0x42, 0x42, 0xD2},"cpq",CpuAddressingMode.INZ,10,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0xD6},"deq",CpuAddressingMode.ZPX,12,"nz"); + addOpcode( new int[] {0x42, 0x42, 0xDE},"deq",CpuAddressingMode.ABX,13,"nz"); + addOpcode( new int[] {0x42, 0x42, 0xE2},"ldq",CpuAddressingMode.ISY,10,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0xE5},"sbcq",CpuAddressingMode.ZP,8,"AXYZcvnz"); + addOpcode( new int[] {0x42, 0x42, 0xE6},"inq",CpuAddressingMode.ZP,13,"nz"); + addOpcode( new int[] {0x42, 0x42, 0xea, 0x12},"orq",CpuAddressingMode.LIN,13,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0xea, 0x32},"andq",CpuAddressingMode.LIN,13,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0xea, 0x52},"eorq",CpuAddressingMode.LIN,13,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0xea, 0x72},"adcq",CpuAddressingMode.LIN,13,"AXYZcvnz"); + addOpcode( new int[] {0x42, 0x42, 0xea, 0x92},"stq",CpuAddressingMode.LIN,13,""); + addOpcode( new int[] {0x42, 0x42, 0xea, 0xB2},"ldq",CpuAddressingMode.LIN,13,"AXYZnz"); + addOpcode( new int[] {0x42, 0x42, 0xea, 0xD2},"cpq",CpuAddressingMode.LIN,13,"cnz"); + addOpcode( new int[] {0x42, 0x42, 0xea, 0xF2},"sbcq",CpuAddressingMode.LIN,13,"AXYZcvnz"); + addOpcode( new int[] {0x42, 0x42, 0xED},"sbcq",CpuAddressingMode.ABS,9,"AXYZcvnz"); + addOpcode( new int[] {0x42, 0x42, 0xEE},"inq",CpuAddressingMode.ABS,14,"nz"); + addOpcode( new int[] {0x42, 0x42, 0xF2},"sbcq",CpuAddressingMode.INZ,10,"AXYZcvnz"); + addOpcode( new int[] {0x42, 0x42, 0xF6},"inq",CpuAddressingMode.ZPX,13,"nz"); + addOpcode( new int[] {0x42, 0x42, 0xFE},"inq",CpuAddressingMode.ABX,14,"nz"); + addOpcode( new int[] {0xea, 0x12},"ora",CpuAddressingMode.LIZ,7,"Anz"); + addOpcode( new int[] {0xea, 0x32},"and",CpuAddressingMode.LIZ,7,"Anz"); + addOpcode( new int[] {0xea, 0x52},"eor",CpuAddressingMode.LIZ,7,"Anz"); + addOpcode( new int[] {0xea, 0x72},"adc",CpuAddressingMode.LIZ,7,"Acvnz"); + addOpcode( new int[] {0xea, 0x92},"sta",CpuAddressingMode.LIZ,8,""); + addOpcode( new int[] {0xea, 0xB2},"lda",CpuAddressingMode.LIZ,7,"Anz"); + addOpcode( new int[] {0xea, 0xD2},"cmp",CpuAddressingMode.LIZ,7,"cnz"); + addOpcode( new int[] {0xea, 0xF2},"sbc",CpuAddressingMode.LIZ,8,"Acvnz"); + // TODO: Disable NOP? } diff --git a/src/main/repo/mvn-repo-install.sh b/src/main/repo/mvn-repo-install.sh index 678c9e456..ace6b5ccc 100755 --- a/src/main/repo/mvn-repo-install.sh +++ b/src/main/repo/mvn-repo-install.sh @@ -4,7 +4,7 @@ cp ./repo/cml/kickass/kickassembler/maven-metadata.xml ./repo/cml/kickass/kickassembler/maven-metadata-local.xml # mvn install:install-file -Dmaven.repo.local=./repo/ -Dfile=/Applications/KickAssembler/KickAss.jar -DgroupId=cml.kickass -DartifactId=kickassembler -Dpackaging=jar -DgeneratePom=true -DcreateChecksum=true -Dversion=5.16 -mvn install:install-file -Dmaven.repo.local=./repo/ -Dfile=/Users/jespergravgaard/c64/kickassembler65ce02/out/KickAss65CE02.jar -DgroupId=cml.kickass -DartifactId=kickassembler -Dpackaging=jar -DgeneratePom=true -DcreateChecksum=true -Dversion=5.16-65ce02.e +mvn install:install-file -Dmaven.repo.local=./repo/ -Dfile=/Users/jespergravgaard/c64/kickassembler65ce02/out/KickAss65CE02.jar -DgroupId=cml.kickass -DartifactId=kickassembler -Dpackaging=jar -DgeneratePom=true -DcreateChecksum=true -Dversion=5.16-65ce02.g # Finalize by making the local metadata official pushd ./repo/cml/kickass/kickassembler diff --git a/src/test/java/dk/camelot64/cpufamily6502/TestCpuFamilyKickAssCompatibility.java b/src/test/java/dk/camelot64/cpufamily6502/TestCpuFamilyKickAssCompatibility.java index 5bc29cf81..ab0a401cd 100644 --- a/src/test/java/dk/camelot64/cpufamily6502/TestCpuFamilyKickAssCompatibility.java +++ b/src/test/java/dk/camelot64/cpufamily6502/TestCpuFamilyKickAssCompatibility.java @@ -1,9 +1,6 @@ package dk.camelot64.cpufamily6502; -import dk.camelot64.cpufamily6502.cpus.Cpu6502Illegal; -import dk.camelot64.cpufamily6502.cpus.Cpu6502Official; -import dk.camelot64.cpufamily6502.cpus.Cpu65C02; -import dk.camelot64.cpufamily6502.cpus.Cpu65CE02; +import dk.camelot64.cpufamily6502.cpus.*; import kickass._65xx._65xxArgType; import kickass._65xx.cpus.*; import org.junit.Assert; @@ -36,6 +33,11 @@ public class TestCpuFamilyKickAssCompatibility { assertOpcodesMatch(Cpu65CE02.INSTANCE, CPU_65CE02.instance); } + @Test + public void testOpcodes45GS02() { + assertOpcodesMatch(Cpu45GS02.INSTANCE, CPU_45GS02.instance); + } + private void assertOpcodesMatch(Cpu65xx kcCpu, Cpu kaCpu) { final Collection kcAllOpcodes = kcCpu.getAllOpcodes(); final Map kaAllMnemonics = kaCpu.mnemonics; @@ -55,7 +57,22 @@ public class TestCpuFamilyKickAssCompatibility { final int kaOpcodeRaw = kaOpcodes[kaArgTypeIdx]; if(kaOpcodeRaw >= 0) { found = true; - final int[] kaOpcode = new int[]{kaOpcodeRaw}; + int[] kaOpcode; + if(kcOpcode.getOpcode().length==1) { + kaOpcode = new int[]{kaOpcodeRaw}; + } else { + List kaOpcodeList = new ArrayList<>(); + if(CPU_45GS02.R32_MNEMONICS.contains(kcOpcode.getMnemonic())) { + kaOpcodeList.add((int)CPU_45GS02.R32_OPCODE_PREFIX); + kaOpcodeList.add((int)CPU_45GS02.R32_OPCODE_PREFIX); + } + if (kaArgType == _65xxArgType.indirect32ZeropageZ || kaArgType == _65xxArgType.indirect32Zeropage) { + // Make sure the prefix is unsigned + kaOpcodeList.add(CPU_45GS02.A32_OPCODE_PREFIX&0xff); + } + kaOpcodeList.add(kaOpcodeRaw); + kaOpcode = kaOpcodeList.stream().mapToInt(i->i).toArray(); + } Assert.assertArrayEquals("KickAss opcode not matching for mnemonic " + kcOpcode.toString(), kcOpcode.getOpcode(), kaOpcode); } }