diff --git a/src/main/java/dk/camelot64/kickc/Compiler.java b/src/main/java/dk/camelot64/kickc/Compiler.java
index 4aa094967..7de0ea183 100644
--- a/src/main/java/dk/camelot64/kickc/Compiler.java
+++ b/src/main/java/dk/camelot64/kickc/Compiler.java
@@ -22,7 +22,6 @@ public class Compiler {
          Program program = pass1GenerateSSA(file, log);
          pass2OptimizeSSA(program);
          pass3RegisterAllocation(program);
-         pass4GenerateAsm(program);
          pass5OptimizeAsm(program);
 
          log.append("FINAL SYMBOL TABLE");
@@ -57,15 +56,6 @@ public class Compiler {
       }
    }
 
-   public void pass4GenerateAsm(Program program) {
-
-      Pass4CodeGeneration pass4CodeGeneration = new Pass4CodeGeneration(program);
-      pass4CodeGeneration.generate();
-
-      program.getLog().append("INITIAL ASM");
-      program.getLog().append(program.getAsm().toString());
-   }
-
 
    private void pass3RegisterAllocation(Program program) {
 
@@ -108,21 +98,28 @@ public class Compiler {
       program.getLog().append("NATURAL LOOPS WITH DEPTH");
       program.getLog().append(program.getLoopSet().toString());
 
-      new Pass3ZeroPageAllocation(program).allocate();
-
       new Pass3VariableRegisterWeightAnalysis(program).findWeights();
       program.getLog().append("\nVARIABLE REGISTER WEIGHTS");
       program.getLog().append(program.getScope().getSymbolTableContents(program ,Variable.class));
 
+      new Pass3ZeroPageAllocation(program).allocate();
       new Pass3RegistersFinalize(program).allocate();
-      new Pass3AssertNoCpuClobber(program).check();
 
+      // Initial Code generation
+      new Pass3CodeGeneration(program).generate();
+      new Pass3AssertNoCpuClobber(program).check();
+      program.getLog().append("INITIAL ASM");
+      program.getLog().append(program.getAsm().toString());
+
+      // Register allocation optimization
       new Pass3RegisterUplifting(program).uplift();
       program.getLog().append("REGISTER UPLIFTING");
       program.getLog().append(program.getScope().getSymbolTableContents(program, Variable.class));
       new Pass3AssertNoCpuClobber(program).check();
 
+      // Final register coalesce and code generation
       new Pass3ZeroPageCoalesce(program).allocate();
+      new Pass3CodeGeneration(program).generate();
       new Pass3AssertNoCpuClobber(program).check();
 
       //new Pass3CustomRegisters(program).setRegister();
diff --git a/src/main/java/dk/camelot64/kickc/asm/AsmProgram.java b/src/main/java/dk/camelot64/kickc/asm/AsmProgram.java
index 3d57bab75..ac27b16c9 100644
--- a/src/main/java/dk/camelot64/kickc/asm/AsmProgram.java
+++ b/src/main/java/dk/camelot64/kickc/asm/AsmProgram.java
@@ -121,4 +121,18 @@ public class AsmProgram {
    }
 
 
+   /**
+    * Get all segments representing a specific ICL statement
+    * @param statementIndex The statement index
+    * @return The ASM segments representing the statement
+    * */
+   public Collection<AsmSegment> getSegmentsByStatementIndex(int statementIndex) {
+      List<AsmSegment> statementSegments = new ArrayList<>();
+      for (AsmSegment segment : segments) {
+         if(segment.getStatementIdx()!=null && segment.getStatementIdx()==statementIndex) {
+            statementSegments.add(segment);
+         }
+      }
+      return statementSegments;
+   }
 }
diff --git a/src/main/java/dk/camelot64/kickc/icl/ControlFlowGraph.java b/src/main/java/dk/camelot64/kickc/icl/ControlFlowGraph.java
index dbd3f1e1a..fec2c990e 100644
--- a/src/main/java/dk/camelot64/kickc/icl/ControlFlowGraph.java
+++ b/src/main/java/dk/camelot64/kickc/icl/ControlFlowGraph.java
@@ -192,4 +192,20 @@ public class ControlFlowGraph {
       return result;
    }
 
+   /**
+    * Get a statement from its statement index
+    * @param statementIdx The statement index
+    * @return The statement
+    */
+   public Statement getStatementByIndex(int statementIdx) {
+      for (ControlFlowBlock block : getAllBlocks()) {
+         for (Statement statement : block.getStatements()) {
+            if(statementIdx==statement.getIndex()) {
+               return statement;
+            }
+         }
+      }
+      return null;
+   }
+
 }
diff --git a/src/main/java/dk/camelot64/kickc/passes/Pass3AssertNoCpuClobber.java b/src/main/java/dk/camelot64/kickc/passes/Pass3AssertNoCpuClobber.java
index 3022fffba..d57ce595e 100644
--- a/src/main/java/dk/camelot64/kickc/passes/Pass3AssertNoCpuClobber.java
+++ b/src/main/java/dk/camelot64/kickc/passes/Pass3AssertNoCpuClobber.java
@@ -1,8 +1,7 @@
 package dk.camelot64.kickc.passes;
 
-import dk.camelot64.kickc.asm.AsmInstruction;
-import dk.camelot64.kickc.asm.AsmLine;
 import dk.camelot64.kickc.asm.AsmProgram;
+import dk.camelot64.kickc.asm.AsmSegment;
 import dk.camelot64.kickc.asm.parser.AsmClobber;
 import dk.camelot64.kickc.icl.*;
 
@@ -17,52 +16,50 @@ public class Pass3AssertNoCpuClobber extends Pass2Base {
       super(program);
    }
 
-   /** Check that no statement clobbers a CPU register used by an alive variable */
+   /**
+    * Check that no statement clobbers a CPU register used by an alive variable
+    */
    public void check() {
-      if(hasClobberProblem(true, null)) {
+      if (hasClobberProblem(true)) {
          throw new RuntimeException("CLOBBER ERROR! See log for more info.");
       }
    }
 
    /**
-    * Determines whether any statement in the program clobbers a CPU register used by an alive variable
+    * Determines whether any statement in the ASM program that clobbers a CPU register used by an alive variable
+    *
     * @return true if there is a clobber problem in the program
     */
-   public boolean hasClobberProblem(boolean verbose, RegisterAllocation.Register register) {
+   public boolean hasClobberProblem(boolean verbose) {
       RegisterAllocation allocation = getProgram().getAllocation();
       LiveRangeVariables liveRangeVariables = getProgram().getLiveRangeVariables();
+      AsmProgram asm = getProgram().getAsm();
       boolean clobberProblem = false;
-      Pass4CodeGeneration.AsmCodegenAluState aluState = new Pass4CodeGeneration.AsmCodegenAluState();
-      int registerCycles = 0;
-      for (ControlFlowBlock block : getGraph().getAllBlocks()) {
-         for (Statement statement : block.getStatements()) {
-
-            // Generate ASM and find clobber
-            AsmProgram asm = getAsmProgram(statement, block, aluState);
-            Collection<RegisterAllocation.Register> clobberRegisters = getClobberedRegisters(asm);
-
+      for (AsmSegment asmSegment : asm.getSegments()) {
+         if (asmSegment.getStatementIdx() != null) {
+            // Find the ICL statement
+            int statementIdx = asmSegment.getStatementIdx();
+            Statement statement = getGraph().getStatementByIndex(statementIdx);
+            // Find the registered clobbered by the ASM asmSegment
+            AsmClobber asmSegmentClobber = asmSegment.getClobber();
+            Collection<RegisterAllocation.Register> clobberRegisters = getClobberRegisters(asmSegmentClobber);
             // Find alive variables
             List<VariableRef> aliveVars = new ArrayList<>(liveRangeVariables.getAlive(statement));
-
             // Find vars assignedVars to
             Collection<VariableRef> assignedVars = getAssignedVars(statement);
-
             for (VariableRef aliveVar : aliveVars) {
                RegisterAllocation.Register aliveVarRegister = allocation.getRegister(aliveVar);
-               if(aliveVarRegister.isZp()) {
+               if (aliveVarRegister.isZp()) {
                   // No need to check a zp-register - here we are only interested in CPU registers
                   continue;
                }
-               if(aliveVarRegister.equals(register)) {
-                  registerCycles += asm.getCycles();
-               }
-               if(assignedVars.contains(aliveVar)) {
+               if (assignedVars.contains(aliveVar)) {
                   // No need to register that is assigned by the statement - it will be clobbered
                   continue;
                }
                // Alive and not assigned to - clobber not allowed!
-               if(clobberRegisters.contains(aliveVarRegister)) {
-                  if(verbose) {
+               if (clobberRegisters.contains(aliveVarRegister)) {
+                  if (verbose) {
                      getLog().append("Error! Alive variable " + aliveVar + " register " + aliveVarRegister + " clobbered by the ASM generated by statement " + statement);
                      getLog().append(asm.toString(false));
                   }
@@ -71,9 +68,6 @@ public class Pass3AssertNoCpuClobber extends Pass2Base {
             }
          }
       }
-      if(!clobberProblem && register!=null) {
-         getLog().append("Register Cycles: "+register+" "+registerCycles);
-      }
       return clobberProblem;
    }
 
@@ -86,12 +80,12 @@ public class Pass3AssertNoCpuClobber extends Pass2Base {
     */
    private Collection<VariableRef> getAssignedVars(Statement statement) {
       List<VariableRef> assignedVars = new ArrayList<>();
-      if(statement instanceof StatementAssignment) {
+      if (statement instanceof StatementAssignment) {
          StatementAssignment assignment = (StatementAssignment) statement;
-         if(assignment.getlValue() instanceof VariableRef) {
+         if (assignment.getlValue() instanceof VariableRef) {
             assignedVars.add((VariableRef) assignment.getlValue());
          }
-      } else if(statement instanceof StatementPhiBlock) {
+      } else if (statement instanceof StatementPhiBlock) {
          StatementPhiBlock phi = (StatementPhiBlock) statement;
          for (StatementPhiBlock.PhiVariable phiVariable : phi.getPhiVariables()) {
             assignedVars.add(phiVariable.getVariable());
@@ -106,33 +100,18 @@ public class Pass3AssertNoCpuClobber extends Pass2Base {
     * @param asm The assembler to check
     * @return The clobbered CPU registers
     */
-   private Collection<RegisterAllocation.Register> getClobberedRegisters(AsmProgram asm) {
-      AsmClobber clobber = asm.getClobber();
+   private Collection<RegisterAllocation.Register> getClobberRegisters(AsmClobber clobber) {
       List<RegisterAllocation.Register> clobberRegisters = new ArrayList<>();
-      if(clobber.isClobberA()) {
+      if (clobber.isClobberA()) {
          clobberRegisters.add(RegisterAllocation.getRegisterA());
       }
-      if(clobber.isClobberX()) {
+      if (clobber.isClobberX()) {
          clobberRegisters.add(RegisterAllocation.getRegisterX());
       }
-      if(clobber.isClobberY()) {
+      if (clobber.isClobberY()) {
          clobberRegisters.add(RegisterAllocation.getRegisterY());
       }
       return clobberRegisters;
    }
 
-   /**
-    * Get the ASM program generated by a specific statement in the program
-    *
-    * @param statement The statement
-    * @param block The block containing the statement
-    * @return The ASM code
-    */
-   private AsmProgram getAsmProgram(Statement statement, ControlFlowBlock block, Pass4CodeGeneration.AsmCodegenAluState aluState) {
-      Pass4CodeGeneration codegen = new Pass4CodeGeneration(getProgram());
-      AsmProgram asm = new AsmProgram();
-      codegen.generateStatementAsm(asm, block, statement, aluState);
-      return asm;
-   }
-
 }
diff --git a/src/main/java/dk/camelot64/kickc/passes/Pass4CodeGeneration.java b/src/main/java/dk/camelot64/kickc/passes/Pass3CodeGeneration.java
similarity index 99%
rename from src/main/java/dk/camelot64/kickc/passes/Pass4CodeGeneration.java
rename to src/main/java/dk/camelot64/kickc/passes/Pass3CodeGeneration.java
index c1d8159af..965aa5d4c 100644
--- a/src/main/java/dk/camelot64/kickc/passes/Pass4CodeGeneration.java
+++ b/src/main/java/dk/camelot64/kickc/passes/Pass3CodeGeneration.java
@@ -8,12 +8,12 @@ import java.util.*;
 /**
  * Code Generation of 6502 Assembler from ICL/SSA Control Flow Graph
  */
-public class Pass4CodeGeneration {
+public class Pass3CodeGeneration {
 
 
    private Program program;
 
-   public Pass4CodeGeneration(Program program) {
+   public Pass3CodeGeneration(Program program) {
       this.program = program;
    }
 
diff --git a/src/main/java/dk/camelot64/kickc/passes/Pass3RegisterUplifting.java b/src/main/java/dk/camelot64/kickc/passes/Pass3RegisterUplifting.java
index cf25b687a..6ec88cf81 100644
--- a/src/main/java/dk/camelot64/kickc/passes/Pass3RegisterUplifting.java
+++ b/src/main/java/dk/camelot64/kickc/passes/Pass3RegisterUplifting.java
@@ -60,8 +60,9 @@ public class Pass3RegisterUplifting extends Pass2Base {
          allocation.setRegister(var, register);
       }
       getProgram().setAllocation(allocation);
+      new Pass3CodeGeneration(getProgram()).generate();
       Pass3AssertNoCpuClobber clobber = new Pass3AssertNoCpuClobber(getProgram());
-      if (clobber.hasClobberProblem(false, register)) {
+      if (clobber.hasClobberProblem(false)) {
          getLog().append("Uplift to " + register + " resulted in clobber.");
       } else {
          getLog().append("Uplift to " + register + " succesfull.");
diff --git a/src/main/java/dk/camelot64/kickc/test/ref/bresenham.log b/src/main/java/dk/camelot64/kickc/test/ref/bresenham.log
index 85e4a927a..7c9cf381a 100644
--- a/src/main/java/dk/camelot64/kickc/test/ref/bresenham.log
+++ b/src/main/java/dk/camelot64/kickc/test/ref/bresenham.log
@@ -1041,20 +1041,6 @@ Found 1 loops in scope []
 NATURAL LOOPS WITH DEPTH
 Loop head: @1 tails: @3 blocks: @3 @1 @2  depth: 1
 
-Initial phi equivalence classes
-[ cursor#3 cursor#5 cursor#1 cursor#2 ]
-[ x#2 x#1 ]
-[ e#3 e#5 e#1 e#2 ]
-[ y#2 y#4 y#1 ]
-Complete equivalence classes
-[ cursor#3 cursor#5 cursor#1 cursor#2 ]
-[ x#2 x#1 ]
-[ e#3 e#5 e#1 e#2 ]
-[ y#2 y#4 y#1 ]
-Allocated zp ptr byte:2 to zp ptr byte:2 [ cursor#3 cursor#5 cursor#1 cursor#2 ]
-Allocated zp byte:4 to zp byte:4 [ x#2 x#1 ]
-Allocated zp byte:5 to zp byte:5 [ e#3 e#5 e#1 e#2 ]
-Allocated zp byte:6 to zp byte:6 [ y#2 y#4 y#1 ]
 
 VARIABLE REGISTER WEIGHTS
 (byte[1000]) SCREEN
@@ -1083,48 +1069,20 @@ VARIABLE REGISTER WEIGHTS
 (byte) y1
 (byte) yd
 
-zp ptr byte:2 [ cursor#3 cursor#5 cursor#1 cursor#2 ]
-zp byte:4 [ x#2 x#1 ]
-zp byte:5 [ e#3 e#5 e#1 e#2 ]
-zp byte:6 [ y#2 y#4 y#1 ]
-
-Uplifting max weight 55.0 live range equivalence class zp byte:5 [ e#3 e#5 e#1 e#2 ]
-Uplift to reg byte a resulted in clobber.
-Register Cycles: reg byte x 78
-Uplift to reg byte x succesfull.
-Uplift to reg byte y resulted in clobber.
-REGISTER UPLIFTING
-(byte[1000]) SCREEN
-(byte) STAR
-(byte*) cursor
-(byte*) cursor#1 zp ptr byte:2 8.25
-(byte*) cursor#2 zp ptr byte:2 11.0
-(byte*) cursor#3 zp ptr byte:2 11.0
-(byte*) cursor#5 zp ptr byte:2 16.5
-(byte) e
-(byte) e#1 zp byte:5 11.0
-(byte) e#2 zp byte:5 22.0
-(byte) e#3 zp byte:5 5.5
-(byte) e#5 zp byte:5 16.5
-(byte) x
-(byte) x#1 zp byte:4 3.666666666666667
-(byte) x#2 zp byte:4 11.0
-(byte) x0
-(byte) x1
-(byte) xd
-(byte) y
-(byte) y#1 zp byte:6 7.333333333333333
-(byte) y#2 zp byte:6 5.5
-(byte) y#4 zp byte:6 16.5
-(byte) y0
-(byte) y1
-(byte) yd
-
-zp ptr byte:2 [ cursor#3 cursor#5 cursor#1 cursor#2 ]
-zp byte:4 [ x#2 x#1 ]
-zp byte:5 [ e#3 e#5 e#1 e#2 ]
-zp byte:6 [ y#2 y#4 y#1 ]
-
+Initial phi equivalence classes
+[ cursor#3 cursor#5 cursor#1 cursor#2 ]
+[ x#2 x#1 ]
+[ e#3 e#5 e#1 e#2 ]
+[ y#2 y#4 y#1 ]
+Complete equivalence classes
+[ cursor#3 cursor#5 cursor#1 cursor#2 ]
+[ x#2 x#1 ]
+[ e#3 e#5 e#1 e#2 ]
+[ y#2 y#4 y#1 ]
+Allocated zp ptr byte:2 to zp ptr byte:2 [ cursor#3 cursor#5 cursor#1 cursor#2 ]
+Allocated zp byte:4 to zp byte:4 [ x#2 x#1 ]
+Allocated zp byte:5 to zp byte:5 [ e#3 e#5 e#1 e#2 ]
+Allocated zp byte:6 to zp byte:6 [ y#2 y#4 y#1 ]
 INITIAL ASM
 //SEG0 @BEGIN
 BBEGIN:
@@ -1213,6 +1171,42 @@ B3_from_B2:
 //SEG31 [6] phi (byte*) cursor#5 = (byte*) cursor#2 -- register_copy 
   jmp B3
 
+Uplifting max weight 55.0 live range equivalence class zp byte:5 [ e#3 e#5 e#1 e#2 ]
+Uplift to reg byte a resulted in clobber.
+Uplift to reg byte x succesfull.
+Uplift to reg byte y resulted in clobber.
+REGISTER UPLIFTING
+(byte[1000]) SCREEN
+(byte) STAR
+(byte*) cursor
+(byte*) cursor#1 zp ptr byte:2 8.25
+(byte*) cursor#2 zp ptr byte:2 11.0
+(byte*) cursor#3 zp ptr byte:2 11.0
+(byte*) cursor#5 zp ptr byte:2 16.5
+(byte) e
+(byte) e#1 zp byte:5 11.0
+(byte) e#2 zp byte:5 22.0
+(byte) e#3 zp byte:5 5.5
+(byte) e#5 zp byte:5 16.5
+(byte) x
+(byte) x#1 zp byte:4 3.666666666666667
+(byte) x#2 zp byte:4 11.0
+(byte) x0
+(byte) x1
+(byte) xd
+(byte) y
+(byte) y#1 zp byte:6 7.333333333333333
+(byte) y#2 zp byte:6 5.5
+(byte) y#4 zp byte:6 16.5
+(byte) y0
+(byte) y1
+(byte) yd
+
+zp ptr byte:2 [ cursor#3 cursor#5 cursor#1 cursor#2 ]
+zp byte:4 [ x#2 x#1 ]
+zp byte:5 [ e#3 e#5 e#1 e#2 ]
+zp byte:6 [ y#2 y#4 y#1 ]
+
 Removing instruction jmp B1
 Removing instruction jmp B3
 Removing instruction jmp BEND
diff --git a/src/main/java/dk/camelot64/kickc/test/ref/fibmem.log b/src/main/java/dk/camelot64/kickc/test/ref/fibmem.log
index 87c7bfdcd..d8a47daf8 100644
--- a/src/main/java/dk/camelot64/kickc/test/ref/fibmem.log
+++ b/src/main/java/dk/camelot64/kickc/test/ref/fibmem.log
@@ -415,6 +415,16 @@ Found 1 loops in scope []
 NATURAL LOOPS WITH DEPTH
 Loop head: @1 tails: @1 blocks: @1  depth: 1
 
+
+VARIABLE REGISTER WEIGHTS
+(byte~) $1 11.0
+(byte~) $3 22.0
+(byte~) $4 22.0
+(byte[15]) fibs
+(byte) i
+(byte) i#1 16.5
+(byte) i#2 11.0
+
 Initial phi equivalence classes
 [ i#2 i#1 ]
 Added variable $1 to zero page equivalence class [ $1 ]
@@ -429,42 +439,6 @@ Allocated zp byte:2 to zp byte:2 [ i#2 i#1 ]
 Allocated zp byte:3 to zp byte:3 [ $1 ]
 Allocated zp byte:4 to zp byte:4 [ $3 ]
 Allocated zp byte:5 to zp byte:5 [ $4 ]
-
-VARIABLE REGISTER WEIGHTS
-(byte~) $1 11.0
-(byte~) $3 22.0
-(byte~) $4 22.0
-(byte[15]) fibs
-(byte) i
-(byte) i#1 16.5
-(byte) i#2 11.0
-
-zp byte:2 [ i#2 i#1 ]
-zp byte:3 [ $1 ]
-zp byte:4 [ $3 ]
-zp byte:5 [ $4 ]
-
-Uplifting max weight 27.5 live range equivalence class zp byte:2 [ i#2 i#1 ]
-Uplift to reg byte a resulted in clobber.
-Register Cycles: reg byte x 39
-Uplift to reg byte x succesfull.
-Register Cycles: reg byte y 39
-Uplift to reg byte y succesfull.
-REGISTER UPLIFTING
-(byte~) $1 zp byte:3 11.0
-(byte~) $3 zp byte:4 22.0
-(byte~) $4 zp byte:5 22.0
-(byte[15]) fibs
-(byte) i
-(byte) i#1 zp byte:2 16.5
-(byte) i#2 zp byte:2 11.0
-
-zp byte:2 [ i#2 i#1 ]
-zp byte:3 [ $1 ]
-zp byte:4 [ $3 ]
-zp byte:5 [ $4 ]
-
-Coalescing zero page register [ zp byte:3 [ $1 ] ] with [ zp byte:5 [ $4 ] ]
 INITIAL ASM
 //SEG0 @BEGIN
 BBEGIN:
@@ -513,6 +487,25 @@ B1:
 //SEG14 @END
 BEND:
 
+Uplifting max weight 27.5 live range equivalence class zp byte:2 [ i#2 i#1 ]
+Uplift to reg byte a resulted in clobber.
+Uplift to reg byte x succesfull.
+Uplift to reg byte y succesfull.
+REGISTER UPLIFTING
+(byte~) $1 zp byte:3 11.0
+(byte~) $3 zp byte:4 22.0
+(byte~) $4 zp byte:5 22.0
+(byte[15]) fibs
+(byte) i
+(byte) i#1 zp byte:2 16.5
+(byte) i#2 zp byte:2 11.0
+
+zp byte:2 [ i#2 i#1 ]
+zp byte:3 [ $1 ]
+zp byte:4 [ $3 ]
+zp byte:5 [ $4 ]
+
+Coalescing zero page register [ zp byte:3 [ $1 ] ] with [ zp byte:5 [ $4 ] ]
 Removing instruction jmp B1
 Removing instruction jmp BEND
 Succesful ASM optimization Pass5NextJumpElimination
diff --git a/src/main/java/dk/camelot64/kickc/test/ref/flipper-rex2.log b/src/main/java/dk/camelot64/kickc/test/ref/flipper-rex2.log
index 294aa4d6b..05b5af2a8 100644
--- a/src/main/java/dk/camelot64/kickc/test/ref/flipper-rex2.log
+++ b/src/main/java/dk/camelot64/kickc/test/ref/flipper-rex2.log
@@ -4016,56 +4016,6 @@ Loop head: flip::@1 tails: flip::@4 blocks: flip::@4 flip::@2 flip::@1  depth: 2
 Loop head: flip::@3 tails: flip::@3 blocks: flip::@3  depth: 2
 Loop head: prepare::@1 tails: prepare::@1 blocks: prepare::@1  depth: 1
 
-Initial phi equivalence classes
-[ main::c#2 main::c#1 ]
-[ plot::line#2 plot::line#1 ]
-[ plot::y#2 plot::y#1 ]
-[ plot::i#2 plot::i#3 plot::i#1 ]
-[ plot::x#2 plot::x#1 ]
-[ flip::r#2 flip::r#1 ]
-[ flip::srcIdx#2 flip::srcIdx#3 flip::srcIdx#1 ]
-[ flip::dstIdx#3 flip::dstIdx#5 flip::dstIdx#2 flip::dstIdx#1 ]
-[ flip::c#2 flip::c#1 ]
-[ flip::i#2 flip::i#1 ]
-[ prepare::i#2 prepare::i#1 ]
-Added variable main::$1 to zero page equivalence class [ main::$1 ]
-Added variable main::$3 to zero page equivalence class [ main::$3 ]
-Added variable plot::$3 to zero page equivalence class [ plot::$3 ]
-Added variable flip::$0 to zero page equivalence class [ flip::$0 ]
-Added variable flip::$4 to zero page equivalence class [ flip::$4 ]
-Complete equivalence classes
-[ main::c#2 main::c#1 ]
-[ plot::line#2 plot::line#1 ]
-[ plot::y#2 plot::y#1 ]
-[ plot::i#2 plot::i#3 plot::i#1 ]
-[ plot::x#2 plot::x#1 ]
-[ flip::r#2 flip::r#1 ]
-[ flip::srcIdx#2 flip::srcIdx#3 flip::srcIdx#1 ]
-[ flip::dstIdx#3 flip::dstIdx#5 flip::dstIdx#2 flip::dstIdx#1 ]
-[ flip::c#2 flip::c#1 ]
-[ flip::i#2 flip::i#1 ]
-[ prepare::i#2 prepare::i#1 ]
-[ main::$1 ]
-[ main::$3 ]
-[ plot::$3 ]
-[ flip::$0 ]
-[ flip::$4 ]
-Allocated zp byte:2 to zp byte:2 [ main::c#2 main::c#1 ]
-Allocated zp ptr byte:3 to zp ptr byte:3 [ plot::line#2 plot::line#1 ]
-Allocated zp byte:5 to zp byte:5 [ plot::y#2 plot::y#1 ]
-Allocated zp byte:6 to zp byte:6 [ plot::i#2 plot::i#3 plot::i#1 ]
-Allocated zp byte:7 to zp byte:7 [ plot::x#2 plot::x#1 ]
-Allocated zp byte:8 to zp byte:8 [ flip::r#2 flip::r#1 ]
-Allocated zp byte:9 to zp byte:9 [ flip::srcIdx#2 flip::srcIdx#3 flip::srcIdx#1 ]
-Allocated zp byte:10 to zp byte:10 [ flip::dstIdx#3 flip::dstIdx#5 flip::dstIdx#2 flip::dstIdx#1 ]
-Allocated zp byte:11 to zp byte:11 [ flip::c#2 flip::c#1 ]
-Allocated zp byte:12 to zp byte:12 [ flip::i#2 flip::i#1 ]
-Allocated zp byte:13 to zp byte:13 [ prepare::i#2 prepare::i#1 ]
-Allocated zp byte:14 to zp byte:14 [ main::$1 ]
-Allocated zp byte:15 to zp byte:15 [ main::$3 ]
-Allocated zp byte:16 to zp byte:16 [ plot::$3 ]
-Allocated zp byte:17 to zp byte:17 [ flip::$0 ]
-Allocated zp byte:18 to zp byte:18 [ flip::$4 ]
 
 VARIABLE REGISTER WEIGHTS
 (byte*) RASTER
@@ -4119,107 +4069,56 @@ VARIABLE REGISTER WEIGHTS
 (byte) prepare::i#1 16.5
 (byte) prepare::i#2 22.0
 
-zp byte:2 [ main::c#2 main::c#1 ]
-zp ptr byte:3 [ plot::line#2 plot::line#1 ]
-zp byte:5 [ plot::y#2 plot::y#1 ]
-zp byte:6 [ plot::i#2 plot::i#3 plot::i#1 ]
-zp byte:7 [ plot::x#2 plot::x#1 ]
-zp byte:8 [ flip::r#2 flip::r#1 ]
-zp byte:9 [ flip::srcIdx#2 flip::srcIdx#3 flip::srcIdx#1 ]
-zp byte:10 [ flip::dstIdx#3 flip::dstIdx#5 flip::dstIdx#2 flip::dstIdx#1 ]
-zp byte:11 [ flip::c#2 flip::c#1 ]
-zp byte:12 [ flip::i#2 flip::i#1 ]
-zp byte:13 [ prepare::i#2 prepare::i#1 ]
-zp byte:14 [ main::$1 ]
-zp byte:15 [ main::$3 ]
-zp byte:16 [ plot::$3 ]
-zp byte:17 [ flip::$0 ]
-zp byte:18 [ flip::$4 ]
-
-Uplifting max weight 2252.25 live range equivalence class zp byte:7 [ plot::x#2 plot::x#1 ]
-Uplift to reg byte a resulted in clobber.
-Uplift to reg byte x resulted in clobber.
-Register Cycles: reg byte y 30
-Uplift to reg byte y succesfull.
-REGISTER UPLIFTING
-(byte*) RASTER
-(byte[1000]) SCREEN
-(byte[256]) buffer1
-(byte[256]) buffer2
-(void()) flip()
-(byte~) flip::$0 zp byte:17 2002.0
-(byte~) flip::$4 zp byte:18 202.0
-(byte) flip::c
-(byte) flip::c#1 zp byte:11 1501.5
-(byte) flip::c#2 zp byte:11 400.4
-(byte) flip::dstIdx
-(byte) flip::dstIdx#1 zp byte:10 701.0
-(byte) flip::dstIdx#2 zp byte:10 67.33333333333333
-(byte) flip::dstIdx#3 zp byte:10 776.0
-(byte) flip::dstIdx#5 zp byte:10 202.0
-(byte) flip::i
-(byte) flip::i#1 zp byte:12 151.5
-(byte) flip::i#2 zp byte:12 134.66666666666666
-(byte) flip::r
-(byte) flip::r#1 zp byte:8 151.5
-(byte) flip::r#2 zp byte:8 22.444444444444443
-(byte) flip::srcIdx
-(byte) flip::srcIdx#1 zp byte:9 300.42857142857144
-(byte) flip::srcIdx#2 zp byte:9 1034.6666666666667
-(byte) flip::srcIdx#3 zp byte:9 202.0
-(void()) main()
-(byte~) main::$1 zp byte:14 2002.0
-(byte~) main::$3 zp byte:15 2002.0
-(byte) main::c
-(byte) main::c#1 zp byte:2 151.5
-(byte) main::c#2 zp byte:2 40.4
-(void()) plot()
-(byte~) plot::$3 zp byte:16 2002.0
-(byte) plot::i
-(byte) plot::i#1 zp byte:6 350.5
-(byte) plot::i#2 zp byte:6 1034.6666666666667
-(byte) plot::i#3 zp byte:6 202.0
-(byte*) plot::line
-(byte*) plot::line#1 zp ptr byte:3 67.33333333333333
-(byte*) plot::line#2 zp ptr byte:3 171.85714285714283
-(byte) plot::x
-(byte) plot::x#1 zp byte:7 1501.5
-(byte) plot::x#2 zp byte:7 750.75
-(byte) plot::y
-(byte) plot::y#1 zp byte:5 151.5
-(byte) plot::y#2 zp byte:5 25.25
-(void()) prepare()
-(byte) prepare::i
-(byte) prepare::i#1 zp byte:13 16.5
-(byte) prepare::i#2 zp byte:13 22.0
-
-zp byte:2 [ main::c#2 main::c#1 ]
-zp ptr byte:3 [ plot::line#2 plot::line#1 ]
-zp byte:5 [ plot::y#2 plot::y#1 ]
-zp byte:6 [ plot::i#2 plot::i#3 plot::i#1 ]
-zp byte:7 [ plot::x#2 plot::x#1 ]
-zp byte:8 [ flip::r#2 flip::r#1 ]
-zp byte:9 [ flip::srcIdx#2 flip::srcIdx#3 flip::srcIdx#1 ]
-zp byte:10 [ flip::dstIdx#3 flip::dstIdx#5 flip::dstIdx#2 flip::dstIdx#1 ]
-zp byte:11 [ flip::c#2 flip::c#1 ]
-zp byte:12 [ flip::i#2 flip::i#1 ]
-zp byte:13 [ prepare::i#2 prepare::i#1 ]
-zp byte:14 [ main::$1 ]
-zp byte:15 [ main::$3 ]
-zp byte:16 [ plot::$3 ]
-zp byte:17 [ flip::$0 ]
-zp byte:18 [ flip::$4 ]
-
-Coalescing zero page register [ zp byte:2 [ main::c#2 main::c#1 ] ] with [ zp byte:5 [ plot::y#2 plot::y#1 ] ]
-Coalescing zero page register [ zp byte:2 [ main::c#2 main::c#1 plot::y#2 plot::y#1 ] ] with [ zp byte:8 [ flip::r#2 flip::r#1 ] ]
-Coalescing zero page register [ zp byte:2 [ main::c#2 main::c#1 plot::y#2 plot::y#1 flip::r#2 flip::r#1 ] ] with [ zp byte:12 [ flip::i#2 flip::i#1 ] ]
-Coalescing zero page register [ zp byte:2 [ main::c#2 main::c#1 plot::y#2 plot::y#1 flip::r#2 flip::r#1 flip::i#2 flip::i#1 ] ] with [ zp byte:13 [ prepare::i#2 prepare::i#1 ] ]
-Coalescing zero page register [ zp byte:6 [ plot::i#2 plot::i#3 plot::i#1 ] ] with [ zp byte:9 [ flip::srcIdx#2 flip::srcIdx#3 flip::srcIdx#1 ] ]
-Coalescing zero page register [ zp byte:6 [ plot::i#2 plot::i#3 plot::i#1 flip::srcIdx#2 flip::srcIdx#3 flip::srcIdx#1 ] ] with [ zp byte:14 [ main::$1 ] ]
-Coalescing zero page register [ zp byte:6 [ plot::i#2 plot::i#3 plot::i#1 flip::srcIdx#2 flip::srcIdx#3 flip::srcIdx#1 main::$1 ] ] with [ zp byte:15 [ main::$3 ] ]
-Coalescing zero page register [ zp byte:6 [ plot::i#2 plot::i#3 plot::i#1 flip::srcIdx#2 flip::srcIdx#3 flip::srcIdx#1 main::$1 main::$3 ] ] with [ zp byte:18 [ flip::$4 ] ]
-Coalescing zero page register [ zp byte:7 [ plot::x#2 plot::x#1 ] ] with [ zp byte:10 [ flip::dstIdx#3 flip::dstIdx#5 flip::dstIdx#2 flip::dstIdx#1 ] ]
-Coalescing zero page register [ zp byte:11 [ flip::c#2 flip::c#1 ] ] with [ zp byte:16 [ plot::$3 ] ]
+Initial phi equivalence classes
+[ main::c#2 main::c#1 ]
+[ plot::line#2 plot::line#1 ]
+[ plot::y#2 plot::y#1 ]
+[ plot::i#2 plot::i#3 plot::i#1 ]
+[ plot::x#2 plot::x#1 ]
+[ flip::r#2 flip::r#1 ]
+[ flip::srcIdx#2 flip::srcIdx#3 flip::srcIdx#1 ]
+[ flip::dstIdx#3 flip::dstIdx#5 flip::dstIdx#2 flip::dstIdx#1 ]
+[ flip::c#2 flip::c#1 ]
+[ flip::i#2 flip::i#1 ]
+[ prepare::i#2 prepare::i#1 ]
+Added variable main::$1 to zero page equivalence class [ main::$1 ]
+Added variable main::$3 to zero page equivalence class [ main::$3 ]
+Added variable plot::$3 to zero page equivalence class [ plot::$3 ]
+Added variable flip::$0 to zero page equivalence class [ flip::$0 ]
+Added variable flip::$4 to zero page equivalence class [ flip::$4 ]
+Complete equivalence classes
+[ main::c#2 main::c#1 ]
+[ plot::line#2 plot::line#1 ]
+[ plot::y#2 plot::y#1 ]
+[ plot::i#2 plot::i#3 plot::i#1 ]
+[ plot::x#2 plot::x#1 ]
+[ flip::r#2 flip::r#1 ]
+[ flip::srcIdx#2 flip::srcIdx#3 flip::srcIdx#1 ]
+[ flip::dstIdx#3 flip::dstIdx#5 flip::dstIdx#2 flip::dstIdx#1 ]
+[ flip::c#2 flip::c#1 ]
+[ flip::i#2 flip::i#1 ]
+[ prepare::i#2 prepare::i#1 ]
+[ main::$1 ]
+[ main::$3 ]
+[ plot::$3 ]
+[ flip::$0 ]
+[ flip::$4 ]
+Allocated zp byte:2 to zp byte:2 [ main::c#2 main::c#1 ]
+Allocated zp ptr byte:3 to zp ptr byte:3 [ plot::line#2 plot::line#1 ]
+Allocated zp byte:5 to zp byte:5 [ plot::y#2 plot::y#1 ]
+Allocated zp byte:6 to zp byte:6 [ plot::i#2 plot::i#3 plot::i#1 ]
+Allocated zp byte:7 to zp byte:7 [ plot::x#2 plot::x#1 ]
+Allocated zp byte:8 to zp byte:8 [ flip::r#2 flip::r#1 ]
+Allocated zp byte:9 to zp byte:9 [ flip::srcIdx#2 flip::srcIdx#3 flip::srcIdx#1 ]
+Allocated zp byte:10 to zp byte:10 [ flip::dstIdx#3 flip::dstIdx#5 flip::dstIdx#2 flip::dstIdx#1 ]
+Allocated zp byte:11 to zp byte:11 [ flip::c#2 flip::c#1 ]
+Allocated zp byte:12 to zp byte:12 [ flip::i#2 flip::i#1 ]
+Allocated zp byte:13 to zp byte:13 [ prepare::i#2 prepare::i#1 ]
+Allocated zp byte:14 to zp byte:14 [ main::$1 ]
+Allocated zp byte:15 to zp byte:15 [ main::$3 ]
+Allocated zp byte:16 to zp byte:16 [ plot::$3 ]
+Allocated zp byte:17 to zp byte:17 [ flip::$0 ]
+Allocated zp byte:18 to zp byte:18 [ flip::$4 ]
 INITIAL ASM
 //SEG0 @BEGIN
 BBEGIN:
@@ -4500,6 +4399,89 @@ prepare__Breturn:
 //SEG107 [45] return  [ ]
   rts
 
+Uplifting max weight 2252.25 live range equivalence class zp byte:7 [ plot::x#2 plot::x#1 ]
+Uplift to reg byte a resulted in clobber.
+Uplift to reg byte x resulted in clobber.
+Uplift to reg byte y succesfull.
+REGISTER UPLIFTING
+(byte*) RASTER
+(byte[1000]) SCREEN
+(byte[256]) buffer1
+(byte[256]) buffer2
+(void()) flip()
+(byte~) flip::$0 zp byte:17 2002.0
+(byte~) flip::$4 zp byte:18 202.0
+(byte) flip::c
+(byte) flip::c#1 zp byte:11 1501.5
+(byte) flip::c#2 zp byte:11 400.4
+(byte) flip::dstIdx
+(byte) flip::dstIdx#1 zp byte:10 701.0
+(byte) flip::dstIdx#2 zp byte:10 67.33333333333333
+(byte) flip::dstIdx#3 zp byte:10 776.0
+(byte) flip::dstIdx#5 zp byte:10 202.0
+(byte) flip::i
+(byte) flip::i#1 zp byte:12 151.5
+(byte) flip::i#2 zp byte:12 134.66666666666666
+(byte) flip::r
+(byte) flip::r#1 zp byte:8 151.5
+(byte) flip::r#2 zp byte:8 22.444444444444443
+(byte) flip::srcIdx
+(byte) flip::srcIdx#1 zp byte:9 300.42857142857144
+(byte) flip::srcIdx#2 zp byte:9 1034.6666666666667
+(byte) flip::srcIdx#3 zp byte:9 202.0
+(void()) main()
+(byte~) main::$1 zp byte:14 2002.0
+(byte~) main::$3 zp byte:15 2002.0
+(byte) main::c
+(byte) main::c#1 zp byte:2 151.5
+(byte) main::c#2 zp byte:2 40.4
+(void()) plot()
+(byte~) plot::$3 zp byte:16 2002.0
+(byte) plot::i
+(byte) plot::i#1 zp byte:6 350.5
+(byte) plot::i#2 zp byte:6 1034.6666666666667
+(byte) plot::i#3 zp byte:6 202.0
+(byte*) plot::line
+(byte*) plot::line#1 zp ptr byte:3 67.33333333333333
+(byte*) plot::line#2 zp ptr byte:3 171.85714285714283
+(byte) plot::x
+(byte) plot::x#1 zp byte:7 1501.5
+(byte) plot::x#2 zp byte:7 750.75
+(byte) plot::y
+(byte) plot::y#1 zp byte:5 151.5
+(byte) plot::y#2 zp byte:5 25.25
+(void()) prepare()
+(byte) prepare::i
+(byte) prepare::i#1 zp byte:13 16.5
+(byte) prepare::i#2 zp byte:13 22.0
+
+zp byte:2 [ main::c#2 main::c#1 ]
+zp ptr byte:3 [ plot::line#2 plot::line#1 ]
+zp byte:5 [ plot::y#2 plot::y#1 ]
+zp byte:6 [ plot::i#2 plot::i#3 plot::i#1 ]
+zp byte:7 [ plot::x#2 plot::x#1 ]
+zp byte:8 [ flip::r#2 flip::r#1 ]
+zp byte:9 [ flip::srcIdx#2 flip::srcIdx#3 flip::srcIdx#1 ]
+zp byte:10 [ flip::dstIdx#3 flip::dstIdx#5 flip::dstIdx#2 flip::dstIdx#1 ]
+zp byte:11 [ flip::c#2 flip::c#1 ]
+zp byte:12 [ flip::i#2 flip::i#1 ]
+zp byte:13 [ prepare::i#2 prepare::i#1 ]
+zp byte:14 [ main::$1 ]
+zp byte:15 [ main::$3 ]
+zp byte:16 [ plot::$3 ]
+zp byte:17 [ flip::$0 ]
+zp byte:18 [ flip::$4 ]
+
+Coalescing zero page register [ zp byte:2 [ main::c#2 main::c#1 ] ] with [ zp byte:5 [ plot::y#2 plot::y#1 ] ]
+Coalescing zero page register [ zp byte:2 [ main::c#2 main::c#1 plot::y#2 plot::y#1 ] ] with [ zp byte:8 [ flip::r#2 flip::r#1 ] ]
+Coalescing zero page register [ zp byte:2 [ main::c#2 main::c#1 plot::y#2 plot::y#1 flip::r#2 flip::r#1 ] ] with [ zp byte:12 [ flip::i#2 flip::i#1 ] ]
+Coalescing zero page register [ zp byte:2 [ main::c#2 main::c#1 plot::y#2 plot::y#1 flip::r#2 flip::r#1 flip::i#2 flip::i#1 ] ] with [ zp byte:13 [ prepare::i#2 prepare::i#1 ] ]
+Coalescing zero page register [ zp byte:6 [ plot::i#2 plot::i#3 plot::i#1 ] ] with [ zp byte:9 [ flip::srcIdx#2 flip::srcIdx#3 flip::srcIdx#1 ] ]
+Coalescing zero page register [ zp byte:6 [ plot::i#2 plot::i#3 plot::i#1 flip::srcIdx#2 flip::srcIdx#3 flip::srcIdx#1 ] ] with [ zp byte:14 [ main::$1 ] ]
+Coalescing zero page register [ zp byte:6 [ plot::i#2 plot::i#3 plot::i#1 flip::srcIdx#2 flip::srcIdx#3 flip::srcIdx#1 main::$1 ] ] with [ zp byte:15 [ main::$3 ] ]
+Coalescing zero page register [ zp byte:6 [ plot::i#2 plot::i#3 plot::i#1 flip::srcIdx#2 flip::srcIdx#3 flip::srcIdx#1 main::$1 main::$3 ] ] with [ zp byte:18 [ flip::$4 ] ]
+Coalescing zero page register [ zp byte:7 [ plot::x#2 plot::x#1 ] ] with [ zp byte:10 [ flip::dstIdx#3 flip::dstIdx#5 flip::dstIdx#2 flip::dstIdx#1 ] ]
+Coalescing zero page register [ zp byte:11 [ flip::c#2 flip::c#1 ] ] with [ zp byte:16 [ plot::$3 ] ]
 Removing instruction jmp BEND
 Removing instruction jmp main__B3
 Removing instruction jmp main__B4
diff --git a/src/main/java/dk/camelot64/kickc/test/ref/loopmin.log b/src/main/java/dk/camelot64/kickc/test/ref/loopmin.log
index 0337d4204..e9b5fdb1c 100644
--- a/src/main/java/dk/camelot64/kickc/test/ref/loopmin.log
+++ b/src/main/java/dk/camelot64/kickc/test/ref/loopmin.log
@@ -360,14 +360,6 @@ Found 1 loops in scope []
 NATURAL LOOPS WITH DEPTH
 Loop head: @1 tails: @3 blocks: @3 @1 @2  depth: 1
 
-Initial phi equivalence classes
-[ i#2 i#1 ]
-[ s#2 s#4 s#1 ]
-Complete equivalence classes
-[ i#2 i#1 ]
-[ s#2 s#4 s#1 ]
-Allocated zp byte:2 to zp byte:2 [ i#2 i#1 ]
-Allocated zp byte:3 to zp byte:3 [ s#2 s#4 s#1 ]
 
 VARIABLE REGISTER WEIGHTS
 (byte) i
@@ -378,27 +370,14 @@ VARIABLE REGISTER WEIGHTS
 (byte) s#2 16.5
 (byte) s#4 11.0
 
-zp byte:2 [ i#2 i#1 ]
-zp byte:3 [ s#2 s#4 s#1 ]
-
-Uplifting max weight 49.5 live range equivalence class zp byte:3 [ s#2 s#4 s#1 ]
-Uplift to reg byte a resulted in clobber.
-Register Cycles: reg byte x 29
-Uplift to reg byte x succesfull.
-Register Cycles: reg byte y 29
-Uplift to reg byte y succesfull.
-REGISTER UPLIFTING
-(byte) i
-(byte) i#1 zp byte:2 16.5
-(byte) i#2 zp byte:2 11.0
-(byte) s
-(byte) s#1 zp byte:3 22.0
-(byte) s#2 zp byte:3 16.5
-(byte) s#4 zp byte:3 11.0
-
-zp byte:2 [ i#2 i#1 ]
-zp byte:3 [ s#2 s#4 s#1 ]
-
+Initial phi equivalence classes
+[ i#2 i#1 ]
+[ s#2 s#4 s#1 ]
+Complete equivalence classes
+[ i#2 i#1 ]
+[ s#2 s#4 s#1 ]
+Allocated zp byte:2 to zp byte:2 [ i#2 i#1 ]
+Allocated zp byte:3 to zp byte:3 [ s#2 s#4 s#1 ]
 INITIAL ASM
 //SEG0 @BEGIN
 BBEGIN:
@@ -450,6 +429,22 @@ B3_from_B2:
 //SEG18 [2] phi (byte) s#4 = (byte) s#1 -- register_copy 
   jmp B3
 
+Uplifting max weight 49.5 live range equivalence class zp byte:3 [ s#2 s#4 s#1 ]
+Uplift to reg byte a resulted in clobber.
+Uplift to reg byte x succesfull.
+Uplift to reg byte y succesfull.
+REGISTER UPLIFTING
+(byte) i
+(byte) i#1 zp byte:2 16.5
+(byte) i#2 zp byte:2 11.0
+(byte) s
+(byte) s#1 zp byte:3 22.0
+(byte) s#2 zp byte:3 16.5
+(byte) s#4 zp byte:3 11.0
+
+zp byte:2 [ i#2 i#1 ]
+zp byte:3 [ s#2 s#4 s#1 ]
+
 Removing instruction jmp B1
 Removing instruction jmp B3
 Removing instruction jmp BEND
diff --git a/src/main/java/dk/camelot64/kickc/test/ref/loopnest.log b/src/main/java/dk/camelot64/kickc/test/ref/loopnest.log
index 93814c187..644c1803b 100644
--- a/src/main/java/dk/camelot64/kickc/test/ref/loopnest.log
+++ b/src/main/java/dk/camelot64/kickc/test/ref/loopnest.log
@@ -708,14 +708,6 @@ NATURAL LOOPS WITH DEPTH
 Loop head: main::@1 tails: main::@3 blocks: main::@3 main::@1  depth: 1
 Loop head: nest::@1 tails: nest::@1 blocks: nest::@1  depth: 2
 
-Initial phi equivalence classes
-[ main::i#2 main::i#1 ]
-[ nest::j#2 nest::j#1 ]
-Complete equivalence classes
-[ main::i#2 main::i#1 ]
-[ nest::j#2 nest::j#1 ]
-Allocated zp byte:2 to zp byte:2 [ main::i#2 main::i#1 ]
-Allocated zp byte:3 to zp byte:3 [ nest::j#2 nest::j#1 ]
 
 VARIABLE REGISTER WEIGHTS
 (byte*) SCREEN
@@ -728,30 +720,14 @@ VARIABLE REGISTER WEIGHTS
 (byte) nest::j#1 151.5
 (byte) nest::j#2 151.5
 
-zp byte:2 [ main::i#2 main::i#1 ]
-zp byte:3 [ nest::j#2 nest::j#1 ]
-
-Uplifting max weight 303.0 live range equivalence class zp byte:3 [ nest::j#2 nest::j#1 ]
-Register Cycles: reg byte a 12
-Uplift to reg byte a succesfull.
-Register Cycles: reg byte x 10
-Uplift to reg byte x succesfull.
-Register Cycles: reg byte y 10
-Uplift to reg byte y succesfull.
-REGISTER UPLIFTING
-(byte*) SCREEN
-(void()) main()
-(byte) main::i
-(byte) main::i#1 zp byte:2 16.5
-(byte) main::i#2 zp byte:2 3.142857142857143
-(void()) nest()
-(byte) nest::j
-(byte) nest::j#1 zp byte:3 151.5
-(byte) nest::j#2 zp byte:3 151.5
-
-zp byte:2 [ main::i#2 main::i#1 ]
-zp byte:3 [ nest::j#2 nest::j#1 ]
-
+Initial phi equivalence classes
+[ main::i#2 main::i#1 ]
+[ nest::j#2 nest::j#1 ]
+Complete equivalence classes
+[ main::i#2 main::i#1 ]
+[ nest::j#2 nest::j#1 ]
+Allocated zp byte:2 to zp byte:2 [ main::i#2 main::i#1 ]
+Allocated zp byte:3 to zp byte:3 [ nest::j#2 nest::j#1 ]
 INITIAL ASM
 //SEG0 @BEGIN
 BBEGIN:
@@ -817,6 +793,24 @@ nest__Breturn:
 //SEG25 [10] return  [ main::i#2 ]
   rts
 
+Uplifting max weight 303.0 live range equivalence class zp byte:3 [ nest::j#2 nest::j#1 ]
+Uplift to reg byte a succesfull.
+Uplift to reg byte x succesfull.
+Uplift to reg byte y succesfull.
+REGISTER UPLIFTING
+(byte*) SCREEN
+(void()) main()
+(byte) main::i
+(byte) main::i#1 zp byte:2 16.5
+(byte) main::i#2 zp byte:2 3.142857142857143
+(void()) nest()
+(byte) nest::j
+(byte) nest::j#1 zp byte:3 151.5
+(byte) nest::j#2 zp byte:3 151.5
+
+zp byte:2 [ main::i#2 main::i#1 ]
+zp byte:3 [ nest::j#2 nest::j#1 ]
+
 Removing instruction jmp BEND
 Removing instruction jmp main__B1
 Removing instruction jmp main__B3
diff --git a/src/main/java/dk/camelot64/kickc/test/ref/loopnest2.log b/src/main/java/dk/camelot64/kickc/test/ref/loopnest2.log
index f1e27a593..7b6c88c79 100644
--- a/src/main/java/dk/camelot64/kickc/test/ref/loopnest2.log
+++ b/src/main/java/dk/camelot64/kickc/test/ref/loopnest2.log
@@ -1790,26 +1790,6 @@ Loop head: nest1::@1 tails: nest1::@3 blocks: nest1::@3 nest1::@5 nest1::@2 nest
 Loop head: nest2::@2 tails: nest2::@2 blocks: nest2::@2  depth: 6
 Loop head: nest2::@1 tails: nest2::@3 blocks: nest2::@3 nest2::@2 nest2::@1  depth: 5
 
-Initial phi equivalence classes
-[ main::i#2 main::i#1 ]
-[ main::j#2 main::j#1 ]
-[ nest1::i#2 nest1::i#1 ]
-[ nest1::j#2 nest1::j#1 ]
-[ nest2::i#2 nest2::i#1 ]
-[ nest2::j#2 nest2::j#1 ]
-Complete equivalence classes
-[ main::i#2 main::i#1 ]
-[ main::j#2 main::j#1 ]
-[ nest1::i#2 nest1::i#1 ]
-[ nest1::j#2 nest1::j#1 ]
-[ nest2::i#2 nest2::i#1 ]
-[ nest2::j#2 nest2::j#1 ]
-Allocated zp byte:2 to zp byte:2 [ main::i#2 main::i#1 ]
-Allocated zp byte:3 to zp byte:3 [ main::j#2 main::j#1 ]
-Allocated zp byte:4 to zp byte:4 [ nest1::i#2 nest1::i#1 ]
-Allocated zp byte:5 to zp byte:5 [ nest1::j#2 nest1::j#1 ]
-Allocated zp byte:6 to zp byte:6 [ nest2::i#2 nest2::i#1 ]
-Allocated zp byte:7 to zp byte:7 [ nest2::j#2 nest2::j#1 ]
 
 VARIABLE REGISTER WEIGHTS
 (byte*) SCREEN
@@ -1835,51 +1815,26 @@ VARIABLE REGISTER WEIGHTS
 (byte) nest2::j#1 1500001.5
 (byte) nest2::j#2 1500001.5
 
-zp byte:2 [ main::i#2 main::i#1 ]
-zp byte:3 [ main::j#2 main::j#1 ]
-zp byte:4 [ nest1::i#2 nest1::i#1 ]
-zp byte:5 [ nest1::j#2 nest1::j#1 ]
-zp byte:6 [ nest2::i#2 nest2::i#1 ]
-zp byte:7 [ nest2::j#2 nest2::j#1 ]
-
-Uplifting max weight 3000003.0 live range equivalence class zp byte:7 [ nest2::j#2 nest2::j#1 ]
-Register Cycles: reg byte a 12
-Uplift to reg byte a succesfull.
-Register Cycles: reg byte x 10
-Uplift to reg byte x succesfull.
-Register Cycles: reg byte y 10
-Uplift to reg byte y succesfull.
-REGISTER UPLIFTING
-(byte*) SCREEN
-(void()) main()
-(byte) main::i
-(byte) main::i#1 zp byte:2 16.5
-(byte) main::i#2 zp byte:2 1.0476190476190477
-(byte) main::j
-(byte) main::j#1 zp byte:3 151.5
-(byte) main::j#2 zp byte:3 11.222222222222221
-(void()) nest1()
-(byte) nest1::i
-(byte) nest1::i#1 zp byte:4 1501.5
-(byte) nest1::i#2 zp byte:4 154.0
-(byte) nest1::j
-(byte) nest1::j#1 zp byte:5 15001.5
-(byte) nest1::j#2 zp byte:5 2000.2
-(void()) nest2()
-(byte) nest2::i
-(byte) nest2::i#1 zp byte:6 150001.5
-(byte) nest2::i#2 zp byte:6 40000.4
-(byte) nest2::j
-(byte) nest2::j#1 zp byte:7 1500001.5
-(byte) nest2::j#2 zp byte:7 1500001.5
-
-zp byte:2 [ main::i#2 main::i#1 ]
-zp byte:3 [ main::j#2 main::j#1 ]
-zp byte:4 [ nest1::i#2 nest1::i#1 ]
-zp byte:5 [ nest1::j#2 nest1::j#1 ]
-zp byte:6 [ nest2::i#2 nest2::i#1 ]
-zp byte:7 [ nest2::j#2 nest2::j#1 ]
-
+Initial phi equivalence classes
+[ main::i#2 main::i#1 ]
+[ main::j#2 main::j#1 ]
+[ nest1::i#2 nest1::i#1 ]
+[ nest1::j#2 nest1::j#1 ]
+[ nest2::i#2 nest2::i#1 ]
+[ nest2::j#2 nest2::j#1 ]
+Complete equivalence classes
+[ main::i#2 main::i#1 ]
+[ main::j#2 main::j#1 ]
+[ nest1::i#2 nest1::i#1 ]
+[ nest1::j#2 nest1::j#1 ]
+[ nest2::i#2 nest2::i#1 ]
+[ nest2::j#2 nest2::j#1 ]
+Allocated zp byte:2 to zp byte:2 [ main::i#2 main::i#1 ]
+Allocated zp byte:3 to zp byte:3 [ main::j#2 main::j#1 ]
+Allocated zp byte:4 to zp byte:4 [ nest1::i#2 nest1::i#1 ]
+Allocated zp byte:5 to zp byte:5 [ nest1::j#2 nest1::j#1 ]
+Allocated zp byte:6 to zp byte:6 [ nest2::i#2 nest2::i#1 ]
+Allocated zp byte:7 to zp byte:7 [ nest2::j#2 nest2::j#1 ]
 INITIAL ASM
 //SEG0 @BEGIN
 BBEGIN:
@@ -2034,6 +1989,41 @@ nest2__Breturn:
 //SEG61 [24] return  [ main::j#2 main::i#2 nest1::j#2 nest1::i#2 ]
   rts
 
+Uplifting max weight 3000003.0 live range equivalence class zp byte:7 [ nest2::j#2 nest2::j#1 ]
+Uplift to reg byte a succesfull.
+Uplift to reg byte x succesfull.
+Uplift to reg byte y succesfull.
+REGISTER UPLIFTING
+(byte*) SCREEN
+(void()) main()
+(byte) main::i
+(byte) main::i#1 zp byte:2 16.5
+(byte) main::i#2 zp byte:2 1.0476190476190477
+(byte) main::j
+(byte) main::j#1 zp byte:3 151.5
+(byte) main::j#2 zp byte:3 11.222222222222221
+(void()) nest1()
+(byte) nest1::i
+(byte) nest1::i#1 zp byte:4 1501.5
+(byte) nest1::i#2 zp byte:4 154.0
+(byte) nest1::j
+(byte) nest1::j#1 zp byte:5 15001.5
+(byte) nest1::j#2 zp byte:5 2000.2
+(void()) nest2()
+(byte) nest2::i
+(byte) nest2::i#1 zp byte:6 150001.5
+(byte) nest2::i#2 zp byte:6 40000.4
+(byte) nest2::j
+(byte) nest2::j#1 zp byte:7 1500001.5
+(byte) nest2::j#2 zp byte:7 1500001.5
+
+zp byte:2 [ main::i#2 main::i#1 ]
+zp byte:3 [ main::j#2 main::j#1 ]
+zp byte:4 [ nest1::i#2 nest1::i#1 ]
+zp byte:5 [ nest1::j#2 nest1::j#1 ]
+zp byte:6 [ nest2::i#2 nest2::i#1 ]
+zp byte:7 [ nest2::j#2 nest2::j#1 ]
+
 Removing instruction jmp BEND
 Removing instruction jmp main__B1
 Removing instruction jmp main__B2
diff --git a/src/main/java/dk/camelot64/kickc/test/ref/loopsplit.log b/src/main/java/dk/camelot64/kickc/test/ref/loopsplit.log
index 35a1b314d..c6e062f00 100644
--- a/src/main/java/dk/camelot64/kickc/test/ref/loopsplit.log
+++ b/src/main/java/dk/camelot64/kickc/test/ref/loopsplit.log
@@ -513,14 +513,6 @@ Found 1 loops in scope [main]
 NATURAL LOOPS WITH DEPTH
 Loop head: main::@1 tails: main::@5 main::@4 blocks: main::@5 main::@2 main::@1 main::@4  depth: 1
 
-Initial phi equivalence classes
-[ main::i#2 main::i#1 ]
-[ main::s#3 main::s#1 main::s#2 ]
-Complete equivalence classes
-[ main::i#2 main::i#1 ]
-[ main::s#3 main::s#1 main::s#2 ]
-Allocated zp byte:2 to zp byte:2 [ main::i#2 main::i#1 ]
-Allocated zp byte:3 to zp byte:3 [ main::s#3 main::s#1 main::s#2 ]
 
 VARIABLE REGISTER WEIGHTS
 (void()) main()
@@ -532,28 +524,14 @@ VARIABLE REGISTER WEIGHTS
 (byte) main::s#2 22.0
 (byte) main::s#3 11.0
 
-zp byte:2 [ main::i#2 main::i#1 ]
-zp byte:3 [ main::s#3 main::s#1 main::s#2 ]
-
-Uplifting max weight 55.0 live range equivalence class zp byte:3 [ main::s#3 main::s#1 main::s#2 ]
-Uplift to reg byte a resulted in clobber.
-Register Cycles: reg byte x 24
-Uplift to reg byte x succesfull.
-Register Cycles: reg byte y 24
-Uplift to reg byte y succesfull.
-REGISTER UPLIFTING
-(void()) main()
-(byte) main::i
-(byte) main::i#1 zp byte:2 11.0
-(byte) main::i#2 zp byte:2 33.0
-(byte) main::s
-(byte) main::s#1 zp byte:3 22.0
-(byte) main::s#2 zp byte:3 22.0
-(byte) main::s#3 zp byte:3 11.0
-
-zp byte:2 [ main::i#2 main::i#1 ]
-zp byte:3 [ main::s#3 main::s#1 main::s#2 ]
-
+Initial phi equivalence classes
+[ main::i#2 main::i#1 ]
+[ main::s#3 main::s#1 main::s#2 ]
+Complete equivalence classes
+[ main::i#2 main::i#1 ]
+[ main::s#3 main::s#1 main::s#2 ]
+Allocated zp byte:2 to zp byte:2 [ main::i#2 main::i#1 ]
+Allocated zp byte:3 to zp byte:3 [ main::s#3 main::s#1 main::s#2 ]
 INITIAL ASM
 //SEG0 @BEGIN
 BBEGIN:
@@ -613,6 +591,23 @@ main__B1_from_B4:
 //SEG23 [1] phi (byte) main::i#2 = (byte) main::i#1 -- register_copy 
   jmp main__B1
 
+Uplifting max weight 55.0 live range equivalence class zp byte:3 [ main::s#3 main::s#1 main::s#2 ]
+Uplift to reg byte a resulted in clobber.
+Uplift to reg byte x succesfull.
+Uplift to reg byte y succesfull.
+REGISTER UPLIFTING
+(void()) main()
+(byte) main::i
+(byte) main::i#1 zp byte:2 11.0
+(byte) main::i#2 zp byte:2 33.0
+(byte) main::s
+(byte) main::s#1 zp byte:3 22.0
+(byte) main::s#2 zp byte:3 22.0
+(byte) main::s#3 zp byte:3 11.0
+
+zp byte:2 [ main::i#2 main::i#1 ]
+zp byte:3 [ main::s#3 main::s#1 main::s#2 ]
+
 Removing instruction jmp BEND
 Removing instruction jmp main__B1
 Removing instruction jmp main__Breturn
diff --git a/src/main/java/dk/camelot64/kickc/test/ref/minus.log b/src/main/java/dk/camelot64/kickc/test/ref/minus.log
index a19c58165..5d86c4b7c 100644
--- a/src/main/java/dk/camelot64/kickc/test/ref/minus.log
+++ b/src/main/java/dk/camelot64/kickc/test/ref/minus.log
@@ -290,14 +290,6 @@ Found 1 loops in scope []
 NATURAL LOOPS WITH DEPTH
 Loop head: @1 tails: @1 blocks: @1  depth: 1
 
-Initial phi equivalence classes
-[ i#2 i#1 ]
-Added variable $1 to zero page equivalence class [ $1 ]
-Complete equivalence classes
-[ i#2 i#1 ]
-[ $1 ]
-Allocated zp byte:2 to zp byte:2 [ i#2 i#1 ]
-Allocated zp byte:3 to zp byte:3 [ $1 ]
 
 VARIABLE REGISTER WEIGHTS
 (byte~) $1 22.0
@@ -306,25 +298,14 @@ VARIABLE REGISTER WEIGHTS
 (byte) i#2 14.666666666666666
 (byte[16]) p
 
-zp byte:2 [ i#2 i#1 ]
-zp byte:3 [ $1 ]
-
-Uplifting max weight 31.166666666666664 live range equivalence class zp byte:2 [ i#2 i#1 ]
-Uplift to reg byte a resulted in clobber.
-Register Cycles: reg byte x 23
-Uplift to reg byte x succesfull.
-Register Cycles: reg byte y 23
-Uplift to reg byte y succesfull.
-REGISTER UPLIFTING
-(byte~) $1 zp byte:3 22.0
-(byte) i
-(byte) i#1 zp byte:2 16.5
-(byte) i#2 zp byte:2 14.666666666666666
-(byte[16]) p
-
-zp byte:2 [ i#2 i#1 ]
-zp byte:3 [ $1 ]
-
+Initial phi equivalence classes
+[ i#2 i#1 ]
+Added variable $1 to zero page equivalence class [ $1 ]
+Complete equivalence classes
+[ i#2 i#1 ]
+[ $1 ]
+Allocated zp byte:2 to zp byte:2 [ i#2 i#1 ]
+Allocated zp byte:3 to zp byte:3 [ $1 ]
 INITIAL ASM
 //SEG0 @BEGIN
 BBEGIN:
@@ -359,6 +340,20 @@ B1:
 //SEG10 @END
 BEND:
 
+Uplifting max weight 31.166666666666664 live range equivalence class zp byte:2 [ i#2 i#1 ]
+Uplift to reg byte a resulted in clobber.
+Uplift to reg byte x succesfull.
+Uplift to reg byte y succesfull.
+REGISTER UPLIFTING
+(byte~) $1 zp byte:3 22.0
+(byte) i
+(byte) i#1 zp byte:2 16.5
+(byte) i#2 zp byte:2 14.666666666666666
+(byte[16]) p
+
+zp byte:2 [ i#2 i#1 ]
+zp byte:3 [ $1 ]
+
 Removing instruction jmp B1
 Removing instruction jmp BEND
 Succesful ASM optimization Pass5NextJumpElimination
diff --git a/src/main/java/dk/camelot64/kickc/test/ref/ptrtest.log b/src/main/java/dk/camelot64/kickc/test/ref/ptrtest.log
index f5d1aab31..25c2a6d89 100644
--- a/src/main/java/dk/camelot64/kickc/test/ref/ptrtest.log
+++ b/src/main/java/dk/camelot64/kickc/test/ref/ptrtest.log
@@ -1808,38 +1808,6 @@ Loop head: rvaluevar::@1 tails: rvaluevar::@2 blocks: rvaluevar::@2 rvaluevar::@
 Loop head: rvalue::@1 tails: rvalue::@2 blocks: rvalue::@2 rvalue::@1  depth: 1
 Loop head: lvalue::@1 tails: lvalue::@2 blocks: lvalue::@2 lvalue::@1  depth: 1
 
-Initial phi equivalence classes
-[ lvaluevar::i#2 lvaluevar::i#1 ]
-[ lvaluevar::screen#2 lvaluevar::screen#1 ]
-[ rvaluevar::i#2 rvaluevar::i#1 ]
-[ rvaluevar::screen#2 rvaluevar::screen#1 ]
-[ rvalue::i#2 rvalue::i#1 ]
-[ lvalue::i#2 lvalue::i#1 ]
-Added variable rvaluevar::b#0 to zero page equivalence class [ rvaluevar::b#0 ]
-Added variable rvalue::b#0 to zero page equivalence class [ rvalue::b#0 ]
-Added variable rvalue::b#1 to zero page equivalence class [ rvalue::b#1 ]
-Added variable rvalue::b#2 to zero page equivalence class [ rvalue::b#2 ]
-Complete equivalence classes
-[ lvaluevar::i#2 lvaluevar::i#1 ]
-[ lvaluevar::screen#2 lvaluevar::screen#1 ]
-[ rvaluevar::i#2 rvaluevar::i#1 ]
-[ rvaluevar::screen#2 rvaluevar::screen#1 ]
-[ rvalue::i#2 rvalue::i#1 ]
-[ lvalue::i#2 lvalue::i#1 ]
-[ rvaluevar::b#0 ]
-[ rvalue::b#0 ]
-[ rvalue::b#1 ]
-[ rvalue::b#2 ]
-Allocated zp byte:2 to zp byte:2 [ lvaluevar::i#2 lvaluevar::i#1 ]
-Allocated zp ptr byte:3 to zp ptr byte:3 [ lvaluevar::screen#2 lvaluevar::screen#1 ]
-Allocated zp byte:5 to zp byte:5 [ rvaluevar::i#2 rvaluevar::i#1 ]
-Allocated zp ptr byte:6 to zp ptr byte:6 [ rvaluevar::screen#2 rvaluevar::screen#1 ]
-Allocated zp byte:8 to zp byte:8 [ rvalue::i#2 rvalue::i#1 ]
-Allocated zp byte:9 to zp byte:9 [ lvalue::i#2 lvalue::i#1 ]
-Allocated zp byte:10 to zp byte:10 [ rvaluevar::b#0 ]
-Allocated zp byte:11 to zp byte:11 [ rvalue::b#0 ]
-Allocated zp byte:12 to zp byte:12 [ rvalue::b#1 ]
-Allocated zp byte:13 to zp byte:13 [ rvalue::b#2 ]
 
 VARIABLE REGISTER WEIGHTS
 (void()) lvalue()
@@ -1875,77 +1843,38 @@ VARIABLE REGISTER WEIGHTS
 (byte*) rvaluevar::screen#1 11.0
 (byte*) rvaluevar::screen#2 11.0
 
-zp byte:2 [ lvaluevar::i#2 lvaluevar::i#1 ]
-zp ptr byte:3 [ lvaluevar::screen#2 lvaluevar::screen#1 ]
-zp byte:5 [ rvaluevar::i#2 rvaluevar::i#1 ]
-zp ptr byte:6 [ rvaluevar::screen#2 rvaluevar::screen#1 ]
-zp byte:8 [ rvalue::i#2 rvalue::i#1 ]
-zp byte:9 [ lvalue::i#2 lvalue::i#1 ]
-zp byte:10 [ rvaluevar::b#0 ]
-zp byte:11 [ rvalue::b#0 ]
-zp byte:12 [ rvalue::b#1 ]
-zp byte:13 [ rvalue::b#2 ]
-
-Uplifting max weight Infinity live range equivalence class zp byte:10 [ rvaluevar::b#0 ]
-Register Cycles: reg byte a 0
-Uplift to reg byte a succesfull.
-Register Cycles: reg byte x 0
-Uplift to reg byte x succesfull.
-Register Cycles: reg byte y 0
-Uplift to reg byte y succesfull.
-REGISTER UPLIFTING
-(void()) lvalue()
-(byte[1024]) lvalue::SCREEN
-(byte) lvalue::i
-(byte) lvalue::i#1 zp byte:9 22.0
-(byte) lvalue::i#2 zp byte:9 14.666666666666666
-(void()) lvaluevar()
-(byte) lvaluevar::b
-(byte) lvaluevar::i
-(byte) lvaluevar::i#1 zp byte:2 22.0
-(byte) lvaluevar::i#2 zp byte:2 8.25
-(byte*) lvaluevar::screen
-(byte*) lvaluevar::screen#1 zp ptr byte:3 11.0
-(byte*) lvaluevar::screen#2 zp ptr byte:3 11.0
-(void()) main()
-(void()) rvalue()
-(byte[1024]) rvalue::SCREEN
-(byte) rvalue::b
-(byte) rvalue::b#0 zp byte:11 Infinity
-(byte) rvalue::b#1 zp byte:12 Infinity
-(byte) rvalue::b#2 zp byte:13 Infinity
-(byte) rvalue::i
-(byte) rvalue::i#1 zp byte:8 22.0
-(byte) rvalue::i#2 zp byte:8 14.666666666666666
-(void()) rvaluevar()
-(byte) rvaluevar::b
-(byte) rvaluevar::b#0 zp byte:10 Infinity
-(byte) rvaluevar::i
-(byte) rvaluevar::i#1 zp byte:5 22.0
-(byte) rvaluevar::i#2 zp byte:5 8.25
-(byte*) rvaluevar::screen
-(byte*) rvaluevar::screen#1 zp ptr byte:6 11.0
-(byte*) rvaluevar::screen#2 zp ptr byte:6 11.0
-
-zp byte:2 [ lvaluevar::i#2 lvaluevar::i#1 ]
-zp ptr byte:3 [ lvaluevar::screen#2 lvaluevar::screen#1 ]
-zp byte:5 [ rvaluevar::i#2 rvaluevar::i#1 ]
-zp ptr byte:6 [ rvaluevar::screen#2 rvaluevar::screen#1 ]
-zp byte:8 [ rvalue::i#2 rvalue::i#1 ]
-zp byte:9 [ lvalue::i#2 lvalue::i#1 ]
-zp byte:10 [ rvaluevar::b#0 ]
-zp byte:11 [ rvalue::b#0 ]
-zp byte:12 [ rvalue::b#1 ]
-zp byte:13 [ rvalue::b#2 ]
-
-Coalescing zero page register [ zp byte:2 [ lvaluevar::i#2 lvaluevar::i#1 ] ] with [ zp byte:5 [ rvaluevar::i#2 rvaluevar::i#1 ] ]
-Coalescing zero page register [ zp byte:2 [ lvaluevar::i#2 lvaluevar::i#1 rvaluevar::i#2 rvaluevar::i#1 ] ] with [ zp byte:8 [ rvalue::i#2 rvalue::i#1 ] ]
-Coalescing zero page register [ zp byte:2 [ lvaluevar::i#2 lvaluevar::i#1 rvaluevar::i#2 rvaluevar::i#1 rvalue::i#2 rvalue::i#1 ] ] with [ zp byte:9 [ lvalue::i#2 lvalue::i#1 ] ]
-Coalescing zero page register [ zp byte:2 [ lvaluevar::i#2 lvaluevar::i#1 rvaluevar::i#2 rvaluevar::i#1 rvalue::i#2 rvalue::i#1 lvalue::i#2 lvalue::i#1 ] ] with [ zp byte:10 [ rvaluevar::b#0 ] ]
-Coalescing zero page register [ zp byte:2 [ lvaluevar::i#2 lvaluevar::i#1 rvaluevar::i#2 rvaluevar::i#1 rvalue::i#2 rvalue::i#1 lvalue::i#2 lvalue::i#1 rvaluevar::b#0 ] ] with [ zp byte:11 [ rvalue::b#0 ] ]
-Coalescing zero page register [ zp byte:2 [ lvaluevar::i#2 lvaluevar::i#1 rvaluevar::i#2 rvaluevar::i#1 rvalue::i#2 rvalue::i#1 lvalue::i#2 lvalue::i#1 rvaluevar::b#0 rvalue::b#0 ] ] with [ zp byte:12 [ rvalue::b#1 ] ]
-Coalescing zero page register [ zp byte:2 [ lvaluevar::i#2 lvaluevar::i#1 rvaluevar::i#2 rvaluevar::i#1 rvalue::i#2 rvalue::i#1 lvalue::i#2 lvalue::i#1 rvaluevar::b#0 rvalue::b#0 rvalue::b#1 ] ] with [ zp byte:13 [ rvalue::b#2 ] ]
-Coalescing zero page register [ zp ptr byte:3 [ lvaluevar::screen#2 lvaluevar::screen#1 ] ] with [ zp ptr byte:6 [ rvaluevar::screen#2 rvaluevar::screen#1 ] ]
+Initial phi equivalence classes
+[ lvaluevar::i#2 lvaluevar::i#1 ]
+[ lvaluevar::screen#2 lvaluevar::screen#1 ]
+[ rvaluevar::i#2 rvaluevar::i#1 ]
+[ rvaluevar::screen#2 rvaluevar::screen#1 ]
+[ rvalue::i#2 rvalue::i#1 ]
+[ lvalue::i#2 lvalue::i#1 ]
+Added variable rvaluevar::b#0 to zero page equivalence class [ rvaluevar::b#0 ]
+Added variable rvalue::b#0 to zero page equivalence class [ rvalue::b#0 ]
+Added variable rvalue::b#1 to zero page equivalence class [ rvalue::b#1 ]
+Added variable rvalue::b#2 to zero page equivalence class [ rvalue::b#2 ]
+Complete equivalence classes
+[ lvaluevar::i#2 lvaluevar::i#1 ]
+[ lvaluevar::screen#2 lvaluevar::screen#1 ]
+[ rvaluevar::i#2 rvaluevar::i#1 ]
+[ rvaluevar::screen#2 rvaluevar::screen#1 ]
+[ rvalue::i#2 rvalue::i#1 ]
+[ lvalue::i#2 lvalue::i#1 ]
+[ rvaluevar::b#0 ]
+[ rvalue::b#0 ]
+[ rvalue::b#1 ]
+[ rvalue::b#2 ]
+Allocated zp byte:2 to zp byte:2 [ lvaluevar::i#2 lvaluevar::i#1 ]
+Allocated zp ptr byte:3 to zp ptr byte:3 [ lvaluevar::screen#2 lvaluevar::screen#1 ]
+Allocated zp byte:5 to zp byte:5 [ rvaluevar::i#2 rvaluevar::i#1 ]
+Allocated zp ptr byte:6 to zp ptr byte:6 [ rvaluevar::screen#2 rvaluevar::screen#1 ]
+Allocated zp byte:8 to zp byte:8 [ rvalue::i#2 rvalue::i#1 ]
+Allocated zp byte:9 to zp byte:9 [ lvalue::i#2 lvalue::i#1 ]
+Allocated zp byte:10 to zp byte:10 [ rvaluevar::b#0 ]
+Allocated zp byte:11 to zp byte:11 [ rvalue::b#0 ]
+Allocated zp byte:12 to zp byte:12 [ rvalue::b#1 ]
+Allocated zp byte:13 to zp byte:13 [ rvalue::b#2 ]
 INITIAL ASM
 //SEG0 @BEGIN
 BBEGIN:
@@ -2137,6 +2066,63 @@ lvalue__B1_from_B2:
 //SEG70 [27] phi (byte) lvalue::i#2 = (byte) lvalue::i#1 -- register_copy 
   jmp lvalue__B1
 
+Uplifting max weight Infinity live range equivalence class zp byte:10 [ rvaluevar::b#0 ]
+Uplift to reg byte a succesfull.
+Uplift to reg byte x succesfull.
+Uplift to reg byte y succesfull.
+REGISTER UPLIFTING
+(void()) lvalue()
+(byte[1024]) lvalue::SCREEN
+(byte) lvalue::i
+(byte) lvalue::i#1 zp byte:9 22.0
+(byte) lvalue::i#2 zp byte:9 14.666666666666666
+(void()) lvaluevar()
+(byte) lvaluevar::b
+(byte) lvaluevar::i
+(byte) lvaluevar::i#1 zp byte:2 22.0
+(byte) lvaluevar::i#2 zp byte:2 8.25
+(byte*) lvaluevar::screen
+(byte*) lvaluevar::screen#1 zp ptr byte:3 11.0
+(byte*) lvaluevar::screen#2 zp ptr byte:3 11.0
+(void()) main()
+(void()) rvalue()
+(byte[1024]) rvalue::SCREEN
+(byte) rvalue::b
+(byte) rvalue::b#0 zp byte:11 Infinity
+(byte) rvalue::b#1 zp byte:12 Infinity
+(byte) rvalue::b#2 zp byte:13 Infinity
+(byte) rvalue::i
+(byte) rvalue::i#1 zp byte:8 22.0
+(byte) rvalue::i#2 zp byte:8 14.666666666666666
+(void()) rvaluevar()
+(byte) rvaluevar::b
+(byte) rvaluevar::b#0 zp byte:10 Infinity
+(byte) rvaluevar::i
+(byte) rvaluevar::i#1 zp byte:5 22.0
+(byte) rvaluevar::i#2 zp byte:5 8.25
+(byte*) rvaluevar::screen
+(byte*) rvaluevar::screen#1 zp ptr byte:6 11.0
+(byte*) rvaluevar::screen#2 zp ptr byte:6 11.0
+
+zp byte:2 [ lvaluevar::i#2 lvaluevar::i#1 ]
+zp ptr byte:3 [ lvaluevar::screen#2 lvaluevar::screen#1 ]
+zp byte:5 [ rvaluevar::i#2 rvaluevar::i#1 ]
+zp ptr byte:6 [ rvaluevar::screen#2 rvaluevar::screen#1 ]
+zp byte:8 [ rvalue::i#2 rvalue::i#1 ]
+zp byte:9 [ lvalue::i#2 lvalue::i#1 ]
+zp byte:10 [ rvaluevar::b#0 ]
+zp byte:11 [ rvalue::b#0 ]
+zp byte:12 [ rvalue::b#1 ]
+zp byte:13 [ rvalue::b#2 ]
+
+Coalescing zero page register [ zp byte:2 [ lvaluevar::i#2 lvaluevar::i#1 ] ] with [ zp byte:5 [ rvaluevar::i#2 rvaluevar::i#1 ] ]
+Coalescing zero page register [ zp byte:2 [ lvaluevar::i#2 lvaluevar::i#1 rvaluevar::i#2 rvaluevar::i#1 ] ] with [ zp byte:8 [ rvalue::i#2 rvalue::i#1 ] ]
+Coalescing zero page register [ zp byte:2 [ lvaluevar::i#2 lvaluevar::i#1 rvaluevar::i#2 rvaluevar::i#1 rvalue::i#2 rvalue::i#1 ] ] with [ zp byte:9 [ lvalue::i#2 lvalue::i#1 ] ]
+Coalescing zero page register [ zp byte:2 [ lvaluevar::i#2 lvaluevar::i#1 rvaluevar::i#2 rvaluevar::i#1 rvalue::i#2 rvalue::i#1 lvalue::i#2 lvalue::i#1 ] ] with [ zp byte:10 [ rvaluevar::b#0 ] ]
+Coalescing zero page register [ zp byte:2 [ lvaluevar::i#2 lvaluevar::i#1 rvaluevar::i#2 rvaluevar::i#1 rvalue::i#2 rvalue::i#1 lvalue::i#2 lvalue::i#1 rvaluevar::b#0 ] ] with [ zp byte:11 [ rvalue::b#0 ] ]
+Coalescing zero page register [ zp byte:2 [ lvaluevar::i#2 lvaluevar::i#1 rvaluevar::i#2 rvaluevar::i#1 rvalue::i#2 rvalue::i#1 lvalue::i#2 lvalue::i#1 rvaluevar::b#0 rvalue::b#0 ] ] with [ zp byte:12 [ rvalue::b#1 ] ]
+Coalescing zero page register [ zp byte:2 [ lvaluevar::i#2 lvaluevar::i#1 rvaluevar::i#2 rvaluevar::i#1 rvalue::i#2 rvalue::i#1 lvalue::i#2 lvalue::i#1 rvaluevar::b#0 rvalue::b#0 rvalue::b#1 ] ] with [ zp byte:13 [ rvalue::b#2 ] ]
+Coalescing zero page register [ zp ptr byte:3 [ lvaluevar::screen#2 lvaluevar::screen#1 ] ] with [ zp ptr byte:6 [ rvaluevar::screen#2 rvaluevar::screen#1 ] ]
 Removing instruction jmp BEND
 Removing instruction jmp main__B1
 Removing instruction jmp main__B2
diff --git a/src/main/java/dk/camelot64/kickc/test/ref/summin.log b/src/main/java/dk/camelot64/kickc/test/ref/summin.log
index 9e9e172ba..afbc0ed65 100644
--- a/src/main/java/dk/camelot64/kickc/test/ref/summin.log
+++ b/src/main/java/dk/camelot64/kickc/test/ref/summin.log
@@ -350,6 +350,22 @@ Found 0 loops in scope []
 Found 0 loops in scope [sum]
 NATURAL LOOPS WITH DEPTH
 
+
+VARIABLE REGISTER WEIGHTS
+(byte) s1
+(byte) s1#0 0.5714285714285714
+(byte) s2
+(byte) s2#0 4.0
+(byte) s3
+(byte) s3#0 Infinity
+(byte()) sum((byte) sum::a , (byte) sum::b)
+(byte) sum::a
+(byte) sum::a#2 2.0
+(byte) sum::b
+(byte) sum::b#2 2.0
+(byte) sum::return
+(byte) sum::return#0 1.2000000000000002
+
 Initial phi equivalence classes
 [ sum::a#2 ]
 [ sum::b#2 ]
@@ -370,61 +386,6 @@ Allocated zp byte:4 to zp byte:4 [ s1#0 ]
 Allocated zp byte:5 to zp byte:5 [ s2#0 ]
 Allocated zp byte:6 to zp byte:6 [ s3#0 ]
 Allocated zp byte:7 to zp byte:7 [ sum::return#0 ]
-
-VARIABLE REGISTER WEIGHTS
-(byte) s1
-(byte) s1#0 0.5714285714285714
-(byte) s2
-(byte) s2#0 4.0
-(byte) s3
-(byte) s3#0 Infinity
-(byte()) sum((byte) sum::a , (byte) sum::b)
-(byte) sum::a
-(byte) sum::a#2 2.0
-(byte) sum::b
-(byte) sum::b#2 2.0
-(byte) sum::return
-(byte) sum::return#0 1.2000000000000002
-
-zp byte:2 [ sum::a#2 ]
-zp byte:3 [ sum::b#2 ]
-zp byte:4 [ s1#0 ]
-zp byte:5 [ s2#0 ]
-zp byte:6 [ s3#0 ]
-zp byte:7 [ sum::return#0 ]
-
-Uplifting max weight Infinity live range equivalence class zp byte:6 [ s3#0 ]
-Register Cycles: reg byte a 0
-Uplift to reg byte a succesfull.
-Register Cycles: reg byte x 0
-Uplift to reg byte x succesfull.
-Register Cycles: reg byte y 0
-Uplift to reg byte y succesfull.
-REGISTER UPLIFTING
-(byte) s1
-(byte) s1#0 zp byte:4 0.5714285714285714
-(byte) s2
-(byte) s2#0 zp byte:5 4.0
-(byte) s3
-(byte) s3#0 zp byte:6 Infinity
-(byte()) sum((byte) sum::a , (byte) sum::b)
-(byte) sum::a
-(byte) sum::a#2 zp byte:2 2.0
-(byte) sum::b
-(byte) sum::b#2 zp byte:3 2.0
-(byte) sum::return
-(byte) sum::return#0 zp byte:7 1.2000000000000002
-
-zp byte:2 [ sum::a#2 ]
-zp byte:3 [ sum::b#2 ]
-zp byte:4 [ s1#0 ]
-zp byte:5 [ s2#0 ]
-zp byte:6 [ s3#0 ]
-zp byte:7 [ sum::return#0 ]
-
-Coalescing zero page register [ zp byte:2 [ sum::a#2 ] ] with [ zp byte:5 [ s2#0 ] ]
-Coalescing zero page register [ zp byte:2 [ sum::a#2 s2#0 ] ] with [ zp byte:6 [ s3#0 ] ]
-Coalescing zero page register [ zp byte:2 [ sum::a#2 s2#0 s3#0 ] ] with [ zp byte:7 [ sum::return#0 ] ]
 INITIAL ASM
 //SEG0 @BEGIN
 BBEGIN:
@@ -481,6 +442,35 @@ sum__Breturn:
 //SEG18 [7] return  [ sum::return#0 s1#0 ]
   rts
 
+Uplifting max weight Infinity live range equivalence class zp byte:6 [ s3#0 ]
+Uplift to reg byte a succesfull.
+Uplift to reg byte x succesfull.
+Uplift to reg byte y succesfull.
+REGISTER UPLIFTING
+(byte) s1
+(byte) s1#0 zp byte:4 0.5714285714285714
+(byte) s2
+(byte) s2#0 zp byte:5 4.0
+(byte) s3
+(byte) s3#0 zp byte:6 Infinity
+(byte()) sum((byte) sum::a , (byte) sum::b)
+(byte) sum::a
+(byte) sum::a#2 zp byte:2 2.0
+(byte) sum::b
+(byte) sum::b#2 zp byte:3 2.0
+(byte) sum::return
+(byte) sum::return#0 zp byte:7 1.2000000000000002
+
+zp byte:2 [ sum::a#2 ]
+zp byte:3 [ sum::b#2 ]
+zp byte:4 [ s1#0 ]
+zp byte:5 [ s2#0 ]
+zp byte:6 [ s3#0 ]
+zp byte:7 [ sum::return#0 ]
+
+Coalescing zero page register [ zp byte:2 [ sum::a#2 ] ] with [ zp byte:5 [ s2#0 ] ]
+Coalescing zero page register [ zp byte:2 [ sum::a#2 s2#0 ] ] with [ zp byte:6 [ s3#0 ] ]
+Coalescing zero page register [ zp byte:2 [ sum::a#2 s2#0 s3#0 ] ] with [ zp byte:7 [ sum::return#0 ] ]
 Removing instruction jmp B2
 Removing instruction jmp B3
 Removing instruction jmp BEND
diff --git a/src/main/java/dk/camelot64/kickc/test/ref/useglobal.log b/src/main/java/dk/camelot64/kickc/test/ref/useglobal.log
index 88eb91b5b..fa74bf32f 100644
--- a/src/main/java/dk/camelot64/kickc/test/ref/useglobal.log
+++ b/src/main/java/dk/camelot64/kickc/test/ref/useglobal.log
@@ -199,19 +199,13 @@ Found 0 loops in scope []
 Found 0 loops in scope [main]
 NATURAL LOOPS WITH DEPTH
 
-Initial phi equivalence classes
-Complete equivalence classes
 
 VARIABLE REGISTER WEIGHTS
 (byte*) SCREEN
 (void()) main()
 
-
-REGISTER UPLIFTING
-(byte*) SCREEN
-(void()) main()
-
-
+Initial phi equivalence classes
+Complete equivalence classes
 INITIAL ASM
 //SEG0 @BEGIN
 BBEGIN:
@@ -231,6 +225,11 @@ main__Breturn:
 //SEG6 [2] return  [ ]
   rts
 
+REGISTER UPLIFTING
+(byte*) SCREEN
+(void()) main()
+
+
 Removing instruction jmp BEND
 Removing instruction jmp main__Breturn
 Succesful ASM optimization Pass5NextJumpElimination