mirror of
https://gitlab.com/camelot/kickc.git
synced 2024-11-23 08:32:39 +00:00
Merge remote-tracking branch 'origin/328-memvars' into 328-memvars
This commit is contained in:
Jesper Gravgaard
commit
3491ff02cb
@ -0,0 +1,2 @@
|
||||
stx $ff
|
||||
ora $ff
|
||||
@ -0,0 +1,2 @@
|
||||
sty $ff
|
||||
ora $ff
|
||||
1
src/main/fragment/mos6502-common/vboaa=vboxx.asm
Normal file
1
src/main/fragment/mos6502-common/vboaa=vboxx.asm
Normal file
@ -0,0 +1 @@
|
||||
txa
|
||||
1
src/main/fragment/mos6502-common/vboaa=vboyy.asm
Normal file
1
src/main/fragment/mos6502-common/vboaa=vboyy.asm
Normal file
@ -0,0 +1 @@
|
||||
tya
|
||||
1
src/main/fragment/mos6502-common/vboxx=vboaa.asm
Normal file
1
src/main/fragment/mos6502-common/vboxx=vboaa.asm
Normal file
@ -0,0 +1 @@
|
||||
tax
|
||||
2
src/main/fragment/mos6502-common/vboxx=vboyy.asm
Normal file
2
src/main/fragment/mos6502-common/vboxx=vboyy.asm
Normal file
@ -0,0 +1,2 @@
|
||||
sty $ff
|
||||
ldx $ff
|
||||
1
src/main/fragment/mos6502-common/vboyy=vboaa.asm
Normal file
1
src/main/fragment/mos6502-common/vboyy=vboaa.asm
Normal file
@ -0,0 +1 @@
|
||||
tay
|
||||
2
src/main/fragment/mos6502-common/vboyy=vboxx.asm
Normal file
2
src/main/fragment/mos6502-common/vboyy=vboxx.asm
Normal file
@ -0,0 +1,2 @@
|
||||
stx $ff
|
||||
ldy $ff
|
||||
@ -0,0 +1,13 @@
|
||||
clc
|
||||
lda {c1}
|
||||
adc #2
|
||||
sta {m1}
|
||||
lda {c1}+1
|
||||
adc #0
|
||||
sta {m1}+1
|
||||
lda {c1}+2
|
||||
adc #0
|
||||
sta {m1}+2
|
||||
lda {c1}+3
|
||||
adc #0
|
||||
sta {m1}+3
|
||||
@ -79,9 +79,9 @@ public class AsmFragmentInstance {
|
||||
if(boundValue instanceof Variable) {
|
||||
Variable boundVar = (Variable) boundValue;
|
||||
Registers.Register register = boundVar.getAllocation();
|
||||
if(register != null && register instanceof Registers.RegisterZp) {
|
||||
if(register != null && register instanceof Registers.RegisterZpMem) {
|
||||
return new AsmParameter(AsmFormat.getAsmParamName(boundVar, codeScopeRef), true);
|
||||
} else if(register!=null && register instanceof Registers.RegisterMemory) {
|
||||
} else if(register!=null && register instanceof Registers.RegisterMainMem) {
|
||||
return new AsmParameter(AsmFormat.getAsmParamName(boundVar, codeScopeRef), false);
|
||||
} else {
|
||||
throw new RuntimeException("Register Type not implemented " + register);
|
||||
|
||||
@ -449,23 +449,16 @@ public class AsmFragmentInstanceSpecFactory {
|
||||
* @return The register part of the binding name.
|
||||
*/
|
||||
private String getRegisterName(Registers.Register register) {
|
||||
if(
|
||||
Registers.RegisterType.ZP_BOOL.equals(register.getType()) ||
|
||||
Registers.RegisterType.ZP_BYTE.equals(register.getType()) ||
|
||||
Registers.RegisterType.ZP_WORD.equals(register.getType()) ||
|
||||
Registers.RegisterType.ZP_MEM.equals(register.getType()) ||
|
||||
Registers.RegisterType.ZP_DWORD.equals(register.getType()) ||
|
||||
Registers.RegisterType.ZP_STRUCT.equals(register.getType())
|
||||
) {
|
||||
if(Registers.RegisterType.ZP_MEM.equals(register.getType())) {
|
||||
// Examine if the ZP register is already bound
|
||||
Registers.RegisterZp registerZp = (Registers.RegisterZp) register;
|
||||
Registers.RegisterZpMem registerZp = (Registers.RegisterZpMem) register;
|
||||
String zpNameIdx = null;
|
||||
for(String boundName : bindings.keySet()) {
|
||||
Value boundValue = bindings.get(boundName);
|
||||
if(boundValue instanceof Variable) {
|
||||
Registers.Register boundRegister = ((Variable) boundValue).getAllocation();
|
||||
if(boundRegister != null && boundRegister.isZp()) {
|
||||
Registers.RegisterZp boundRegisterZp = (Registers.RegisterZp) boundRegister;
|
||||
Registers.RegisterZpMem boundRegisterZp = (Registers.RegisterZpMem) boundRegister;
|
||||
if(registerZp.getZp() == boundRegisterZp.getZp()) {
|
||||
// Found other register with same ZP address!
|
||||
zpNameIdx = boundName.substring(boundName.length() - 1);
|
||||
@ -479,13 +472,13 @@ public class AsmFragmentInstanceSpecFactory {
|
||||
zpNameIdx = Integer.toString(nextZpIdx++);
|
||||
}
|
||||
return "z" + zpNameIdx;
|
||||
} else if(Registers.RegisterType.MEMORY.equals(register.getType())) {
|
||||
} else if(Registers.RegisterType.MAIN_MEM.equals(register.getType())) {
|
||||
String memNameIdx = null;
|
||||
for(String boundName : bindings.keySet()) {
|
||||
Value boundValue = bindings.get(boundName);
|
||||
if(boundValue instanceof Variable) {
|
||||
Registers.Register boundRegister = ((Variable) boundValue).getAllocation();
|
||||
if(boundRegister instanceof Registers.RegisterMemory) {
|
||||
if(boundRegister instanceof Registers.RegisterMainMem) {
|
||||
if(boundRegister.equals(register)) {
|
||||
memNameIdx = boundName.substring(boundName.length() - 1);
|
||||
break;
|
||||
@ -497,11 +490,11 @@ public class AsmFragmentInstanceSpecFactory {
|
||||
memNameIdx = Integer.toString(nextZpIdx++);
|
||||
}
|
||||
return "m" + memNameIdx;
|
||||
} else if(Registers.RegisterType.REG_A_BYTE.equals(register.getType())) {
|
||||
} else if(Registers.RegisterType.REG_A.equals(register.getType())) {
|
||||
return "aa";
|
||||
} else if(Registers.RegisterType.REG_X_BYTE.equals(register.getType())) {
|
||||
} else if(Registers.RegisterType.REG_X.equals(register.getType())) {
|
||||
return "xx";
|
||||
} else if(Registers.RegisterType.REG_Y_BYTE.equals(register.getType())) {
|
||||
} else if(Registers.RegisterType.REG_Y.equals(register.getType())) {
|
||||
return "yy";
|
||||
} else if(Registers.RegisterType.REG_ALU.equals(register.getType())) {
|
||||
throw new AsmFragmentInstance.AluNotApplicableException();
|
||||
|
||||
@ -106,12 +106,12 @@ public class AsmFragmentTemplate {
|
||||
Variable v4 = new Variable("m4", scope, SymbolType.BYTE, null, SymbolVariable.StorageStrategy.MEMORY);
|
||||
Variable v5 = new Variable("m5", scope, SymbolType.BYTE, null, SymbolVariable.StorageStrategy.MEMORY);
|
||||
Variable v6 = new Variable("m6", scope, SymbolType.BYTE, null, SymbolVariable.StorageStrategy.MEMORY);
|
||||
v1.setAllocation(new Registers.RegisterMemory(v1.getRef(), 1));
|
||||
v2.setAllocation(new Registers.RegisterMemory(v2.getRef(), 1));
|
||||
v3.setAllocation(new Registers.RegisterMemory(v3.getRef(), 1));
|
||||
v4.setAllocation(new Registers.RegisterMemory(v4.getRef(), 1));
|
||||
v5.setAllocation(new Registers.RegisterMemory(v5.getRef(), 1));
|
||||
v6.setAllocation(new Registers.RegisterMemory(v6.getRef(), 1));
|
||||
v1.setAllocation(new Registers.RegisterMainMem(v1.getRef(), 1));
|
||||
v2.setAllocation(new Registers.RegisterMainMem(v2.getRef(), 1));
|
||||
v3.setAllocation(new Registers.RegisterMainMem(v3.getRef(), 1));
|
||||
v4.setAllocation(new Registers.RegisterMainMem(v4.getRef(), 1));
|
||||
v5.setAllocation(new Registers.RegisterMainMem(v5.getRef(), 1));
|
||||
v6.setAllocation(new Registers.RegisterMainMem(v6.getRef(), 1));
|
||||
if(signature.contains("m1")) bindings.put("m1", v1);
|
||||
if(signature.contains("m2")) bindings.put("m2", v2);
|
||||
if(signature.contains("m3")) bindings.put("m3", v3);
|
||||
|
||||
@ -42,19 +42,13 @@ public class Registers {
|
||||
|
||||
/** The register type. */
|
||||
public enum RegisterType {
|
||||
REG_A_BYTE,
|
||||
REG_Y_BYTE,
|
||||
REG_X_BYTE,
|
||||
REG_A,
|
||||
REG_Y,
|
||||
REG_X,
|
||||
REG_ALU,
|
||||
ZP_BYTE,
|
||||
ZP_WORD,
|
||||
ZP_DWORD,
|
||||
ZP_STRUCT,
|
||||
ZP_BOOL,
|
||||
ZP_VAR,
|
||||
ZP_MEM,
|
||||
MAIN_MEM,
|
||||
CONSTANT,
|
||||
MEMORY
|
||||
}
|
||||
|
||||
/** A register used for storing a single variable. */
|
||||
@ -66,15 +60,17 @@ public class Registers {
|
||||
|
||||
int getBytes();
|
||||
|
||||
boolean isNonRelocatable();
|
||||
|
||||
}
|
||||
|
||||
public static class RegisterMemory implements Register {
|
||||
public static class RegisterMainMem implements Register {
|
||||
|
||||
private VariableRef variableRef;
|
||||
|
||||
private int bytes;
|
||||
|
||||
public RegisterMemory(VariableRef variableRef, int bytes ) {
|
||||
public RegisterMainMem(VariableRef variableRef, int bytes ) {
|
||||
this.variableRef = variableRef;
|
||||
this.bytes = bytes;
|
||||
}
|
||||
@ -85,7 +81,7 @@ public class Registers {
|
||||
|
||||
@Override
|
||||
public RegisterType getType() {
|
||||
return RegisterType.MEMORY;
|
||||
return RegisterType.MAIN_MEM;
|
||||
}
|
||||
|
||||
@Override
|
||||
@ -98,6 +94,11 @@ public class Registers {
|
||||
return bytes;
|
||||
}
|
||||
|
||||
@Override
|
||||
public boolean isNonRelocatable() {
|
||||
return false;
|
||||
}
|
||||
|
||||
@Override
|
||||
public String toString() {
|
||||
return "mem "+variableRef.toString();
|
||||
@ -112,7 +113,7 @@ public class Registers {
|
||||
public boolean equals(Object o) {
|
||||
if(this == o) return true;
|
||||
if(o == null || getClass() != o.getClass()) return false;
|
||||
RegisterMemory that = (RegisterMemory) o;
|
||||
RegisterMainMem that = (RegisterMainMem) o;
|
||||
return Objects.equals(variableRef, that.variableRef);
|
||||
}
|
||||
|
||||
@ -122,65 +123,39 @@ public class Registers {
|
||||
}
|
||||
}
|
||||
|
||||
public static abstract class RegisterZp implements Register {
|
||||
/** Two zero page addresses used as a register for a single unsigned word variable. */
|
||||
public static class RegisterZpMem implements Register {
|
||||
|
||||
/** The ZP address used for the byte. */
|
||||
private int zp;
|
||||
|
||||
RegisterZp(int zp) {
|
||||
|
||||
/** The number of bytes that the register takes up*/
|
||||
private int bytes;
|
||||
|
||||
/** True if the address of the register is delcared in the code (non-relocatable)*/
|
||||
private boolean isNonRelocatable;
|
||||
|
||||
|
||||
public RegisterZpMem(int zp, int bytes, boolean isNonRelocatable) {
|
||||
this.zp = zp;
|
||||
this.bytes = bytes;
|
||||
this.isNonRelocatable = isNonRelocatable;
|
||||
}
|
||||
|
||||
public RegisterZpMem(int zp, int bytes) {
|
||||
this(zp, bytes, false);
|
||||
}
|
||||
|
||||
public int getZp() {
|
||||
return zp;
|
||||
}
|
||||
|
||||
public abstract int getBytes();
|
||||
|
||||
@Override
|
||||
public boolean isZp() {
|
||||
return true;
|
||||
}
|
||||
|
||||
@Override
|
||||
public String toString() {
|
||||
return "zp " + getType().toString() + ":" + zp;
|
||||
}
|
||||
|
||||
@Override
|
||||
public String toString(Program program) {
|
||||
return toString();
|
||||
}
|
||||
|
||||
@Override
|
||||
public boolean equals(Object o) {
|
||||
if(this == o) {
|
||||
return true;
|
||||
}
|
||||
if(o == null || getClass() != o.getClass()) {
|
||||
return false;
|
||||
}
|
||||
RegisterZp that = (RegisterZp) o;
|
||||
return zp == that.zp;
|
||||
}
|
||||
|
||||
@Override
|
||||
public int hashCode() {
|
||||
return zp+31*getClass().hashCode();
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/** Two zero page addresses used as a register for a single unsigned word variable. */
|
||||
public static class RegisterZpMem extends RegisterZp {
|
||||
|
||||
int bytes;
|
||||
|
||||
public RegisterZpMem(int zp, int bytes) {
|
||||
super(zp);
|
||||
this.bytes = bytes;
|
||||
}
|
||||
|
||||
@Override
|
||||
public RegisterType getType() {
|
||||
return RegisterType.ZP_MEM;
|
||||
@ -190,109 +165,43 @@ public class Registers {
|
||||
return bytes;
|
||||
}
|
||||
|
||||
public boolean isNonRelocatable() {
|
||||
return isNonRelocatable;
|
||||
}
|
||||
|
||||
@Override
|
||||
public String toString() {
|
||||
String typeString;
|
||||
if(getBytes()==1) {
|
||||
typeString = RegisterType.ZP_BYTE.toString();
|
||||
typeString = "ZP_BYTE";
|
||||
} else if(getBytes()==2) {
|
||||
typeString = RegisterType.ZP_WORD.toString();
|
||||
typeString = "ZP_WORD";
|
||||
} else if(getBytes()==4) {
|
||||
typeString = RegisterType.ZP_DWORD.toString();
|
||||
typeString = "ZP_DWORD";
|
||||
} else {
|
||||
typeString = RegisterType.ZP_MEM.toString();
|
||||
typeString = "ZP_MEM";
|
||||
}
|
||||
return "zp " + typeString + ":" + getZp();
|
||||
}
|
||||
|
||||
@Override
|
||||
public boolean equals(Object o) {
|
||||
return super.equals(o);
|
||||
}
|
||||
|
||||
@Override
|
||||
public int hashCode() {
|
||||
return super.hashCode();
|
||||
}
|
||||
}
|
||||
|
||||
/** A zero page address used as a register for a declared register allocation. Size is initially unknown and will be resolved when performing allocation by setting the type. */
|
||||
public static class RegisterZpDeclared extends RegisterZp {
|
||||
|
||||
private RegisterType type;
|
||||
|
||||
public RegisterZpDeclared(int zp) {
|
||||
super(zp);
|
||||
this.type = RegisterType.ZP_VAR;
|
||||
}
|
||||
|
||||
@Override
|
||||
public RegisterType getType() {
|
||||
return type;
|
||||
}
|
||||
|
||||
public void setType(RegisterType type) {
|
||||
this.type = type;
|
||||
}
|
||||
|
||||
@Override
|
||||
public int getBytes() {
|
||||
return -1;
|
||||
public String toString(Program program) {
|
||||
return toString();
|
||||
}
|
||||
|
||||
@Override
|
||||
public boolean equals(Object o) {
|
||||
if(this == o) return true;
|
||||
if(o == null || getClass() != o.getClass()) return false;
|
||||
if(!super.equals(o)) return false;
|
||||
RegisterZpDeclared that = (RegisterZpDeclared) o;
|
||||
return type == that.type;
|
||||
RegisterZpMem that = (RegisterZpMem) o;
|
||||
return zp == that.zp &&
|
||||
bytes == that.bytes &&
|
||||
isNonRelocatable == that.isNonRelocatable;
|
||||
}
|
||||
|
||||
@Override
|
||||
public int hashCode() {
|
||||
return Objects.hash(super.hashCode(), type);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
/** Zero page addresses used as a register for a struct variable. */
|
||||
public static class RegisterZpStruct extends RegisterZp {
|
||||
|
||||
private int bytes;
|
||||
|
||||
public RegisterZpStruct(int zp, int bytes) {
|
||||
super(zp);
|
||||
this.bytes = bytes;
|
||||
}
|
||||
|
||||
@Override
|
||||
public RegisterType getType() {
|
||||
return RegisterType.ZP_STRUCT;
|
||||
}
|
||||
|
||||
@Override
|
||||
public int getBytes() {
|
||||
return bytes;
|
||||
}
|
||||
}
|
||||
|
||||
/** A zero page address used as a register for a boolean variable. */
|
||||
public static class RegisterZpBool extends RegisterZp {
|
||||
|
||||
public RegisterZpBool(int zp) {
|
||||
super(zp);
|
||||
}
|
||||
|
||||
@Override
|
||||
public RegisterType getType() {
|
||||
return RegisterType.ZP_BOOL;
|
||||
}
|
||||
|
||||
@Override
|
||||
public int getBytes() {
|
||||
return 1;
|
||||
return Objects.hash(zp, bytes, isNonRelocatable);
|
||||
}
|
||||
}
|
||||
|
||||
@ -311,6 +220,11 @@ public class Registers {
|
||||
return 1;
|
||||
}
|
||||
|
||||
@Override
|
||||
public boolean isNonRelocatable() {
|
||||
return true;
|
||||
}
|
||||
|
||||
@Override
|
||||
public abstract String toString();
|
||||
|
||||
@ -339,7 +253,7 @@ public class Registers {
|
||||
public static class RegisterXByte extends RegisterCpuByte {
|
||||
@Override
|
||||
public RegisterType getType() {
|
||||
return RegisterType.REG_X_BYTE;
|
||||
return RegisterType.REG_X;
|
||||
}
|
||||
|
||||
@Override
|
||||
@ -353,7 +267,7 @@ public class Registers {
|
||||
public static class RegisterYByte extends RegisterCpuByte {
|
||||
@Override
|
||||
public RegisterType getType() {
|
||||
return RegisterType.REG_Y_BYTE;
|
||||
return RegisterType.REG_Y;
|
||||
}
|
||||
|
||||
@Override
|
||||
@ -367,7 +281,7 @@ public class Registers {
|
||||
public static class RegisterAByte extends RegisterCpuByte {
|
||||
@Override
|
||||
public RegisterType getType() {
|
||||
return RegisterType.REG_A_BYTE;
|
||||
return RegisterType.REG_A;
|
||||
}
|
||||
|
||||
@Override
|
||||
@ -410,6 +324,11 @@ public class Registers {
|
||||
return false;
|
||||
}
|
||||
|
||||
@Override
|
||||
public boolean isNonRelocatable() {
|
||||
return false;
|
||||
}
|
||||
|
||||
@Override
|
||||
public int getBytes() {
|
||||
return 0;
|
||||
|
||||
@ -40,7 +40,7 @@ public class ConstantSymbolPointer implements ConstantValue {
|
||||
if(symbol instanceof Variable) {
|
||||
Registers.Register allocation = ((Variable) symbol).getAllocation();
|
||||
if(allocation!=null && allocation.isZp()) {
|
||||
int zp = ((Registers.RegisterZp) allocation).getZp();
|
||||
int zp = ((Registers.RegisterZpMem) allocation).getZp();
|
||||
return new ConstantInteger((long)zp, SymbolType.BYTE);
|
||||
}
|
||||
}
|
||||
|
||||
@ -715,7 +715,7 @@ public class Pass0GenerateStatementSequence extends KickCParserBaseVisitor<Objec
|
||||
if(address>255) {
|
||||
throw new CompileError("Error! Register not on zeropage " + directiveRegister.address, source);
|
||||
}
|
||||
Registers.Register register = new Registers.RegisterZpDeclared(address.intValue());
|
||||
Registers.Register register = new Registers.RegisterZpMem(address.intValue(), -1, true);
|
||||
lValue.setDeclaredRegister(register);
|
||||
}
|
||||
} else {
|
||||
|
||||
@ -22,7 +22,7 @@ public class Pass4AssertZeropageAllocation extends Pass2Base {
|
||||
for(Variable variable : allVariables) {
|
||||
Registers.Register allocation = variable.getAllocation();
|
||||
if(allocation!=null && allocation.isZp()) {
|
||||
int zp = ((Registers.RegisterZp) allocation).getZp();
|
||||
int zp = ((Registers.RegisterZpMem) allocation).getZp();
|
||||
int sizeBytes = variable.getType().getSizeBytes();
|
||||
if(zp+sizeBytes>0x100) {
|
||||
// Allocation is outside ZP!
|
||||
|
||||
@ -269,8 +269,8 @@ public class Pass4CodeGeneration {
|
||||
Registers.Register allocation = param.getAllocation();
|
||||
if(i++ > 0) signature.append(", ");
|
||||
signature.append(param.getType().getTypeName()).append(" ");
|
||||
if(allocation instanceof Registers.RegisterZp) {
|
||||
Registers.RegisterZp registerZp = (Registers.RegisterZp) allocation;
|
||||
if(allocation instanceof Registers.RegisterZpMem) {
|
||||
Registers.RegisterZpMem registerZp = (Registers.RegisterZpMem) allocation;
|
||||
signature.append("zeropage(").append(AsmFormat.getAsmNumber(registerZp.getZp())).append(")");
|
||||
} else if(allocation instanceof Registers.RegisterAByte) {
|
||||
signature.append("register(A)");
|
||||
@ -666,7 +666,7 @@ public class Pass4CodeGeneration {
|
||||
for(Variable scopeVar : scopeVars) {
|
||||
Registers.Register register = scopeVar.getAllocation();
|
||||
if(register != null && register.isZp()) {
|
||||
Registers.RegisterZp registerZp = (Registers.RegisterZp) register;
|
||||
Registers.RegisterZpMem registerZp = (Registers.RegisterZpMem) register;
|
||||
String asmName = scopeVar.getAsmName();
|
||||
if(asmName != null && !added.contains(asmName)) {
|
||||
// Add any comments
|
||||
|
||||
@ -25,6 +25,7 @@ public class Pass4RegisterUpliftPotentialInitialize extends Pass2Base {
|
||||
RegisterPotentials registerPotentials = new RegisterPotentials();
|
||||
for(LiveRangeEquivalenceClass equivalenceClass : liveRangeEquivalenceClassSet.getEquivalenceClasses()) {
|
||||
Registers.Register declaredRegister = null;
|
||||
int bytes = -1;
|
||||
for(VariableRef varRef : equivalenceClass.getVariables()) {
|
||||
Variable variable = getProgram().getScope().getVariable(varRef);
|
||||
if(variable.getDeclaredRegister() != null) { //TODO: Handle register/memory/storage strategy differently!
|
||||
@ -36,25 +37,27 @@ public class Pass4RegisterUpliftPotentialInitialize extends Pass2Base {
|
||||
);
|
||||
}
|
||||
declaredRegister = variable.getDeclaredRegister();
|
||||
bytes = variable.getType().getSizeBytes();
|
||||
}
|
||||
}
|
||||
if(declaredRegister != null) {
|
||||
registerPotentials.setPotentialRegisters(equivalenceClass, Arrays.asList(declaredRegister));
|
||||
if(declaredRegister instanceof Registers.RegisterZpMem) {
|
||||
int zp = ((Registers.RegisterZpMem) declaredRegister).getZp();
|
||||
Registers.RegisterZpMem zpRegister = new Registers.RegisterZpMem(zp, bytes, true);
|
||||
registerPotentials.setPotentialRegisters(equivalenceClass, Arrays.asList(zpRegister));
|
||||
} else {
|
||||
registerPotentials.setPotentialRegisters(equivalenceClass, Arrays.asList(declaredRegister));
|
||||
}
|
||||
} else {
|
||||
Registers.Register defaultRegister = equivalenceClass.getRegister();
|
||||
Registers.RegisterType registerType = defaultRegister.getType();
|
||||
List<Registers.Register> potentials = new ArrayList<>();
|
||||
potentials.add(defaultRegister);
|
||||
boolean isByte1 = registerType.equals(Registers.RegisterType.ZP_BYTE);
|
||||
boolean isByte2 = defaultRegister instanceof Registers.RegisterZpMem && ((Registers.RegisterZpMem) defaultRegister).getBytes() == 1;
|
||||
if((isByte1 || isByte2) && !varVolatile(equivalenceClass)) {
|
||||
boolean isByte2 = defaultRegister.isZp() && defaultRegister.getBytes() == 1;
|
||||
if(isByte2 && !varVolatile(equivalenceClass)) {
|
||||
potentials.add(Registers.getRegisterA());
|
||||
potentials.add(Registers.getRegisterX());
|
||||
potentials.add(Registers.getRegisterY());
|
||||
}
|
||||
if(registerType.equals(Registers.RegisterType.ZP_BOOL) && !varVolatile(equivalenceClass)) {
|
||||
potentials.add(Registers.getRegisterA());
|
||||
}
|
||||
registerPotentials.setPotentialRegisters(equivalenceClass, potentials);
|
||||
}
|
||||
}
|
||||
|
||||
@ -24,9 +24,8 @@ public class Pass4RegisterUpliftRemains extends Pass2Base {
|
||||
|
||||
for(LiveRangeEquivalenceClass equivalenceClass : equivalenceClasses) {
|
||||
Registers.Register register = equivalenceClass.getRegister();
|
||||
boolean isByte1 = register.getType().equals(Registers.RegisterType.ZP_BYTE);
|
||||
boolean isByte2 = register instanceof Registers.RegisterZpMem && ((Registers.RegisterZpMem) register).getBytes()==1;
|
||||
if(isByte1 || isByte2) {
|
||||
boolean isByte2 = register.isZp() && register.getBytes()==1;
|
||||
if(isByte2) {
|
||||
getLog().append("Attempting to uplift remaining variables in" + equivalenceClass);
|
||||
RegisterCombinationIterator combinationIterator = new RegisterCombinationIterator(Arrays.asList(equivalenceClass), getProgram().getRegisterPotentials());
|
||||
VariableRef variableRef = equivalenceClass.getVariables().get(0);
|
||||
|
||||
@ -40,8 +40,8 @@ public class Pass4RegistersFinalize extends Pass2Base {
|
||||
}
|
||||
// Add all ZP's declared hardcoded register for a live variable
|
||||
for(Variable variable : getSymbols().getAllVariables(true)) {
|
||||
if(variable.getDeclaredRegister() instanceof Registers.RegisterZpDeclared) { //TODO: Handle register/memory/storage strategy differently!
|
||||
int zp = ((Registers.RegisterZpDeclared) variable.getDeclaredRegister()).getZp();
|
||||
if(variable.getDeclaredRegister() instanceof Registers.RegisterZpMem) {
|
||||
int zp = ((Registers.RegisterZpMem) variable.getDeclaredRegister()).getZp();
|
||||
int sizeBytes = variable.getType().getSizeBytes();
|
||||
for(int i=0;i<sizeBytes; i++) {
|
||||
if(!reservedZp.contains(zp+i))
|
||||
@ -57,23 +57,20 @@ public class Pass4RegistersFinalize extends Pass2Base {
|
||||
for(VariableRef variableRef : equivalenceClass.getVariables()) {
|
||||
Variable variable = getProgram().getScope().getVariable(variableRef);
|
||||
Registers.Register declaredRegister = variable.getDeclaredRegister(); //TODO: Handle register/memory/storage strategy differently!
|
||||
Registers.Register register = declaredRegister;
|
||||
if(declaredRegister !=null) {
|
||||
if(declaredRegister instanceof Registers.RegisterZpDeclared) {
|
||||
if(declaredRegister.getType().equals(Registers.RegisterType.ZP_VAR)) {
|
||||
Registers.RegisterType registerType = getRegisterType(variable);
|
||||
((Registers.RegisterZpDeclared) declaredRegister).setType(registerType);
|
||||
getLog().append("Setting declared register type "+variable.toString(getProgram())+" to "+registerType);
|
||||
}
|
||||
}
|
||||
|
||||
if(equivalenceClass.getRegister()!=null && !declaredRegister.equals(equivalenceClass.getRegister())) {
|
||||
if(declaredRegister instanceof Registers.RegisterZpMem) {
|
||||
int zp = ((Registers.RegisterZpMem) declaredRegister).getZp();
|
||||
int bytes = variable.getType().getSizeBytes();
|
||||
register = new Registers.RegisterZpMem(zp, bytes, true);
|
||||
} else if(equivalenceClass.getRegister()!=null && !declaredRegister.equals(equivalenceClass.getRegister())) {
|
||||
throw new CompileError("Equivalence class has variables with different declared registers \n" +
|
||||
" - equivalence class: " + equivalenceClass.toString(true) + "\n" +
|
||||
" - one register: " + equivalenceClass.getRegister().toString() + "\n" +
|
||||
" - other register: " + declaredRegister.toString()
|
||||
);
|
||||
}
|
||||
equivalenceClass.setRegister(declaredRegister);
|
||||
equivalenceClass.setRegister(register);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -175,7 +172,7 @@ public class Pass4RegistersFinalize extends Pass2Base {
|
||||
if(!register.isZp()) {
|
||||
// Do not allocate non-ZP registers
|
||||
reallocate = false;
|
||||
} else if(register instanceof Registers.RegisterZpDeclared) {
|
||||
} else if(register.isZp() && register.isNonRelocatable()) {
|
||||
// Do not allocate declared ZP registers
|
||||
reallocate = false;
|
||||
}
|
||||
@ -185,7 +182,7 @@ public class Pass4RegistersFinalize extends Pass2Base {
|
||||
VariableRef variableRef = equivalenceClass.getVariables().get(0);
|
||||
Variable variable = getProgram().getSymbolInfos().getVariable(variableRef);
|
||||
if(variable.isStorageMemory()) {
|
||||
register = new Registers.RegisterMemory(variableRef, variable.getType().getSizeBytes());
|
||||
register = new Registers.RegisterMainMem(variableRef, variable.getType().getSizeBytes());
|
||||
} else {
|
||||
register = allocateNewRegisterZp(variable);
|
||||
}
|
||||
@ -253,7 +250,7 @@ public class Pass4RegistersFinalize extends Pass2Base {
|
||||
new Registers.RegisterZpMem(allocateZp(4), 4);
|
||||
return registerZpDWord;
|
||||
} else if(varType.equals(SymbolType.BOOLEAN)) {
|
||||
return new Registers.RegisterZpBool(allocateZp(1));
|
||||
return new Registers.RegisterZpMem(allocateZp(1), 1);
|
||||
} else if(varType.equals(SymbolType.VOID)) {
|
||||
// No need to setRegister register for VOID value
|
||||
return null;
|
||||
@ -262,49 +259,13 @@ public class Pass4RegistersFinalize extends Pass2Base {
|
||||
new Registers.RegisterZpMem(allocateZp(2), 2);
|
||||
return registerZpWord;
|
||||
} else if(varType instanceof SymbolTypeStruct) {
|
||||
Registers.RegisterZpStruct registerZpStruct =
|
||||
new Registers.RegisterZpStruct(allocateZp(varType.getSizeBytes()), varType.getSizeBytes());
|
||||
Registers.RegisterZpMem registerZpStruct =
|
||||
new Registers.RegisterZpMem(allocateZp(varType.getSizeBytes()), varType.getSizeBytes());
|
||||
return registerZpStruct;
|
||||
} else {
|
||||
throw new RuntimeException("Unhandled variable type " + varType);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Get the register type for a specific variable type.
|
||||
*
|
||||
* @param variable The variable to create a register for.
|
||||
* The register type based on the variable type
|
||||
* @return The zeropage register type
|
||||
*/
|
||||
private Registers.RegisterType getRegisterType(Variable variable) {
|
||||
SymbolType varType = variable.getType();
|
||||
if(SymbolType.BYTE.equals(varType)) {
|
||||
return Registers.RegisterType.ZP_BYTE;
|
||||
} else if(SymbolType.SBYTE.equals(varType)) {
|
||||
return Registers.RegisterType.ZP_BYTE;
|
||||
} else if(SymbolType.WORD.equals(varType)) {
|
||||
return Registers.RegisterType.ZP_WORD;
|
||||
} else if(SymbolType.SWORD.equals(varType)) {
|
||||
return Registers.RegisterType.ZP_WORD;
|
||||
} else if(SymbolType.DWORD.equals(varType)) {
|
||||
return Registers.RegisterType.ZP_DWORD;
|
||||
} else if(SymbolType.SDWORD.equals(varType)) {
|
||||
return Registers.RegisterType.ZP_DWORD;
|
||||
} else if(varType.equals(SymbolType.BOOLEAN)) {
|
||||
return Registers.RegisterType.ZP_BOOL;
|
||||
} else if(varType.equals(SymbolType.VOID)) {
|
||||
// No need to register for VOID value
|
||||
return null;
|
||||
} else if(varType instanceof SymbolTypePointer) {
|
||||
return Registers.RegisterType.ZP_WORD;
|
||||
} else if(varType instanceof SymbolTypeStruct) {
|
||||
return Registers.RegisterType.ZP_STRUCT;
|
||||
} else {
|
||||
throw new RuntimeException("Unhandled variable type " + varType);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
}
|
||||
|
||||
@ -13,7 +13,7 @@ main: {
|
||||
lda #1
|
||||
!:
|
||||
eor #1
|
||||
sta.z isSet.b
|
||||
tay
|
||||
jsr isSet
|
||||
cmp #0
|
||||
bne __b2
|
||||
@ -31,15 +31,15 @@ main: {
|
||||
}
|
||||
// Determine whether to set a char to '*.
|
||||
// Returns true if i&8!=0 or b=true
|
||||
// isSet(byte register(X) i, bool zeropage(2) b)
|
||||
// isSet(byte register(X) i, bool register(Y) b)
|
||||
isSet: {
|
||||
.label b = 2
|
||||
txa
|
||||
and #8
|
||||
eor #0
|
||||
beq !+
|
||||
lda #1
|
||||
!:
|
||||
ora.z b
|
||||
sty.z $ff
|
||||
ora.z $ff
|
||||
rts
|
||||
}
|
||||
|
||||
@ -272,13 +272,13 @@ Complete equivalence classes
|
||||
[ isSet::return#1 ]
|
||||
Allocated zp ZP_BYTE:2 [ main::i#2 main::i#1 ]
|
||||
Allocated zp ZP_BYTE:3 [ main::$0 ]
|
||||
Allocated zp ZP_BOOL:4 [ isSet::b#0 ]
|
||||
Allocated zp ZP_BYTE:4 [ isSet::b#0 ]
|
||||
Allocated zp ZP_BYTE:5 [ isSet::i#0 ]
|
||||
Allocated zp ZP_BOOL:6 [ isSet::return#0 ]
|
||||
Allocated zp ZP_BOOL:7 [ main::$2 ]
|
||||
Allocated zp ZP_BYTE:6 [ isSet::return#0 ]
|
||||
Allocated zp ZP_BYTE:7 [ main::$2 ]
|
||||
Allocated zp ZP_BYTE:8 [ isSet::$0 ]
|
||||
Allocated zp ZP_BOOL:9 [ isSet::$1 ]
|
||||
Allocated zp ZP_BOOL:10 [ isSet::return#1 ]
|
||||
Allocated zp ZP_BYTE:9 [ isSet::$1 ]
|
||||
Allocated zp ZP_BYTE:10 [ isSet::return#1 ]
|
||||
|
||||
INITIAL ASM
|
||||
Target platform is c64basic / MOS6502X
|
||||
@ -422,7 +422,7 @@ Removing always clobbered register reg byte a as potential for zp ZP_BYTE:2 [ ma
|
||||
Statement [13] *((const byte*) main::screen + (byte) main::i#2) ← (byte) ' ' [ main::i#2 ] ( main:2 [ main::i#2 ] ) always clobbers reg byte a
|
||||
Statement [17] *((const byte*) main::screen + (byte) main::i#2) ← (byte) '*' [ main::i#2 ] ( main:2 [ main::i#2 ] ) always clobbers reg byte a
|
||||
Statement [19] (bool~) isSet::$1 ← (byte~) isSet::$0 != (byte) 0 [ isSet::b#0 isSet::$1 ] ( main:2::isSet:9 [ main::i#2 isSet::b#0 isSet::$1 ] ) always clobbers reg byte a
|
||||
Removing always clobbered register reg byte a as potential for zp ZP_BOOL:4 [ isSet::b#0 ]
|
||||
Removing always clobbered register reg byte a as potential for zp ZP_BYTE:4 [ isSet::b#0 ]
|
||||
Statement [20] (bool) isSet::return#1 ← (bool) isSet::b#0 || (bool~) isSet::$1 [ isSet::return#1 ] ( main:2::isSet:9 [ main::i#2 isSet::return#1 ] ) always clobbers reg byte a
|
||||
Statement [6] (byte~) main::$0 ← (byte) main::i#2 & (byte) 1 [ main::i#2 main::$0 ] ( main:2 [ main::i#2 main::$0 ] ) always clobbers reg byte a
|
||||
Statement [7] (bool) isSet::b#0 ← (byte~) main::$0 == (byte) 0 [ main::i#2 isSet::b#0 ] ( main:2 [ main::i#2 isSet::b#0 ] ) always clobbers reg byte a
|
||||
@ -432,24 +432,27 @@ Statement [19] (bool~) isSet::$1 ← (byte~) isSet::$0 != (byte) 0 [ isSet::b#0
|
||||
Statement [20] (bool) isSet::return#1 ← (bool) isSet::b#0 || (bool~) isSet::$1 [ isSet::return#1 ] ( main:2::isSet:9 [ main::i#2 isSet::return#1 ] ) always clobbers reg byte a
|
||||
Potential registers zp ZP_BYTE:2 [ main::i#2 main::i#1 ] : zp ZP_BYTE:2 , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:3 [ main::$0 ] : zp ZP_BYTE:3 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BOOL:4 [ isSet::b#0 ] : zp ZP_BOOL:4 ,
|
||||
Potential registers zp ZP_BYTE:4 [ isSet::b#0 ] : zp ZP_BYTE:4 , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:5 [ isSet::i#0 ] : zp ZP_BYTE:5 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BOOL:6 [ isSet::return#0 ] : zp ZP_BOOL:6 , reg byte a ,
|
||||
Potential registers zp ZP_BOOL:7 [ main::$2 ] : zp ZP_BOOL:7 , reg byte a ,
|
||||
Potential registers zp ZP_BYTE:6 [ isSet::return#0 ] : zp ZP_BYTE:6 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:7 [ main::$2 ] : zp ZP_BYTE:7 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:8 [ isSet::$0 ] : zp ZP_BYTE:8 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BOOL:9 [ isSet::$1 ] : zp ZP_BOOL:9 , reg byte a ,
|
||||
Potential registers zp ZP_BOOL:10 [ isSet::return#1 ] : zp ZP_BOOL:10 , reg byte a ,
|
||||
Potential registers zp ZP_BYTE:9 [ isSet::$1 ] : zp ZP_BYTE:9 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:10 [ isSet::return#1 ] : zp ZP_BYTE:10 , reg byte a , reg byte x , reg byte y ,
|
||||
|
||||
REGISTER UPLIFT SCOPES
|
||||
Uplift Scope [main] 23.1: zp ZP_BYTE:2 [ main::i#2 main::i#1 ] 22: zp ZP_BYTE:3 [ main::$0 ] 22: zp ZP_BOOL:7 [ main::$2 ]
|
||||
Uplift Scope [isSet] 22: zp ZP_BOOL:6 [ isSet::return#0 ] 13: zp ZP_BYTE:5 [ isSet::i#0 ] 4.33: zp ZP_BOOL:10 [ isSet::return#1 ] 4: zp ZP_BYTE:8 [ isSet::$0 ] 4: zp ZP_BOOL:9 [ isSet::$1 ] 3.25: zp ZP_BOOL:4 [ isSet::b#0 ]
|
||||
Uplift Scope [main] 23.1: zp ZP_BYTE:2 [ main::i#2 main::i#1 ] 22: zp ZP_BYTE:3 [ main::$0 ] 22: zp ZP_BYTE:7 [ main::$2 ]
|
||||
Uplift Scope [isSet] 22: zp ZP_BYTE:6 [ isSet::return#0 ] 13: zp ZP_BYTE:5 [ isSet::i#0 ] 4.33: zp ZP_BYTE:10 [ isSet::return#1 ] 4: zp ZP_BYTE:8 [ isSet::$0 ] 4: zp ZP_BYTE:9 [ isSet::$1 ] 3.25: zp ZP_BYTE:4 [ isSet::b#0 ]
|
||||
Uplift Scope []
|
||||
|
||||
Uplifting [main] best 871 combination reg byte x [ main::i#2 main::i#1 ] reg byte a [ main::$0 ] reg byte a [ main::$2 ]
|
||||
Uplifting [isSet] best 735 combination reg byte a [ isSet::return#0 ] reg byte x [ isSet::i#0 ] reg byte a [ isSet::return#1 ] reg byte a [ isSet::$0 ] reg byte a [ isSet::$1 ] zp ZP_BOOL:4 [ isSet::b#0 ]
|
||||
Limited combination testing to 100 combinations of 128 possible.
|
||||
Uplifting [] best 735 combination
|
||||
Allocated (was zp ZP_BOOL:4) zp ZP_BOOL:2 [ isSet::b#0 ]
|
||||
Uplifting [isSet] best 741 combination reg byte a [ isSet::return#0 ] reg byte x [ isSet::i#0 ] reg byte a [ isSet::return#1 ] reg byte a [ isSet::$0 ] zp ZP_BYTE:9 [ isSet::$1 ] zp ZP_BYTE:4 [ isSet::b#0 ]
|
||||
Limited combination testing to 100 combinations of 3072 possible.
|
||||
Uplifting [] best 741 combination
|
||||
Attempting to uplift remaining variables inzp ZP_BYTE:9 [ isSet::$1 ]
|
||||
Uplifting [isSet] best 735 combination reg byte a [ isSet::$1 ]
|
||||
Attempting to uplift remaining variables inzp ZP_BYTE:4 [ isSet::b#0 ]
|
||||
Uplifting [isSet] best 728 combination reg byte y [ isSet::b#0 ]
|
||||
|
||||
ASSEMBLER BEFORE OPTIMIZATION
|
||||
// File Comments
|
||||
@ -492,13 +495,13 @@ main: {
|
||||
// [6] (byte~) main::$0 ← (byte) main::i#2 & (byte) 1 -- vbuaa=vbuxx_band_vbuc1
|
||||
txa
|
||||
and #1
|
||||
// [7] (bool) isSet::b#0 ← (byte~) main::$0 == (byte) 0 -- vboz1=vbuaa_eq_vbuc1
|
||||
// [7] (bool) isSet::b#0 ← (byte~) main::$0 == (byte) 0 -- vboyy=vbuaa_eq_vbuc1
|
||||
eor #0
|
||||
beq !+
|
||||
lda #1
|
||||
!:
|
||||
eor #1
|
||||
sta.z isSet.b
|
||||
tay
|
||||
// [8] (byte) isSet::i#0 ← (byte) main::i#2
|
||||
// [9] call isSet
|
||||
jsr isSet
|
||||
@ -539,9 +542,8 @@ main: {
|
||||
// isSet
|
||||
// Determine whether to set a char to '*.
|
||||
// Returns true if i&8!=0 or b=true
|
||||
// isSet(byte register(X) i, bool zeropage(2) b)
|
||||
// isSet(byte register(X) i, bool register(Y) b)
|
||||
isSet: {
|
||||
.label b = 2
|
||||
// [18] (byte~) isSet::$0 ← (byte) isSet::i#0 & (byte) 8 -- vbuaa=vbuxx_band_vbuc1
|
||||
txa
|
||||
and #8
|
||||
@ -550,8 +552,9 @@ isSet: {
|
||||
beq !+
|
||||
lda #1
|
||||
!:
|
||||
// [20] (bool) isSet::return#1 ← (bool) isSet::b#0 || (bool~) isSet::$1 -- vboaa=vboz1_or_vboaa
|
||||
ora.z b
|
||||
// [20] (bool) isSet::return#1 ← (bool) isSet::b#0 || (bool~) isSet::$1 -- vboaa=vboyy_or_vboaa
|
||||
sty.z $ff
|
||||
ora.z $ff
|
||||
jmp __breturn
|
||||
// isSet::@return
|
||||
__breturn:
|
||||
@ -602,7 +605,7 @@ FINAL SYMBOL TABLE
|
||||
(bool~) isSet::$1 reg byte a 4.0
|
||||
(label) isSet::@return
|
||||
(bool) isSet::b
|
||||
(bool) isSet::b#0 b zp ZP_BOOL:2 3.25
|
||||
(bool) isSet::b#0 reg byte y 3.25
|
||||
(byte) isSet::i
|
||||
(byte) isSet::i#0 reg byte x 13.0
|
||||
(bool) isSet::return
|
||||
@ -624,7 +627,7 @@ FINAL SYMBOL TABLE
|
||||
|
||||
reg byte x [ main::i#2 main::i#1 ]
|
||||
reg byte a [ main::$0 ]
|
||||
zp ZP_BOOL:2 [ isSet::b#0 ]
|
||||
reg byte y [ isSet::b#0 ]
|
||||
reg byte x [ isSet::i#0 ]
|
||||
reg byte a [ isSet::return#0 ]
|
||||
reg byte a [ main::$2 ]
|
||||
@ -634,7 +637,7 @@ reg byte a [ isSet::return#1 ]
|
||||
|
||||
|
||||
FINAL ASSEMBLER
|
||||
Score: 540
|
||||
Score: 533
|
||||
|
||||
// File Comments
|
||||
// Test a function taking boolean parameter and returning boolean result
|
||||
@ -665,13 +668,13 @@ main: {
|
||||
txa
|
||||
and #1
|
||||
// isSet(i, (i&1)==0)
|
||||
// [7] (bool) isSet::b#0 ← (byte~) main::$0 == (byte) 0 -- vboz1=vbuaa_eq_vbuc1
|
||||
// [7] (bool) isSet::b#0 ← (byte~) main::$0 == (byte) 0 -- vboyy=vbuaa_eq_vbuc1
|
||||
eor #0
|
||||
beq !+
|
||||
lda #1
|
||||
!:
|
||||
eor #1
|
||||
sta.z isSet.b
|
||||
tay
|
||||
// [8] (byte) isSet::i#0 ← (byte) main::i#2
|
||||
// [9] call isSet
|
||||
jsr isSet
|
||||
@ -710,9 +713,8 @@ main: {
|
||||
// isSet
|
||||
// Determine whether to set a char to '*.
|
||||
// Returns true if i&8!=0 or b=true
|
||||
// isSet(byte register(X) i, bool zeropage(2) b)
|
||||
// isSet(byte register(X) i, bool register(Y) b)
|
||||
isSet: {
|
||||
.label b = 2
|
||||
// i&8
|
||||
// [18] (byte~) isSet::$0 ← (byte) isSet::i#0 & (byte) 8 -- vbuaa=vbuxx_band_vbuc1
|
||||
txa
|
||||
@ -724,8 +726,9 @@ isSet: {
|
||||
lda #1
|
||||
!:
|
||||
// b || ((i&8)!=0)
|
||||
// [20] (bool) isSet::return#1 ← (bool) isSet::b#0 || (bool~) isSet::$1 -- vboaa=vboz1_or_vboaa
|
||||
ora.z b
|
||||
// [20] (bool) isSet::return#1 ← (bool) isSet::b#0 || (bool~) isSet::$1 -- vboaa=vboyy_or_vboaa
|
||||
sty.z $ff
|
||||
ora.z $ff
|
||||
// isSet::@return
|
||||
// }
|
||||
// [21] return
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
(bool~) isSet::$1 reg byte a 4.0
|
||||
(label) isSet::@return
|
||||
(bool) isSet::b
|
||||
(bool) isSet::b#0 b zp ZP_BOOL:2 3.25
|
||||
(bool) isSet::b#0 reg byte y 3.25
|
||||
(byte) isSet::i
|
||||
(byte) isSet::i#0 reg byte x 13.0
|
||||
(bool) isSet::return
|
||||
@ -28,7 +28,7 @@
|
||||
|
||||
reg byte x [ main::i#2 main::i#1 ]
|
||||
reg byte a [ main::$0 ]
|
||||
zp ZP_BOOL:2 [ isSet::b#0 ]
|
||||
reg byte y [ isSet::b#0 ]
|
||||
reg byte x [ isSet::i#0 ]
|
||||
reg byte a [ isSet::return#0 ]
|
||||
reg byte a [ main::$2 ]
|
||||
|
||||
@ -140,7 +140,7 @@ Initial phi equivalence classes
|
||||
[ framedone#2 ]
|
||||
Complete equivalence classes
|
||||
[ framedone#2 ]
|
||||
Allocated zp ZP_BOOL:2 [ framedone#2 ]
|
||||
Allocated zp ZP_BYTE:2 [ framedone#2 ]
|
||||
|
||||
INITIAL ASM
|
||||
Target platform is c64basic / MOS6502X
|
||||
@ -196,10 +196,10 @@ main: {
|
||||
// File Data
|
||||
|
||||
REGISTER UPLIFT POTENTIAL REGISTERS
|
||||
Potential registers zp ZP_BOOL:2 [ framedone#2 ] : zp ZP_BOOL:2 , reg byte a ,
|
||||
Potential registers zp ZP_BYTE:2 [ framedone#2 ] : zp ZP_BYTE:2 , reg byte a , reg byte x , reg byte y ,
|
||||
|
||||
REGISTER UPLIFT SCOPES
|
||||
Uplift Scope [] 50.5: zp ZP_BOOL:2 [ framedone#2 ]
|
||||
Uplift Scope [] 50.5: zp ZP_BYTE:2 [ framedone#2 ]
|
||||
Uplift Scope [main]
|
||||
|
||||
Uplifting [] best 892 combination reg byte a [ framedone#2 ]
|
||||
|
||||
@ -11,49 +11,42 @@ main: {
|
||||
}
|
||||
bool_complex: {
|
||||
.label screen = $478
|
||||
.label o1 = 2
|
||||
.label o2 = 3
|
||||
ldx #0
|
||||
ldy #0
|
||||
__b1:
|
||||
cpx #$a
|
||||
cpy #$a
|
||||
lda #0
|
||||
rol
|
||||
eor #1
|
||||
sta.z o1
|
||||
txa
|
||||
tax
|
||||
tya
|
||||
and #1
|
||||
eor #0
|
||||
beq !+
|
||||
lda #1
|
||||
!:
|
||||
eor #1
|
||||
sta.z o2
|
||||
lda.z o1
|
||||
cmp #0
|
||||
cpx #0
|
||||
bne __b6
|
||||
jmp __b5
|
||||
__b6:
|
||||
lda.z o2
|
||||
cmp #0
|
||||
bne __b2
|
||||
__b5:
|
||||
lda.z o1
|
||||
cmp #0
|
||||
cpx #0
|
||||
bne __b4
|
||||
lda.z o2
|
||||
cmp #0
|
||||
bne __b4
|
||||
__b2:
|
||||
lda #'*'
|
||||
sta screen,x
|
||||
sta screen,y
|
||||
__b3:
|
||||
inx
|
||||
cpx #$15
|
||||
iny
|
||||
cpy #$15
|
||||
bne __b1
|
||||
rts
|
||||
__b4:
|
||||
lda #' '
|
||||
sta screen,x
|
||||
sta screen,y
|
||||
jmp __b3
|
||||
}
|
||||
bool_not: {
|
||||
|
||||
@ -707,9 +707,9 @@ Allocated zp ZP_BYTE:2 [ bool_complex::i#2 bool_complex::i#1 ]
|
||||
Allocated zp ZP_BYTE:3 [ bool_not::i#2 bool_not::i#1 ]
|
||||
Allocated zp ZP_BYTE:4 [ bool_or::i#2 bool_or::i#1 ]
|
||||
Allocated zp ZP_BYTE:5 [ bool_and::i#2 bool_and::i#1 ]
|
||||
Allocated zp ZP_BOOL:6 [ bool_complex::o1#0 ]
|
||||
Allocated zp ZP_BYTE:6 [ bool_complex::o1#0 ]
|
||||
Allocated zp ZP_BYTE:7 [ bool_complex::$1 ]
|
||||
Allocated zp ZP_BOOL:8 [ bool_complex::o2#0 ]
|
||||
Allocated zp ZP_BYTE:8 [ bool_complex::o2#0 ]
|
||||
Allocated zp ZP_BYTE:9 [ bool_not::$1 ]
|
||||
Allocated zp ZP_BYTE:10 [ bool_or::$1 ]
|
||||
Allocated zp ZP_BYTE:11 [ bool_and::$1 ]
|
||||
@ -1059,13 +1059,8 @@ REGISTER UPLIFT POTENTIAL REGISTERS
|
||||
Statement [15] (bool) bool_complex::o1#0 ← (byte) bool_complex::i#2 < (byte) $a [ bool_complex::i#2 bool_complex::o1#0 ] ( main:2::bool_complex:11 [ bool_complex::i#2 bool_complex::o1#0 ] ) always clobbers reg byte a
|
||||
Removing always clobbered register reg byte a as potential for zp ZP_BYTE:2 [ bool_complex::i#2 bool_complex::i#1 ]
|
||||
Statement [16] (byte~) bool_complex::$1 ← (byte) bool_complex::i#2 & (byte) 1 [ bool_complex::i#2 bool_complex::o1#0 bool_complex::$1 ] ( main:2::bool_complex:11 [ bool_complex::i#2 bool_complex::o1#0 bool_complex::$1 ] ) always clobbers reg byte a
|
||||
Removing always clobbered register reg byte a as potential for zp ZP_BOOL:6 [ bool_complex::o1#0 ]
|
||||
Removing always clobbered register reg byte a as potential for zp ZP_BYTE:6 [ bool_complex::o1#0 ]
|
||||
Statement [17] (bool) bool_complex::o2#0 ← (byte~) bool_complex::$1 == (byte) 0 [ bool_complex::i#2 bool_complex::o1#0 bool_complex::o2#0 ] ( main:2::bool_complex:11 [ bool_complex::i#2 bool_complex::o1#0 bool_complex::o2#0 ] ) always clobbers reg byte a
|
||||
Statement [18] if((bool) bool_complex::o1#0) goto bool_complex::@6 [ bool_complex::i#2 bool_complex::o1#0 bool_complex::o2#0 ] ( main:2::bool_complex:11 [ bool_complex::i#2 bool_complex::o1#0 bool_complex::o2#0 ] ) always clobbers reg byte a
|
||||
Removing always clobbered register reg byte a as potential for zp ZP_BOOL:8 [ bool_complex::o2#0 ]
|
||||
Statement [19] if((bool) bool_complex::o2#0) goto bool_complex::@2 [ bool_complex::i#2 bool_complex::o1#0 bool_complex::o2#0 ] ( main:2::bool_complex:11 [ bool_complex::i#2 bool_complex::o1#0 bool_complex::o2#0 ] ) always clobbers reg byte a
|
||||
Statement [20] if((bool) bool_complex::o1#0) goto bool_complex::@4 [ bool_complex::i#2 bool_complex::o2#0 ] ( main:2::bool_complex:11 [ bool_complex::i#2 bool_complex::o2#0 ] ) always clobbers reg byte a
|
||||
Statement [21] if((bool) bool_complex::o2#0) goto bool_complex::@4 [ bool_complex::i#2 ] ( main:2::bool_complex:11 [ bool_complex::i#2 ] ) always clobbers reg byte a
|
||||
Statement [22] *((const byte*) bool_complex::screen + (byte) bool_complex::i#2) ← (byte) '*' [ bool_complex::i#2 ] ( main:2::bool_complex:11 [ bool_complex::i#2 ] ) always clobbers reg byte a
|
||||
Statement [26] *((const byte*) bool_complex::screen + (byte) bool_complex::i#2) ← (byte) ' ' [ bool_complex::i#2 ] ( main:2::bool_complex:11 [ bool_complex::i#2 ] ) always clobbers reg byte a
|
||||
Statement [32] *((const byte*) bool_not::screen + (byte) bool_not::i#2) ← (byte) '*' [ bool_not::i#2 ] ( main:2::bool_not:9 [ bool_not::i#2 ] ) always clobbers reg byte a
|
||||
@ -1080,10 +1075,6 @@ Statement [56] *((const byte*) bool_and::screen + (byte) bool_and::i#2) ← (byt
|
||||
Statement [15] (bool) bool_complex::o1#0 ← (byte) bool_complex::i#2 < (byte) $a [ bool_complex::i#2 bool_complex::o1#0 ] ( main:2::bool_complex:11 [ bool_complex::i#2 bool_complex::o1#0 ] ) always clobbers reg byte a
|
||||
Statement [16] (byte~) bool_complex::$1 ← (byte) bool_complex::i#2 & (byte) 1 [ bool_complex::i#2 bool_complex::o1#0 bool_complex::$1 ] ( main:2::bool_complex:11 [ bool_complex::i#2 bool_complex::o1#0 bool_complex::$1 ] ) always clobbers reg byte a
|
||||
Statement [17] (bool) bool_complex::o2#0 ← (byte~) bool_complex::$1 == (byte) 0 [ bool_complex::i#2 bool_complex::o1#0 bool_complex::o2#0 ] ( main:2::bool_complex:11 [ bool_complex::i#2 bool_complex::o1#0 bool_complex::o2#0 ] ) always clobbers reg byte a
|
||||
Statement [18] if((bool) bool_complex::o1#0) goto bool_complex::@6 [ bool_complex::i#2 bool_complex::o1#0 bool_complex::o2#0 ] ( main:2::bool_complex:11 [ bool_complex::i#2 bool_complex::o1#0 bool_complex::o2#0 ] ) always clobbers reg byte a
|
||||
Statement [19] if((bool) bool_complex::o2#0) goto bool_complex::@2 [ bool_complex::i#2 bool_complex::o1#0 bool_complex::o2#0 ] ( main:2::bool_complex:11 [ bool_complex::i#2 bool_complex::o1#0 bool_complex::o2#0 ] ) always clobbers reg byte a
|
||||
Statement [20] if((bool) bool_complex::o1#0) goto bool_complex::@4 [ bool_complex::i#2 bool_complex::o2#0 ] ( main:2::bool_complex:11 [ bool_complex::i#2 bool_complex::o2#0 ] ) always clobbers reg byte a
|
||||
Statement [21] if((bool) bool_complex::o2#0) goto bool_complex::@4 [ bool_complex::i#2 ] ( main:2::bool_complex:11 [ bool_complex::i#2 ] ) always clobbers reg byte a
|
||||
Statement [22] *((const byte*) bool_complex::screen + (byte) bool_complex::i#2) ← (byte) '*' [ bool_complex::i#2 ] ( main:2::bool_complex:11 [ bool_complex::i#2 ] ) always clobbers reg byte a
|
||||
Statement [26] *((const byte*) bool_complex::screen + (byte) bool_complex::i#2) ← (byte) ' ' [ bool_complex::i#2 ] ( main:2::bool_complex:11 [ bool_complex::i#2 ] ) always clobbers reg byte a
|
||||
Statement [29] (byte~) bool_not::$1 ← (byte) bool_not::i#2 & (byte) 1 [ bool_not::i#2 bool_not::$1 ] ( main:2::bool_not:9 [ bool_not::i#2 bool_not::$1 ] ) always clobbers reg byte a
|
||||
@ -1099,29 +1090,28 @@ Potential registers zp ZP_BYTE:2 [ bool_complex::i#2 bool_complex::i#1 ] : zp ZP
|
||||
Potential registers zp ZP_BYTE:3 [ bool_not::i#2 bool_not::i#1 ] : zp ZP_BYTE:3 , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:4 [ bool_or::i#2 bool_or::i#1 ] : zp ZP_BYTE:4 , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:5 [ bool_and::i#2 bool_and::i#1 ] : zp ZP_BYTE:5 , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BOOL:6 [ bool_complex::o1#0 ] : zp ZP_BOOL:6 ,
|
||||
Potential registers zp ZP_BYTE:6 [ bool_complex::o1#0 ] : zp ZP_BYTE:6 , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:7 [ bool_complex::$1 ] : zp ZP_BYTE:7 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BOOL:8 [ bool_complex::o2#0 ] : zp ZP_BOOL:8 ,
|
||||
Potential registers zp ZP_BYTE:8 [ bool_complex::o2#0 ] : zp ZP_BYTE:8 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:9 [ bool_not::$1 ] : zp ZP_BYTE:9 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:10 [ bool_or::$1 ] : zp ZP_BYTE:10 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:11 [ bool_and::$1 ] : zp ZP_BYTE:11 , reg byte a , reg byte x , reg byte y ,
|
||||
|
||||
REGISTER UPLIFT SCOPES
|
||||
Uplift Scope [bool_complex] 23.1: zp ZP_BYTE:2 [ bool_complex::i#2 bool_complex::i#1 ] 22: zp ZP_BYTE:7 [ bool_complex::$1 ] 8.25: zp ZP_BOOL:8 [ bool_complex::o2#0 ] 6.6: zp ZP_BOOL:6 [ bool_complex::o1#0 ]
|
||||
Uplift Scope [bool_complex] 23.1: zp ZP_BYTE:2 [ bool_complex::i#2 bool_complex::i#1 ] 22: zp ZP_BYTE:7 [ bool_complex::$1 ] 8.25: zp ZP_BYTE:8 [ bool_complex::o2#0 ] 6.6: zp ZP_BYTE:6 [ bool_complex::o1#0 ]
|
||||
Uplift Scope [bool_and] 27.5: zp ZP_BYTE:5 [ bool_and::i#2 bool_and::i#1 ] 11: zp ZP_BYTE:11 [ bool_and::$1 ]
|
||||
Uplift Scope [bool_or] 27.5: zp ZP_BYTE:4 [ bool_or::i#2 bool_or::i#1 ] 11: zp ZP_BYTE:10 [ bool_or::$1 ]
|
||||
Uplift Scope [bool_not] 27.5: zp ZP_BYTE:3 [ bool_not::i#2 bool_not::i#1 ] 11: zp ZP_BYTE:9 [ bool_not::$1 ]
|
||||
Uplift Scope [main]
|
||||
Uplift Scope []
|
||||
|
||||
Uplifting [bool_complex] best 3583 combination reg byte x [ bool_complex::i#2 bool_complex::i#1 ] reg byte a [ bool_complex::$1 ] zp ZP_BOOL:8 [ bool_complex::o2#0 ] zp ZP_BOOL:6 [ bool_complex::o1#0 ]
|
||||
Uplifting [bool_and] best 3333 combination reg byte x [ bool_and::i#2 bool_and::i#1 ] reg byte a [ bool_and::$1 ]
|
||||
Uplifting [bool_or] best 3083 combination reg byte x [ bool_or::i#2 bool_or::i#1 ] reg byte a [ bool_or::$1 ]
|
||||
Uplifting [bool_not] best 2833 combination reg byte x [ bool_not::i#2 bool_not::i#1 ] reg byte a [ bool_not::$1 ]
|
||||
Uplifting [main] best 2833 combination
|
||||
Uplifting [] best 2833 combination
|
||||
Allocated (was zp ZP_BOOL:6) zp ZP_BOOL:2 [ bool_complex::o1#0 ]
|
||||
Allocated (was zp ZP_BOOL:8) zp ZP_BOOL:3 [ bool_complex::o2#0 ]
|
||||
Uplifting [bool_complex] best 3423 combination reg byte y [ bool_complex::i#2 bool_complex::i#1 ] reg byte a [ bool_complex::$1 ] reg byte a [ bool_complex::o2#0 ] reg byte x [ bool_complex::o1#0 ]
|
||||
Limited combination testing to 100 combinations of 144 possible.
|
||||
Uplifting [bool_and] best 3173 combination reg byte x [ bool_and::i#2 bool_and::i#1 ] reg byte a [ bool_and::$1 ]
|
||||
Uplifting [bool_or] best 2923 combination reg byte x [ bool_or::i#2 bool_or::i#1 ] reg byte a [ bool_or::$1 ]
|
||||
Uplifting [bool_not] best 2673 combination reg byte x [ bool_not::i#2 bool_not::i#1 ] reg byte a [ bool_not::$1 ]
|
||||
Uplifting [main] best 2673 combination
|
||||
Uplifting [] best 2673 combination
|
||||
|
||||
ASSEMBLER BEFORE OPTIMIZATION
|
||||
// File Comments
|
||||
@ -1189,12 +1179,10 @@ main: {
|
||||
// bool_complex
|
||||
bool_complex: {
|
||||
.label screen = $478
|
||||
.label o1 = 2
|
||||
.label o2 = 3
|
||||
// [14] phi from bool_complex to bool_complex::@1 [phi:bool_complex->bool_complex::@1]
|
||||
__b1_from_bool_complex:
|
||||
// [14] phi (byte) bool_complex::i#2 = (byte) 0 [phi:bool_complex->bool_complex::@1#0] -- vbuxx=vbuc1
|
||||
ldx #0
|
||||
// [14] phi (byte) bool_complex::i#2 = (byte) 0 [phi:bool_complex->bool_complex::@1#0] -- vbuyy=vbuc1
|
||||
ldy #0
|
||||
jmp __b1
|
||||
// [14] phi from bool_complex::@3 to bool_complex::@1 [phi:bool_complex::@3->bool_complex::@1]
|
||||
__b1_from___b3:
|
||||
@ -1202,60 +1190,55 @@ bool_complex: {
|
||||
jmp __b1
|
||||
// bool_complex::@1
|
||||
__b1:
|
||||
// [15] (bool) bool_complex::o1#0 ← (byte) bool_complex::i#2 < (byte) $a -- vboz1=vbuxx_lt_vbuc1
|
||||
cpx #$a
|
||||
// [15] (bool) bool_complex::o1#0 ← (byte) bool_complex::i#2 < (byte) $a -- vboxx=vbuyy_lt_vbuc1
|
||||
cpy #$a
|
||||
lda #0
|
||||
rol
|
||||
eor #1
|
||||
sta.z o1
|
||||
// [16] (byte~) bool_complex::$1 ← (byte) bool_complex::i#2 & (byte) 1 -- vbuaa=vbuxx_band_vbuc1
|
||||
txa
|
||||
tax
|
||||
// [16] (byte~) bool_complex::$1 ← (byte) bool_complex::i#2 & (byte) 1 -- vbuaa=vbuyy_band_vbuc1
|
||||
tya
|
||||
and #1
|
||||
// [17] (bool) bool_complex::o2#0 ← (byte~) bool_complex::$1 == (byte) 0 -- vboz1=vbuaa_eq_vbuc1
|
||||
// [17] (bool) bool_complex::o2#0 ← (byte~) bool_complex::$1 == (byte) 0 -- vboaa=vbuaa_eq_vbuc1
|
||||
eor #0
|
||||
beq !+
|
||||
lda #1
|
||||
!:
|
||||
eor #1
|
||||
sta.z o2
|
||||
// [18] if((bool) bool_complex::o1#0) goto bool_complex::@6 -- vboz1_then_la1
|
||||
lda.z o1
|
||||
cmp #0
|
||||
// [18] if((bool) bool_complex::o1#0) goto bool_complex::@6 -- vboxx_then_la1
|
||||
cpx #0
|
||||
bne __b6
|
||||
jmp __b5
|
||||
// bool_complex::@6
|
||||
__b6:
|
||||
// [19] if((bool) bool_complex::o2#0) goto bool_complex::@2 -- vboz1_then_la1
|
||||
lda.z o2
|
||||
// [19] if((bool) bool_complex::o2#0) goto bool_complex::@2 -- vboaa_then_la1
|
||||
cmp #0
|
||||
bne __b2
|
||||
jmp __b5
|
||||
// bool_complex::@5
|
||||
__b5:
|
||||
// [20] if((bool) bool_complex::o1#0) goto bool_complex::@4 -- vboz1_then_la1
|
||||
lda.z o1
|
||||
cmp #0
|
||||
// [20] if((bool) bool_complex::o1#0) goto bool_complex::@4 -- vboxx_then_la1
|
||||
cpx #0
|
||||
bne __b4
|
||||
jmp __b7
|
||||
// bool_complex::@7
|
||||
__b7:
|
||||
// [21] if((bool) bool_complex::o2#0) goto bool_complex::@4 -- vboz1_then_la1
|
||||
lda.z o2
|
||||
// [21] if((bool) bool_complex::o2#0) goto bool_complex::@4 -- vboaa_then_la1
|
||||
cmp #0
|
||||
bne __b4
|
||||
jmp __b2
|
||||
// bool_complex::@2
|
||||
__b2:
|
||||
// [22] *((const byte*) bool_complex::screen + (byte) bool_complex::i#2) ← (byte) '*' -- pbuc1_derefidx_vbuxx=vbuc2
|
||||
// [22] *((const byte*) bool_complex::screen + (byte) bool_complex::i#2) ← (byte) '*' -- pbuc1_derefidx_vbuyy=vbuc2
|
||||
lda #'*'
|
||||
sta screen,x
|
||||
sta screen,y
|
||||
jmp __b3
|
||||
// bool_complex::@3
|
||||
__b3:
|
||||
// [23] (byte) bool_complex::i#1 ← ++ (byte) bool_complex::i#2 -- vbuxx=_inc_vbuxx
|
||||
inx
|
||||
// [24] if((byte) bool_complex::i#1!=(byte) $15) goto bool_complex::@1 -- vbuxx_neq_vbuc1_then_la1
|
||||
cpx #$15
|
||||
// [23] (byte) bool_complex::i#1 ← ++ (byte) bool_complex::i#2 -- vbuyy=_inc_vbuyy
|
||||
iny
|
||||
// [24] if((byte) bool_complex::i#1!=(byte) $15) goto bool_complex::@1 -- vbuyy_neq_vbuc1_then_la1
|
||||
cpy #$15
|
||||
bne __b1_from___b3
|
||||
jmp __breturn
|
||||
// bool_complex::@return
|
||||
@ -1264,9 +1247,9 @@ bool_complex: {
|
||||
rts
|
||||
// bool_complex::@4
|
||||
__b4:
|
||||
// [26] *((const byte*) bool_complex::screen + (byte) bool_complex::i#2) ← (byte) ' ' -- pbuc1_derefidx_vbuxx=vbuc2
|
||||
// [26] *((const byte*) bool_complex::screen + (byte) bool_complex::i#2) ← (byte) ' ' -- pbuc1_derefidx_vbuyy=vbuc2
|
||||
lda #' '
|
||||
sta screen,x
|
||||
sta screen,y
|
||||
jmp __b3
|
||||
}
|
||||
// bool_not
|
||||
@ -1538,12 +1521,12 @@ FINAL SYMBOL TABLE
|
||||
(label) bool_complex::@7
|
||||
(label) bool_complex::@return
|
||||
(byte) bool_complex::i
|
||||
(byte) bool_complex::i#1 reg byte x 16.5
|
||||
(byte) bool_complex::i#2 reg byte x 6.6
|
||||
(byte) bool_complex::i#1 reg byte y 16.5
|
||||
(byte) bool_complex::i#2 reg byte y 6.6
|
||||
(bool) bool_complex::o1
|
||||
(bool) bool_complex::o1#0 o1 zp ZP_BOOL:2 6.6000000000000005
|
||||
(bool) bool_complex::o1#0 reg byte x 6.6000000000000005
|
||||
(bool) bool_complex::o2
|
||||
(bool) bool_complex::o2#0 o2 zp ZP_BOOL:3 8.25
|
||||
(bool) bool_complex::o2#0 reg byte a 8.25
|
||||
(bool) bool_complex::o3
|
||||
(bool) bool_complex::o4
|
||||
(bool) bool_complex::o5
|
||||
@ -1584,20 +1567,20 @@ FINAL SYMBOL TABLE
|
||||
(label) main::@3
|
||||
(label) main::@return
|
||||
|
||||
reg byte x [ bool_complex::i#2 bool_complex::i#1 ]
|
||||
reg byte y [ bool_complex::i#2 bool_complex::i#1 ]
|
||||
reg byte x [ bool_not::i#2 bool_not::i#1 ]
|
||||
reg byte x [ bool_or::i#2 bool_or::i#1 ]
|
||||
reg byte x [ bool_and::i#2 bool_and::i#1 ]
|
||||
zp ZP_BOOL:2 [ bool_complex::o1#0 ]
|
||||
reg byte x [ bool_complex::o1#0 ]
|
||||
reg byte a [ bool_complex::$1 ]
|
||||
zp ZP_BOOL:3 [ bool_complex::o2#0 ]
|
||||
reg byte a [ bool_complex::o2#0 ]
|
||||
reg byte a [ bool_not::$1 ]
|
||||
reg byte a [ bool_or::$1 ]
|
||||
reg byte a [ bool_and::$1 ]
|
||||
|
||||
|
||||
FINAL ASSEMBLER
|
||||
Score: 2059
|
||||
Score: 1899
|
||||
|
||||
// File Comments
|
||||
// A test of boolean conditions using && || and !
|
||||
@ -1645,70 +1628,63 @@ main: {
|
||||
// bool_complex
|
||||
bool_complex: {
|
||||
.label screen = $478
|
||||
.label o1 = 2
|
||||
.label o2 = 3
|
||||
// [14] phi from bool_complex to bool_complex::@1 [phi:bool_complex->bool_complex::@1]
|
||||
// [14] phi (byte) bool_complex::i#2 = (byte) 0 [phi:bool_complex->bool_complex::@1#0] -- vbuxx=vbuc1
|
||||
ldx #0
|
||||
// [14] phi (byte) bool_complex::i#2 = (byte) 0 [phi:bool_complex->bool_complex::@1#0] -- vbuyy=vbuc1
|
||||
ldy #0
|
||||
// [14] phi from bool_complex::@3 to bool_complex::@1 [phi:bool_complex::@3->bool_complex::@1]
|
||||
// [14] phi (byte) bool_complex::i#2 = (byte) bool_complex::i#1 [phi:bool_complex::@3->bool_complex::@1#0] -- register_copy
|
||||
// bool_complex::@1
|
||||
__b1:
|
||||
// o1 = (i<10)
|
||||
// [15] (bool) bool_complex::o1#0 ← (byte) bool_complex::i#2 < (byte) $a -- vboz1=vbuxx_lt_vbuc1
|
||||
cpx #$a
|
||||
// [15] (bool) bool_complex::o1#0 ← (byte) bool_complex::i#2 < (byte) $a -- vboxx=vbuyy_lt_vbuc1
|
||||
cpy #$a
|
||||
lda #0
|
||||
rol
|
||||
eor #1
|
||||
sta.z o1
|
||||
tax
|
||||
// i&1
|
||||
// [16] (byte~) bool_complex::$1 ← (byte) bool_complex::i#2 & (byte) 1 -- vbuaa=vbuxx_band_vbuc1
|
||||
txa
|
||||
// [16] (byte~) bool_complex::$1 ← (byte) bool_complex::i#2 & (byte) 1 -- vbuaa=vbuyy_band_vbuc1
|
||||
tya
|
||||
and #1
|
||||
// o2 = (i&1)==0
|
||||
// [17] (bool) bool_complex::o2#0 ← (byte~) bool_complex::$1 == (byte) 0 -- vboz1=vbuaa_eq_vbuc1
|
||||
// [17] (bool) bool_complex::o2#0 ← (byte~) bool_complex::$1 == (byte) 0 -- vboaa=vbuaa_eq_vbuc1
|
||||
eor #0
|
||||
beq !+
|
||||
lda #1
|
||||
!:
|
||||
eor #1
|
||||
sta.z o2
|
||||
// if( o5 )
|
||||
// [18] if((bool) bool_complex::o1#0) goto bool_complex::@6 -- vboz1_then_la1
|
||||
lda.z o1
|
||||
cmp #0
|
||||
// [18] if((bool) bool_complex::o1#0) goto bool_complex::@6 -- vboxx_then_la1
|
||||
cpx #0
|
||||
bne __b6
|
||||
jmp __b5
|
||||
// bool_complex::@6
|
||||
__b6:
|
||||
// [19] if((bool) bool_complex::o2#0) goto bool_complex::@2 -- vboz1_then_la1
|
||||
lda.z o2
|
||||
// [19] if((bool) bool_complex::o2#0) goto bool_complex::@2 -- vboaa_then_la1
|
||||
cmp #0
|
||||
bne __b2
|
||||
// bool_complex::@5
|
||||
__b5:
|
||||
// [20] if((bool) bool_complex::o1#0) goto bool_complex::@4 -- vboz1_then_la1
|
||||
lda.z o1
|
||||
cmp #0
|
||||
// [20] if((bool) bool_complex::o1#0) goto bool_complex::@4 -- vboxx_then_la1
|
||||
cpx #0
|
||||
bne __b4
|
||||
// bool_complex::@7
|
||||
// [21] if((bool) bool_complex::o2#0) goto bool_complex::@4 -- vboz1_then_la1
|
||||
lda.z o2
|
||||
// [21] if((bool) bool_complex::o2#0) goto bool_complex::@4 -- vboaa_then_la1
|
||||
cmp #0
|
||||
bne __b4
|
||||
// bool_complex::@2
|
||||
__b2:
|
||||
// screen[i] = '*'
|
||||
// [22] *((const byte*) bool_complex::screen + (byte) bool_complex::i#2) ← (byte) '*' -- pbuc1_derefidx_vbuxx=vbuc2
|
||||
// [22] *((const byte*) bool_complex::screen + (byte) bool_complex::i#2) ← (byte) '*' -- pbuc1_derefidx_vbuyy=vbuc2
|
||||
lda #'*'
|
||||
sta screen,x
|
||||
sta screen,y
|
||||
// bool_complex::@3
|
||||
__b3:
|
||||
// for( byte i : 0..20)
|
||||
// [23] (byte) bool_complex::i#1 ← ++ (byte) bool_complex::i#2 -- vbuxx=_inc_vbuxx
|
||||
inx
|
||||
// [24] if((byte) bool_complex::i#1!=(byte) $15) goto bool_complex::@1 -- vbuxx_neq_vbuc1_then_la1
|
||||
cpx #$15
|
||||
// [23] (byte) bool_complex::i#1 ← ++ (byte) bool_complex::i#2 -- vbuyy=_inc_vbuyy
|
||||
iny
|
||||
// [24] if((byte) bool_complex::i#1!=(byte) $15) goto bool_complex::@1 -- vbuyy_neq_vbuc1_then_la1
|
||||
cpy #$15
|
||||
bne __b1
|
||||
// bool_complex::@return
|
||||
// }
|
||||
@ -1717,9 +1693,9 @@ bool_complex: {
|
||||
// bool_complex::@4
|
||||
__b4:
|
||||
// screen[i] = ' '
|
||||
// [26] *((const byte*) bool_complex::screen + (byte) bool_complex::i#2) ← (byte) ' ' -- pbuc1_derefidx_vbuxx=vbuc2
|
||||
// [26] *((const byte*) bool_complex::screen + (byte) bool_complex::i#2) ← (byte) ' ' -- pbuc1_derefidx_vbuyy=vbuc2
|
||||
lda #' '
|
||||
sta screen,x
|
||||
sta screen,y
|
||||
jmp __b3
|
||||
}
|
||||
// bool_not
|
||||
|
||||
@ -27,12 +27,12 @@
|
||||
(label) bool_complex::@7
|
||||
(label) bool_complex::@return
|
||||
(byte) bool_complex::i
|
||||
(byte) bool_complex::i#1 reg byte x 16.5
|
||||
(byte) bool_complex::i#2 reg byte x 6.6
|
||||
(byte) bool_complex::i#1 reg byte y 16.5
|
||||
(byte) bool_complex::i#2 reg byte y 6.6
|
||||
(bool) bool_complex::o1
|
||||
(bool) bool_complex::o1#0 o1 zp ZP_BOOL:2 6.6000000000000005
|
||||
(bool) bool_complex::o1#0 reg byte x 6.6000000000000005
|
||||
(bool) bool_complex::o2
|
||||
(bool) bool_complex::o2#0 o2 zp ZP_BOOL:3 8.25
|
||||
(bool) bool_complex::o2#0 reg byte a 8.25
|
||||
(bool) bool_complex::o3
|
||||
(bool) bool_complex::o4
|
||||
(bool) bool_complex::o5
|
||||
@ -73,13 +73,13 @@
|
||||
(label) main::@3
|
||||
(label) main::@return
|
||||
|
||||
reg byte x [ bool_complex::i#2 bool_complex::i#1 ]
|
||||
reg byte y [ bool_complex::i#2 bool_complex::i#1 ]
|
||||
reg byte x [ bool_not::i#2 bool_not::i#1 ]
|
||||
reg byte x [ bool_or::i#2 bool_or::i#1 ]
|
||||
reg byte x [ bool_and::i#2 bool_and::i#1 ]
|
||||
zp ZP_BOOL:2 [ bool_complex::o1#0 ]
|
||||
reg byte x [ bool_complex::o1#0 ]
|
||||
reg byte a [ bool_complex::$1 ]
|
||||
zp ZP_BOOL:3 [ bool_complex::o2#0 ]
|
||||
reg byte a [ bool_complex::o2#0 ]
|
||||
reg byte a [ bool_not::$1 ]
|
||||
reg byte a [ bool_or::$1 ]
|
||||
reg byte a [ bool_and::$1 ]
|
||||
|
||||
@ -681,7 +681,7 @@ synthesized vbuxx=vbuz1_bor_vbuc1 < vbuxx=vbum1_bor_vbuc1 < vbuxx=vbuc1_bor_vbum
|
||||
lda #{c1}
|
||||
ora {z1}
|
||||
tax
|
||||
loaded vbuxx=vbuz1_plus_vbuc1 - clobber:A X cycles:5.0
|
||||
synthesized vbuxx=vbuz1_plus_vbuc1 < vbuxx=vbum1_plus_vbuc1 - clobber:A X cycles:5.0
|
||||
lax {z1}
|
||||
axs #-[{c1}]
|
||||
synthesized vbuxx=_deref_pbuz1_bxor_vbuaa < vbuaa=_deref_pbuz1_bxor_vbuaa < vbuaa=vbuaa_bxor__deref_pbuz1 - clobber:A X Y cycles:9.5
|
||||
@ -4522,7 +4522,7 @@ synthesized vbuxx=vbuc1_bor_vbuz1 < vbuaa=vbuc1_bor_vbuz1 < vbuaa=vbuz1_bor_vbuc
|
||||
lda #{c1}
|
||||
ora {z1}
|
||||
tax
|
||||
synthesized vbuxx=vbuc1_plus_vbuz1 < vbuxx=vbuz1_plus_vbuc1 - clobber:A X cycles:5.0
|
||||
synthesized vbuxx=vbuc1_plus_vbuz1 < vbuxx=vbuc1_plus_vbum1 < vbuxx=vbum1_plus_vbuc1 - clobber:A X cycles:5.0
|
||||
lax {z1}
|
||||
axs #-[{c1}]
|
||||
synthesized vbuxx=vbuc1_bxor__deref_pbuz1 < vbuxx=_deref_pbuz1_bxor_vbuc1 < vbuaa=_deref_pbuz1_bxor_vbuc1 < vbuaa=vbuc1_bxor__deref_pbuz1 < vbuaa=vbuaa_bxor__deref_pbuz1 - clobber:A X Y cycles:11.5
|
||||
|
||||
@ -3,10 +3,10 @@ synthesized vbuz1=vbuaa_band_vbuaa < vbuz1=vbuaa_band_vbuyy < vbum1=vbuaa_band_v
|
||||
sty $ff
|
||||
and $ff
|
||||
sta {z1}
|
||||
synthesized vbuz1=vbuaa_band_vbuaa < vbuz1=vbuaa_band_vbuxx - clobber:X cycles:5.0
|
||||
synthesized vbuz1=vbuaa_band_vbuaa < vbuz1=vbuaa_band_vbuxx < vbum1=vbuaa_band_vbuxx - clobber:X cycles:5.0
|
||||
tax
|
||||
sax {z1}
|
||||
loaded vbuz1=vbuaa_band_vbuxx - clobber: cycles:3.0
|
||||
synthesized vbuz1=vbuaa_band_vbuxx < vbum1=vbuaa_band_vbuxx - clobber: cycles:3.0
|
||||
sax {z1}
|
||||
synthesized vbuz1=vbuaa_bor_vbuyy < vbum1=vbuaa_bor_vbuyy < vbuaa=vbuaa_bor_vbuyy - clobber:A cycles:9.0
|
||||
sty $ff
|
||||
@ -36,7 +36,7 @@ synthesized vbuz1=vbuaa_plus__deref_pbuc1 < vbum1=vbuaa_plus__deref_pbuc1 < vbua
|
||||
clc
|
||||
adc {c1}
|
||||
sta {z1}
|
||||
synthesized vbuz1=vbuaa_band_pbuz1_derefidx_vbuxx < vbuz1=vbuaa_band_pbuz1_derefidx_vbuyy < vbuz1=vbuxx_band_pbuz1_derefidx_vbuyy < vbuz1=vbuxx_band_vbuaa < vbuz1=vbuaa_band_vbuxx - clobber:A X Y cycles:16.5
|
||||
synthesized vbuz1=vbuaa_band_pbuz1_derefidx_vbuxx < vbuz1=vbuaa_band_pbuz1_derefidx_vbuyy < vbuz1=vbuxx_band_pbuz1_derefidx_vbuyy < vbuz1=vbuxx_band_vbuaa < vbum1=vbuxx_band_vbuaa < vbum1=vbuaa_band_vbuxx - clobber:A X Y cycles:16.5
|
||||
stx $ff
|
||||
ldy $ff
|
||||
tax
|
||||
@ -109,7 +109,7 @@ synthesized vbuz1=vbuaa_band_pbuc1_derefidx_vbuz2 < vbum1=vbuaa_band_pbuc1_deref
|
||||
ldy {z2}
|
||||
and {c1},y
|
||||
sta {z1}
|
||||
synthesized vbuz1=vbuaa_band_pbuc1_derefidx_vbuz2 < vbuz1=vbuaa_band_pbuc1_derefidx_vbum2 < vbuz1=vbuaa_band_pbuc1_derefidx_vbuyy < vbuz1=pbuc1_derefidx_vbuyy_band_vbuaa < vbuz1=vbuxx_band_vbuaa < vbuz1=vbuaa_band_vbuxx - clobber:X Y cycles:10.5
|
||||
synthesized vbuz1=vbuaa_band_pbuc1_derefidx_vbuz2 < vbum1=vbuaa_band_pbuc1_derefidx_vbuz2 < vbum1=vbuaa_band_pbuc1_derefidx_vbum2 < vbum1=vbuaa_band_pbuc1_derefidx_vbuyy < vbum1=pbuc1_derefidx_vbuyy_band_vbuaa < vbum1=vbuxx_band_vbuaa < vbum1=vbuaa_band_vbuxx - clobber:X Y cycles:10.5
|
||||
ldy {z2}
|
||||
ldx {c1},y
|
||||
sax {z1}
|
||||
@ -121,7 +121,7 @@ synthesized vbuz1=vbuaa_band_pbuc1_derefidx_vbuc1 < vbum1=vbuaa_band_pbuc1_deref
|
||||
ldy #{c1}
|
||||
and {c1},y
|
||||
sta {z1}
|
||||
synthesized vbuz1=vbuaa_band_pbuc1_derefidx_vbuc1 < vbuz1=pbuc1_derefidx_vbuc1_band_vbuaa < vbuz1=pbuc1_derefidx_vbuyy_band_vbuaa < vbuz1=vbuxx_band_vbuaa < vbuz1=vbuaa_band_vbuxx - clobber:X Y cycles:9.5
|
||||
synthesized vbuz1=vbuaa_band_pbuc1_derefidx_vbuc1 < vbum1=vbuaa_band_pbuc1_derefidx_vbuc1 < vbum1=pbuc1_derefidx_vbuc1_band_vbuaa < vbum1=pbuc1_derefidx_vbuyy_band_vbuaa < vbum1=vbuxx_band_vbuaa < vbum1=vbuaa_band_vbuxx - clobber:X Y cycles:9.5
|
||||
ldy #{c1}
|
||||
ldx {c1},y
|
||||
sax {z1}
|
||||
@ -151,7 +151,7 @@ synthesized vbuz1=vbuxx_plus_vbuz1 < vbuz1=vbuaa_plus_vbuz1 < vbum1=vbuaa_plus_v
|
||||
clc
|
||||
adc {z1}
|
||||
sta {z1}
|
||||
synthesized vbuz1=vbuxx_band__deref_pbuz1 < vbuz1=_deref_pbuz1_band_vbuxx < vbuz1=vbuaa_band_vbuxx - clobber:A Y cycles:10.5
|
||||
synthesized vbuz1=vbuxx_band__deref_pbuz1 < vbuz1=_deref_pbuz1_band_vbuxx < vbuz1=vbuaa_band_vbuxx < vbum1=vbuaa_band_vbuxx - clobber:A Y cycles:10.5
|
||||
ldy #0
|
||||
lda ({z1}),y
|
||||
sax {z1}
|
||||
@ -182,7 +182,7 @@ synthesized vbuz1=vbuxx_minus_pbuz1_derefidx_vbuyy < vbuz1=vbuxx_minus_vbuaa < v
|
||||
sbc $ff
|
||||
sta {z1}
|
||||
CANNOT SYNTHESIZE vbuz1=vbuxx_plus_pbuz1_derefidx_vbuz1
|
||||
synthesized vbuz1=vbuxx_band_pbuz1_derefidx_vbuc1 < vbuz1=pbuz1_derefidx_vbuc1_band_vbuxx < vbuz1=pbuz1_derefidx_vbuyy_band_vbuxx < vbuz1=vbuxx_band_pbuz1_derefidx_vbuyy < vbuz1=vbuxx_band_vbuaa < vbuz1=vbuaa_band_vbuxx - clobber:A Y cycles:10.5
|
||||
synthesized vbuz1=vbuxx_band_pbuz1_derefidx_vbuc1 < vbuz1=pbuz1_derefidx_vbuc1_band_vbuxx < vbuz1=pbuz1_derefidx_vbuyy_band_vbuxx < vbuz1=vbuxx_band_pbuz1_derefidx_vbuyy < vbuz1=vbuxx_band_vbuaa < vbum1=vbuxx_band_vbuaa < vbum1=vbuaa_band_vbuxx - clobber:A Y cycles:10.5
|
||||
ldy #{c1}
|
||||
lda ({z1}),y
|
||||
sax {z1}
|
||||
@ -212,11 +212,11 @@ synthesized vbuz1=vbuxx_plus_pbuz2_derefidx_vbuz3 < vbum1=vbuxx_plus_pbuz2_deref
|
||||
clc
|
||||
adc ({z2}),y
|
||||
sta {z1}
|
||||
synthesized vbuz1=vbuxx_band_pbuc1_derefidx_vbuaa < vbuz1=vbuxx_band_pbuc1_derefidx_vbuyy < vbuz1=pbuc1_derefidx_vbuyy_band_vbuxx < vbuz1=vbuaa_band_vbuxx - clobber:A Y cycles:9.5
|
||||
synthesized vbuz1=vbuxx_band_pbuc1_derefidx_vbuaa < vbuz1=vbuxx_band_pbuc1_derefidx_vbuyy < vbuz1=pbuc1_derefidx_vbuyy_band_vbuxx < vbuz1=vbuaa_band_vbuxx < vbum1=vbuaa_band_vbuxx - clobber:A Y cycles:9.5
|
||||
tay
|
||||
lda {c1},y
|
||||
sax {z1}
|
||||
synthesized vbuz1=vbuxx_band_pbuc1_derefidx_vbuxx < vbuz1=pbuc1_derefidx_vbuxx_band_vbuxx < vbuz1=vbuaa_band_vbuxx - clobber:A cycles:7.5
|
||||
synthesized vbuz1=vbuxx_band_pbuc1_derefidx_vbuxx < vbum1=vbuxx_band_pbuc1_derefidx_vbuxx < vbum1=pbuc1_derefidx_vbuxx_band_vbuxx < vbum1=vbuaa_band_vbuxx - clobber:A cycles:7.5
|
||||
lda {c1},x
|
||||
sax {z1}
|
||||
synthesized vbuz1=vbuxx_bor_pbuc1_derefidx_vbuyy < vbuz1=vbuaa_bor_pbuc1_derefidx_vbuyy < vbum1=vbuaa_bor_pbuc1_derefidx_vbuyy < vbuaa=vbuaa_bor_pbuc1_derefidx_vbuyy - clobber:A cycles:9.5
|
||||
@ -276,7 +276,7 @@ synthesized vbuz1=vbuxx_plus_vbuc1 < vbum1=vbuxx_plus_vbuc1 < vbuxx=vbuxx_plus_v
|
||||
txa
|
||||
axs #-[{c1}]
|
||||
stx {z1}
|
||||
synthesized vbuz1=vbuyy_band_vbuxx < vbuz1=vbuaa_band_vbuxx - clobber:A cycles:5.0
|
||||
synthesized vbuz1=vbuyy_band_vbuxx < vbum1=vbuyy_band_vbuxx < vbum1=vbuaa_band_vbuxx - clobber:A cycles:5.0
|
||||
tya
|
||||
sax {z1}
|
||||
synthesized vbuz1=vbuyy_bor_vbuyy < vbum1=vbuyy_bor_vbuyy < vbuyy=vbuyy_bor_vbuyy - clobber: cycles:3.0
|
||||
@ -310,7 +310,7 @@ synthesized vbuz1=vbuyy_plus__deref_pbuc1 < vbum1=vbuyy_plus__deref_pbuc1 < vbum
|
||||
clc
|
||||
adc {c1}
|
||||
sta {z1}
|
||||
synthesized vbuz1=vbuyy_band_pbuz1_derefidx_vbuxx < vbuz1=vbuyy_band_pbuz1_derefidx_vbuaa < vbuz1=vbuxx_band_pbuz1_derefidx_vbuaa < vbuz1=vbuxx_band_pbuz1_derefidx_vbuyy < vbuz1=vbuxx_band_vbuaa < vbuz1=vbuaa_band_vbuxx - clobber:A X Y cycles:18.5
|
||||
synthesized vbuz1=vbuyy_band_pbuz1_derefidx_vbuxx < vbuz1=vbuyy_band_pbuz1_derefidx_vbuaa < vbuz1=vbuxx_band_pbuz1_derefidx_vbuaa < vbuz1=vbuxx_band_pbuz1_derefidx_vbuyy < vbuz1=vbuxx_band_vbuaa < vbum1=vbuxx_band_vbuaa < vbum1=vbuaa_band_vbuxx - clobber:A X Y cycles:18.5
|
||||
txa
|
||||
sty $ff
|
||||
ldx $ff
|
||||
@ -563,11 +563,11 @@ synthesized vbuz1=vbuz1_plus_vbuc1 < vbum1=vbum1_plus_vbuc1 < vbuaa=vbum1_plus_v
|
||||
clc
|
||||
adc {z1}
|
||||
sta {z1}
|
||||
synthesized vbuz1=vbuz1_plus_vbuc1 < vbuz1=vbuc1_plus_vbuz1 < vbuz1=vbuc1_plus_vbuz2 < vbum1=vbuc1_plus_vbuz2 < vbuxx=vbuc1_plus_vbuz1 < vbuxx=vbuz1_plus_vbuc1 - clobber:A X cycles:8.0
|
||||
synthesized vbuz1=vbuz1_plus_vbuc1 < vbum1=vbum1_plus_vbuc1 < vbuxx=vbum1_plus_vbuc1 - clobber:A X cycles:8.0
|
||||
lax {z1}
|
||||
axs #-[{c1}]
|
||||
stx {z1}
|
||||
synthesized vbuz1=vbuz2_band_vbuxx < vbuz1=vbum2_band_vbuxx < vbuz1=vbuaa_band_vbuxx - clobber:A cycles:6.0
|
||||
synthesized vbuz1=vbuz2_band_vbuxx < vbum1=vbuz2_band_vbuxx < vbum1=vbum2_band_vbuxx < vbum1=vbuaa_band_vbuxx - clobber:A cycles:6.0
|
||||
lda {z2}
|
||||
sax {z1}
|
||||
synthesized vbuz1=vbuz2_bor_vbuyy < vbuz1=vbuz2_bor_vbuaa < vbuz1=vbuaa_bor_vbuz2 < vbum1=vbuaa_bor_vbuz2 < vbuaa=vbuaa_bor_vbuz1 < vbuaa=vbuaa_bor_vbum1 - clobber:A cycles:8.0
|
||||
@ -778,15 +778,15 @@ synthesized vbuz1=vbuz2_plus_vbuc1 < vbuz1=vbuz2_plus_vbuaa < vbuz1=vbuaa_plus_v
|
||||
clc
|
||||
adc {z2}
|
||||
sta {z1}
|
||||
synthesized vbuz1=vbuz2_plus_vbuc1 < vbum1=vbuz2_plus_vbuc1 < vbuxx=vbuz1_plus_vbuc1 - clobber:A X cycles:8.0
|
||||
synthesized vbuz1=vbuz2_plus_vbuc1 < vbum1=vbuz2_plus_vbuc1 < vbuxx=vbuz1_plus_vbuc1 < vbuxx=vbum1_plus_vbuc1 - clobber:A X cycles:8.0
|
||||
lax {z2}
|
||||
axs #-[{c1}]
|
||||
stx {z1}
|
||||
synthesized vbuz1=_deref_pbuz1_band_vbuxx < vbuz1=vbuaa_band_vbuxx - clobber:A Y cycles:10.5
|
||||
synthesized vbuz1=_deref_pbuz1_band_vbuxx < vbuz1=vbuaa_band_vbuxx < vbum1=vbuaa_band_vbuxx - clobber:A Y cycles:10.5
|
||||
ldy #0
|
||||
lda ({z1}),y
|
||||
sax {z1}
|
||||
synthesized vbuz1=_deref_pbuz1_band_vbuyy < vbuz1=_deref_pbuz1_band_vbuaa < vbuz1=_deref_pbuz1_band_vbuxx < vbuz1=vbuaa_band_vbuxx - clobber:A X Y cycles:14.5
|
||||
synthesized vbuz1=_deref_pbuz1_band_vbuyy < vbuz1=_deref_pbuz1_band_vbuaa < vbuz1=_deref_pbuz1_band_vbuxx < vbuz1=vbuaa_band_vbuxx < vbum1=vbuaa_band_vbuxx - clobber:A X Y cycles:14.5
|
||||
tya
|
||||
tax
|
||||
ldy #0
|
||||
@ -816,7 +816,7 @@ synthesized vbuz1=_deref_pbuz1_plus__deref_pbuc1 < vbuz1=_deref_pbuc1_plus__dere
|
||||
clc
|
||||
adc {c1}
|
||||
sta {z1}
|
||||
synthesized vbuz1=_deref_pbuz1_band_pbuz1_derefidx_vbuxx < vbuz1=_deref_pbuz1_band_pbuz1_derefidx_vbuaa < vbuz1=_deref_pbuz1_band_pbuz1_derefidx_vbuyy < vbuz1=_deref_pbuz1_band_vbuaa < vbuz1=_deref_pbuz1_band_vbuxx < vbuz1=vbuaa_band_vbuxx - clobber:A X Y cycles:22.0
|
||||
synthesized vbuz1=_deref_pbuz1_band_pbuz1_derefidx_vbuxx < vbuz1=_deref_pbuz1_band_pbuz1_derefidx_vbuaa < vbuz1=_deref_pbuz1_band_pbuz1_derefidx_vbuyy < vbuz1=_deref_pbuz1_band_vbuaa < vbuz1=_deref_pbuz1_band_vbuxx < vbuz1=vbuaa_band_vbuxx < vbum1=vbuaa_band_vbuxx - clobber:A X Y cycles:22.0
|
||||
txa
|
||||
tay
|
||||
lda ({z1}),y
|
||||
@ -824,7 +824,7 @@ synthesized vbuz1=_deref_pbuz1_band_pbuz1_derefidx_vbuxx < vbuz1=_deref_pbuz1_ba
|
||||
ldy #0
|
||||
lda ({z1}),y
|
||||
sax {z1}
|
||||
synthesized vbuz1=_deref_pbuz1_band_pbuz1_derefidx_vbuyy < vbuz1=_deref_pbuz1_band_vbuaa < vbuz1=_deref_pbuz1_band_vbuxx < vbuz1=vbuaa_band_vbuxx - clobber:A X Y cycles:18.0
|
||||
synthesized vbuz1=_deref_pbuz1_band_pbuz1_derefidx_vbuyy < vbuz1=_deref_pbuz1_band_vbuaa < vbuz1=_deref_pbuz1_band_vbuxx < vbuz1=vbuaa_band_vbuxx < vbum1=vbuaa_band_vbuxx - clobber:A X Y cycles:18.0
|
||||
lda ({z1}),y
|
||||
tax
|
||||
ldy #0
|
||||
@ -1487,7 +1487,7 @@ synthesized vbuz1=pbuz1_derefidx_vbuaa_plus_pbuc1_derefidx_vbuaa < vbuz1=pbuz1_d
|
||||
clc
|
||||
adc {c1},y
|
||||
sta {z1}
|
||||
synthesized vbuz1=pbuz1_derefidx_vbuaa_band_pbuc1_derefidx_vbuyy < vbuz1=pbuc1_derefidx_vbuyy_band_pbuz1_derefidx_vbuaa < vbuz1=vbuxx_band_pbuz1_derefidx_vbuaa < vbuz1=vbuxx_band_pbuz1_derefidx_vbuyy < vbuz1=vbuxx_band_vbuaa < vbuz1=vbuaa_band_vbuxx - clobber:A X Y cycles:15.0
|
||||
synthesized vbuz1=pbuz1_derefidx_vbuaa_band_pbuc1_derefidx_vbuyy < vbuz1=pbuc1_derefidx_vbuyy_band_pbuz1_derefidx_vbuaa < vbuz1=vbuxx_band_pbuz1_derefidx_vbuaa < vbuz1=vbuxx_band_pbuz1_derefidx_vbuyy < vbuz1=vbuxx_band_vbuaa < vbum1=vbuxx_band_vbuaa < vbum1=vbuaa_band_vbuxx - clobber:A X Y cycles:15.0
|
||||
ldx {c1},y
|
||||
tay
|
||||
lda ({z1}),y
|
||||
@ -1521,7 +1521,7 @@ synthesized vbuz1=pbuz1_derefidx_vbuxx_plus_vbuaa < vbuz1=pbuz1_derefidx_vbuyy_p
|
||||
clc
|
||||
adc $ff
|
||||
sta {z1}
|
||||
synthesized vbuz1=pbuz1_derefidx_vbuxx_band_vbuyy < vbuz1=pbuz1_derefidx_vbuaa_band_vbuyy < vbuz1=pbuz1_derefidx_vbuaa_band_vbuxx < vbuz1=pbuz1_derefidx_vbuyy_band_vbuxx < vbuz1=vbuxx_band_pbuz1_derefidx_vbuyy < vbuz1=vbuxx_band_vbuaa < vbuz1=vbuaa_band_vbuxx - clobber:A X Y cycles:18.5
|
||||
synthesized vbuz1=pbuz1_derefidx_vbuxx_band_vbuyy < vbuz1=pbuz1_derefidx_vbuaa_band_vbuyy < vbuz1=pbuz1_derefidx_vbuaa_band_vbuxx < vbuz1=pbuz1_derefidx_vbuyy_band_vbuxx < vbuz1=vbuxx_band_pbuz1_derefidx_vbuyy < vbuz1=vbuxx_band_vbuaa < vbum1=vbuxx_band_vbuaa < vbum1=vbuaa_band_vbuxx - clobber:A X Y cycles:18.5
|
||||
txa
|
||||
sty $ff
|
||||
ldx $ff
|
||||
@ -1838,7 +1838,7 @@ synthesized vbuz1=pbuz1_derefidx_vbuz2_plus_pbuz1_derefidx_vbuyy < vbuz1=pbuz1_d
|
||||
adc $ff
|
||||
sta {z1}
|
||||
CANNOT SYNTHESIZE vbuz1=pbuz1_derefidx_vbuz2_plus_pbuz1_derefidx_vbuz1
|
||||
synthesized vbuz1=pbuz1_derefidx_vbuz2_band_pbuz1_derefidx_vbuz3 < vbuz1=pbuz1_derefidx_vbum2_band_pbuz1_derefidx_vbuz3 < vbuz1=pbuz1_derefidx_vbum2_band_pbuz1_derefidx_vbum3 < vbuz1=pbuz1_derefidx_vbuyy_band_pbuz1_derefidx_vbum2 < vbuz1=pbuz1_derefidx_vbum2_band_pbuz1_derefidx_vbuyy < vbuz1=pbuz1_derefidx_vbum2_band_vbuaa < vbuz1=pbuz1_derefidx_vbuyy_band_vbuaa < vbuz1=pbuz1_derefidx_vbuyy_band_vbuxx < vbuz1=vbuxx_band_pbuz1_derefidx_vbuyy < vbuz1=vbuxx_band_vbuaa < vbuz1=vbuaa_band_vbuxx - clobber:A X Y cycles:22.0
|
||||
synthesized vbuz1=pbuz1_derefidx_vbuz2_band_pbuz1_derefidx_vbuz3 < vbuz1=pbuz1_derefidx_vbum2_band_pbuz1_derefidx_vbuz3 < vbuz1=pbuz1_derefidx_vbum2_band_pbuz1_derefidx_vbum3 < vbuz1=pbuz1_derefidx_vbuyy_band_pbuz1_derefidx_vbum2 < vbuz1=pbuz1_derefidx_vbum2_band_pbuz1_derefidx_vbuyy < vbuz1=pbuz1_derefidx_vbum2_band_vbuaa < vbuz1=pbuz1_derefidx_vbuyy_band_vbuaa < vbuz1=pbuz1_derefidx_vbuyy_band_vbuxx < vbuz1=vbuxx_band_pbuz1_derefidx_vbuyy < vbuz1=vbuxx_band_vbuaa < vbum1=vbuxx_band_vbuaa < vbum1=vbuaa_band_vbuxx - clobber:A X Y cycles:22.0
|
||||
ldy {z2}
|
||||
lda ({z1}),y
|
||||
ldy {z3}
|
||||
@ -1987,7 +1987,7 @@ synthesized vbuz1=pbuz1_derefidx_vbuc1_plus_pbuz1_derefidx_vbuz2 < vbuz1=pbuz1_d
|
||||
clc
|
||||
adc $ff
|
||||
sta {z1}
|
||||
synthesized vbuz1=pbuz1_derefidx_vbuc1_band_pbuz1_derefidx_vbuc2 < vbuz1=pbuz1_derefidx_vbuc2_band_pbuz1_derefidx_vbuc1 < vbuz1=pbuz1_derefidx_vbuc2_band_pbuz1_derefidx_vbuyy < vbuz1=pbuz1_derefidx_vbuyy_band_pbuz1_derefidx_vbuc2 < vbuz1=pbuz1_derefidx_vbuyy_band_pbuz1_derefidx_vbuc1 < vbuz1=pbuz1_derefidx_vbuc1_band_pbuz1_derefidx_vbuyy < vbuz1=pbuz1_derefidx_vbuc1_band_vbuaa < vbuz1=pbuz1_derefidx_vbuyy_band_vbuaa < vbuz1=pbuz1_derefidx_vbuyy_band_vbuxx < vbuz1=vbuxx_band_pbuz1_derefidx_vbuyy < vbuz1=vbuxx_band_vbuaa < vbuz1=vbuaa_band_vbuxx - clobber:A X Y cycles:20.0
|
||||
synthesized vbuz1=pbuz1_derefidx_vbuc1_band_pbuz1_derefidx_vbuc2 < vbuz1=pbuz1_derefidx_vbuc2_band_pbuz1_derefidx_vbuc1 < vbuz1=pbuz1_derefidx_vbuc2_band_pbuz1_derefidx_vbuyy < vbuz1=pbuz1_derefidx_vbuyy_band_pbuz1_derefidx_vbuc2 < vbuz1=pbuz1_derefidx_vbuyy_band_pbuz1_derefidx_vbuc1 < vbuz1=pbuz1_derefidx_vbuc1_band_pbuz1_derefidx_vbuyy < vbuz1=pbuz1_derefidx_vbuc1_band_vbuaa < vbuz1=pbuz1_derefidx_vbuyy_band_vbuaa < vbuz1=pbuz1_derefidx_vbuyy_band_vbuxx < vbuz1=vbuxx_band_pbuz1_derefidx_vbuyy < vbuz1=vbuxx_band_vbuaa < vbum1=vbuxx_band_vbuaa < vbum1=vbuaa_band_vbuxx - clobber:A X Y cycles:20.0
|
||||
ldy #{c1}
|
||||
lda ({z1}),y
|
||||
ldy #{c2}
|
||||
@ -3173,7 +3173,7 @@ synthesized vbuz1=pbuc1_derefidx_vbuaa_band_vbuaa < vbum1=pbuc1_derefidx_vbuaa_b
|
||||
tay
|
||||
and {c1},y
|
||||
sta {z1}
|
||||
synthesized vbuz1=pbuc1_derefidx_vbuaa_band_vbuaa < vbuz1=vbuaa_band_pbuc1_derefidx_vbuaa < vbuz1=vbuaa_band_pbuc1_derefidx_vbuyy < vbuz1=pbuc1_derefidx_vbuyy_band_vbuaa < vbuz1=vbuxx_band_vbuaa < vbuz1=vbuaa_band_vbuxx - clobber:X Y cycles:9.5
|
||||
synthesized vbuz1=pbuc1_derefidx_vbuaa_band_vbuaa < vbum1=pbuc1_derefidx_vbuaa_band_vbuaa < vbum1=vbuaa_band_pbuc1_derefidx_vbuaa < vbum1=vbuaa_band_pbuc1_derefidx_vbuyy < vbum1=pbuc1_derefidx_vbuyy_band_vbuaa < vbum1=vbuxx_band_vbuaa < vbum1=vbuaa_band_vbuxx - clobber:X Y cycles:9.5
|
||||
tay
|
||||
ldx {c1},y
|
||||
sax {z1}
|
||||
@ -3474,12 +3474,12 @@ synthesized vbuz1=pbuc1_derefidx_vbuaa_plus_vbuc1 < vbuz1=pbuc1_derefidx_vbuyy_p
|
||||
synthesized vbuz1=pbuc1_derefidx_vbuxx_band_vbuaa < vbuz1=vbuaa_band_pbuc1_derefidx_vbuxx < vbum1=vbuaa_band_pbuc1_derefidx_vbuxx < vbuaa=vbuaa_band_pbuc1_derefidx_vbuxx - clobber:A cycles:7.5
|
||||
and {c1},x
|
||||
sta {z1}
|
||||
synthesized vbuz1=pbuc1_derefidx_vbuxx_band_vbuaa < vbuz1=vbuyy_band_vbuaa < vbuz1=vbuxx_band_vbuaa < vbuz1=vbuaa_band_vbuxx - clobber:X Y cycles:13.5
|
||||
synthesized vbuz1=pbuc1_derefidx_vbuxx_band_vbuaa < vbuz1=vbuyy_band_vbuaa < vbuz1=vbuxx_band_vbuaa < vbum1=vbuxx_band_vbuaa < vbum1=vbuaa_band_vbuxx - clobber:X Y cycles:13.5
|
||||
ldy {c1},x
|
||||
sty $ff
|
||||
ldx $ff
|
||||
sax {z1}
|
||||
synthesized vbuz1=pbuc1_derefidx_vbuxx_band_vbuxx < vbuz1=vbuaa_band_vbuxx - clobber:A cycles:7.5
|
||||
synthesized vbuz1=pbuc1_derefidx_vbuxx_band_vbuxx < vbuz1=vbuaa_band_vbuxx < vbum1=vbuaa_band_vbuxx - clobber:A cycles:7.5
|
||||
lda {c1},x
|
||||
sax {z1}
|
||||
synthesized vbuz1=pbuc1_derefidx_vbuxx_bor_vbuyy < vbuz1=pbuc1_derefidx_vbuxx_bor_vbuaa < vbuz1=vbuaa_bor_pbuc1_derefidx_vbuxx < vbum1=vbuaa_bor_pbuc1_derefidx_vbuxx < vbuaa=vbuaa_bor_pbuc1_derefidx_vbuxx - clobber:A cycles:9.5
|
||||
@ -3714,7 +3714,7 @@ synthesized vbuz1=pbuc1_derefidx_vbuxx_plus_vbuc2 < vbum1=pbuc1_derefidx_vbuxx_p
|
||||
clc
|
||||
adc {c1},x
|
||||
sta {z1}
|
||||
synthesized vbuz1=pbuc1_derefidx_vbuyy_band_vbuxx < vbuz1=vbuaa_band_vbuxx - clobber:A cycles:7.5
|
||||
synthesized vbuz1=pbuc1_derefidx_vbuyy_band_vbuxx < vbuz1=vbuaa_band_vbuxx < vbum1=vbuaa_band_vbuxx - clobber:A cycles:7.5
|
||||
lda {c1},y
|
||||
sax {z1}
|
||||
synthesized vbuz1=pbuc1_derefidx_vbuyy_bor_vbuyy < vbuz1=pbuc1_derefidx_vbuyy_bor_vbuaa < vbuz1=vbuaa_bor_pbuc1_derefidx_vbuyy < vbum1=vbuaa_bor_pbuc1_derefidx_vbuyy < vbuaa=vbuaa_bor_pbuc1_derefidx_vbuyy - clobber:A cycles:9.5
|
||||
@ -3749,7 +3749,7 @@ synthesized vbuz1=pbuc1_derefidx_vbuyy_plus__deref_pbuc1 < vbuz1=pbuc1_derefidx_
|
||||
clc
|
||||
adc {c1},y
|
||||
sta {z1}
|
||||
synthesized vbuz1=pbuc1_derefidx_vbuyy_band_pbuz1_derefidx_vbuaa < vbuz1=vbuxx_band_pbuz1_derefidx_vbuaa < vbuz1=vbuxx_band_pbuz1_derefidx_vbuyy < vbuz1=vbuxx_band_vbuaa < vbuz1=vbuaa_band_vbuxx - clobber:A X Y cycles:15.0
|
||||
synthesized vbuz1=pbuc1_derefidx_vbuyy_band_pbuz1_derefidx_vbuaa < vbuz1=vbuxx_band_pbuz1_derefidx_vbuaa < vbuz1=vbuxx_band_pbuz1_derefidx_vbuyy < vbuz1=vbuxx_band_vbuaa < vbum1=vbuxx_band_vbuaa < vbum1=vbuaa_band_vbuxx - clobber:A X Y cycles:15.0
|
||||
ldx {c1},y
|
||||
tay
|
||||
lda ({z1}),y
|
||||
@ -5533,7 +5533,7 @@ synthesized vbuz1=pbuc1_derefidx_vbuc2_plus_vbuc2 < vbum1=pbuc1_derefidx_vbuc2_p
|
||||
synthesized vbuz1=vbuc1_band_vbuaa < vbuz1=vbuaa_band_vbuc1 < vbum1=vbuaa_band_vbuc1 < vbuaa=vbuaa_band_vbuc1 - clobber:A cycles:5.0
|
||||
and #{c1}
|
||||
sta {z1}
|
||||
synthesized vbuz1=vbuc1_band_vbuaa < vbuz1=vbuaa_band_vbuc1 < vbuz1=vbuaa_band_vbuxx - clobber:X cycles:5.0
|
||||
synthesized vbuz1=vbuc1_band_vbuaa < vbuz1=vbuaa_band_vbuc1 < vbuz1=vbuaa_band_vbuxx < vbum1=vbuaa_band_vbuxx - clobber:X cycles:5.0
|
||||
ldx #{c1}
|
||||
sax {z1}
|
||||
synthesized vbuz1=vbuc1_bor_vbuxx < vbum1=vbuc1_bor_vbuxx < vbuaa=vbuc1_bor_vbuxx < vbuaa=vbuc1_bor_vbuaa < vbuaa=vbuaa_bor_vbuc1 - clobber:A cycles:7.0
|
||||
|
||||
@ -302,7 +302,7 @@ Initial phi equivalence classes
|
||||
[ framedone#10 framedone#1 framedone#11 framedone#0 framedone#3 ]
|
||||
Complete equivalence classes
|
||||
[ framedone#10 framedone#1 framedone#11 framedone#0 framedone#3 ]
|
||||
Allocated zp ZP_BOOL:2 [ framedone#10 framedone#1 framedone#11 framedone#0 framedone#3 ]
|
||||
Allocated zp ZP_BYTE:2 [ framedone#10 framedone#1 framedone#11 framedone#0 framedone#3 ]
|
||||
|
||||
INITIAL ASM
|
||||
Target platform is c64basic / MOS6502X
|
||||
@ -442,16 +442,18 @@ Statement [14] (bool) framedone#0 ← true [ framedone#0 ] ( main:3 [ framedone#
|
||||
Statement [16] *((const byte*) IRQ_STATUS) ← (const byte) IRQ_RASTER [ framedone#11 ] ( [ framedone#11 ] ) always clobbers reg byte a
|
||||
Statement [17] if(*((const byte*) RASTER)<(byte) $32+(byte) 1) goto irq::@1 [ framedone#11 ] ( [ framedone#11 ] ) always clobbers reg byte a
|
||||
Statement [18] (bool) framedone#3 ← false [ framedone#3 ] ( [ framedone#3 ] ) always clobbers reg byte a
|
||||
Potential registers zp ZP_BOOL:2 [ framedone#10 framedone#1 framedone#11 framedone#0 framedone#3 ] : zp ZP_BOOL:2 ,
|
||||
Potential registers zp ZP_BYTE:2 [ framedone#10 framedone#1 framedone#11 framedone#0 framedone#3 ] : zp ZP_BYTE:2 ,
|
||||
|
||||
REGISTER UPLIFT SCOPES
|
||||
Uplift Scope [] 174: zp ZP_BOOL:2 [ framedone#10 framedone#1 framedone#11 framedone#0 framedone#3 ]
|
||||
Uplift Scope [] 174: zp ZP_BYTE:2 [ framedone#10 framedone#1 framedone#11 framedone#0 framedone#3 ]
|
||||
Uplift Scope [main]
|
||||
Uplift Scope [irq]
|
||||
|
||||
Uplifting [] best 1694 combination zp ZP_BOOL:2 [ framedone#10 framedone#1 framedone#11 framedone#0 framedone#3 ]
|
||||
Uplifting [] best 1694 combination zp ZP_BYTE:2 [ framedone#10 framedone#1 framedone#11 framedone#0 framedone#3 ]
|
||||
Uplifting [main] best 1694 combination
|
||||
Uplifting [irq] best 1694 combination
|
||||
Attempting to uplift remaining variables inzp ZP_BYTE:2 [ framedone#10 framedone#1 framedone#11 framedone#0 framedone#3 ]
|
||||
Uplifting [] best 1694 combination zp ZP_BYTE:2 [ framedone#10 framedone#1 framedone#11 framedone#0 framedone#3 ]
|
||||
|
||||
ASSEMBLER BEFORE OPTIMIZATION
|
||||
// File Comments
|
||||
@ -627,11 +629,11 @@ FINAL SYMBOL TABLE
|
||||
(const byte*) RASTER RASTER = (byte*) 53266
|
||||
(const byte*) VIC_CONTROL VIC_CONTROL = (byte*) 53265
|
||||
(bool) framedone
|
||||
(bool) framedone#0 framedone zp ZP_BOOL:2 22.0
|
||||
(bool) framedone#1 framedone zp ZP_BOOL:2 107.5
|
||||
(bool) framedone#10 framedone zp ZP_BOOL:2 40.0
|
||||
(bool) framedone#11 framedone zp ZP_BOOL:2 0.5
|
||||
(bool) framedone#3 framedone zp ZP_BOOL:2 4.0
|
||||
(bool) framedone#0 framedone zp ZP_BYTE:2 22.0
|
||||
(bool) framedone#1 framedone zp ZP_BYTE:2 107.5
|
||||
(bool) framedone#10 framedone zp ZP_BYTE:2 40.0
|
||||
(bool) framedone#11 framedone zp ZP_BYTE:2 0.5
|
||||
(bool) framedone#3 framedone zp ZP_BYTE:2 4.0
|
||||
interrupt(KERNEL_MIN)(void()) irq()
|
||||
(label) irq::@1
|
||||
(label) irq::@2
|
||||
@ -641,7 +643,7 @@ interrupt(KERNEL_MIN)(void()) irq()
|
||||
(label) main::@2
|
||||
(label) main::@3
|
||||
|
||||
zp ZP_BOOL:2 [ framedone#10 framedone#1 framedone#11 framedone#0 framedone#3 ]
|
||||
zp ZP_BYTE:2 [ framedone#10 framedone#1 framedone#11 framedone#0 framedone#3 ]
|
||||
|
||||
|
||||
FINAL ASSEMBLER
|
||||
|
||||
@ -12,11 +12,11 @@
|
||||
(const byte*) RASTER RASTER = (byte*) 53266
|
||||
(const byte*) VIC_CONTROL VIC_CONTROL = (byte*) 53265
|
||||
(bool) framedone
|
||||
(bool) framedone#0 framedone zp ZP_BOOL:2 22.0
|
||||
(bool) framedone#1 framedone zp ZP_BOOL:2 107.5
|
||||
(bool) framedone#10 framedone zp ZP_BOOL:2 40.0
|
||||
(bool) framedone#11 framedone zp ZP_BOOL:2 0.5
|
||||
(bool) framedone#3 framedone zp ZP_BOOL:2 4.0
|
||||
(bool) framedone#0 framedone zp ZP_BYTE:2 22.0
|
||||
(bool) framedone#1 framedone zp ZP_BYTE:2 107.5
|
||||
(bool) framedone#10 framedone zp ZP_BYTE:2 40.0
|
||||
(bool) framedone#11 framedone zp ZP_BYTE:2 0.5
|
||||
(bool) framedone#3 framedone zp ZP_BYTE:2 4.0
|
||||
interrupt(KERNEL_MIN)(void()) irq()
|
||||
(label) irq::@1
|
||||
(label) irq::@2
|
||||
@ -26,4 +26,4 @@ interrupt(KERNEL_MIN)(void()) irq()
|
||||
(label) main::@2
|
||||
(label) main::@3
|
||||
|
||||
zp ZP_BOOL:2 [ framedone#10 framedone#1 framedone#11 framedone#0 framedone#3 ]
|
||||
zp ZP_BYTE:2 [ framedone#10 framedone#1 framedone#11 framedone#0 framedone#3 ]
|
||||
|
||||
@ -2339,7 +2339,7 @@ Allocated zp ZP_BYTE:13 [ plex_sprite_idx#25 plex_sprite_idx#10 plex_sprite_idx#
|
||||
Allocated zp ZP_BYTE:14 [ plex_show_idx#27 plex_show_idx#10 plex_show_idx#0 plex_show_idx#1 plex_show_idx#16 ]
|
||||
Allocated zp ZP_BYTE:15 [ plex_free_next#27 plex_free_next#10 plex_free_next#31 plex_free_next#0 plexShowSprite::plexFreeAdd1_$2 ]
|
||||
Allocated zp ZP_BYTE:16 [ plex_sprite_msb#28 plex_sprite_msb#11 plex_sprite_msb#0 plex_sprite_msb#1 plex_sprite_msb#17 plex_sprite_msb#3 plex_sprite_msb#4 ]
|
||||
Allocated zp ZP_BOOL:17 [ framedone#10 framedone#12 framedone#17 framedone#5 framedone#3 ]
|
||||
Allocated zp ZP_BYTE:17 [ framedone#10 framedone#12 framedone#17 framedone#5 framedone#3 ]
|
||||
Allocated zp ZP_BYTE:18 [ plexSort::nxt_idx#0 ]
|
||||
Allocated zp ZP_BYTE:19 [ plexSort::nxt_y#0 ]
|
||||
Allocated zp ZP_BYTE:20 [ plexSort::s#2 ]
|
||||
@ -3317,7 +3317,7 @@ Potential registers zp ZP_BYTE:13 [ plex_sprite_idx#25 plex_sprite_idx#10 plex_s
|
||||
Potential registers zp ZP_BYTE:14 [ plex_show_idx#27 plex_show_idx#10 plex_show_idx#0 plex_show_idx#1 plex_show_idx#16 ] : zp ZP_BYTE:14 ,
|
||||
Potential registers zp ZP_BYTE:15 [ plex_free_next#27 plex_free_next#10 plex_free_next#31 plex_free_next#0 plexShowSprite::plexFreeAdd1_$2 ] : zp ZP_BYTE:15 ,
|
||||
Potential registers zp ZP_BYTE:16 [ plex_sprite_msb#28 plex_sprite_msb#11 plex_sprite_msb#0 plex_sprite_msb#1 plex_sprite_msb#17 plex_sprite_msb#3 plex_sprite_msb#4 ] : zp ZP_BYTE:16 ,
|
||||
Potential registers zp ZP_BOOL:17 [ framedone#10 framedone#12 framedone#17 framedone#5 framedone#3 ] : zp ZP_BOOL:17 ,
|
||||
Potential registers zp ZP_BYTE:17 [ framedone#10 framedone#12 framedone#17 framedone#5 framedone#3 ] : zp ZP_BYTE:17 ,
|
||||
Potential registers zp ZP_BYTE:18 [ plexSort::nxt_idx#0 ] : zp ZP_BYTE:18 , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:19 [ plexSort::nxt_y#0 ] : zp ZP_BYTE:19 , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:20 [ plexSort::s#2 ] : zp ZP_BYTE:20 , reg byte a , reg byte x , reg byte y ,
|
||||
@ -3337,7 +3337,7 @@ Potential registers zp ZP_BYTE:33 [ plexShowSprite::$5 ] : zp ZP_BYTE:33 , reg b
|
||||
|
||||
REGISTER UPLIFT SCOPES
|
||||
Uplift Scope [plexSort] 3,622.83: zp ZP_BYTE:6 [ plexSort::s#3 plexSort::s#1 plexSort::s#6 ] 303: zp ZP_BYTE:7 [ plexSort::plexFreePrepare1_s#2 plexSort::plexFreePrepare1_s#1 ] 202: zp ZP_BYTE:20 [ plexSort::s#2 ] 193.58: zp ZP_BYTE:5 [ plexSort::m#2 plexSort::m#1 ] 150.38: zp ZP_BYTE:19 [ plexSort::nxt_y#0 ] 30.3: zp ZP_BYTE:18 [ plexSort::nxt_idx#0 ]
|
||||
Uplift Scope [] 141.65: zp ZP_BYTE:16 [ plex_sprite_msb#28 plex_sprite_msb#11 plex_sprite_msb#0 plex_sprite_msb#1 plex_sprite_msb#17 plex_sprite_msb#3 plex_sprite_msb#4 ] 136.36: zp ZP_BYTE:15 [ plex_free_next#27 plex_free_next#10 plex_free_next#31 plex_free_next#0 plexShowSprite::plexFreeAdd1_$2 ] 134.58: zp ZP_BYTE:14 [ plex_show_idx#27 plex_show_idx#10 plex_show_idx#0 plex_show_idx#1 plex_show_idx#16 ] 133.61: zp ZP_BYTE:13 [ plex_sprite_idx#25 plex_sprite_idx#10 plex_sprite_idx#0 plex_sprite_idx#1 plexShowSprite::$6 ] 108.71: zp ZP_BOOL:17 [ framedone#10 framedone#12 framedone#17 framedone#5 framedone#3 ]
|
||||
Uplift Scope [] 141.65: zp ZP_BYTE:16 [ plex_sprite_msb#28 plex_sprite_msb#11 plex_sprite_msb#0 plex_sprite_msb#1 plex_sprite_msb#17 plex_sprite_msb#3 plex_sprite_msb#4 ] 136.36: zp ZP_BYTE:15 [ plex_free_next#27 plex_free_next#10 plex_free_next#31 plex_free_next#0 plexShowSprite::plexFreeAdd1_$2 ] 134.58: zp ZP_BYTE:14 [ plex_show_idx#27 plex_show_idx#10 plex_show_idx#0 plex_show_idx#1 plex_show_idx#16 ] 133.61: zp ZP_BYTE:13 [ plex_sprite_idx#25 plex_sprite_idx#10 plex_sprite_idx#0 plex_sprite_idx#1 plexShowSprite::$6 ] 108.71: zp ZP_BYTE:17 [ framedone#10 framedone#12 framedone#17 framedone#5 framedone#3 ]
|
||||
Uplift Scope [loop] 252.5: zp ZP_BYTE:4 [ loop::sy#2 loop::sy#1 ] 246.33: zp ZP_BYTE:3 [ loop::y_idx#2 loop::y_idx#1 loop::y_idx#4 ] 6.81: zp ZP_BYTE:2 [ loop::sin_idx#6 loop::sin_idx#1 ]
|
||||
Uplift Scope [init] 33: zp ZP_BYTE:11 [ init::ss#2 init::ss#1 ] 25.3: zp ZP_BYTE:8 [ init::sx#2 init::sx#1 ] 22: zp ZP_BYTE:21 [ init::$9 ] 15.58: zp ZP_WORD:9 [ init::xp#2 init::xp#1 ]
|
||||
Uplift Scope [plexInit] 38.5: zp ZP_BYTE:12 [ plexInit::i#2 plexInit::i#1 ]
|
||||
@ -3347,7 +3347,7 @@ Uplift Scope [main]
|
||||
|
||||
Uplifting [plexSort] best 62930 combination reg byte x [ plexSort::s#3 plexSort::s#1 plexSort::s#6 ] reg byte x [ plexSort::plexFreePrepare1_s#2 plexSort::plexFreePrepare1_s#1 ] zp ZP_BYTE:20 [ plexSort::s#2 ] zp ZP_BYTE:5 [ plexSort::m#2 plexSort::m#1 ] zp ZP_BYTE:19 [ plexSort::nxt_y#0 ] zp ZP_BYTE:18 [ plexSort::nxt_idx#0 ]
|
||||
Limited combination testing to 10 combinations of 972 possible.
|
||||
Uplifting [] best 62930 combination zp ZP_BYTE:16 [ plex_sprite_msb#28 plex_sprite_msb#11 plex_sprite_msb#0 plex_sprite_msb#1 plex_sprite_msb#17 plex_sprite_msb#3 plex_sprite_msb#4 ] zp ZP_BYTE:15 [ plex_free_next#27 plex_free_next#10 plex_free_next#31 plex_free_next#0 plexShowSprite::plexFreeAdd1_$2 ] zp ZP_BYTE:14 [ plex_show_idx#27 plex_show_idx#10 plex_show_idx#0 plex_show_idx#1 plex_show_idx#16 ] zp ZP_BYTE:13 [ plex_sprite_idx#25 plex_sprite_idx#10 plex_sprite_idx#0 plex_sprite_idx#1 plexShowSprite::$6 ] zp ZP_BOOL:17 [ framedone#10 framedone#12 framedone#17 framedone#5 framedone#3 ]
|
||||
Uplifting [] best 62930 combination zp ZP_BYTE:16 [ plex_sprite_msb#28 plex_sprite_msb#11 plex_sprite_msb#0 plex_sprite_msb#1 plex_sprite_msb#17 plex_sprite_msb#3 plex_sprite_msb#4 ] zp ZP_BYTE:15 [ plex_free_next#27 plex_free_next#10 plex_free_next#31 plex_free_next#0 plexShowSprite::plexFreeAdd1_$2 ] zp ZP_BYTE:14 [ plex_show_idx#27 plex_show_idx#10 plex_show_idx#0 plex_show_idx#1 plex_show_idx#16 ] zp ZP_BYTE:13 [ plex_sprite_idx#25 plex_sprite_idx#10 plex_sprite_idx#0 plex_sprite_idx#1 plexShowSprite::$6 ] zp ZP_BYTE:17 [ framedone#10 framedone#12 framedone#17 framedone#5 framedone#3 ]
|
||||
Uplifting [loop] best 61000 combination reg byte y [ loop::sy#2 loop::sy#1 ] reg byte x [ loop::y_idx#2 loop::y_idx#1 loop::y_idx#4 ] zp ZP_BYTE:2 [ loop::sin_idx#6 loop::sin_idx#1 ]
|
||||
Limited combination testing to 10 combinations of 27 possible.
|
||||
Uplifting [init] best 60750 combination reg byte x [ init::ss#2 init::ss#1 ] reg byte x [ init::sx#2 init::sx#1 ] zp ZP_BYTE:21 [ init::$9 ] zp ZP_WORD:9 [ init::xp#2 init::xp#1 ]
|
||||
@ -3371,6 +3371,8 @@ Attempting to uplift remaining variables inzp ZP_BYTE:14 [ plex_show_idx#27 plex
|
||||
Uplifting [] best 59957 combination zp ZP_BYTE:14 [ plex_show_idx#27 plex_show_idx#10 plex_show_idx#0 plex_show_idx#1 plex_show_idx#16 ]
|
||||
Attempting to uplift remaining variables inzp ZP_BYTE:13 [ plex_sprite_idx#25 plex_sprite_idx#10 plex_sprite_idx#0 plex_sprite_idx#1 plexShowSprite::$6 ]
|
||||
Uplifting [] best 59957 combination zp ZP_BYTE:13 [ plex_sprite_idx#25 plex_sprite_idx#10 plex_sprite_idx#0 plex_sprite_idx#1 plexShowSprite::$6 ]
|
||||
Attempting to uplift remaining variables inzp ZP_BYTE:17 [ framedone#10 framedone#12 framedone#17 framedone#5 framedone#3 ]
|
||||
Uplifting [] best 59957 combination zp ZP_BYTE:17 [ framedone#10 framedone#12 framedone#17 framedone#5 framedone#3 ]
|
||||
Attempting to uplift remaining variables inzp ZP_BYTE:18 [ plexSort::nxt_idx#0 ]
|
||||
Uplifting [plexSort] best 59957 combination zp ZP_BYTE:18 [ plexSort::nxt_idx#0 ]
|
||||
Attempting to uplift remaining variables inzp ZP_BYTE:21 [ init::$9 ]
|
||||
@ -3402,7 +3404,7 @@ Allocated (was zp ZP_BYTE:13) zp ZP_BYTE:6 [ plex_sprite_idx#25 plex_sprite_idx#
|
||||
Allocated (was zp ZP_BYTE:14) zp ZP_BYTE:7 [ plex_show_idx#27 plex_show_idx#10 plex_show_idx#0 plex_show_idx#1 plex_show_idx#16 ]
|
||||
Allocated (was zp ZP_BYTE:15) zp ZP_BYTE:8 [ plex_free_next#27 plex_free_next#10 plex_free_next#31 plex_free_next#0 plexShowSprite::plexFreeAdd1_$2 ]
|
||||
Allocated (was zp ZP_BYTE:16) zp ZP_BYTE:9 [ plex_sprite_msb#28 plex_sprite_msb#11 plex_sprite_msb#0 plex_sprite_msb#1 plex_sprite_msb#17 plex_sprite_msb#3 plex_sprite_msb#4 ]
|
||||
Allocated (was zp ZP_BOOL:17) zp ZP_BOOL:10 [ framedone#10 framedone#12 framedone#17 framedone#5 framedone#3 ]
|
||||
Allocated (was zp ZP_BYTE:17) zp ZP_BYTE:10 [ framedone#10 framedone#12 framedone#17 framedone#5 framedone#3 ]
|
||||
Allocated (was zp ZP_BYTE:18) zp ZP_BYTE:11 [ plexSort::nxt_idx#0 ]
|
||||
Allocated (was zp ZP_BYTE:19) zp ZP_BYTE:12 [ plexSort::nxt_y#0 ]
|
||||
Allocated (was zp ZP_BYTE:24) zp ZP_BYTE:13 [ plexShowSprite::plex_sprite_idx2#0 plex_irq::$4 ]
|
||||
@ -4284,11 +4286,11 @@ FINAL SYMBOL TABLE
|
||||
.byte round(min+(ampl/2)+(ampl/2)*sin(toRadians(360*i/256)))
|
||||
}}
|
||||
(bool) framedone
|
||||
(bool) framedone#10 framedone zp ZP_BOOL:10 40.0
|
||||
(bool) framedone#12 framedone zp ZP_BOOL:10 57.0
|
||||
(bool) framedone#17 framedone zp ZP_BOOL:10 0.375
|
||||
(bool) framedone#3 framedone zp ZP_BOOL:10 4.0
|
||||
(bool) framedone#5 framedone zp ZP_BOOL:10 7.333333333333333
|
||||
(bool) framedone#10 framedone zp ZP_BYTE:10 40.0
|
||||
(bool) framedone#12 framedone zp ZP_BYTE:10 57.0
|
||||
(bool) framedone#17 framedone zp ZP_BYTE:10 0.375
|
||||
(bool) framedone#3 framedone zp ZP_BYTE:10 4.0
|
||||
(bool) framedone#5 framedone zp ZP_BYTE:10 7.333333333333333
|
||||
(void()) init()
|
||||
(byte~) init::$9 reg byte a 22.0
|
||||
(label) init::@1
|
||||
@ -4438,7 +4440,7 @@ zp ZP_BYTE:6 [ plex_sprite_idx#25 plex_sprite_idx#10 plex_sprite_idx#0 plex_spri
|
||||
zp ZP_BYTE:7 [ plex_show_idx#27 plex_show_idx#10 plex_show_idx#0 plex_show_idx#1 plex_show_idx#16 ]
|
||||
zp ZP_BYTE:8 [ plex_free_next#27 plex_free_next#10 plex_free_next#31 plex_free_next#0 plexShowSprite::plexFreeAdd1_$2 ]
|
||||
zp ZP_BYTE:9 [ plex_sprite_msb#28 plex_sprite_msb#11 plex_sprite_msb#0 plex_sprite_msb#1 plex_sprite_msb#17 plex_sprite_msb#3 plex_sprite_msb#4 ]
|
||||
zp ZP_BOOL:10 [ framedone#10 framedone#12 framedone#17 framedone#5 framedone#3 ]
|
||||
zp ZP_BYTE:10 [ framedone#10 framedone#12 framedone#17 framedone#5 framedone#3 ]
|
||||
zp ZP_BYTE:11 [ plexSort::nxt_idx#0 ]
|
||||
zp ZP_BYTE:12 [ plexSort::nxt_y#0 ]
|
||||
reg byte x [ plexSort::s#2 ]
|
||||
|
||||
@ -41,11 +41,11 @@
|
||||
.byte round(min+(ampl/2)+(ampl/2)*sin(toRadians(360*i/256)))
|
||||
}}
|
||||
(bool) framedone
|
||||
(bool) framedone#10 framedone zp ZP_BOOL:10 40.0
|
||||
(bool) framedone#12 framedone zp ZP_BOOL:10 57.0
|
||||
(bool) framedone#17 framedone zp ZP_BOOL:10 0.375
|
||||
(bool) framedone#3 framedone zp ZP_BOOL:10 4.0
|
||||
(bool) framedone#5 framedone zp ZP_BOOL:10 7.333333333333333
|
||||
(bool) framedone#10 framedone zp ZP_BYTE:10 40.0
|
||||
(bool) framedone#12 framedone zp ZP_BYTE:10 57.0
|
||||
(bool) framedone#17 framedone zp ZP_BYTE:10 0.375
|
||||
(bool) framedone#3 framedone zp ZP_BYTE:10 4.0
|
||||
(bool) framedone#5 framedone zp ZP_BYTE:10 7.333333333333333
|
||||
(void()) init()
|
||||
(byte~) init::$9 reg byte a 22.0
|
||||
(label) init::@1
|
||||
@ -195,7 +195,7 @@ zp ZP_BYTE:6 [ plex_sprite_idx#25 plex_sprite_idx#10 plex_sprite_idx#0 plex_spri
|
||||
zp ZP_BYTE:7 [ plex_show_idx#27 plex_show_idx#10 plex_show_idx#0 plex_show_idx#1 plex_show_idx#16 ]
|
||||
zp ZP_BYTE:8 [ plex_free_next#27 plex_free_next#10 plex_free_next#31 plex_free_next#0 plexShowSprite::plexFreeAdd1_$2 ]
|
||||
zp ZP_BYTE:9 [ plex_sprite_msb#28 plex_sprite_msb#11 plex_sprite_msb#0 plex_sprite_msb#1 plex_sprite_msb#17 plex_sprite_msb#3 plex_sprite_msb#4 ]
|
||||
zp ZP_BOOL:10 [ framedone#10 framedone#12 framedone#17 framedone#5 framedone#3 ]
|
||||
zp ZP_BYTE:10 [ framedone#10 framedone#12 framedone#17 framedone#5 framedone#3 ]
|
||||
zp ZP_BYTE:11 [ plexSort::nxt_idx#0 ]
|
||||
zp ZP_BYTE:12 [ plexSort::nxt_y#0 ]
|
||||
reg byte x [ plexSort::s#2 ]
|
||||
|
||||
@ -386,15 +386,15 @@ Complete equivalence classes
|
||||
Allocated zp ZP_BYTE:2 [ main::i#2 main::i#1 ]
|
||||
Allocated zp ZP_BYTE:3 [ main::$5 main::$4 main::$2 ]
|
||||
Allocated zp ZP_BYTE:4 [ cond::b#0 ]
|
||||
Allocated zp ZP_BOOL:5 [ cond::return#0 ]
|
||||
Allocated zp ZP_BOOL:6 [ main::$0 ]
|
||||
Allocated zp ZP_BYTE:5 [ cond::return#0 ]
|
||||
Allocated zp ZP_BYTE:6 [ main::$0 ]
|
||||
Allocated zp ZP_BYTE:7 [ m2::i#0 ]
|
||||
Allocated zp ZP_BYTE:8 [ m2::return#0 ]
|
||||
Allocated zp ZP_BYTE:9 [ m1::i#0 ]
|
||||
Allocated zp ZP_BYTE:10 [ m1::return#0 ]
|
||||
Allocated zp ZP_BYTE:11 [ m1::return#1 ]
|
||||
Allocated zp ZP_BYTE:12 [ m2::return#1 ]
|
||||
Allocated zp ZP_BOOL:13 [ cond::return#1 ]
|
||||
Allocated zp ZP_BYTE:13 [ cond::return#1 ]
|
||||
|
||||
INITIAL ASM
|
||||
Target platform is c64basic / MOS6502X
|
||||
@ -576,19 +576,19 @@ Statement [28] (bool) cond::return#1 ← (byte) cond::b#0 < (byte) 5 [ cond::ret
|
||||
Potential registers zp ZP_BYTE:2 [ main::i#2 main::i#1 ] : zp ZP_BYTE:2 , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:3 [ main::$5 main::$4 main::$2 ] : zp ZP_BYTE:3 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:4 [ cond::b#0 ] : zp ZP_BYTE:4 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BOOL:5 [ cond::return#0 ] : zp ZP_BOOL:5 , reg byte a ,
|
||||
Potential registers zp ZP_BOOL:6 [ main::$0 ] : zp ZP_BOOL:6 , reg byte a ,
|
||||
Potential registers zp ZP_BYTE:5 [ cond::return#0 ] : zp ZP_BYTE:5 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:6 [ main::$0 ] : zp ZP_BYTE:6 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:7 [ m2::i#0 ] : zp ZP_BYTE:7 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:8 [ m2::return#0 ] : zp ZP_BYTE:8 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:9 [ m1::i#0 ] : zp ZP_BYTE:9 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:10 [ m1::return#0 ] : zp ZP_BYTE:10 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:11 [ m1::return#1 ] : zp ZP_BYTE:11 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:12 [ m2::return#1 ] : zp ZP_BYTE:12 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BOOL:13 [ cond::return#1 ] : zp ZP_BOOL:13 , reg byte a ,
|
||||
Potential registers zp ZP_BYTE:13 [ cond::return#1 ] : zp ZP_BYTE:13 , reg byte a , reg byte x , reg byte y ,
|
||||
|
||||
REGISTER UPLIFT SCOPES
|
||||
Uplift Scope [main] 77: zp ZP_BYTE:3 [ main::$5 main::$4 main::$2 ] 22: zp ZP_BOOL:6 [ main::$0 ] 20.62: zp ZP_BYTE:2 [ main::i#2 main::i#1 ]
|
||||
Uplift Scope [cond] 22: zp ZP_BOOL:5 [ cond::return#0 ] 13: zp ZP_BYTE:4 [ cond::b#0 ] 4.33: zp ZP_BOOL:13 [ cond::return#1 ]
|
||||
Uplift Scope [main] 77: zp ZP_BYTE:3 [ main::$5 main::$4 main::$2 ] 22: zp ZP_BYTE:6 [ main::$0 ] 20.62: zp ZP_BYTE:2 [ main::i#2 main::i#1 ]
|
||||
Uplift Scope [cond] 22: zp ZP_BYTE:5 [ cond::return#0 ] 13: zp ZP_BYTE:4 [ cond::b#0 ] 4.33: zp ZP_BYTE:13 [ cond::return#1 ]
|
||||
Uplift Scope [m1] 22: zp ZP_BYTE:10 [ m1::return#0 ] 13: zp ZP_BYTE:9 [ m1::i#0 ] 4.33: zp ZP_BYTE:11 [ m1::return#1 ]
|
||||
Uplift Scope [m2] 22: zp ZP_BYTE:8 [ m2::return#0 ] 13: zp ZP_BYTE:7 [ m2::i#0 ] 4.33: zp ZP_BYTE:12 [ m2::return#1 ]
|
||||
Uplift Scope []
|
||||
|
||||
@ -796,9 +796,9 @@ Allocated zp ZP_WORD:5 [ print_line_cursor#13 print_line_cursor#22 print_line_cu
|
||||
Allocated zp ZP_WORD:7 [ print_str::str#2 print_str::str#0 print_str::str#1 ]
|
||||
Allocated zp ZP_WORD:9 [ print_char_cursor#17 print_char_cursor#27 print_char_cursor#30 print_char_cursor#44 print_char_cursor#41 print_char_cursor#4 ]
|
||||
Allocated zp ZP_BYTE:11 [ action_count#10 action_count#13 action_count#11 ]
|
||||
Allocated zp ZP_BOOL:12 [ game_ready::return#0 ]
|
||||
Allocated zp ZP_BOOL:13 [ main::$0 ]
|
||||
Allocated zp ZP_BOOL:14 [ game_ready::return#1 ]
|
||||
Allocated zp ZP_BYTE:12 [ game_ready::return#0 ]
|
||||
Allocated zp ZP_BYTE:13 [ main::$0 ]
|
||||
Allocated zp ZP_BYTE:14 [ game_ready::return#1 ]
|
||||
|
||||
INITIAL ASM
|
||||
Target platform is c64basic / MOS6502X
|
||||
@ -1109,15 +1109,15 @@ Potential registers zp ZP_WORD:5 [ print_line_cursor#13 print_line_cursor#22 pri
|
||||
Potential registers zp ZP_WORD:7 [ print_str::str#2 print_str::str#0 print_str::str#1 ] : zp ZP_WORD:7 ,
|
||||
Potential registers zp ZP_WORD:9 [ print_char_cursor#17 print_char_cursor#27 print_char_cursor#30 print_char_cursor#44 print_char_cursor#41 print_char_cursor#4 ] : zp ZP_WORD:9 ,
|
||||
Potential registers zp ZP_BYTE:11 [ action_count#10 action_count#13 action_count#11 ] : zp ZP_BYTE:11 , reg byte x ,
|
||||
Potential registers zp ZP_BOOL:12 [ game_ready::return#0 ] : zp ZP_BOOL:12 , reg byte a ,
|
||||
Potential registers zp ZP_BOOL:13 [ main::$0 ] : zp ZP_BOOL:13 , reg byte a ,
|
||||
Potential registers zp ZP_BOOL:14 [ game_ready::return#1 ] : zp ZP_BOOL:14 , reg byte a ,
|
||||
Potential registers zp ZP_BYTE:12 [ game_ready::return#0 ] : zp ZP_BYTE:12 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:13 [ main::$0 ] : zp ZP_BYTE:13 , reg byte a , reg byte x , reg byte y ,
|
||||
Potential registers zp ZP_BYTE:14 [ game_ready::return#1 ] : zp ZP_BYTE:14 , reg byte a , reg byte x , reg byte y ,
|
||||
|
||||
REGISTER UPLIFT SCOPES
|
||||
Uplift Scope [] 229.53: zp ZP_WORD:5 [ print_line_cursor#13 print_line_cursor#22 print_line_cursor#24 print_line_cursor#14 ] 193.85: zp ZP_WORD:9 [ print_char_cursor#17 print_char_cursor#27 print_char_cursor#30 print_char_cursor#44 print_char_cursor#41 print_char_cursor#4 ] 8.25: zp ZP_BYTE:11 [ action_count#10 action_count#13 action_count#11 ]
|
||||
Uplift Scope [print_str] 305.5: zp ZP_WORD:7 [ print_str::str#2 print_str::str#0 print_str::str#1 ]
|
||||
Uplift Scope [main] 22: zp ZP_BOOL:13 [ main::$0 ] 14.14: zp ZP_BYTE:2 [ main::i#2 main::i#1 ]
|
||||
Uplift Scope [game_ready] 22: zp ZP_BOOL:12 [ game_ready::return#0 ] 4.33: zp ZP_BOOL:14 [ game_ready::return#1 ]
|
||||
Uplift Scope [main] 22: zp ZP_BYTE:13 [ main::$0 ] 14.14: zp ZP_BYTE:2 [ main::i#2 main::i#1 ]
|
||||
Uplift Scope [game_ready] 22: zp ZP_BYTE:12 [ game_ready::return#0 ] 4.33: zp ZP_BYTE:14 [ game_ready::return#1 ]
|
||||
Uplift Scope [print_str_ln] 2: zp ZP_WORD:3 [ print_str_ln::str#2 ]
|
||||
Uplift Scope [RADIX]
|
||||
Uplift Scope [print_ln]
|
||||
|
||||
@ -93,12 +93,12 @@ SYMBOL TABLE SSA
|
||||
(label) print2::@2
|
||||
(label) print2::@7
|
||||
(label) print2::@return
|
||||
(byte*) print2::at !zp ZP_VAR:250
|
||||
(byte*) print2::at#0 !zp ZP_VAR:250
|
||||
(byte*) print2::at#1 !zp ZP_VAR:250
|
||||
(byte*) print2::at#2 !zp ZP_VAR:250
|
||||
(byte*) print2::at#3 !zp ZP_VAR:250
|
||||
(byte*) print2::at#4 !zp ZP_VAR:250
|
||||
(byte*) print2::at !zp ZP_MEM:250
|
||||
(byte*) print2::at#0 !zp ZP_MEM:250
|
||||
(byte*) print2::at#1 !zp ZP_MEM:250
|
||||
(byte*) print2::at#2 !zp ZP_MEM:250
|
||||
(byte*) print2::at#3 !zp ZP_MEM:250
|
||||
(byte*) print2::at#4 !zp ZP_MEM:250
|
||||
(byte) print2::i
|
||||
(byte) print2::i#0
|
||||
(byte) print2::i#1
|
||||
@ -111,17 +111,17 @@ SYMBOL TABLE SSA
|
||||
(byte) print2::j#2
|
||||
(byte) print2::j#3
|
||||
(byte) print2::j#4
|
||||
(byte*) print2::msg !zp ZP_VAR:252
|
||||
(byte*) print2::msg#0 !zp ZP_VAR:252
|
||||
(byte*) print2::msg#1 !zp ZP_VAR:252
|
||||
(byte*) print2::msg#2 !zp ZP_VAR:252
|
||||
(byte*) print2::msg#3 !zp ZP_VAR:252
|
||||
(byte*) print2::msg#4 !zp ZP_VAR:252
|
||||
(byte*) print2::msg !zp ZP_MEM:252
|
||||
(byte*) print2::msg#0 !zp ZP_MEM:252
|
||||
(byte*) print2::msg#1 !zp ZP_MEM:252
|
||||
(byte*) print2::msg#2 !zp ZP_MEM:252
|
||||
(byte*) print2::msg#3 !zp ZP_MEM:252
|
||||
(byte*) print2::msg#4 !zp ZP_MEM:252
|
||||
(void()) print_char((byte*) print_char::at , (byte) print_char::idx , (byte) print_char::ch)
|
||||
(label) print_char::@return
|
||||
(byte*) print_char::at !zp ZP_VAR:250
|
||||
(byte*) print_char::at#0 !zp ZP_VAR:250
|
||||
(byte*) print_char::at#1 !zp ZP_VAR:250
|
||||
(byte*) print_char::at !zp ZP_MEM:250
|
||||
(byte*) print_char::at#0 !zp ZP_MEM:250
|
||||
(byte*) print_char::at#1 !zp ZP_MEM:250
|
||||
(byte) print_char::ch !reg byte a
|
||||
(byte) print_char::ch#0 !reg byte a
|
||||
(byte) print_char::ch#1 !reg byte a
|
||||
@ -271,20 +271,20 @@ print_char::@return: scope:[print_char] from print_char
|
||||
VARIABLE REGISTER WEIGHTS
|
||||
(void()) main()
|
||||
(void()) print2((byte*) print2::at , (byte*) print2::msg)
|
||||
(byte*) print2::at !zp ZP_VAR:250
|
||||
(byte*) print2::at#1 !zp ZP_VAR:250 4.125
|
||||
(byte*) print2::at !zp ZP_MEM:250
|
||||
(byte*) print2::at#1 !zp ZP_MEM:250 4.125
|
||||
(byte) print2::i
|
||||
(byte) print2::i#1 22.0
|
||||
(byte) print2::i#2 6.285714285714286
|
||||
(byte) print2::j
|
||||
(byte) print2::j#1 11.0
|
||||
(byte) print2::j#2 5.5
|
||||
(byte*) print2::msg !zp ZP_VAR:252
|
||||
(byte*) print2::msg#1 !zp ZP_VAR:252 5.5
|
||||
(byte*) print2::msg !zp ZP_MEM:252
|
||||
(byte*) print2::msg#1 !zp ZP_MEM:252 5.5
|
||||
(void()) print_char((byte*) print_char::at , (byte) print_char::idx , (byte) print_char::ch)
|
||||
(byte*) print_char::at !zp ZP_VAR:250
|
||||
(byte*) print_char::at#0 !zp ZP_VAR:250 7.333333333333333
|
||||
(byte*) print_char::at#1 !zp ZP_VAR:250 13.0
|
||||
(byte*) print_char::at !zp ZP_MEM:250
|
||||
(byte*) print_char::at#0 !zp ZP_MEM:250 7.333333333333333
|
||||
(byte*) print_char::at#1 !zp ZP_MEM:250 13.0
|
||||
(byte) print_char::ch !reg byte a
|
||||
(byte) print_char::ch#0 !reg byte a 22.0
|
||||
(byte) print_char::ch#1 !reg byte a 13.0
|
||||
@ -308,9 +308,6 @@ Complete equivalence classes
|
||||
[ print_char::ch#1 print_char::ch#0 ]
|
||||
[ print_char::at#1 print_char::at#0 ]
|
||||
[ print_char::idx#1 print_char::idx#0 ]
|
||||
Setting declared register type (byte*) print2::msg#1 to ZP_WORD
|
||||
Setting declared register type (byte*) print2::at#1 to ZP_WORD
|
||||
Setting declared register type (byte*) print_char::at#1 to ZP_WORD
|
||||
Allocated zp ZP_BYTE:2 [ print2::i#2 print2::i#1 ]
|
||||
Allocated zp ZP_BYTE:3 [ print2::j#2 print2::j#1 ]
|
||||
|
||||
@ -639,21 +636,21 @@ FINAL SYMBOL TABLE
|
||||
(label) print2::@2
|
||||
(label) print2::@3
|
||||
(label) print2::@return
|
||||
(byte*) print2::at !zp ZP_WORD:250
|
||||
(byte*) print2::at#1 at !zp ZP_WORD:250 4.125
|
||||
(byte*) print2::at !zp ZP_MEM:250
|
||||
(byte*) print2::at#1 at !zp ZP_MEM:250 zp ZP_WORD:250 4.125
|
||||
(byte) print2::i
|
||||
(byte) print2::i#1 i zp ZP_BYTE:2 22.0
|
||||
(byte) print2::i#2 i zp ZP_BYTE:2 6.285714285714286
|
||||
(byte) print2::j
|
||||
(byte) print2::j#1 reg byte x 11.0
|
||||
(byte) print2::j#2 reg byte x 5.5
|
||||
(byte*) print2::msg !zp ZP_WORD:252
|
||||
(byte*) print2::msg#1 msg !zp ZP_WORD:252 5.5
|
||||
(byte*) print2::msg !zp ZP_MEM:252
|
||||
(byte*) print2::msg#1 msg !zp ZP_MEM:252 zp ZP_WORD:252 5.5
|
||||
(void()) print_char((byte*) print_char::at , (byte) print_char::idx , (byte) print_char::ch)
|
||||
(label) print_char::@return
|
||||
(byte*) print_char::at !zp ZP_WORD:250
|
||||
(byte*) print_char::at#0 at !zp ZP_WORD:250 7.333333333333333
|
||||
(byte*) print_char::at#1 at !zp ZP_WORD:250 13.0
|
||||
(byte*) print_char::at !zp ZP_MEM:250
|
||||
(byte*) print_char::at#0 at !zp ZP_MEM:250 zp ZP_WORD:250 7.333333333333333
|
||||
(byte*) print_char::at#1 at !zp ZP_MEM:250 zp ZP_WORD:250 13.0
|
||||
(byte) print_char::ch !reg byte a
|
||||
(byte) print_char::ch#0 !reg byte a 22.0
|
||||
(byte) print_char::ch#1 !reg byte a 13.0
|
||||
|
||||
@ -9,21 +9,21 @@
|
||||
(label) print2::@2
|
||||
(label) print2::@3
|
||||
(label) print2::@return
|
||||
(byte*) print2::at !zp ZP_WORD:250
|
||||
(byte*) print2::at#1 at !zp ZP_WORD:250 4.125
|
||||
(byte*) print2::at !zp ZP_MEM:250
|
||||
(byte*) print2::at#1 at !zp ZP_MEM:250 zp ZP_WORD:250 4.125
|
||||
(byte) print2::i
|
||||
(byte) print2::i#1 i zp ZP_BYTE:2 22.0
|
||||
(byte) print2::i#2 i zp ZP_BYTE:2 6.285714285714286
|
||||
(byte) print2::j
|
||||
(byte) print2::j#1 reg byte x 11.0
|
||||
(byte) print2::j#2 reg byte x 5.5
|
||||
(byte*) print2::msg !zp ZP_WORD:252
|
||||
(byte*) print2::msg#1 msg !zp ZP_WORD:252 5.5
|
||||
(byte*) print2::msg !zp ZP_MEM:252
|
||||
(byte*) print2::msg#1 msg !zp ZP_MEM:252 zp ZP_WORD:252 5.5
|
||||
(void()) print_char((byte*) print_char::at , (byte) print_char::idx , (byte) print_char::ch)
|
||||
(label) print_char::@return
|
||||
(byte*) print_char::at !zp ZP_WORD:250
|
||||
(byte*) print_char::at#0 at !zp ZP_WORD:250 7.333333333333333
|
||||
(byte*) print_char::at#1 at !zp ZP_WORD:250 13.0
|
||||
(byte*) print_char::at !zp ZP_MEM:250
|
||||
(byte*) print_char::at#0 at !zp ZP_MEM:250 zp ZP_WORD:250 7.333333333333333
|
||||
(byte*) print_char::at#1 at !zp ZP_MEM:250 zp ZP_WORD:250 13.0
|
||||
(byte) print_char::ch !reg byte a
|
||||
(byte) print_char::ch#0 !reg byte a 22.0
|
||||
(byte) print_char::ch#1 !reg byte a 13.0
|
||||
|
||||
@ -62,17 +62,17 @@ SYMBOL TABLE SSA
|
||||
(label) main::@1
|
||||
(label) main::@2
|
||||
(label) main::@return
|
||||
(byte) main::i !zp ZP_VAR:2
|
||||
(byte) main::i#0 !zp ZP_VAR:2
|
||||
(byte) main::i#1 !zp ZP_VAR:2
|
||||
(byte) main::i#2 !zp ZP_VAR:2
|
||||
(byte) main::i#3 !zp ZP_VAR:2
|
||||
(byte) main::i#4 !zp ZP_VAR:2
|
||||
(signed word) main::j !zp ZP_VAR:4
|
||||
(signed word) main::j#0 !zp ZP_VAR:4
|
||||
(signed word) main::j#1 !zp ZP_VAR:4
|
||||
(signed word) main::j#2 !zp ZP_VAR:4
|
||||
(signed word) main::j#3 !zp ZP_VAR:4
|
||||
(byte) main::i !zp ZP_MEM:2
|
||||
(byte) main::i#0 !zp ZP_MEM:2
|
||||
(byte) main::i#1 !zp ZP_MEM:2
|
||||
(byte) main::i#2 !zp ZP_MEM:2
|
||||
(byte) main::i#3 !zp ZP_MEM:2
|
||||
(byte) main::i#4 !zp ZP_MEM:2
|
||||
(signed word) main::j !zp ZP_MEM:4
|
||||
(signed word) main::j#0 !zp ZP_MEM:4
|
||||
(signed word) main::j#1 !zp ZP_MEM:4
|
||||
(signed word) main::j#2 !zp ZP_MEM:4
|
||||
(signed word) main::j#3 !zp ZP_MEM:4
|
||||
(signed word) main::k
|
||||
(signed word) main::k#0
|
||||
|
||||
@ -179,13 +179,13 @@ VARIABLE REGISTER WEIGHTS
|
||||
(signed word~) main::$1 22.0
|
||||
(byte~) main::$3 22.0
|
||||
(byte~) main::$4 22.0
|
||||
(byte) main::i !zp ZP_VAR:2
|
||||
(byte) main::i#1 !zp ZP_VAR:2 5.5
|
||||
(byte) main::i#2 !zp ZP_VAR:2 22.0
|
||||
(byte) main::i#3 !zp ZP_VAR:2 11.0
|
||||
(signed word) main::j !zp ZP_VAR:4
|
||||
(signed word) main::j#1 !zp ZP_VAR:4 3.6666666666666665
|
||||
(signed word) main::j#2 !zp ZP_VAR:4 6.6000000000000005
|
||||
(byte) main::i !zp ZP_MEM:2
|
||||
(byte) main::i#1 !zp ZP_MEM:2 5.5
|
||||
(byte) main::i#2 !zp ZP_MEM:2 22.0
|
||||
(byte) main::i#3 !zp ZP_MEM:2 11.0
|
||||
(signed word) main::j !zp ZP_MEM:4
|
||||
(signed word) main::j#1 !zp ZP_MEM:4 3.6666666666666665
|
||||
(signed word) main::j#2 !zp ZP_MEM:4 6.6000000000000005
|
||||
(signed word) main::k
|
||||
(signed word) main::k#0 11.0
|
||||
|
||||
@ -205,8 +205,6 @@ Complete equivalence classes
|
||||
[ main::$1 ]
|
||||
[ main::k#0 ]
|
||||
[ main::$4 ]
|
||||
Setting declared register type (byte) main::i#3 to ZP_BYTE
|
||||
Setting declared register type (signed word) main::j#2 to ZP_WORD
|
||||
Allocated zp ZP_BYTE:3 [ main::$3 ]
|
||||
Allocated zp ZP_WORD:6 [ main::$1 ]
|
||||
Allocated zp ZP_WORD:8 [ main::k#0 ]
|
||||
@ -484,13 +482,13 @@ FINAL SYMBOL TABLE
|
||||
(label) main::@1
|
||||
(label) main::@2
|
||||
(label) main::@return
|
||||
(byte) main::i !zp ZP_BYTE:2
|
||||
(byte) main::i#1 i !zp ZP_BYTE:2 5.5
|
||||
(byte) main::i#2 i !zp ZP_BYTE:2 22.0
|
||||
(byte) main::i#3 i !zp ZP_BYTE:2 11.0
|
||||
(signed word) main::j !zp ZP_WORD:4
|
||||
(signed word) main::j#1 j !zp ZP_WORD:4 3.6666666666666665
|
||||
(signed word) main::j#2 j !zp ZP_WORD:4 6.6000000000000005
|
||||
(byte) main::i !zp ZP_MEM:2
|
||||
(byte) main::i#1 i !zp ZP_MEM:2 zp ZP_BYTE:2 5.5
|
||||
(byte) main::i#2 i !zp ZP_MEM:2 zp ZP_BYTE:2 22.0
|
||||
(byte) main::i#3 i !zp ZP_MEM:2 zp ZP_BYTE:2 11.0
|
||||
(signed word) main::j !zp ZP_MEM:4
|
||||
(signed word) main::j#1 j !zp ZP_MEM:4 zp ZP_WORD:4 3.6666666666666665
|
||||
(signed word) main::j#2 j !zp ZP_MEM:4 zp ZP_WORD:4 6.6000000000000005
|
||||
(signed word) main::k
|
||||
(signed word) main::k#0 k zp ZP_WORD:6 11.0
|
||||
|
||||
|
||||
@ -9,13 +9,13 @@
|
||||
(label) main::@1
|
||||
(label) main::@2
|
||||
(label) main::@return
|
||||
(byte) main::i !zp ZP_BYTE:2
|
||||
(byte) main::i#1 i !zp ZP_BYTE:2 5.5
|
||||
(byte) main::i#2 i !zp ZP_BYTE:2 22.0
|
||||
(byte) main::i#3 i !zp ZP_BYTE:2 11.0
|
||||
(signed word) main::j !zp ZP_WORD:4
|
||||
(signed word) main::j#1 j !zp ZP_WORD:4 3.6666666666666665
|
||||
(signed word) main::j#2 j !zp ZP_WORD:4 6.6000000000000005
|
||||
(byte) main::i !zp ZP_MEM:2
|
||||
(byte) main::i#1 i !zp ZP_MEM:2 zp ZP_BYTE:2 5.5
|
||||
(byte) main::i#2 i !zp ZP_MEM:2 zp ZP_BYTE:2 22.0
|
||||
(byte) main::i#3 i !zp ZP_MEM:2 zp ZP_BYTE:2 11.0
|
||||
(signed word) main::j !zp ZP_MEM:4
|
||||
(signed word) main::j#1 j !zp ZP_MEM:4 zp ZP_WORD:4 3.6666666666666665
|
||||
(signed word) main::j#2 j !zp ZP_MEM:4 zp ZP_WORD:4 6.6000000000000005
|
||||
(signed word) main::k
|
||||
(signed word) main::k#0 k zp ZP_WORD:6 11.0
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user