6502/kickc
1
0
Fork 0
mirror of https://gitlab.com/camelot/kickc.git synced 2025-02-16 18:30:37 +00:00
Code Issues Projects Releases Wiki Activity

Memory PHI registers can now be uplifted to A/X/Y. Fixed fragment synth rule for memory.

Browse Source
This commit is contained in:
jespergravgaard 2019-10-20 00:49:34 +02:00
parent fcc48de855
commit 3faf1e05d5
3 changed files with 18 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
src/main/java/dk/camelot64/kickc/fragment/AsmFragmentTemplateSynthesisRule.java
View File

@ -268,9 +268,9 @@ class AsmFragmentTemplateSynthesisRule {
mapZM12.put("z6", "z4");
mapZM12.put("m6", "m4");
// Z1 and C1 are replaced by something non-ZP - all above are moved down
Map<String, String> mapZ1C1 = new LinkedHashMap<>();
mapZ1C1.putAll(mapZM1);
mapZ1C1.putAll(mapC1);
Map<String, String> mapZM1C1 = new LinkedHashMap<>();
mapZM1C1.putAll(mapZM1);
mapZM1C1.putAll(mapC1);
// Use unsigned in place of a signed
Map<String, String> mapSToU = new LinkedHashMap<>();
mapSToU.put("vbsz1", "vbuz1");
@ -709,12 +709,12 @@ class AsmFragmentTemplateSynthesisRule {
// Rewrite multiple _derefidx_vbuc1 to use YY
synths.add(new AsmFragmentTemplateSynthesisRule("(.*)_derefidx_vbuc1(.*)_derefidx_vbuc1(.*)", rvalYy+"|"+ threeC1, "ldy #{c1}", "$1_derefidx_vbuyy$2_derefidx_vbuyy$3", null, mapC1));
// OLD STYLE REWRITES - written when only one rule could be taken
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbuz1=(.*)", twoZM1+"|"+twoC1, null, "vb$1aa=$2", "ldx {z1}\n" + "sta {c1},x", mapZ1C1));
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbuz2=(.*)", twoZM1+"|"+twoZM2, null, "vb$1aa=$2", "ldy {z2}\n" + "sta ({z1}),y", mapZM12));
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbuz1=(.*c1.*)", twoZM1, null, "vb$1aa=$2", "ldx {z1}\n" + "sta {c1},x", mapZM1));
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbuz1=(.*z1.*)", twoC1, null, "vb$1aa=$2", "ldx {z1}\n" + "sta {c1},x", mapC1));
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbum1=(.*)", twoZM1+"|"+twoC1, null, "vb$1aa=$2", "ldx {m1}\n" + "sta {c1},x", mapZM1C1));
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)z1_derefidx_vbum2=(.*)", twoZM1+"|"+twoZM2, null, "vb$1aa=$2", "ldy {m2}\n" + "sta ({z1}),y", mapZM12));
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbum1=(.*c1.*)", twoZM1, null, "vb$1aa=$2", "ldx {m1}\n" + "sta {c1},x", mapZM1));
synths.add(new AsmFragmentTemplateSynthesisRule("pb(.)c1_derefidx_vbum1=(.*[mz]1.*)", twoC1, null, "vb$1aa=$2", "ldx {m1}\n" + "sta {c1},x", mapC1));
// Convert X/Y-based array indexing of a constant pointer into A-register by prefixing lda cn,x / lda cn,y ( ...pb.c1_derefidx_vbuxx... / ...pb.c1_derefidx_vbuyy... -> ...vb.aa... )

7
src/main/java/dk/camelot64/kickc/passes/Pass4CodeGeneration.java
View File

@ -476,18 +476,17 @@ public class Pass4CodeGeneration {
}
if(variable.isStorageLoadStore() || variable.isStoragePhiVersion() || variable.isStorageIntermediate()){
if(variable.getDeclaredMemoryAddress() == null) {
Registers.Register allocation = variable.getAllocation();
if(allocation instanceof Registers.RegisterCpuByte)
continue;
if(!(allocation instanceof Registers.RegisterMainMem)) {
throw new InternalError("Expected main memory allocation "+variable.toString(program));
}
Registers.RegisterMainMem registerMainMem = (Registers.RegisterMainMem) allocation;
if(!((Registers.RegisterMainMem) allocation).getVariableRef().equals(variable.getRef())) {
if(!registerMainMem.getVariableRef().equals(variable.getRef())) {
continue;
}
// Generate into the data segment
// Set segment
setCurrentSegment(variable.getDataSegment(), asm);

10
src/main/java/dk/camelot64/kickc/passes/Pass4RegisterUpliftPotentialInitialize.java
View File

@ -28,7 +28,7 @@ public class Pass4RegisterUpliftPotentialInitialize extends Pass2Base {
int bytes = -1;
for(VariableRef varRef : equivalenceClass.getVariables()) {
Variable variable = getProgram().getScope().getVariable(varRef);
if(variable.getDeclaredRegister() != null) { //TODO: Handle register/memory/storage strategy differently!
if(variable.getDeclaredRegister() != null) {
if(declaredRegister != null && !declaredRegister.equals(variable.getDeclaredRegister())) {
throw new CompileError("Equivalence class has variables with different declared registers \n" +
" - equivalence class: " + equivalenceClass.toString(true) + "\n" +
@ -45,14 +45,18 @@ public class Pass4RegisterUpliftPotentialInitialize extends Pass2Base {
int zp = ((Registers.RegisterZpMem) declaredRegister).getZp();
Registers.RegisterZpMem zpRegister = new Registers.RegisterZpMem(zp, bytes, true);
registerPotentials.setPotentialRegisters(equivalenceClass, Arrays.asList(zpRegister));
} else {
} else if(declaredRegister instanceof Registers.RegisterMainMem) {
VariableRef variableRef = ((Registers.RegisterMainMem) declaredRegister).getVariableRef();
Registers.RegisterMainMem memRegister = new Registers.RegisterMainMem(variableRef, bytes);
registerPotentials.setPotentialRegisters(equivalenceClass, Arrays.asList(memRegister));
} else {
registerPotentials.setPotentialRegisters(equivalenceClass, Arrays.asList(declaredRegister));
}
} else {
Registers.Register defaultRegister = equivalenceClass.getRegister();
List<Registers.Register> potentials = new ArrayList<>();
potentials.add(defaultRegister);
boolean isByte2 = defaultRegister.isZp() && defaultRegister.getBytes() == 1;
boolean isByte2 = defaultRegister.isMem() && defaultRegister.getBytes() == 1;
if(isByte2 && !varVolatile(equivalenceClass)) {
potentials.add(Registers.getRegisterA());
potentials.add(Registers.getRegisterX());