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Got all the vera tile demos working now. First versions ...

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This commit is contained in:
FlightControl 2021-01-17 22:29:27 +01:00
parent ead5a43085
commit 40bc8e42d6
6 changed files with 155 additions and 85 deletions
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48
src/main/fragment/cache/fragment-cache-wdc65c02.asm vendored
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@ -2511,3 +2511,51 @@ tax
sty $ff
ora $ff
tay
//FRAGMENT vbuz1=vbuz1_plus_1
inc {z1}
//FRAGMENT vwuz1_lt_vwuc1_then_la1
lda {z1}+1
cmp #>{c1}
bcc {la1}
bne !+
lda {z1}
cmp #<{c1}
bcc {la1}
!:
//FRAGMENT vbuz1=_bnot__deref_pbuc1
lda {c1}
eor #$ff
sta {z1}
//FRAGMENT _deref_pbuc1=_deref_pbuc1_band_vbuz1
lda {c1}
and {z1}
sta {c1}
//FRAGMENT vbuaa=_bnot__deref_pbuc1
lda {c1}
eor #$ff
//FRAGMENT vbuxx=_bnot__deref_pbuc1
lda {c1}
eor #$ff
tax
//FRAGMENT vbuyy=_bnot__deref_pbuc1
lda {c1}
eor #$ff
tay
//FRAGMENT _deref_pbuc1=_deref_pbuc1_band_vbuaa
and {c1}
sta {c1}
//FRAGMENT _deref_pbuc1=_deref_pbuc1_band_vbuxx
txa
and {c1}
sta {c1}
//FRAGMENT _deref_pbuc1=_deref_pbuc1_band_vbuyy
tya
and {c1}
sta {c1}
//FRAGMENT pbuc1_derefidx_vbuz1=vbuaa
ldy {z1}
sta {c1},y
//FRAGMENT pbuc1_derefidx_vbuxx=vbuaa
sta {c1},x
//FRAGMENT pbuc1_derefidx_vbuyy=vbuaa
sta {c1},y

28
src/main/kc/include/veralib.h
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@ -86,12 +86,12 @@ unsigned byte vera_layer_get_mapbase(unsigned byte layer);
// Set the base of the map layer with which the conio will interact.
// - layer: Value of 0 or 1.
// - dw_mapbase: a dword typed address (4 bytes), that specifies the full address of the map base.
// - mapbase_address: A dword typed address (4 bytes), that specifies the full address of the map base.
// The function does the translation from the dword that contains the 17 bit address,
// to the respective mapbase vera register.
// Note that the register only specifies bits 16:9 of the address,
// so the resulting address in the VERA VRAM is always aligned to a multiple of 512 bytes.
void vera_layer_set_mapbase_address(byte layer, dword dw_mapbase);
void vera_layer_set_mapbase_address(byte layer, dword mapbase_address);
// Get the map base address of the tiles for the layer.
// - layer: Value of 0 or 1.
@ -109,12 +109,12 @@ void vera_layer_set_tilebase(byte layer, byte tilebase);
// Set the base of the tiles for the layer with which the conio will interact.
// - layer: Value of 0 or 1.
// - dw_tilebase: a dword typed address (4 bytes), that specifies the base address of the tile map.
// - tilebase_address: A dword typed address (4 bytes), that specifies the base address of the tile map.
// The function does the translation from the dword that contains the 17 bit address,
// to the respective tilebase vera register.
// Note that the resulting vera register holds only specifies bits 16:11 of the address,
// so the resulting address in the VERA VRAM is always aligned to a multiple of 2048 bytes!
void vera_layer_set_tilebase_address(byte layer, dword dw_tilebase);
void vera_layer_set_tilebase_address(byte layer, dword tilebase_address);
// Get the base of the tiles for the layer with which the conio will interact.
// - layer: Value of 0 or 1.
@ -169,4 +169,22 @@ inline void vera_layer_set_horizontal_scroll(byte layer, word scroll);
// - scroll: A value between 0 and 4096.
inline void vera_layer_set_vertical_scroll(byte layer, word scroll);
void vera_layer_mode_tile(byte layer, dword mapbase_address, dword dw_tilebase, word mapwidth, word mapheight, byte tilewidth, byte tileheight, byte color_depth );
// Set a vera layer in tile mode and configure the:
// - layer: Value of 0 or 1.
// - mapbase_address: A dword typed address (4 bytes), that specifies the full address of the map base.
// The function does the translation from the dword that contains the 17 bit address,
// to the respective mapbase vera register.
// Note that the register only specifies bits 16:9 of the address,
// so the resulting address in the VERA VRAM is always aligned to a multiple of 512 bytes.
// - tilebase_address: A dword typed address (4 bytes), that specifies the base address of the tile map.
// The function does the translation from the dword that contains the 17 bit address,
// to the respective tilebase vera register.
// Note that the resulting vera register holds only specifies bits 16:11 of the address,
// so the resulting address in the VERA VRAM is always aligned to a multiple of 2048 bytes!
// - mapwidth: The width of the map in number of tiles.
// - mapheight: The height of the map in number of tiles.
// - tilewidth: The width of a tile, which can be 8 or 16 pixels.
// - tileheight: The height of a tile, which can be 8 or 16 pixels.
// - color_depth: The color depth in bits per pixel (BPP), which can be 1, 2, 4 or 8.
void vera_layer_mode_tile(byte layer, dword mapbase_address, dword tilebase_address, word mapwidth, word mapheight, byte tilewidth, byte tileheight, byte color_depth );

2
src/main/kc/lib/conio-cx16.c
View File

@ -72,8 +72,6 @@ void conio_x16_init() {
char * const BASIC_CURSOR_LINE = 0xD6;
char line = *BASIC_CURSOR_LINE;
vera_layer_mode_tile(1,0x00000,0x0F800,128,64,8,8,1);
vera_layer_rowskip[1] = 256;
vera_layer_rowshift[1] = 8;
screensize(&conio_screen_width, &conio_screen_height);
screenlayer(1);
vera_layer_set_textcolor(1, WHITE);

67
src/main/kc/lib/veralib.c
View File

@ -176,22 +176,22 @@ void vera_layer_set_mapbase(unsigned byte layer, unsigned byte mapbase) {
// Set the base of the map layer with which the conio will interact.
// - layer: Value of 0 or 1.
// - dw_mapbase: a dword typed address (4 bytes), that specifies the full address of the map base.
// - mapbase_address: a dword typed address (4 bytes), that specifies the full address of the map base.
// The function does the translation from the dword that contains the 17 bit address,
// to the respective mapbase vera register.
// Note that the register only specifies bits 16:9 of the address,
// so the resulting address in the VERA VRAM is always aligned to a multiple of 512 bytes.
void vera_layer_set_mapbase_address(byte layer, dword dw_mapbase) {
void vera_layer_set_mapbase_address(byte layer, dword mapbase_address) {
dw_mapbase = dw_mapbase & 0x1FF00; // Aligned to 2048 bit zones.
byte bank_mapbase = (byte)>dw_mapbase;
word offset_mapbase = <dw_mapbase;
mapbase_address = mapbase_address & 0x1FF00; // Aligned to 2048 bit zones.
byte bank_mapbase = (byte)>mapbase_address;
word offset_mapbase = <mapbase_address;
vera_mapbase_address[layer] = dw_mapbase;
vera_mapbase_address[layer] = mapbase_address;
vera_mapbase_offset[layer] = offset_mapbase;
vera_mapbase_bank[layer] = bank_mapbase;
byte mapbase = >(<(dw_mapbase>>1));
byte mapbase = >(<(mapbase_address>>1));
vera_layer_set_mapbase(layer,mapbase);
}
@ -250,23 +250,23 @@ byte vera_layer_get_tilebase(byte layer) {
// Set the base address of the tiles for the layer with which the conio will interact.
// - layer: Value of 0 or 1.
// - dw_tilebase: a dword typed address (4 bytes), that specifies the base address of the tile map.
// - tilebase_address: a dword typed address (4 bytes), that specifies the base address of the tile map.
// The function does the translation from the dword that contains the 17 bit address,
// to the respective tilebase vera register.
// Note that the resulting vera register holds only specifies bits 16:11 of the address,
// so the resulting address in the VERA VRAM is always aligned to a multiple of 2048 bytes!
void vera_layer_set_tilebase_address(byte layer, dword dw_tilebase) {
void vera_layer_set_tilebase_address(byte layer, dword tilebase_address) {
dw_tilebase = dw_tilebase & 0x1FC00; // Aligned to 2048 bit zones.
byte bank_tilebase = (byte)>dw_tilebase;
word word_tilebase = <dw_tilebase;
tilebase_address = tilebase_address & 0x1FC00; // Aligned to 2048 bit zones.
byte bank_tilebase = (byte)>tilebase_address;
word word_tilebase = <tilebase_address;
vera_tilebase_address[layer] = dw_tilebase;
vera_tilebase_address[layer] = tilebase_address;
vera_tilebase_offset[layer] = word_tilebase;
vera_tilebase_bank[layer] = bank_tilebase;
byte* vera_tilebase = vera_layer_tilebase[layer];
byte tilebase = >(<(dw_tilebase>>1));
byte tilebase = >(<(tilebase_address>>1));
tilebase &= VERA_LAYER_TILEBASE_MASK; // Ensure that only tilebase is blanked, but keep the rest!
//printf("tilebase = %x\n",tilebase);
//while(!kbhit());
@ -376,7 +376,24 @@ word vera_layer_get_rowskip(byte layer) {
}
void vera_layer_mode_tile(byte layer, dword mapbase_address, dword dw_tilebase, word mapwidth, word mapheight, byte tilewidth, byte tileheight, byte color_depth ) {
// Set a vera layer in tile mode and configure the:
// - layer: Value of 0 or 1.
// - mapbase_address: A dword typed address (4 bytes), that specifies the full address of the map base.
// The function does the translation from the dword that contains the 17 bit address,
// to the respective mapbase vera register.
// Note that the register only specifies bits 16:9 of the address,
// so the resulting address in the VERA VRAM is always aligned to a multiple of 512 bytes.
// - tilebase_address: A dword typed address (4 bytes), that specifies the base address of the tile map.
// The function does the translation from the dword that contains the 17 bit address,
// to the respective tilebase vera register.
// Note that the resulting vera register holds only specifies bits 16:11 of the address,
// so the resulting address in the VERA VRAM is always aligned to a multiple of 2048 bytes!
// - mapwidth: The width of the map in number of tiles.
// - mapheight: The height of the map in number of tiles.
// - tilewidth: The width of a tile, which can be 8 or 16 pixels.
// - tileheight: The height of a tile, which can be 8 or 16 pixels.
// - color_depth: The color depth in bits per pixel (BPP), which can be 1, 2, 4 or 8.
void vera_layer_mode_tile(byte layer, dword mapbase_address, dword tilebase_address, word mapwidth, word mapheight, byte tilewidth, byte tileheight, byte color_depth ) {
// config
byte config = 0x00;
switch(color_depth) {
@ -441,20 +458,13 @@ void vera_layer_mode_tile(byte layer, dword mapbase_address, dword dw_tilebase,
byte mapbase = >(<mapbase_address);
vera_layer_set_mapbase(layer,mapbase);
// tilebase
vera_tilebase_offset[layer] = <tilebase_address;
vera_tilebase_bank[layer] = (byte)>tilebase_address;
vera_tilebase_address[layer] = tilebase_address;
//printf("%lx\n",dw_mapbase);
// tilebase
vera_tilebase_offset[layer] = <dw_tilebase;
vera_tilebase_bank[layer] = (byte)>dw_tilebase;
vera_tilebase_address[layer] = dw_tilebase;
//printf("tilebase word = %x\n",vera_tilebase_offset[layer]);
//printf("tilebase bank = %x\n",vera_tilebase_bank[layer]);
//printf("tilebase dword = %lx\n",vera_tilebase_address[layer]);
dw_tilebase = dw_tilebase >> 1;
byte tilebase = >(<dw_tilebase);
tilebase_address = tilebase_address >> 1;
byte tilebase = >(<tilebase_address);
tilebase &= VERA_LAYER_TILEBASE_MASK;
switch(tilewidth) {
case 8:
@ -472,7 +482,6 @@ void vera_layer_mode_tile(byte layer, dword mapbase_address, dword dw_tilebase,
tilebase |= VERA_TILEBASE_HEIGHT_16;
break;
}
//printf("tilebase = %x\n",tilebase);
vera_layer_set_tilebase(layer,tilebase);
}

2
src/test/kc/examples/cx16/tilemap_2bpp_16_x_16.c
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@ -76,7 +76,7 @@ void main() {
vera_layer_show(0);
gotoxy(0,40);
gotoxy(0,50);
printf("vera in tile mode 8 x 8, color depth 2 bits per pixel.\n");
printf("in this mode, tiles are 8 pixels wide and 8 pixels tall.\n");

93
src/test/kc/examples/cx16/tilemap_8bpp_16_x_16.c
View File

@ -15,10 +15,10 @@ void main() {
byte tiles[256] = {
0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@ -56,50 +56,30 @@ void main() {
// - dest_increment: the increment indicator, VERA needs this because addressing increment is automated by VERA at each access.
// - num: The number of bytes to copy
// void memcpy_in_vram(char dest_bank, void *dest, char dest_increment, char src_bank, void *src, char src_increment, unsigned int num );
memcpy_in_vram(1, 0xF000, VERA_INC_1, 0, 0xF800, VERA_INC_0, 256*8); // We copy the 128 character set of 8 bytes each.
memcpy_in_vram(1, 0xF000, VERA_INC_1, 0, 0xF800, VERA_INC_1, 256*8); // We copy the 128 character set of 8 bytes each.
// Set the base of the tiles for the layer with which the conio will interact.
// - layer: Value of 0 or 1.
// - dw_tilebase: a dword typed address (4 bytes), that specifies the base address of the tile map.
// The function does the translation from the dword that contains the 17 bit address,
// to the respective tilebase vera register.
// Note that the resulting vera register holds only specifies bits 16:11 of the address,
// so the resulting address in the VERA VRAM is always aligned to a multiple of 2048 bytes!
vera_layer_set_tilebase_address(1, 0x1F000); // Here we set layer 1 new character set base (tile base) to the new address.
// Set the base of the map layer with which the conio will interact.
// - layer: Value of 0 or 1.
// - dw_mapbase: a dword typed address (4 bytes), that specifies the full address of the map base.
// The function does the translation from the dword that contains the 17 bit address,
// to the respective mapbase vera register.
// Note that the register only specifies bits 16:9 of the address,
// so the resulting address in the VERA VRAM is always aligned to a multiple of 512 bytes.
// void vera_layer_set_mapbase_address(byte layer, dword dw_mapbase);
vera_layer_set_mapbase_address(1, 0x10000); // Here we set the map base of layer 1 to 0x10000;
vera_layer_mode_tile(1, 0x10000, 0x00000, 128, 64, 8, 8, 1);
vera_layer_mode_tile(1, 0x10000, 0x1F000, 128, 64, 8, 8, 1);
screenlayer(1);
textcolor(WHITE);
bgcolor(BLACK);
clrscr();
while(!kbhit());
// Now we can use the full bank 0!
// We set the mapbase of the tile demo to output to 0x12000,
// and the tilebase is set to 0x0000!
vera_layer_mode_tile(0, 0x10000, 0x00000, 64, 64, 16, 16, 8);
vera_layer_mode_tile(0, 0x14000, 0x00000, 64, 64, 16, 16, 8);
word tilebase = 0x0000;
memcpy_to_vram(0, tilebase, tiles, 256);
tilebase+=256;
for(byte t:1..10) {
for(byte t:1..255) {
for(byte p:0..255) {
tiles[p]+=1;
}
memcpy_to_vram(1, tilebase, tiles, 256);
memcpy_to_vram(0, tilebase, tiles, 256);
tilebase+=256;
}
@ -111,9 +91,9 @@ void main() {
// Draw 4 squares with each tile, starting from row 4, width 1, height 1, separated by 2 characters.
byte row = 1;
for(byte r:0..15) {
byte column = 1;
for(byte c:0..15) {
for(byte r:0..11) {
byte column = 0;
for(byte c:0..19) {
vera_tile_area(0, tile, column, row, 1, 1, 0, 0, 0);
column+=2;
tile++;
@ -122,22 +102,7 @@ void main() {
row += 2;
}
tile = 0;
row = 20;
for(byte r:0..7) {
byte column = 1;
for(byte c:0..31) {
vera_tile_area(0, tile, column, row, 2, 2, 0, 0, 0);
column+=2;
tile++;
tile &= 0xff;
}
row += 2;
}
vera_layer_show(0);
gotoxy(0,46);
gotoxy(0,50);
printf("vera in tile mode 8 x 8, color depth 8 bits per pixel.\n");
printf("in this mode, tiles are 8 pixels wide and 8 pixels tall.\n");
@ -148,5 +113,37 @@ void main() {
printf("each offset aligns to multiples of 16 colors in the palette!.\n");
printf("however, the first color will always be transparent (black).\n");
vera_layer_show(0);
while(!kbhit());
vera_tile_area(0, 0, 0, 0, 40, 30, 0, 0, 0);
tile = 0;
row = 0;
for(byte r:0..11) {
byte column = 0;
for(byte c:0..19) {
vera_tile_area(0, tile, column, row, 2, 2, 0, 0, 0);
column+=2;
tile++;
tile &= 0xff;
}
row += 2;
}
while(!kbhit());
// Now put back the defaults ...
vera_tile_area(0, 0, 0, 0, 40, 30, 0, 0, 0);
vera_layer_hide(0);
memcpy_in_vram(0, 0xF800, VERA_INC_1, 1, 0xF000, VERA_INC_1, 256*8);
vera_layer_mode_tile(1, 0x00000, 0x0F800, 128, 128, 8, 8, 1);
vera_layer_mode_tile(0, 0x00000, 0x0F800, 128, 128, 8, 8, 1);
screenlayer(1);
textcolor(WHITE);
bgcolor(BLUE);
clrscr();
}