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Finished implementing support for huc6280 TST #imm.zp / #imm,abs / #imm,zp,x / #imm,abs,x.

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This commit is contained in:
jespergravgaard 2022-02-12 07:35:59 +01:00
parent ad48dfb7cf
commit 42e31f6e69
27 changed files with 275 additions and 32 deletions
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2
pom.xml
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@ -79,7 +79,7 @@
<dependency>
<groupId>cml.kickass</groupId>
<artifactId>kickassembler</artifactId>
<version>5.24-65ce02.b</version>
<version>5.24-65ce02.c</version>
</dependency>
<dependency>
<groupId>dk.camelot64.kickass.xexplugin</groupId>

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repo/cml/kickass/kickassembler/5.24-65ce02.c/kickassembler-5.24-65ce02.c.jar Normal file
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repo/cml/kickass/kickassembler/5.24-65ce02.c/kickassembler-5.24-65ce02.c.jar.md5 Normal file
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@ -0,0 +1 @@
befef7068401bafd8562e7ebd311c0e6

1
repo/cml/kickass/kickassembler/5.24-65ce02.c/kickassembler-5.24-65ce02.c.jar.sha1 Normal file
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@ -0,0 +1 @@
a829567c323ef50c79ed58a81c0e1dfe4902de74

9
repo/cml/kickass/kickassembler/5.24-65ce02.c/kickassembler-5.24-65ce02.c.pom Normal file
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@ -0,0 +1,9 @@
<?xml version="1.0" encoding="UTF-8"?>
<project xsi:schemaLocation="http://maven.apache.org/POM/4.0.0 https://maven.apache.org/xsd/maven-4.0.0.xsd" xmlns="http://maven.apache.org/POM/4.0.0"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<modelVersion>4.0.0</modelVersion>
<groupId>cml.kickass</groupId>
<artifactId>kickassembler</artifactId>
<version>5.24-65ce02.c</version>
<description>POM was created from install:install-file</description>
</project>

1
repo/cml/kickass/kickassembler/5.24-65ce02.c/kickassembler-5.24-65ce02.c.pom.md5 Normal file
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@ -0,0 +1 @@
b983e5035bd6302ebee3c19ec4c300d2

1
repo/cml/kickass/kickassembler/5.24-65ce02.c/kickassembler-5.24-65ce02.c.pom.sha1 Normal file
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@ -0,0 +1 @@
490fa2a18814b75785f0cbcd5e586fe80dc70843

5
repo/cml/kickass/kickassembler/maven-metadata.xml
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@ -3,7 +3,7 @@
<groupId>cml.kickass</groupId>
<artifactId>kickassembler</artifactId>
<versioning>
<release>5.24-65ce02.b</release>
<release>5.24-65ce02.c</release>
<versions>
<version>4.19</version>
<version>5.7</version>
@ -29,7 +29,8 @@
<version>5.23-65ce02.a</version>
<version>5.24-65ce02.a</version>
<version>5.24-65ce02.b</version>
<version>5.24-65ce02.c</version>
</versions>
<lastUpdated>20220130203320</lastUpdated>
<lastUpdated>20220212060216</lastUpdated>
</versioning>
</metadata>

2
repo/cml/kickass/kickassembler/maven-metadata.xml.md5
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@ -1 +1 @@
0f43678d3dce50a145dd7e42adc79ca1
24290bfa1613ef56b57bc4c4e670423c

2
repo/cml/kickass/kickassembler/maven-metadata.xml.sha1
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@ -1 +1 @@
2b207a0d7add8d7cd4ebc8a58ddbbbd2e6122739
e3cf25389c4e30b070712f29c599f6e090746e7c

1
src/main/antlr4/dk/camelot64/kickc/parser/KickCParser.g4
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@ -306,6 +306,7 @@ asmParamMode
| ASM_PAR_BEGIN asmExpr ASM_PAR_END #asmModeInd
| ASM_PAR_BEGIN ASM_PAR_BEGIN asmExpr ASM_PAR_END ASM_PAR_END #asmModeIndLong
| ASM_IMM asmExpr ASM_COMMA asmExpr #asmModeImmAndAbs
| ASM_IMM asmExpr ASM_COMMA asmExpr ASM_COMMA ASM_NAME #asmModeImmAndAbsX
;
asmExpr

6
src/main/java/dk/camelot64/cpufamily6502/Cpu65xx.java
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@ -138,6 +138,12 @@ public class Cpu65xx {
if(CpuAddressingMode.IAX.equals(addressingMode) && isOperandZp) {
cpuOpcode = getOpcode(mnemonic, CpuAddressingMode.IZX);
}
if(CpuAddressingMode.IAB.equals(addressingMode) && isOperandZp) {
cpuOpcode = getOpcode(mnemonic, CpuAddressingMode.IZP);
}
if(CpuAddressingMode.IABX.equals(addressingMode) && isOperandZp) {
cpuOpcode = getOpcode(mnemonic, CpuAddressingMode.IZPX);
}
if(cpuOpcode == null) {
// If the ZP-form does not exist use the ABS-variation
cpuOpcode = getOpcode(mnemonic, addressingMode);

15
src/main/java/dk/camelot64/cpufamily6502/CpuAddressingMode.java
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@ -198,14 +198,25 @@ public enum CpuAddressingMode {
* #imm,zp Immediate, zeropage <br>
* IMMEDIATE ADDRESSING, ZEROPAGE — Two parameters, one immediate the other a zeropage address. Only used by HUC6280 TST.
*/
IMMANDZP("#imm,zp", "%i #%p,%q", 2),
IZP("#imm,zp", "%i.z #%p,%q", 2),
/**
* #imm,abs Immediate, absolute <br>
* IMMEDIATE ADDRESSING, ABSOLUTE — Two parameters, one immediate the other an absolute address. Only used by HUC6280 TST.
*/
IMMANDABS("#imm,abs", "%i #%p,%q", 3);
IAB("#imm,abs", "%i #%p,%q", 3),
/**
* #imm,zp,x Immediate, zeropage, x <br>
* IMMEDIATE ADDRESSING, ZEROPAGE — Two parameters, one immediate the other a zeropage address. Only used by HUC6280 TST.
*/
IZPX("#imm,zp,x", "%i.z #%p,%q,x", 2),
/**
* #imm,abs,x Immediate, absolute,x <br>
* IMMEDIATE ADDRESSING, ABSOLUTE — Two parameters, one immediate the other an absolute address. Only used by HUC6280 TST.
*/
IABX("#imm,abs,x", "%i #%p,%q,x", 3);
/** The short name of the addressing mode. */
private String name;

6
src/main/java/dk/camelot64/cpufamily6502/cpus/CpuHuc6280.java
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@ -45,8 +45,10 @@ public class CpuHuc6280 extends Cpu65xx {
addOpcode(0xc2,"cly", CpuAddressingMode.NON,2,"Y");
addOpcode(0xd4,"csh", CpuAddressingMode.NON,2,"");
addOpcode(0xf4,"set", CpuAddressingMode.NON,2,"");
addOpcode(0x83,"tst", CpuAddressingMode.IMMANDZP,7,"vnz");
addOpcode(0xA3,"tst", CpuAddressingMode.IMMANDABS,8,"vnz");
addOpcode(0x83,"tst", CpuAddressingMode.IZP,7,"vnz");
addOpcode(0x93,"tst", CpuAddressingMode.IAB,8,"vnz");
addOpcode(0xA3,"tst", CpuAddressingMode.IZPX,7,"vnz");
addOpcode(0xB3,"tst", CpuAddressingMode.IABX,8,"vnz");
}
}

16
src/main/java/dk/camelot64/kickc/fragment/AsmFragmentInstance.java
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@ -288,7 +288,12 @@ public class AsmFragmentInstance {
@Override
public Object visitAsmModeImmAndAbs(KickCParser.AsmModeImmAndAbsContext ctx) {
return createAsmInstruction(ctx, ctx.asmExpr(0), ctx.asmExpr(1), CpuAddressingMode.IMMANDABS);
return createAsmInstruction(ctx, ctx.asmExpr(0), ctx.asmExpr(1), CpuAddressingMode.IAB);
}
@Override
public Object visitAsmModeImmAndAbsX(KickCParser.AsmModeImmAndAbsXContext ctx) {
return createAsmInstruction(ctx, ctx.asmExpr(0), ctx.asmExpr(1), CpuAddressingMode.IABX);
}
@Override
@ -375,13 +380,22 @@ public class AsmFragmentInstance {
String mnemonic = instructionCtx.ASM_MNEMONIC().getSymbol().getText();
AsmParameter param1 = operand1Ctx == null ? null : (AsmParameter) this.visit(operand1Ctx);
AsmParameter param2 = operand2Ctx == null ? null : (AsmParameter) this.visit(operand2Ctx);
// Convert to ZP-addressing mode if possible
boolean isZp = param1 != null && param1.isZp();
if(CpuAddressingMode.IAB.equals(addressingMode) || CpuAddressingMode.IABX.equals(addressingMode)) {
// For the HuC6280 CPU TST #imm,abs addressing mode it is param2 that can converted the instruction to ZP
isZp = param2 != null && param2.isZp();
}
CpuOpcode cpuOpcode = this.getAsmProgram().getTargetCpu().getCpu65xx().getOpcode(mnemonic, addressingMode, isZp);
if(!isZp && cpuOpcode==null) {
// Fallback to ZP-addressing
cpuOpcode = this.getAsmProgram().getTargetCpu().getCpu65xx().getOpcode(mnemonic, addressingMode, true);
}
String operand1 = param1 == null ? null : param1.getParam();
String operand2 = param2 == null ? null : param2.getParam();
if(cpuOpcode == null) {

2
src/main/repo/mvn-repo-install-kickass.sh
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@ -4,7 +4,7 @@
cp ./repo/cml/kickass/kickassembler/maven-metadata.xml ./repo/cml/kickass/kickassembler/maven-metadata-local.xml
# mvn install:install-file -Dmaven.repo.local=./repo/ -Dfile=/Applications/KickAssembler/KickAss.jar -DgroupId=cml.kickass -DartifactId=kickassembler -Dpackaging=jar -DgeneratePom=true -DcreateChecksum=true -Dversion=5.16
mvn install:install-file -Dmaven.repo.local=./repo/ -Dfile=/Users/jespergravgaard/c64/kickassembler65ce02/out/KickAss65CE02.jar -DgroupId=cml.kickass -DartifactId=kickassembler -Dpackaging=jar -DgeneratePom=true -DcreateChecksum=true -Dversion=5.24-65ce02.b
mvn install:install-file -Dmaven.repo.local=./repo/ -Dfile=/Users/jespergravgaard/c64/kickassembler65ce02/out/KickAss65CE02.jar -DgroupId=cml.kickass -DartifactId=kickassembler -Dpackaging=jar -DgeneratePom=true -DcreateChecksum=true -Dversion=5.24-65ce02.c
# Finalize by making the local metadata official
pushd ./repo/cml/kickass/kickassembler

9
src/test/java/dk/camelot64/cpufamily6502/TestCpuFamilyKickAssCompatibility.java
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@ -141,12 +141,11 @@ public class TestCpuFamilyKickAssCompatibility {
map.put(CpuAddressingMode.REL, Collections.singletonList(_65xxArgType.relative));
map.put(CpuAddressingMode.REW, Collections.singletonList(_65xxArgType.relativeWord));
map.put(CpuAddressingMode.REZ, Collections.singletonList(_65xxArgType.zeropageRelative));
map.put(CpuAddressingMode.IMMANDZP, Collections.singletonList(_65xxArgType.immediateAndZeropage));
map.put(CpuAddressingMode.IMMANDABS, Collections.singletonList(_65xxArgType.immediateAndAbsolute));
map.put(CpuAddressingMode.IZP, Collections.singletonList(_65xxArgType.immediateAndZeropage));
map.put(CpuAddressingMode.IAB, Collections.singletonList(_65xxArgType.immediateAndAbsolute));
map.put(CpuAddressingMode.IZPX, Collections.singletonList(_65xxArgType.immediateAndZeropageX));
map.put(CpuAddressingMode.IABX, Collections.singletonList(_65xxArgType.immediateAndAbsoluteX));
return map;
}
// map.entrySet().stream().collect(Collectors.toMap(Map.Entry::getValue, Map.Entry::getKey))
}

13
src/test/java/dk/camelot64/kickc/test/TestProgramsFast.java
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@ -11,22 +11,22 @@ public class TestProgramsFast extends TestPrograms {
@Test
public void testPointerSwap() throws IOException {
compileAndCompare("pointer-swap.c", log());
compileAndCompare("pointer-swap.c");
}
@Test
public void testDucksTotal() throws IOException {
compileAndCompare("ducks-total.c", log());
compileAndCompare("ducks-total.c");
}
@Test
public void testDucksLoop211() throws IOException {
compileAndCompare("ducks-loop211.c", log());
compileAndCompare("ducks-loop211.c");
}
@Test
public void testDucksArray() throws IOException {
compileAndCompare("ducks-array.c", log());
compileAndCompare("ducks-array.c");
}
@ -575,6 +575,11 @@ public class TestProgramsFast extends TestPrograms {
// compileAndCompare("library-constructor-0.c");
//}
@Test
public void testCpuHuc6280Tst() throws IOException {
compileAndCompare("cpu-huc6280-tst.c");
}
@Test
public void testCpuHuc6280() throws IOException {
compileAndCompare("cpu-huc6280.c");

14
src/test/kc/cpu-huc6280-tst.c Normal file
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@ -0,0 +1,14 @@
// Tests the HUC6280 instructions
#pragma cpu(huc6280)
void main() {
asm {
tst #1+2,$3+4
tst #1+2*3,$7654/2
tst #1+2,$3+4,x
tst #1+2*3,$7654/2,x
!:
rts
}
}

2
src/test/kc/cpu-huc6280.c
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@ -22,6 +22,8 @@ void main() {
set
tst #1+2,$3+4
tst #1+2*3,$7654/2
tst #1+2,$3+4,x
tst #1+2*3,$7654/2,x
!:
rts
}

21
src/test/ref/cpu-huc6280-tst.asm Normal file
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@ -0,0 +1,21 @@
// Tests the HUC6280 instructions
.cpu _huc6280
// Commodore 64 PRG executable file
.file [name="cpu-huc6280-tst.prg", type="prg", segments="Program"]
.segmentdef Program [segments="Basic, Code, Data"]
.segmentdef Basic [start=$0801]
.segmentdef Code [start=$80d]
.segmentdef Data [startAfter="Code"]
.segment Basic
:BasicUpstart(main)
.segment Code
main: {
// asm
tst.z #1+2,3+4
tst #1+2*3,$7654/2
tst.z #1+2,3+4,x
tst #1+2*3,$7654/2,x
!:
rts
// }
}

8
src/test/ref/cpu-huc6280-tst.cfg Normal file
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@ -0,0 +1,8 @@
void main()
main: scope:[main] from
asm { tst#1+2,$3+4 tst#1+2*3,$7654/2 tst#1+2,$3+4,x tst#1+2*3,$7654/2,x !: rts }
to:main::@return
main::@return: scope:[main] from main
[1] return
to:@return

138
src/test/ref/cpu-huc6280-tst.log Normal file
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@ -0,0 +1,138 @@
CONTROL FLOW GRAPH SSA
void main()
main: scope:[main] from __start
asm { tst#1+2,$3+4 tst#1+2*3,$7654/2 tst#1+2,$3+4,x tst#1+2*3,$7654/2,x !: rts }
to:main::@return
main::@return: scope:[main] from main
return
to:@return
void __start()
__start: scope:[__start] from
call main
to:__start::@1
__start::@1: scope:[__start] from __start
to:__start::@return
__start::@return: scope:[__start] from __start::@1
return
to:@return
SYMBOL TABLE SSA
void __start()
void main()
Removing unused procedure __start
Removing unused procedure block __start
Removing unused procedure block __start::@1
Removing unused procedure block __start::@return
Successful SSA optimization PassNEliminateEmptyStart
CALL GRAPH
Created 0 initial phi equivalence classes
Coalesced down to 0 phi equivalence classes
FINAL CONTROL FLOW GRAPH
void main()
main: scope:[main] from
asm { tst#1+2,$3+4 tst#1+2*3,$7654/2 tst#1+2,$3+4,x tst#1+2*3,$7654/2,x !: rts }
to:main::@return
main::@return: scope:[main] from main
[1] return
to:@return
VARIABLE REGISTER WEIGHTS
void main()
Initial phi equivalence classes
Complete equivalence classes
REGISTER UPLIFT POTENTIAL REGISTERS
REGISTER UPLIFT SCOPES
Uplift Scope [main]
Uplift Scope []
Uplifting [main] best 45 combination
Uplifting [] best 45 combination
ASSEMBLER BEFORE OPTIMIZATION
// File Comments
// Tests the HUC6280 instructions
// Upstart
.cpu _huc6280
// Commodore 64 PRG executable file
.file [name="cpu-huc6280-tst.prg", type="prg", segments="Program"]
.segmentdef Program [segments="Basic, Code, Data"]
.segmentdef Basic [start=$0801]
.segmentdef Code [start=$80d]
.segmentdef Data [startAfter="Code"]
.segment Basic
:BasicUpstart(main)
// Global Constants & labels
.segment Code
// main
main: {
// asm { tst#1+2,$3+4 tst#1+2*3,$7654/2 tst#1+2,$3+4,x tst#1+2*3,$7654/2,x !: rts }
tst.z #1+2,3+4
tst #1+2*3,$7654/2
tst.z #1+2,3+4,x
tst #1+2*3,$7654/2,x
!:
rts
jmp __breturn
// main::@return
__breturn:
// [1] return
rts
}
// File Data
ASSEMBLER OPTIMIZATIONS
Removing instruction jmp __breturn
Succesful ASM optimization Pass5NextJumpElimination
Removing instruction __breturn:
Succesful ASM optimization Pass5UnusedLabelElimination
Removing unreachable instruction rts
Succesful ASM optimization Pass5UnreachableCodeElimination
FINAL SYMBOL TABLE
void main()
FINAL ASSEMBLER
Score: 36
// File Comments
// Tests the HUC6280 instructions
// Upstart
.cpu _huc6280
// Commodore 64 PRG executable file
.file [name="cpu-huc6280-tst.prg", type="prg", segments="Program"]
.segmentdef Program [segments="Basic, Code, Data"]
.segmentdef Basic [start=$0801]
.segmentdef Code [start=$80d]
.segmentdef Data [startAfter="Code"]
.segment Basic
:BasicUpstart(main)
// Global Constants & labels
.segment Code
// main
main: {
// asm
// asm { tst#1+2,$3+4 tst#1+2*3,$7654/2 tst#1+2,$3+4,x tst#1+2*3,$7654/2,x !: rts }
tst.z #1+2,3+4
tst #1+2*3,$7654/2
tst.z #1+2,3+4,x
tst #1+2*3,$7654/2,x
!:
rts
// main::@return
// }
// [1] return
}
// File Data

2
src/test/ref/cpu-huc6280-tst.sym Normal file
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@ -0,0 +1,2 @@
void main()

4
src/test/ref/cpu-huc6280.asm
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@ -26,8 +26,10 @@ main: {
cly
csh
set
tst #1+2,3+4
tst.z #1+2,3+4
tst #1+2*3,$7654/2
tst.z #1+2,3+4,x
tst #1+2*3,$7654/2,x
!:
rts
// }

2
src/test/ref/cpu-huc6280.cfg
View File

@ -1,7 +1,7 @@
void main()
main: scope:[main] from
asm { sxy st0#$55 st1#$aa sax st2#$be say tma#2 bsr!+ tam#4 csl cla clx cly csh set tst#1+2,$3+4 tst#1+2*3,$7654/2 !: rts }
asm { sxy st0#$55 st1#$aa sax st2#$be say tma#2 bsr!+ tam#4 csl cla clx cly csh set tst#1+2,$3+4 tst#1+2*3,$7654/2 tst#1+2,$3+4,x tst#1+2*3,$7654/2,x !: rts }
to:main::@return
main::@return: scope:[main] from main
[1] return

24
src/test/ref/cpu-huc6280.log
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@ -3,7 +3,7 @@ CONTROL FLOW GRAPH SSA
void main()
main: scope:[main] from __start
asm { sxy st0#$55 st1#$aa sax st2#$be say tma#2 bsr!+ tam#4 csl cla clx cly csh set tst#1+2,$3+4 tst#1+2*3,$7654/2 !: rts }
asm { sxy st0#$55 st1#$aa sax st2#$be say tma#2 bsr!+ tam#4 csl cla clx cly csh set tst#1+2,$3+4 tst#1+2*3,$7654/2 tst#1+2,$3+4,x tst#1+2*3,$7654/2,x !: rts }
to:main::@return
main::@return: scope:[main] from main
return
@ -37,7 +37,7 @@ FINAL CONTROL FLOW GRAPH
void main()
main: scope:[main] from
asm { sxy st0#$55 st1#$aa sax st2#$be say tma#2 bsr!+ tam#4 csl cla clx cly csh set tst#1+2,$3+4 tst#1+2*3,$7654/2 !: rts }
asm { sxy st0#$55 st1#$aa sax st2#$be say tma#2 bsr!+ tam#4 csl cla clx cly csh set tst#1+2,$3+4 tst#1+2*3,$7654/2 tst#1+2,$3+4,x tst#1+2*3,$7654/2,x !: rts }
to:main::@return
main::@return: scope:[main] from main
[1] return
@ -50,14 +50,14 @@ void main()
Initial phi equivalence classes
Complete equivalence classes
REGISTER UPLIFT POTENTIAL REGISTERS
Statement asm { sxy st0#$55 st1#$aa sax st2#$be say tma#2 bsr!+ tam#4 csl cla clx cly csh set tst#1+2,$3+4 tst#1+2*3,$7654/2 !: rts } always clobbers reg byte a reg byte x reg byte y
Statement asm { sxy st0#$55 st1#$aa sax st2#$be say tma#2 bsr!+ tam#4 csl cla clx cly csh set tst#1+2,$3+4 tst#1+2*3,$7654/2 tst#1+2,$3+4,x tst#1+2*3,$7654/2,x !: rts } always clobbers reg byte a reg byte x reg byte y
REGISTER UPLIFT SCOPES
Uplift Scope [main]
Uplift Scope []
Uplifting [main] best 81 combination
Uplifting [] best 81 combination
Uplifting [main] best 95 combination
Uplifting [] best 95 combination
ASSEMBLER BEFORE OPTIMIZATION
// File Comments
@ -76,7 +76,7 @@ ASSEMBLER BEFORE OPTIMIZATION
.segment Code
// main
main: {
// asm { sxy st0#$55 st1#$aa sax st2#$be say tma#2 bsr!+ tam#4 csl cla clx cly csh set tst#1+2,$3+4 tst#1+2*3,$7654/2 !: rts }
// asm { sxy st0#$55 st1#$aa sax st2#$be say tma#2 bsr!+ tam#4 csl cla clx cly csh set tst#1+2,$3+4 tst#1+2*3,$7654/2 tst#1+2,$3+4,x tst#1+2*3,$7654/2,x !: rts }
sxy
st0 #$55
st1 #$aa
@ -92,8 +92,10 @@ main: {
cly
csh
set
tst #1+2,3+4
tst.z #1+2,3+4
tst #1+2*3,$7654/2
tst.z #1+2,3+4,x
tst #1+2*3,$7654/2,x
!:
rts
jmp __breturn
@ -118,7 +120,7 @@ void main()
FINAL ASSEMBLER
Score: 72
Score: 86
// File Comments
// Tests the HUC6280 instructions
@ -137,7 +139,7 @@ Score: 72
// main
main: {
// asm
// asm { sxy st0#$55 st1#$aa sax st2#$be say tma#2 bsr!+ tam#4 csl cla clx cly csh set tst#1+2,$3+4 tst#1+2*3,$7654/2 !: rts }
// asm { sxy st0#$55 st1#$aa sax st2#$be say tma#2 bsr!+ tam#4 csl cla clx cly csh set tst#1+2,$3+4 tst#1+2*3,$7654/2 tst#1+2,$3+4,x tst#1+2*3,$7654/2,x !: rts }
sxy
st0 #$55
st1 #$aa
@ -153,8 +155,10 @@ main: {
cly
csh
set
tst #1+2,3+4
tst.z #1+2,3+4
tst #1+2*3,$7654/2
tst.z #1+2,3+4,x
tst #1+2*3,$7654/2,x
!:
rts
// main::@return