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Working on deprecating lo/hi operators. Closes #667

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This commit is contained in:
jespergravgaard 2021-06-13 13:29:49 +02:00
parent fa2378c38d
commit 44db8db459
16 changed files with 26767 additions and 9543 deletions
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372
src/test/ref/examples/cx16/cx16-bankaddressing.asm
View File

@ -63,17 +63,17 @@
// Bit 0: Tile Width (0:8 pixels, 1:16 pixels)
.label VERA_L1_TILEBASE = $9f36
// Variable holding the screen width;
.label conio_screen_width = $12
.label conio_screen_width = $14
// Variable holding the screen height;
.label conio_screen_height = $13
.label conio_screen_height = $15
// Variable holding the screen layer on the VERA card with which conio interacts;
.label conio_screen_layer = $14
.label conio_screen_layer = $16
// Variables holding the current map width and map height of the layer.
.label conio_width = $15
.label conio_height = $17
.label conio_rowshift = $19
.label conio_rowskip = $1a
.label CONIO_SCREEN_BANK = $38
.label conio_width = $17
.label conio_height = $19
.label conio_rowshift = $1b
.label conio_rowskip = $1c
.label CONIO_SCREEN_BANK = $26
// The screen width
// The screen height
// The text screen base address, which is a 16:0 bit value in VERA VRAM.
@ -88,7 +88,7 @@
// based on the values of VERA_L0_MAPBASE or VERA_L1_MAPBASE, mapping the base address of the selected layer.
// The function setscreenlayermapbase(layer,mapbase) allows to configure bit 16:9 of the
// mapbase address of the time map in VRAM of the selected layer VERA_L0_MAPBASE or VERA_L1_MAPBASE.
.label CONIO_SCREEN_TEXT = $39
.label CONIO_SCREEN_TEXT = $27
.segment Code
__start: {
// __ma unsigned byte conio_screen_width = 0
@ -159,36 +159,19 @@ conio_x16_init: {
}
// Functions for performing input and output.
main: {
//(byte)(((((word)<(>calcend)<<8)|>(<calcend))>>5)+((word)<(>calcend)<<3));
.const borderbeg = $a000
.const inc = $123
.label __1 = $1c
.label __3 = $20
.label __4 = $20
.label __6 = $22
.label __8 = $24
.label __9 = $24
.label __10 = $26
.label __11 = $26
.label __13 = $24
.label __14 = $2b
.label __15 = $2b
.label __17 = $2d
.label __19 = $2f
.label __20 = $2f
.label __21 = $31
.label __22 = $31
.label __24 = $2f
.label __25 = $f
.label __27 = $36
.label __30 = $24
.label __31 = $28
.label __32 = $2f
.label __33 = $33
.label calcend = $1c
.label bankbeg = $2a
.label bankend = $35
.label __1 = $1e
.label __4 = $22
.label __9 = $23
.label __13 = $f
.label __15 = $24
.label calcend = $1e
.label bankbeg = $22
.label bankend = $23
.label beg = $f
.label end = $36
.label end = $24
.label num = 7
.label src1 = 3
lda #<$40*$40*2
@ -253,154 +236,60 @@ main: {
bne !+
inc.z calcend+3
!:
// >calcbeg
// BYTE2(calcbeg)
lda.z src1+2
sta.z __3
lda.z src1+3
sta.z __3+1
// (>calcbeg)<<8
lda.z __4
sta.z __4+1
lda #0
// BYTE2(calcbeg)<<3
asl
asl
asl
sta.z __4
// <(>calcbeg)<<8
tay
// <calcbeg
lda.z src1
sta.z __6
// BYTE1(calcbeg)
lda.z src1+1
sta.z __6+1
// >(<calcbeg)
tax
// ((word)<(>calcbeg)<<8)|>(<calcbeg)
tya
sta.z __30
sta.z __30+1
txa
ora.z __8
sta.z __8
// (((word)<(>calcbeg)<<8)|>(<calcbeg))>>5
lsr.z __9+1
ror.z __9
lsr.z __9+1
ror.z __9
lsr.z __9+1
ror.z __9
lsr.z __9+1
ror.z __9
lsr.z __9+1
ror.z __9
// >calcbeg
lda.z src1+2
sta.z __10
lda.z src1+3
sta.z __10+1
// (>calcbeg)<<3
asl.z __11
rol.z __11+1
asl.z __11
rol.z __11+1
asl.z __11
rol.z __11+1
// <(>calcbeg)<<3
lda.z __11
// ((((word)<(>calcbeg)<<8)|>(<calcbeg))>>5)+((word)<(>calcbeg)<<3)
sta.z __31
tya
sta.z __31+1
lda.z __13
clc
adc.z __31
sta.z __13
lda.z __13+1
adc.z __31+1
sta.z __13+1
// byte bankbeg = (byte)(((((word)<(>calcbeg)<<8)|>(<calcbeg))>>5)+((word)<(>calcbeg)<<3))
lda.z __13
// BYTE1(calcbeg)>>5
lsr
lsr
lsr
lsr
lsr
// byte bankbeg = BYTE2(calcbeg)<<3 | BYTE1(calcbeg)>>5
ora.z bankbeg
sta.z bankbeg
// >calcend
// BYTE2(calcend)
lda.z calcend+2
sta.z __14
lda.z calcend+3
sta.z __14+1
// (>calcend)<<8
lda.z __15
sta.z __15+1
tya
sta.z __15
// <(>calcend)<<8
tay
// <calcend
lda.z calcend
sta.z __17
// BYTE2(calcend)<<3
asl
asl
asl
sta.z __9
// BYTE1(calcend)
lda.z calcend+1
sta.z __17+1
// >(<calcend)
tax
// ((word)<(>calcend)<<8)|>(<calcend)
tya
sta.z __32
sta.z __32+1
txa
ora.z __19
sta.z __19
// (((word)<(>calcend)<<8)|>(<calcend))>>5
lsr.z __20+1
ror.z __20
lsr.z __20+1
ror.z __20
lsr.z __20+1
ror.z __20
lsr.z __20+1
ror.z __20
lsr.z __20+1
ror.z __20
// >calcend
lda.z calcend+2
sta.z __21
lda.z calcend+3
sta.z __21+1
// (>calcend)<<3
asl.z __22
rol.z __22+1
asl.z __22
rol.z __22+1
asl.z __22
rol.z __22+1
// <(>calcend)<<3
lda.z __22
// ((((word)<(>calcend)<<8)|>(<calcend))>>5)+((word)<(>calcend)<<3)
sta.z __33
tya
sta.z __33+1
lda.z __24
clc
adc.z __33
sta.z __24
lda.z __24+1
adc.z __33+1
sta.z __24+1
// byte bankend = (byte)(((((word)<(>calcend)<<8)|>(<calcend))>>5)+((word)<(>calcend)<<3))
lda.z __24
// BYTE1(calcend)>>5
lsr
lsr
lsr
lsr
lsr
// byte bankend = BYTE2(calcend)<<3 | BYTE1(calcend)>>5
ora.z bankend
sta.z bankend
// <calcbeg
// WORD0(calcbeg)
lda.z src1
sta.z __25
sta.z __13
lda.z src1+1
sta.z __25+1
// word beg = ((<calcbeg)&0x1FFF)
sta.z __13+1
// word beg = (WORD0(calcbeg)&0x1FFF)
lda.z beg
and #<$1fff
sta.z beg
lda.z beg+1
and #>$1fff
sta.z beg+1
// <calcend
// WORD0(calcend)
lda.z calcend
sta.z __27
sta.z __15
lda.z calcend+1
sta.z __27+1
// word end = ((<calcend)&0x1FFF)
sta.z __15+1
// word end = (WORD0(calcend)&0x1FFF)
lda.z end
and #<$1fff
sta.z end
@ -637,13 +526,13 @@ screensize: {
// - layer: value of 0 or 1.
screenlayer: {
.const layer = 1
.label __2 = $3b
.label __4 = $3d
.label __5 = $49
.label vera_layer_get_width1_config = $4b
.label vera_layer_get_width1_return = $3b
.label vera_layer_get_height1_config = $3f
.label vera_layer_get_height1_return = $49
.label __2 = $29
.label __4 = $2b
.label __5 = $37
.label vera_layer_get_width1_config = $39
.label vera_layer_get_width1_return = $29
.label vera_layer_get_height1_config = $2d
.label vera_layer_get_height1_return = $37
// conio_screen_layer = layer
lda #layer
sta.z conio_screen_layer
@ -771,7 +660,7 @@ vera_layer_set_backcolor: {
// so the resulting address in the VERA VRAM is always aligned to a multiple of 512 bytes.
// vera_layer_set_mapbase(byte register(A) layer, byte register(X) mapbase)
vera_layer_set_mapbase: {
.label addr = $3b
.label addr = $29
// byte* addr = vera_layer_mapbase[layer]
asl
tay
@ -789,8 +678,8 @@ vera_layer_set_mapbase: {
// Set the cursor to the specified position
// gotoxy(byte register(X) y)
gotoxy: {
.label __6 = $3d
.label line_offset = $3d
.label __6 = $2b
.label line_offset = $2b
// if(y>CONIO_HEIGHT)
lda.z conio_screen_height
stx.z $ff
@ -833,9 +722,9 @@ gotoxy: {
rts
}
// Output a NUL-terminated string at the current cursor position
// cputs(const byte* zp($22) s)
// cputs(const byte* zp($12) s)
cputs: {
.label s = $22
.label s = $12
__b1:
// while(c=*s++)
ldy #0
@ -939,12 +828,12 @@ vera_layer_mode_tile: {
sta vera_layer_rowskip+vera_layer_mode_text.layer*SIZEOF_WORD+1
// vera_layer_set_config(layer, config)
jsr vera_layer_set_config
// vera_mapbase_offset[layer] = <mapbase_address
// vera_mapbase_offset[layer] = WORD0(mapbase_address)
// mapbase
lda #<0
sta vera_mapbase_offset+vera_layer_mode_text.layer*SIZEOF_WORD
sta vera_mapbase_offset+vera_layer_mode_text.layer*SIZEOF_WORD+1
// vera_mapbase_bank[layer] = (byte)(>mapbase_address)
// vera_mapbase_bank[layer] = BYTE2(mapbase_address)
sta vera_mapbase_bank+vera_layer_mode_text.layer
// vera_mapbase_address[layer] = mapbase_address
lda #<vera_layer_mode_text.mapbase_address
@ -959,13 +848,13 @@ vera_layer_mode_tile: {
ldx #mapbase
lda #vera_layer_mode_text.layer
jsr vera_layer_set_mapbase
// vera_tilebase_offset[layer] = <tilebase_address
// vera_tilebase_offset[layer] = WORD0(tilebase_address)
// tilebase
lda #<vera_layer_mode_text.tilebase_address&$ffff
sta vera_tilebase_offset+vera_layer_mode_text.layer*SIZEOF_WORD
lda #>vera_layer_mode_text.tilebase_address&$ffff
sta vera_tilebase_offset+vera_layer_mode_text.layer*SIZEOF_WORD+1
// vera_tilebase_bank[layer] = (byte)>tilebase_address
// vera_tilebase_bank[layer] = BYTE2(tilebase_address)
lda #0
sta vera_tilebase_bank+vera_layer_mode_text.layer
// vera_tilebase_address[layer] = tilebase_address
@ -986,7 +875,7 @@ vera_layer_mode_tile: {
// - layer: Value of 0 or 1.
// - color_mode: Specifies the color mode to be VERA_LAYER_CONFIG_16 or VERA_LAYER_CONFIG_256 for text mode.
vera_layer_set_text_color_mode: {
.label addr = $3f
.label addr = $2d
// byte* addr = vera_layer_config[layer]
lda vera_layer_config+vera_layer_mode_text.layer*SIZEOF_POINTER
sta.z addr
@ -1018,7 +907,7 @@ vera_layer_get_mapbase_bank: {
// - return: Offset in vera vram of the specified bank.
// vera_layer_get_mapbase_offset(byte register(A) layer)
vera_layer_get_mapbase_offset: {
.label return = $4b
.label return = $39
// return vera_mapbase_offset[layer];
asl
tay
@ -1044,7 +933,7 @@ vera_layer_get_rowshift: {
// - return: Skip value to calculate fast from a y value to line offset in tile mode.
// vera_layer_get_rowskip(byte register(A) layer)
vera_layer_get_rowskip: {
.label return = $3d
.label return = $2b
// return vera_layer_rowskip[layer];
asl
tay
@ -1059,8 +948,8 @@ vera_layer_get_rowskip: {
// Moves the cursor forward. Scrolls the entire screen if needed
// cputc(byte zp($11) c)
cputc: {
.label __16 = $41
.label conio_addr = $47
.label __16 = $2f
.label conio_addr = $35
.label c = $11
// vera_layer_get_color( conio_screen_layer)
ldx.z conio_screen_layer
@ -1100,14 +989,14 @@ cputc: {
lda #VERA_ADDRSEL^$ff
and VERA_CTRL
sta VERA_CTRL
// <conio_addr
// BYTE0(conio_addr)
lda.z conio_addr
// *VERA_ADDRX_L = <conio_addr
// *VERA_ADDRX_L = BYTE0(conio_addr)
// Set address
sta VERA_ADDRX_L
// >conio_addr
// BYTE1(conio_addr)
lda.z conio_addr+1
// *VERA_ADDRX_M = >conio_addr
// *VERA_ADDRX_M = BYTE1(conio_addr)
sta VERA_ADDRX_M
// CONIO_SCREEN_BANK | VERA_INC_1
lda #VERA_INC_1
@ -1163,10 +1052,10 @@ cputc: {
// - value : The number to be converted to RADIX
// - buffer : receives the string representing the number and zero-termination.
// - radix : The radix to convert the number to (from the enum RADIX)
// ultoa(dword zp($b) value, byte* zp($22) buffer)
// ultoa(dword zp($b) value, byte* zp($12) buffer)
ultoa: {
.label digit_value = $43
.label buffer = $22
.label digit_value = $31
.label buffer = $12
.label digit = $11
.label value = $b
lda #<printf_buffer+OFFSET_STRUCT_PRINTF_BUFFER_NUMBER_DIGITS
@ -1273,12 +1162,12 @@ printf_number_buffer: {
// - value : The number to be converted to RADIX
// - buffer : receives the string representing the number and zero-termination.
// - radix : The radix to convert the number to (from the enum RADIX)
// uctoa(byte register(X) value, byte* zp($22) buffer)
// uctoa(byte register(X) value, byte* zp($12) buffer)
uctoa: {
.label digit_value = $4f
.label buffer = $22
.label digit_value = $3d
.label buffer = $12
.label digit = $11
.label started = $2a
.label started = $22
lda #<printf_buffer+OFFSET_STRUCT_PRINTF_BUFFER_NUMBER_DIGITS
sta.z buffer
lda #>printf_buffer+OFFSET_STRUCT_PRINTF_BUFFER_NUMBER_DIGITS
@ -1339,10 +1228,10 @@ uctoa: {
// - value : The number to be converted to RADIX
// - buffer : receives the string representing the number and zero-termination.
// - radix : The radix to convert the number to (from the enum RADIX)
// utoa(word zp($f) value, byte* zp($22) buffer)
// utoa(word zp($f) value, byte* zp($12) buffer)
utoa: {
.label digit_value = $47
.label buffer = $22
.label digit_value = $35
.label buffer = $12
.label digit = $11
.label value = $f
lda #<printf_buffer+OFFSET_STRUCT_PRINTF_BUFFER_NUMBER_DIGITS
@ -1358,9 +1247,8 @@ utoa: {
cmp #4-1
bcc __b2
// *buffer++ = DIGITS[(char)value]
lda.z value
tay
lda DIGITS,y
ldx.z value
lda DIGITS,x
ldy #0
sta (buffer),y
// *buffer++ = DIGITS[(char)value];
@ -1414,7 +1302,7 @@ utoa: {
// - layer: Value of 0 or 1.
// - config: Specifies the modes which are specified using T256C / 'Bitmap Mode' / 'Color Depth'.
vera_layer_set_config: {
.label addr = $49
.label addr = $37
// byte* addr = vera_layer_config[layer]
lda vera_layer_config+vera_layer_mode_text.layer*SIZEOF_POINTER
sta.z addr
@ -1433,14 +1321,14 @@ vera_layer_set_config: {
// Note that the register only specifies bits 16:11 of the address,
// so the resulting address in the VERA VRAM is always aligned to a multiple of 2048 bytes!
vera_layer_set_tilebase: {
.label addr = $4b
.label addr = $39
// byte* addr = vera_layer_tilebase[layer]
lda vera_layer_tilebase+vera_layer_mode_text.layer*SIZEOF_POINTER
sta.z addr
lda vera_layer_tilebase+vera_layer_mode_text.layer*SIZEOF_POINTER+1
sta.z addr+1
// *addr = tilebase
lda #(>(vera_layer_mode_tile.tilebase_address&$ffff))&VERA_LAYER_TILEBASE_MASK
lda #(>vera_layer_mode_tile.tilebase_address)&VERA_LAYER_TILEBASE_MASK
ldy #0
sta (addr),y
// }
@ -1453,7 +1341,7 @@ vera_layer_set_tilebase: {
// Note that on the VERA, the transparent color has value 0.
// vera_layer_get_color(byte register(X) layer)
vera_layer_get_color: {
.label addr = $4d
.label addr = $3b
// byte* addr = vera_layer_config[layer]
txa
asl
@ -1486,7 +1374,7 @@ vera_layer_get_color: {
}
// Print a newline
cputln: {
.label temp = $4d
.label temp = $3b
// word temp = conio_line_text[conio_screen_layer]
lda.z conio_screen_layer
asl
@ -1532,11 +1420,11 @@ cputln: {
// - sub : the value of a '1' in the digit. Subtracted continually while the digit is increased.
// (For decimal the subs used are 10000, 1000, 100, 10, 1)
// returns : the value reduced by sub * digit so that it is less than sub.
// ultoa_append(byte* zp($22) buffer, dword zp($b) value, dword zp($43) sub)
// ultoa_append(byte* zp($12) buffer, dword zp($b) value, dword zp($31) sub)
ultoa_append: {
.label buffer = $22
.label buffer = $12
.label value = $b
.label sub = $43
.label sub = $31
.label return = $b
ldx #0
__b1:
@ -1590,10 +1478,10 @@ ultoa_append: {
// - sub : the value of a '1' in the digit. Subtracted continually while the digit is increased.
// (For decimal the subs used are 10000, 1000, 100, 10, 1)
// returns : the value reduced by sub * digit so that it is less than sub.
// uctoa_append(byte* zp($22) buffer, byte register(X) value, byte zp($4f) sub)
// uctoa_append(byte* zp($12) buffer, byte register(X) value, byte zp($3d) sub)
uctoa_append: {
.label buffer = $22
.label sub = $4f
.label buffer = $12
.label sub = $3d
ldy #0
__b1:
// while (value >= sub)
@ -1623,11 +1511,11 @@ uctoa_append: {
// - sub : the value of a '1' in the digit. Subtracted continually while the digit is increased.
// (For decimal the subs used are 10000, 1000, 100, 10, 1)
// returns : the value reduced by sub * digit so that it is less than sub.
// utoa_append(byte* zp($22) buffer, word zp($f) value, word zp($47) sub)
// utoa_append(byte* zp($12) buffer, word zp($f) value, word zp($35) sub)
utoa_append: {
.label buffer = $22
.label buffer = $12
.label value = $f
.label sub = $47
.label sub = $35
.label return = $f
ldx #0
__b1:
@ -1689,10 +1577,10 @@ cscroll: {
}
// Insert a new line, and scroll the upper part of the screen up.
insertup: {
.label cy = $4f
.label width = $50
.label line = $51
.label start = $51
.label cy = $3d
.label width = $3e
.label line = $3f
.label start = $3f
// unsigned byte cy = conio_cursor_y[conio_screen_layer]
ldy.z conio_screen_layer
lda conio_cursor_y,y
@ -1757,8 +1645,8 @@ insertup: {
jmp __b1
}
clearline: {
.label addr = $55
.label c = $20
.label addr = $43
.label c = $2f
// *VERA_CTRL &= ~VERA_ADDRSEL
// Select DATA0
lda #VERA_ADDRSEL^$ff
@ -1776,13 +1664,13 @@ clearline: {
lda.z CONIO_SCREEN_TEXT+1
adc conio_line_text+1,y
sta.z addr+1
// <addr
// BYTE0(addr)
lda.z addr
// *VERA_ADDRX_L = <addr
// *VERA_ADDRX_L = BYTE0(addr)
sta VERA_ADDRX_L
// >addr
// BYTE1(addr)
lda.z addr+1
// *VERA_ADDRX_M = >addr
// *VERA_ADDRX_M = BYTE1(addr)
sta VERA_ADDRX_M
// *VERA_ADDRX_H = VERA_INC_1
lda #VERA_INC_1
@ -1834,25 +1722,25 @@ clearline: {
// - dest: pointer to the location to copy to. Note that the address is a 16 bit value!
// - dest_increment: the increment indicator, VERA needs this because addressing increment is automated by VERA at each access.
// - num: The number of bytes to copy
// memcpy_in_vram(void* zp($51) dest, byte* zp($55) src, word zp($53) num)
// memcpy_in_vram(void* zp($3f) dest, byte* zp($43) src, word zp($41) num)
memcpy_in_vram: {
.label i = $20
.label dest = $51
.label src = $55
.label num = $53
.label i = $2f
.label dest = $3f
.label src = $43
.label num = $41
// *VERA_CTRL &= ~VERA_ADDRSEL
// Select DATA0
lda #VERA_ADDRSEL^$ff
and VERA_CTRL
sta VERA_CTRL
// <src
// BYTE0(src)
lda.z src
// *VERA_ADDRX_L = <src
// *VERA_ADDRX_L = BYTE0(src)
// Set address
sta VERA_ADDRX_L
// >src
// BYTE1(src)
lda.z src+1
// *VERA_ADDRX_M = >src
// *VERA_ADDRX_M = BYTE1(src)
sta VERA_ADDRX_M
// *VERA_ADDRX_H = src_increment | src_bank
lda #VERA_INC_1
@ -1862,14 +1750,14 @@ memcpy_in_vram: {
lda #VERA_ADDRSEL
ora VERA_CTRL
sta VERA_CTRL
// <dest
// BYTE0(dest)
lda.z dest
// *VERA_ADDRX_L = <dest
// *VERA_ADDRX_L = BYTE0(dest)
// Set address
sta VERA_ADDRX_L
// >dest
// BYTE1(dest)
lda.z dest+1
// *VERA_ADDRX_M = >dest
// *VERA_ADDRX_M = BYTE1(dest)
sta VERA_ADDRX_M
// *VERA_ADDRX_H = dest_increment | dest_bank
lda #VERA_INC_1

826
src/test/ref/examples/cx16/cx16-bankaddressing.cfg
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6384
src/test/ref/examples/cx16/cx16-bankaddressing.log
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281
src/test/ref/examples/cx16/cx16-bankaddressing.sym
View File

@ -1,8 +1,8 @@
constant const byte BLUE = 6
byte CONIO_SCREEN_BANK
byte CONIO_SCREEN_BANK#10 CONIO_SCREEN_BANK zp[1]:56 523560.7434554974
byte CONIO_SCREEN_BANK#10 CONIO_SCREEN_BANK zp[1]:38 578035.2716763006
byte* CONIO_SCREEN_TEXT
word CONIO_SCREEN_TEXT#101 CONIO_SCREEN_TEXT zp[2]:57 0.4225941422594142
word CONIO_SCREEN_TEXT#101 CONIO_SCREEN_TEXT zp[2]:39 0.45701357466063347
constant byte* DIGITS[] = "0123456789abcdef"z
constant byte OFFSET_STRUCT_PRINTF_BUFFER_NUMBER_DIGITS = 1
constant byte RADIX::BINARY = 2
@ -47,23 +47,23 @@ byte~ clearline::$1 reg byte a 2.000000000002E12
byte~ clearline::$2 reg byte a 2.000000000002E12
byte~ clearline::$5 reg byte a 2.000000000002E12
byte* clearline::addr
byte* clearline::addr#0 addr zp[2]:85 1.000000000001E12
byte* clearline::addr#0 addr zp[2]:67 1.000000000001E12
word clearline::c
word clearline::c#1 c zp[2]:32 2.000000000000002E15
word clearline::c#2 c zp[2]:32 7.500000000000008E14
word clearline::c#1 c zp[2]:47 2.000000000000002E15
word clearline::c#2 c zp[2]:47 7.500000000000008E14
byte clearline::color
byte clearline::color#0 reg byte x 1.668333333333337E14
constant byte* conio_cursor_x[2] = { 0, 0 }
constant byte* conio_cursor_y[2] = { 0, 0 }
word conio_height loadstore zp[2]:23 5.714285773714286E7
word conio_height loadstore zp[2]:25 6.369426817834395E7
constant word* conio_line_text[2] = { 0, 0 }
byte conio_rowshift loadstore zp[1]:25 4.5917431192708716E11
word conio_rowskip loadstore zp[2]:26 5.00005000000525E11
volatile byte conio_screen_height loadstore zp[1]:19 6.091370559746193E8
byte conio_screen_layer loadstore zp[1]:20 1.3214230772042307E10
volatile byte conio_screen_width loadstore zp[1]:18 4.311207327586233E12
byte conio_rowshift loadstore zp[1]:27 5.00500000000525E11
word conio_rowskip loadstore zp[2]:28 5.4945604395662085E11
volatile byte conio_screen_height loadstore zp[1]:21 6.703910616033521E8
byte conio_screen_layer loadstore zp[1]:22 1.4197107441037191E10
volatile byte conio_screen_width loadstore zp[1]:20 4.673832242990682E12
constant byte* conio_scroll_enable[2] = { 1, 1 }
word conio_width loadstore zp[2]:21 564972.3389830509
word conio_width loadstore zp[2]:23 628931.4716981133
void conio_x16_init()
constant byte* const conio_x16_init::BASIC_CURSOR_LINE = (byte*) 214
byte conio_x16_init::line
@ -72,7 +72,7 @@ byte conio_x16_init::line#1 line zp[1]:2 22.0
byte conio_x16_init::line#3 line zp[1]:2 33.0
void cputc(byte cputc::c)
byte~ cputc::$15 reg byte a 2.00000002E8
word~ cputc::$16 zp[2]:65 2.00000002E8
word~ cputc::$16 zp[2]:47 2.00000002E8
byte~ cputc::$2 reg byte a 2.00000002E8
byte~ cputc::$4 reg byte a 2.00000002E8
byte~ cputc::$5 reg byte a 2.00000002E8
@ -84,29 +84,29 @@ byte cputc::c#3 c zp[1]:17 1.2353529647058824E7
byte cputc::color
byte cputc::color#0 reg byte x 1.428571442857143E7
byte* cputc::conio_addr
byte* cputc::conio_addr#0 conio_addr zp[2]:71 1.00000001E8
byte* cputc::conio_addr#1 conio_addr zp[2]:71 6.0000000599999994E7
byte* cputc::conio_addr#0 conio_addr zp[2]:53 1.00000001E8
byte* cputc::conio_addr#1 conio_addr zp[2]:53 6.0000000599999994E7
byte cputc::scroll_enable
byte cputc::scroll_enable#0 reg byte a 2.00000002E8
void cputln()
byte~ cputln::$2 reg byte a 2.000000002E9
byte~ cputln::$3 reg byte a 2.000000002E9
word cputln::temp
word cputln::temp#0 temp zp[2]:77 2.000000002E9
word cputln::temp#1 temp zp[2]:77 1.000000001E9
word cputln::temp#0 temp zp[2]:59 2.000000002E9
word cputln::temp#1 temp zp[2]:59 1.000000001E9
void cputs(const byte* cputs::s)
byte cputs::c
byte cputs::c#1 reg byte a 1.0000001E7
const byte* cputs::s
const byte* cputs::s#0 s zp[2]:34 5000000.5
const byte* cputs::s#10 s zp[2]:34 1.5050002E7
const byte* cputs::s#11 s zp[2]:34 100001.0
const byte* cputs::s#0 s zp[2]:18 5000000.5
const byte* cputs::s#10 s zp[2]:18 1.5050002E7
const byte* cputs::s#11 s zp[2]:18 100001.0
void cscroll()
void gotoxy(byte gotoxy::x , byte gotoxy::y)
byte~ gotoxy::$5 reg byte a 2.00000000002E11
word~ gotoxy::$6 zp[2]:61 2.00000000002E11
word~ gotoxy::$6 zp[2]:43 2.00000000002E11
word gotoxy::line_offset
word gotoxy::line_offset#0 line_offset zp[2]:61 1.00000000001E11
word gotoxy::line_offset#0 line_offset zp[2]:43 1.00000000001E11
byte gotoxy::x
byte gotoxy::y
byte gotoxy::y#1 reg byte x 22.0
@ -116,64 +116,46 @@ byte gotoxy::y#4 reg byte x 4.00000000004E10
void insertup()
byte~ insertup::$3 reg byte a 2.00000000000002E14
byte insertup::cy
byte insertup::cy#0 cy zp[1]:79 8.341666666666834E12
byte insertup::cy#0 cy zp[1]:61 8.341666666666834E12
byte insertup::i
byte insertup::i#1 reg byte x 2.00000000000002E14
byte insertup::i#2 reg byte x 4.444444444444489E13
word insertup::line
word insertup::line#0 line zp[2]:81 2.00000000000002E14
word insertup::line#0 line zp[2]:63 2.00000000000002E14
byte* insertup::start
byte* insertup::start#0 start zp[2]:81 1.00000000000001E14
byte* insertup::start#0 start zp[2]:63 1.00000000000001E14
byte insertup::width
byte insertup::width#0 width zp[1]:80 9.100000000000182E12
byte insertup::width#0 width zp[1]:62 9.100000000000182E12
void main()
dword~ main::$1 zp[4]:28 202.0
word~ main::$10 zp[2]:38 202.0
word~ main::$11 zp[2]:38 202.0
byte~ main::$12 reg byte a 101.0
word~ main::$13 zp[2]:36 101.0
word~ main::$14 zp[2]:43 202.0
word~ main::$15 zp[2]:43 202.0
byte~ main::$16 reg byte y 33.666666666666664
word~ main::$17 zp[2]:45 202.0
byte~ main::$18 reg byte x 101.0
word~ main::$19 zp[2]:47 202.0
word~ main::$20 zp[2]:47 40.4
word~ main::$21 zp[2]:49 202.0
word~ main::$22 zp[2]:49 202.0
byte~ main::$23 reg byte a 101.0
word~ main::$24 zp[2]:47 101.0
word~ main::$25 zp[2]:15 202.0
word~ main::$27 zp[2]:54 202.0
word~ main::$3 zp[2]:32 202.0
word~ main::$30 zp[2]:36 202.0
word~ main::$31 zp[2]:40 202.0
word~ main::$32 zp[2]:47 202.0
word~ main::$33 zp[2]:51 202.0
word~ main::$4 zp[2]:32 202.0
byte~ main::$5 reg byte y 33.666666666666664
word~ main::$6 zp[2]:34 202.0
byte~ main::$7 reg byte x 101.0
word~ main::$8 zp[2]:36 202.0
word~ main::$9 zp[2]:36 40.4
dword~ main::$1 zp[4]:30 202.0
byte~ main::$10 reg byte a 202.0
byte~ main::$11 reg byte a 202.0
word~ main::$13 zp[2]:15 202.0
word~ main::$15 zp[2]:36 202.0
byte~ main::$3 reg byte a 202.0
byte~ main::$4 zp[1]:34 67.33333333333333
byte~ main::$5 reg byte a 202.0
byte~ main::$6 reg byte a 202.0
byte~ main::$8 reg byte a 202.0
byte~ main::$9 zp[1]:35 67.33333333333333
byte main::bankbeg
byte main::bankbeg#0 bankbeg zp[1]:42 5.9411764705882355
byte main::bankbeg#0 bankbeg zp[1]:34 8.08
byte main::bankend
byte main::bankend#0 bankend zp[1]:53 8.416666666666666
byte main::bankend#0 bankend zp[1]:35 8.416666666666666
word main::beg
word main::beg#0 beg zp[2]:15 67.33333333333333
word main::beg#1 beg zp[2]:15 8.782608695652174
constant const word main::borderbeg = $a000
dword main::calcbeg
dword main::calcend
dword main::calcend#0 calcend zp[4]:28 13.772727272727272
dword main::calcend#0 calcend zp[4]:30 19.423076923076923
word main::end
word main::end#0 end zp[2]:54 101.0
word main::end#1 end zp[2]:54 7.769230769230769
word main::end#0 end zp[2]:36 101.0
word main::end#1 end zp[2]:36 7.769230769230769
constant word main::inc = $123
dword main::num
dword main::num#1 num zp[4]:7 151.5
dword main::num#10 num zp[4]:7 6.029850746268656
dword main::num#10 num zp[4]:7 8.244897959183673
constant byte* main::s[6] = "cbeg="
constant byte* main::s1[7] = ", add="
constant byte* main::s2[8] = ", cend="
@ -185,23 +167,23 @@ constant byte* main::s7[2] = "
"
dword main::src1
dword main::src1#1 src1 zp[4]:3 202.0
dword main::src1#10 src1 zp[4]:3 13.367647058823529
dword main::src1#10 src1 zp[4]:3 16.16
void memcpy_in_vram(byte memcpy_in_vram::dest_bank , void* memcpy_in_vram::dest , byte memcpy_in_vram::dest_increment , byte memcpy_in_vram::src_bank , void* memcpy_in_vram::src , byte memcpy_in_vram::src_increment , word memcpy_in_vram::num)
byte~ memcpy_in_vram::$0 reg byte a 2.000000000000002E15
byte~ memcpy_in_vram::$1 reg byte a 2.000000000000002E15
byte~ memcpy_in_vram::$3 reg byte a 2.000000000000002E15
byte~ memcpy_in_vram::$4 reg byte a 2.000000000000002E15
void* memcpy_in_vram::dest
void* memcpy_in_vram::dest#0 dest zp[2]:81 1.909090909090912E14
void* memcpy_in_vram::dest#0 dest zp[2]:63 1.909090909090912E14
byte memcpy_in_vram::dest_bank
byte memcpy_in_vram::dest_increment
word memcpy_in_vram::i
word memcpy_in_vram::i#1 i zp[2]:32 2.0E19
word memcpy_in_vram::i#2 i zp[2]:32 1.0E19
word memcpy_in_vram::i#1 i zp[2]:47 2.0E19
word memcpy_in_vram::i#2 i zp[2]:47 1.0E19
word memcpy_in_vram::num
word memcpy_in_vram::num#0 num zp[2]:83 5.8824117647058829E17
word memcpy_in_vram::num#0 num zp[2]:65 5.8824117647058829E17
void* memcpy_in_vram::src
byte* memcpy_in_vram::src#0 src zp[2]:85 1.6666666666666834E13
byte* memcpy_in_vram::src#0 src zp[2]:67 1.6666666666666834E13
byte memcpy_in_vram::src_bank
byte memcpy_in_vram::src_increment
struct printf_buffer_number printf_buffer loadstore mem[12] = {}
@ -260,10 +242,10 @@ dword printf_ulong::uvalue#1 uvalue zp[4]:11 202.0
dword printf_ulong::uvalue#2 uvalue zp[4]:11 202.0
dword printf_ulong::uvalue#3 uvalue zp[4]:11 652.0
void screenlayer(byte screenlayer::layer)
word~ screenlayer::$2 zp[2]:59 202.0
word~ screenlayer::$2 zp[2]:41 202.0
byte~ screenlayer::$3 reg byte a 202.0
word~ screenlayer::$4 zp[2]:61 202.0
word~ screenlayer::$5 zp[2]:73 202.0
word~ screenlayer::$4 zp[2]:43 202.0
word~ screenlayer::$5 zp[2]:55 202.0
byte screenlayer::layer
constant byte screenlayer::layer#0 layer = 1
byte~ screenlayer::vera_layer_get_height1_$0 reg byte a 202.0
@ -271,23 +253,23 @@ byte~ screenlayer::vera_layer_get_height1_$1 reg byte a 202.0
byte~ screenlayer::vera_layer_get_height1_$2 reg byte a 202.0
byte~ screenlayer::vera_layer_get_height1_$3 reg byte a 202.0
byte* screenlayer::vera_layer_get_height1_config
byte* screenlayer::vera_layer_get_height1_config#0 vera_layer_get_height1_config zp[2]:63 202.0
byte* screenlayer::vera_layer_get_height1_config#0 vera_layer_get_height1_config zp[2]:45 202.0
byte screenlayer::vera_layer_get_height1_layer
byte screenlayer::vera_layer_get_height1_layer#0 reg byte a 202.0
word screenlayer::vera_layer_get_height1_return
word screenlayer::vera_layer_get_height1_return#0 vera_layer_get_height1_return zp[2]:73 202.0
word screenlayer::vera_layer_get_height1_return#1 vera_layer_get_height1_return zp[2]:73 202.0
word screenlayer::vera_layer_get_height1_return#0 vera_layer_get_height1_return zp[2]:55 202.0
word screenlayer::vera_layer_get_height1_return#1 vera_layer_get_height1_return zp[2]:55 202.0
byte~ screenlayer::vera_layer_get_width1_$0 reg byte a 202.0
byte~ screenlayer::vera_layer_get_width1_$1 reg byte a 202.0
byte~ screenlayer::vera_layer_get_width1_$2 reg byte a 202.0
byte~ screenlayer::vera_layer_get_width1_$3 reg byte a 202.0
byte* screenlayer::vera_layer_get_width1_config
byte* screenlayer::vera_layer_get_width1_config#0 vera_layer_get_width1_config zp[2]:75 202.0
byte* screenlayer::vera_layer_get_width1_config#0 vera_layer_get_width1_config zp[2]:57 202.0
byte screenlayer::vera_layer_get_width1_layer
byte screenlayer::vera_layer_get_width1_layer#0 reg byte a 202.0
word screenlayer::vera_layer_get_width1_return
word screenlayer::vera_layer_get_width1_return#0 vera_layer_get_width1_return zp[2]:59 202.0
word screenlayer::vera_layer_get_width1_return#1 vera_layer_get_width1_return zp[2]:59 202.0
word screenlayer::vera_layer_get_width1_return#0 vera_layer_get_width1_return zp[2]:41 202.0
word screenlayer::vera_layer_get_width1_return#1 vera_layer_get_width1_return zp[2]:41 202.0
void screensize(byte* screensize::x , byte* screensize::y)
byte~ screensize::$1 reg byte a 202.0
byte~ screensize::$3 reg byte a 202.0
@ -301,21 +283,21 @@ byte* screensize::y
constant byte* screensize::y#0 y = &conio_screen_height
void uctoa(byte uctoa::value , byte* uctoa::buffer , byte uctoa::radix)
byte* uctoa::buffer
byte* uctoa::buffer#11 buffer zp[2]:34 335000.50000000006
byte* uctoa::buffer#14 buffer zp[2]:34 1500001.5
byte* uctoa::buffer#3 buffer zp[2]:34 20002.0
byte* uctoa::buffer#4 buffer zp[2]:34 2000002.0
byte* uctoa::buffer#11 buffer zp[2]:18 335000.50000000006
byte* uctoa::buffer#14 buffer zp[2]:18 1500001.5
byte* uctoa::buffer#3 buffer zp[2]:18 20002.0
byte* uctoa::buffer#4 buffer zp[2]:18 2000002.0
byte uctoa::digit
byte uctoa::digit#1 digit zp[1]:17 2000002.0
byte uctoa::digit#2 digit zp[1]:17 307692.6153846154
byte uctoa::digit_value
byte uctoa::digit_value#0 digit_value zp[1]:79 600000.6000000001
byte uctoa::digit_value#0 digit_value zp[1]:61 600000.6000000001
byte* uctoa::digit_values
byte uctoa::max_digits
byte uctoa::radix
byte uctoa::started
byte uctoa::started#2 started zp[1]:42 600000.6000000001
byte uctoa::started#4 started zp[1]:42 1000001.0
byte uctoa::started#2 started zp[1]:34 600000.6000000001
byte uctoa::started#4 started zp[1]:34 1000001.0
byte uctoa::value
byte uctoa::value#0 reg byte x 1000001.0
byte uctoa::value#1 reg byte x 5501.0
@ -323,14 +305,14 @@ byte uctoa::value#2 reg byte x 670001.0000000001
byte uctoa::value#6 reg byte x 1500001.5
byte uctoa_append(byte* uctoa_append::buffer , byte uctoa_append::value , byte uctoa_append::sub)
byte* uctoa_append::buffer
byte* uctoa_append::buffer#0 buffer zp[2]:34 1375000.25
byte* uctoa_append::buffer#0 buffer zp[2]:18 1375000.25
byte uctoa_append::digit
byte uctoa_append::digit#1 reg byte y 1.0000000001E10
byte uctoa_append::digit#2 reg byte y 1.00050000015E10
byte uctoa_append::return
byte uctoa_append::return#0 reg byte x 2000002.0
byte uctoa_append::sub
byte uctoa_append::sub#0 sub zp[1]:79 3.3335000005E9
byte uctoa_append::sub#0 sub zp[1]:61 3.3335000005E9
byte uctoa_append::value
byte uctoa_append::value#0 reg byte x 3666667.333333333
byte uctoa_append::value#1 reg byte x 2.0000000002E10
@ -339,15 +321,15 @@ void ultoa(dword ultoa::value , byte* ultoa::buffer , byte ultoa::radix)
byte~ ultoa::$10 reg byte a 2000002.0
byte~ ultoa::$11 reg byte a 20002.0
byte* ultoa::buffer
byte* ultoa::buffer#11 buffer zp[2]:34 287143.2857142857
byte* ultoa::buffer#14 buffer zp[2]:34 1500001.5
byte* ultoa::buffer#3 buffer zp[2]:34 20002.0
byte* ultoa::buffer#4 buffer zp[2]:34 2000002.0
byte* ultoa::buffer#11 buffer zp[2]:18 287143.2857142857
byte* ultoa::buffer#14 buffer zp[2]:18 1500001.5
byte* ultoa::buffer#3 buffer zp[2]:18 20002.0
byte* ultoa::buffer#4 buffer zp[2]:18 2000002.0
byte ultoa::digit
byte ultoa::digit#1 digit zp[1]:17 2000002.0
byte ultoa::digit#2 digit zp[1]:17 285714.5714285714
dword ultoa::digit_value
dword ultoa::digit_value#0 digit_value zp[4]:67 600000.6000000001
dword ultoa::digit_value#0 digit_value zp[4]:49 600000.6000000001
dword* ultoa::digit_values
byte ultoa::max_digits
byte ultoa::radix
@ -361,31 +343,31 @@ dword ultoa::value#2 value zp[4]:11 572857.857142857
dword ultoa::value#6 value zp[4]:11 1500001.5
dword ultoa_append(byte* ultoa_append::buffer , dword ultoa_append::value , dword ultoa_append::sub)
byte* ultoa_append::buffer
byte* ultoa_append::buffer#0 buffer zp[2]:34 1375000.25
byte* ultoa_append::buffer#0 buffer zp[2]:18 1375000.25
byte ultoa_append::digit
byte ultoa_append::digit#1 reg byte x 1.0000000001E10
byte ultoa_append::digit#2 reg byte x 1.00050000015E10
dword ultoa_append::return
dword ultoa_append::return#0 return zp[4]:11 2000002.0
dword ultoa_append::sub
dword ultoa_append::sub#0 sub zp[4]:67 3.3335000005E9
dword ultoa_append::sub#0 sub zp[4]:49 3.3335000005E9
dword ultoa_append::value
dword ultoa_append::value#0 value zp[4]:11 3666667.333333333
dword ultoa_append::value#1 value zp[4]:11 2.0000000002E10
dword ultoa_append::value#2 value zp[4]:11 5.001833334166666E9
void utoa(word utoa::value , byte* utoa::buffer , byte utoa::radix)
byte~ utoa::$10 reg byte a 2000002.0
byte~ utoa::$11 reg byte a 20002.0
byte~ utoa::$11 reg byte x 20002.0
byte* utoa::buffer
byte* utoa::buffer#11 buffer zp[2]:34 287143.2857142857
byte* utoa::buffer#14 buffer zp[2]:34 1500001.5
byte* utoa::buffer#3 buffer zp[2]:34 20002.0
byte* utoa::buffer#4 buffer zp[2]:34 2000002.0
byte* utoa::buffer#11 buffer zp[2]:18 287143.2857142857
byte* utoa::buffer#14 buffer zp[2]:18 1500001.5
byte* utoa::buffer#3 buffer zp[2]:18 20002.0
byte* utoa::buffer#4 buffer zp[2]:18 2000002.0
byte utoa::digit
byte utoa::digit#1 digit zp[1]:17 2000002.0
byte utoa::digit#2 digit zp[1]:17 285714.5714285714
word utoa::digit_value
word utoa::digit_value#0 digit_value zp[2]:71 600000.6000000001
word utoa::digit_value#0 digit_value zp[2]:53 600000.6000000001
word* utoa::digit_values
byte utoa::max_digits
byte utoa::radix
@ -399,14 +381,14 @@ word utoa::value#2 value zp[2]:15 572857.857142857
word utoa::value#6 value zp[2]:15 1500001.5
word utoa_append(byte* utoa_append::buffer , word utoa_append::value , word utoa_append::sub)
byte* utoa_append::buffer
byte* utoa_append::buffer#0 buffer zp[2]:34 1375000.25
byte* utoa_append::buffer#0 buffer zp[2]:18 1375000.25
byte utoa_append::digit
byte utoa_append::digit#1 reg byte x 1.0000000001E10
byte utoa_append::digit#2 reg byte x 1.00050000015E10
word utoa_append::return
word utoa_append::return#0 return zp[2]:15 2000002.0
word utoa_append::sub
word utoa_append::sub#0 sub zp[2]:71 3.3335000005E9
word utoa_append::sub#0 sub zp[2]:53 3.3335000005E9
word utoa_append::value
word utoa_append::value#0 value zp[2]:15 3666667.333333333
word utoa_append::value#1 value zp[2]:15 2.0000000002E10
@ -418,7 +400,7 @@ byte~ vera_layer_get_color::$0 reg byte a 2.0000000000002E13
byte~ vera_layer_get_color::$1 reg byte a 2.0000000000002E13
byte~ vera_layer_get_color::$3 reg byte a 2.0000000000002E13
byte* vera_layer_get_color::addr
byte* vera_layer_get_color::addr#0 addr zp[2]:77 2.0000000000002E13
byte* vera_layer_get_color::addr#0 addr zp[2]:59 2.0000000000002E13
byte vera_layer_get_color::layer
byte vera_layer_get_color::layer#0 reg byte x 2.00000002E8
byte vera_layer_get_color::layer#1 reg byte x 2.000000000002E12
@ -440,8 +422,8 @@ byte~ vera_layer_get_mapbase_offset::$0 reg byte a 2002.0
byte vera_layer_get_mapbase_offset::layer
byte vera_layer_get_mapbase_offset::layer#0 reg byte a 1102.0
word vera_layer_get_mapbase_offset::return
word vera_layer_get_mapbase_offset::return#0 return zp[2]:75 367.33333333333337
word vera_layer_get_mapbase_offset::return#2 return zp[2]:75 202.0
word vera_layer_get_mapbase_offset::return#0 return zp[2]:57 367.33333333333337
word vera_layer_get_mapbase_offset::return#2 return zp[2]:57 202.0
byte vera_layer_get_rowshift(byte vera_layer_get_rowshift::layer)
byte vera_layer_get_rowshift::layer
byte vera_layer_get_rowshift::layer#0 reg byte x 1102.0
@ -453,8 +435,8 @@ byte~ vera_layer_get_rowskip::$0 reg byte a 2002.0
byte vera_layer_get_rowskip::layer
byte vera_layer_get_rowskip::layer#0 reg byte a 1102.0
word vera_layer_get_rowskip::return
word vera_layer_get_rowskip::return#0 return zp[2]:61 367.33333333333337
word vera_layer_get_rowskip::return#2 return zp[2]:61 202.0
word vera_layer_get_rowskip::return#0 return zp[2]:43 367.33333333333337
word vera_layer_get_rowskip::return#2 return zp[2]:43 202.0
constant byte** vera_layer_mapbase[2] = { VERA_L0_MAPBASE, VERA_L1_MAPBASE }
void vera_layer_mode_text(byte vera_layer_mode_text::layer , dword vera_layer_mode_text::mapbase_address , dword vera_layer_mode_text::tilebase_address , word vera_layer_mode_text::mapwidth , word vera_layer_mode_text::mapheight , byte vera_layer_mode_text::tilewidth , byte vera_layer_mode_text::tileheight , word vera_layer_mode_text::color_mode)
word vera_layer_mode_text::color_mode
@ -493,20 +475,20 @@ byte vera_layer_set_backcolor::old
byte vera_layer_set_backcolor::return
void vera_layer_set_config(byte vera_layer_set_config::layer , byte vera_layer_set_config::config)
byte* vera_layer_set_config::addr
byte* vera_layer_set_config::addr#0 addr zp[2]:73 20002.0
byte* vera_layer_set_config::addr#0 addr zp[2]:55 20002.0
byte vera_layer_set_config::config
byte vera_layer_set_config::layer
void vera_layer_set_mapbase(byte vera_layer_set_mapbase::layer , byte vera_layer_set_mapbase::mapbase)
byte~ vera_layer_set_mapbase::$0 reg byte a 20002.0
byte* vera_layer_set_mapbase::addr
byte* vera_layer_set_mapbase::addr#0 addr zp[2]:59 20002.0
byte* vera_layer_set_mapbase::addr#0 addr zp[2]:41 20002.0
byte vera_layer_set_mapbase::layer
byte vera_layer_set_mapbase::layer#3 reg byte a 10001.0
byte vera_layer_set_mapbase::mapbase
byte vera_layer_set_mapbase::mapbase#3 reg byte x 3333.6666666666665
void vera_layer_set_text_color_mode(byte vera_layer_set_text_color_mode::layer , byte vera_layer_set_text_color_mode::color_mode)
byte* vera_layer_set_text_color_mode::addr
byte* vera_layer_set_text_color_mode::addr#0 addr zp[2]:63 2502.5
byte* vera_layer_set_text_color_mode::addr#0 addr zp[2]:45 2502.5
byte vera_layer_set_text_color_mode::color_mode
byte vera_layer_set_text_color_mode::layer
byte vera_layer_set_textcolor(byte vera_layer_set_textcolor::layer , byte vera_layer_set_textcolor::color)
@ -517,7 +499,7 @@ byte vera_layer_set_textcolor::old
byte vera_layer_set_textcolor::return
void vera_layer_set_tilebase(byte vera_layer_set_tilebase::layer , byte vera_layer_set_tilebase::tilebase)
byte* vera_layer_set_tilebase::addr
byte* vera_layer_set_tilebase::addr#0 addr zp[2]:75 20002.0
byte* vera_layer_set_tilebase::addr#0 addr zp[2]:57 20002.0
byte vera_layer_set_tilebase::layer
byte vera_layer_set_tilebase::tilebase
constant byte* vera_layer_textcolor[2] = { WHITE, WHITE }
@ -537,12 +519,13 @@ reg byte x [ vera_layer_set_mapbase::mapbase#3 ]
reg byte x [ gotoxy::y#4 gotoxy::y#3 gotoxy::y#1 gotoxy::y#2 ]
zp[4]:11 [ printf_ulong::uvalue#3 printf_ulong::uvalue#0 printf_ulong::uvalue#1 printf_ulong::uvalue#2 ultoa::value#2 ultoa::value#6 ultoa::value#1 ultoa::value#0 ultoa_append::value#2 ultoa_append::value#0 ultoa_append::value#1 ultoa_append::return#0 ]
reg byte x [ printf_uchar::uvalue#2 printf_uchar::uvalue#1 printf_uchar::uvalue#0 ]
zp[2]:15 [ printf_uint::uvalue#2 printf_uint::uvalue#0 printf_uint::uvalue#1 utoa::value#2 utoa::value#6 utoa::value#1 utoa::value#0 main::beg#1 utoa_append::value#2 utoa_append::value#0 utoa_append::value#1 utoa_append::return#0 main::$25 main::beg#0 ]
zp[2]:15 [ printf_uint::uvalue#2 printf_uint::uvalue#0 printf_uint::uvalue#1 utoa::value#2 utoa::value#6 utoa::value#1 utoa::value#0 main::beg#1 utoa_append::value#2 utoa_append::value#0 utoa_append::value#1 utoa_append::return#0 main::$13 main::beg#0 ]
reg byte x [ ultoa::started#2 ultoa::started#4 ]
reg byte a [ printf_number_buffer::buffer_sign#10 printf_number_buffer::buffer_sign#2 printf_number_buffer::buffer_sign#1 printf_number_buffer::buffer_sign#0 ]
reg byte x [ uctoa::value#2 uctoa::value#6 uctoa::value#1 uctoa::value#0 ]
zp[1]:17 [ utoa::digit#2 utoa::digit#1 uctoa::digit#2 uctoa::digit#1 ultoa::digit#2 ultoa::digit#1 cputc::c#3 cputc::c#0 cputc::c#2 ]
reg byte x [ utoa::started#2 utoa::started#4 ]
zp[2]:18 [ utoa::buffer#11 utoa::buffer#14 utoa::buffer#4 utoa::buffer#3 utoa_append::buffer#0 uctoa::buffer#11 uctoa::buffer#14 uctoa::buffer#4 uctoa::buffer#3 uctoa_append::buffer#0 ultoa::buffer#11 ultoa::buffer#14 ultoa::buffer#4 ultoa::buffer#3 ultoa_append::buffer#0 cputs::s#10 cputs::s#11 cputs::s#0 ]
reg byte x [ vera_layer_get_color::layer#2 vera_layer_get_color::layer#1 vera_layer_get_color::layer#0 ]
reg byte a [ vera_layer_get_color::return#2 vera_layer_get_color::return#0 vera_layer_get_color::return#1 ]
reg byte x [ ultoa_append::digit#2 ultoa_append::digit#1 ]
@ -550,42 +533,32 @@ reg byte x [ uctoa_append::value#2 uctoa_append::value#0 uctoa_append::value#1 ]
reg byte y [ uctoa_append::digit#2 uctoa_append::digit#1 ]
reg byte x [ utoa_append::digit#2 utoa_append::digit#1 ]
reg byte x [ insertup::i#2 insertup::i#1 ]
zp[1]:18 [ conio_screen_width ]
zp[1]:19 [ conio_screen_height ]
zp[1]:20 [ conio_screen_layer ]
zp[2]:21 [ conio_width ]
zp[2]:23 [ conio_height ]
zp[1]:25 [ conio_rowshift ]
zp[2]:26 [ conio_rowskip ]
zp[4]:28 [ main::$1 main::calcend#0 ]
zp[2]:32 [ main::$3 main::$4 memcpy_in_vram::i#2 memcpy_in_vram::i#1 clearline::c#2 clearline::c#1 ]
reg byte y [ main::$5 ]
zp[2]:34 [ main::$6 utoa::buffer#11 utoa::buffer#14 utoa::buffer#4 utoa::buffer#3 utoa_append::buffer#0 uctoa::buffer#11 uctoa::buffer#14 uctoa::buffer#4 uctoa::buffer#3 uctoa_append::buffer#0 ultoa::buffer#11 ultoa::buffer#14 ultoa::buffer#4 ultoa::buffer#3 ultoa_append::buffer#0 cputs::s#10 cputs::s#11 cputs::s#0 ]
reg byte x [ main::$7 ]
zp[2]:36 [ main::$30 main::$8 main::$9 main::$13 ]
zp[2]:38 [ main::$10 main::$11 ]
reg byte a [ main::$12 ]
zp[2]:40 [ main::$31 ]
zp[1]:42 [ main::bankbeg#0 uctoa::started#2 uctoa::started#4 ]
zp[2]:43 [ main::$14 main::$15 ]
reg byte y [ main::$16 ]
zp[2]:45 [ main::$17 ]
reg byte x [ main::$18 ]
zp[2]:47 [ main::$32 main::$19 main::$20 main::$24 ]
zp[2]:49 [ main::$21 main::$22 ]
reg byte a [ main::$23 ]
zp[2]:51 [ main::$33 ]
zp[1]:53 [ main::bankend#0 ]
zp[2]:54 [ main::$27 main::end#0 main::end#1 ]
zp[1]:20 [ conio_screen_width ]
zp[1]:21 [ conio_screen_height ]
zp[1]:22 [ conio_screen_layer ]
zp[2]:23 [ conio_width ]
zp[2]:25 [ conio_height ]
zp[1]:27 [ conio_rowshift ]
zp[2]:28 [ conio_rowskip ]
zp[4]:30 [ main::$1 main::calcend#0 ]
reg byte a [ main::$3 ]
zp[1]:34 [ main::$4 main::bankbeg#0 uctoa::started#2 uctoa::started#4 ]
reg byte a [ main::$5 ]
reg byte a [ main::$6 ]
reg byte a [ main::$8 ]
zp[1]:35 [ main::$9 main::bankend#0 ]
reg byte a [ main::$10 ]
reg byte a [ main::$11 ]
zp[2]:36 [ main::$15 main::end#0 main::end#1 ]
reg byte a [ screensize::hscale#0 ]
reg byte a [ screensize::$1 ]
reg byte a [ screensize::vscale#0 ]
reg byte a [ screensize::$3 ]
reg byte x [ vera_layer_get_mapbase_bank::layer#0 ]
reg byte a [ vera_layer_get_mapbase_bank::return#2 ]
zp[1]:56 [ CONIO_SCREEN_BANK#10 ]
zp[1]:38 [ CONIO_SCREEN_BANK#10 ]
reg byte a [ vera_layer_get_mapbase_offset::layer#0 ]
zp[2]:57 [ CONIO_SCREEN_TEXT#101 ]
zp[2]:39 [ CONIO_SCREEN_TEXT#101 ]
reg byte a [ screenlayer::vera_layer_get_width1_layer#0 ]
reg byte a [ screenlayer::vera_layer_get_width1_$2 ]
reg byte a [ screenlayer::vera_layer_get_width1_$0 ]
@ -601,11 +574,11 @@ reg byte a [ screenlayer::vera_layer_get_height1_$0 ]
reg byte a [ screenlayer::vera_layer_get_height1_$1 ]
reg byte a [ screenlayer::vera_layer_get_height1_$3 ]
reg byte a [ vera_layer_set_mapbase::$0 ]
zp[2]:59 [ vera_layer_set_mapbase::addr#0 screenlayer::vera_layer_get_width1_return#0 screenlayer::vera_layer_get_width1_return#1 screenlayer::$2 ]
zp[2]:61 [ gotoxy::$6 gotoxy::line_offset#0 vera_layer_get_rowskip::return#2 screenlayer::$4 vera_layer_get_rowskip::return#0 ]
zp[2]:41 [ vera_layer_set_mapbase::addr#0 screenlayer::vera_layer_get_width1_return#0 screenlayer::vera_layer_get_width1_return#1 screenlayer::$2 ]
zp[2]:43 [ gotoxy::$6 gotoxy::line_offset#0 vera_layer_get_rowskip::return#2 screenlayer::$4 vera_layer_get_rowskip::return#0 ]
reg byte a [ gotoxy::$5 ]
reg byte a [ cputs::c#1 ]
zp[2]:63 [ vera_layer_set_text_color_mode::addr#0 screenlayer::vera_layer_get_height1_config#0 ]
zp[2]:45 [ vera_layer_set_text_color_mode::addr#0 screenlayer::vera_layer_get_height1_config#0 ]
reg byte a [ vera_layer_get_mapbase_bank::return#0 ]
reg byte a [ vera_layer_get_mapbase_offset::$0 ]
reg byte a [ vera_layer_get_rowshift::return#0 ]
@ -618,29 +591,29 @@ reg byte a [ cputc::$4 ]
reg byte a [ cputc::$5 ]
reg byte a [ cputc::$6 ]
reg byte a [ cputc::scroll_enable#0 ]
zp[2]:65 [ cputc::$16 ]
zp[2]:47 [ cputc::$16 memcpy_in_vram::i#2 memcpy_in_vram::i#1 clearline::c#2 clearline::c#1 ]
reg byte a [ ultoa::$11 ]
reg byte a [ ultoa::$10 ]
zp[4]:67 [ ultoa::digit_value#0 ultoa_append::sub#0 ]
zp[4]:49 [ ultoa::digit_value#0 ultoa_append::sub#0 ]
reg byte x [ uctoa_append::return#0 ]
reg byte a [ utoa::$11 ]
reg byte x [ utoa::$11 ]
reg byte a [ utoa::$10 ]
zp[2]:71 [ utoa::digit_value#0 utoa_append::sub#0 cputc::conio_addr#0 cputc::conio_addr#1 ]
zp[2]:73 [ vera_layer_set_config::addr#0 screenlayer::vera_layer_get_height1_return#0 screenlayer::vera_layer_get_height1_return#1 screenlayer::$5 ]
zp[2]:75 [ vera_layer_set_tilebase::addr#0 screenlayer::vera_layer_get_width1_config#0 vera_layer_get_mapbase_offset::return#2 vera_layer_get_mapbase_offset::return#0 ]
zp[2]:53 [ utoa::digit_value#0 utoa_append::sub#0 cputc::conio_addr#0 cputc::conio_addr#1 ]
zp[2]:55 [ vera_layer_set_config::addr#0 screenlayer::vera_layer_get_height1_return#0 screenlayer::vera_layer_get_height1_return#1 screenlayer::$5 ]
zp[2]:57 [ vera_layer_set_tilebase::addr#0 screenlayer::vera_layer_get_width1_config#0 vera_layer_get_mapbase_offset::return#2 vera_layer_get_mapbase_offset::return#0 ]
reg byte a [ vera_layer_get_color::$3 ]
reg byte a [ vera_layer_get_color::$0 ]
reg byte a [ vera_layer_get_color::$1 ]
reg byte a [ cputln::$2 ]
zp[2]:77 [ cputln::temp#0 cputln::temp#1 vera_layer_get_color::addr#0 ]
zp[2]:59 [ cputln::temp#0 cputln::temp#1 vera_layer_get_color::addr#0 ]
reg byte a [ cputln::$3 ]
zp[1]:79 [ insertup::cy#0 uctoa::digit_value#0 uctoa_append::sub#0 ]
zp[1]:80 [ insertup::width#0 ]
zp[1]:61 [ insertup::cy#0 uctoa::digit_value#0 uctoa_append::sub#0 ]
zp[1]:62 [ insertup::width#0 ]
reg byte a [ insertup::$3 ]
zp[2]:81 [ insertup::line#0 insertup::start#0 memcpy_in_vram::dest#0 ]
zp[2]:83 [ memcpy_in_vram::num#0 ]
zp[2]:63 [ insertup::line#0 insertup::start#0 memcpy_in_vram::dest#0 ]
zp[2]:65 [ memcpy_in_vram::num#0 ]
reg byte a [ clearline::$5 ]
zp[2]:85 [ clearline::addr#0 memcpy_in_vram::src#0 ]
zp[2]:67 [ clearline::addr#0 memcpy_in_vram::src#0 ]
reg byte a [ clearline::$1 ]
reg byte a [ clearline::$2 ]
reg byte a [ vera_layer_get_color::return#4 ]

211
src/test/ref/examples/cx16/cx16-bankload.asm
View File

@ -191,7 +191,7 @@ main: {
.label BANK_SPRITE = $12000
// VRAM address of sprite
.label VRAM_SPRITE = $10000
.label SPRITE_ATTR = $43
.label SPRITE_ATTR = $3f
// vera_layer_set_text_color_mode( 1, VERA_LAYER_CONFIG_16C )
lda #1
jsr vera_layer_set_text_color_mode
@ -201,7 +201,7 @@ main: {
jsr clrscr
// printf("\n\nsprite banked file load and display demo.\n")
jsr cputs
// struct VERA_SPRITE SPRITE_ATTR = { <(VRAM_SPRITE/32)|VERA_SPRITE_8BPP, 320-32, 240-32, 0x0c, 0xf1 }
// struct VERA_SPRITE SPRITE_ATTR = { WORD0(VRAM_SPRITE/32)|VERA_SPRITE_8BPP, 320-32, 240-32, 0x0c, 0xf1 }
ldy #SIZEOF_STRUCT_VERA_SPRITE
!:
lda __0-1,y
@ -260,7 +260,7 @@ main: {
lda #>VRAM_SPRITE>>$10
sta.z memcpy_bank_to_vram.vdest+3
jsr memcpy_bank_to_vram
// SPRITE_ATTR.ADDR = <(VRAM_SPRITE/32)|VERA_SPRITE_4BPP
// SPRITE_ATTR.ADDR = WORD0(VRAM_SPRITE/32)|VERA_SPRITE_4BPP
lda #<VRAM_SPRITE/$20&$ffff
sta.z SPRITE_ATTR
lda #>VRAM_SPRITE/$20&$ffff
@ -275,7 +275,7 @@ main: {
sta SPRITE_ATTR+OFFSET_STRUCT_VERA_SPRITE_Y+1
lda #<$64
sta SPRITE_ATTR+OFFSET_STRUCT_VERA_SPRITE_Y
// memcpy_to_vram((char)>VERA_SPRITE_ATTR, (char*)<VERA_SPRITE_ATTR, &SPRITE_ATTR, sizeof(SPRITE_ATTR))
// memcpy_to_vram(BYTE2(VERA_SPRITE_ATTR), (char*)WORD0(VERA_SPRITE_ATTR), &SPRITE_ATTR, sizeof(SPRITE_ATTR))
jsr memcpy_to_vram
// *VERA_CTRL &= ~VERA_DCSEL
// Enable sprites
@ -640,14 +640,14 @@ clrscr: {
lda #VERA_ADDRSEL^$ff
and VERA_CTRL
sta VERA_CTRL
// <ch
// BYTE0(ch)
lda.z line_text
// *VERA_ADDRX_L = <ch
// *VERA_ADDRX_L = BYTE0(ch)
// Set address
sta VERA_ADDRX_L
// >ch
// BYTE1(ch)
lda.z line_text+1
// *VERA_ADDRX_M = >ch
// *VERA_ADDRX_M = BYTE1(ch)
sta VERA_ADDRX_M
// CONIO_SCREEN_BANK | VERA_INC_1
lda #VERA_INC_1
@ -717,7 +717,7 @@ cputs: {
// Note: This function only works if the entire file fits within the selected bank. The function cannot load to multiple banks.
load_to_bank: {
.const device = 8
.const bank = ((>((main.BANK_SPRITE&$ffff)))>>5)+(<((main.BANK_SPRITE>>$10)<<3))
.const bank = (<main.BANK_SPRITE>>$10)<<3|(>main.BANK_SPRITE)>>5
// setnam(filename)
lda #<main.filename
sta.z setnam.filename
@ -750,20 +750,8 @@ load_to_bank: {
// Note: This function can switch RAM bank during copying to copy data from multiple RAM banks.
// memcpy_bank_to_vram(dword zp(3) vdest, dword zp(7) num)
memcpy_bank_to_vram: {
.label __0 = $2b
.label __2 = $2d
.label __4 = $35
.label __7 = $37
.label __8 = $37
.label __10 = $3b
.label __12 = $3d
.label __13 = $3d
.label __14 = $3f
.label __15 = $3f
.label __17 = $3d
.label __18 = $f
.label __23 = $3d
.label __24 = $41
.label __5 = $37
.label __9 = $f
.label beg = $b
.label end = 7
// select the bank
@ -776,32 +764,18 @@ memcpy_bank_to_vram: {
lda #VERA_ADDRSEL^$ff
and VERA_CTRL
sta VERA_CTRL
// <vdest
// BYTE0(vdest)
lda.z vdest
sta.z __0
lda.z vdest+1
sta.z __0+1
// <(<vdest)
lda.z __0
// *VERA_ADDRX_L = <(<vdest)
// *VERA_ADDRX_L = BYTE0(vdest)
// Set address
sta VERA_ADDRX_L
// <vdest
lda.z vdest
sta.z __2
// BYTE1(vdest)
lda.z vdest+1
sta.z __2+1
// >(<vdest)
// *VERA_ADDRX_M = >(<vdest)
// *VERA_ADDRX_M = BYTE1(vdest)
sta VERA_ADDRX_M
// >vdest
// BYTE2(vdest)
lda.z vdest+2
sta.z __4
lda.z vdest+3
sta.z __4+1
// <(>vdest)
lda.z __4
// *VERA_ADDRX_H = <(>vdest)
// *VERA_ADDRX_H = BYTE2(vdest)
sta VERA_ADDRX_H
// *VERA_ADDRX_H |= VERA_INC_1
lda #VERA_INC_1
@ -821,77 +795,30 @@ memcpy_bank_to_vram: {
lda.z end+3
adc.z beg+3
sta.z end+3
// >beg
// BYTE2(beg)
lda.z beg+2
sta.z __7
lda.z beg+3
sta.z __7+1
// (>beg)<<8
lda.z __8
sta.z __8+1
lda #0
sta.z __8
// <(>beg)<<8
tay
// <beg
lda.z beg
sta.z __10
// BYTE2(beg)<<3
asl
asl
asl
sta.z __5
// BYTE1(beg)
lda.z beg+1
sta.z __10+1
// >(<beg)
// BYTE1(beg)>>5
lsr
lsr
lsr
lsr
lsr
// char bank = BYTE2(beg)<<3 | BYTE1(beg)>>5
ora.z __5
tax
// ((word)<(>beg)<<8)|>(<beg)
tya
sta.z __23
sta.z __23+1
txa
ora.z __12
sta.z __12
// (((word)<(>beg)<<8)|>(<beg))>>5
lsr.z __13+1
ror.z __13
lsr.z __13+1
ror.z __13
lsr.z __13+1
ror.z __13
lsr.z __13+1
ror.z __13
lsr.z __13+1
ror.z __13
// >beg
lda.z beg+2
sta.z __14
lda.z beg+3
sta.z __14+1
// (>beg)<<3
asl.z __15
rol.z __15+1
asl.z __15
rol.z __15+1
asl.z __15
rol.z __15+1
// <(>beg)<<3
lda.z __15
// ((((word)<(>beg)<<8)|>(<beg))>>5)+((word)<(>beg)<<3)
sta.z __24
tya
sta.z __24+1
lda.z __17
clc
adc.z __24
sta.z __17
lda.z __17+1
adc.z __24+1
sta.z __17+1
// char bank = (byte)(((((word)<(>beg)<<8)|>(<beg))>>5)+((word)<(>beg)<<3))
lda.z __17
tax
// <beg
// WORD0(beg)
lda.z beg
sta.z __18
sta.z __9
lda.z beg+1
sta.z __18+1
// (<beg)&0x1FFF
sta.z __9+1
// WORD0(beg)&0x1FFF
lda.z addr
and #<$1fff
sta.z addr
@ -974,7 +901,7 @@ memcpy_bank_to_vram: {
// - src: The source address in RAM
// - num: The number of bytes to copy
memcpy_to_vram: {
.const vbank = VERA_SPRITE_ATTR>>$10
.const vbank = <VERA_SPRITE_ATTR>>$10
.label vdest = VERA_SPRITE_ATTR&$ffff
.label src = main.SPRITE_ATTR
.label end = src+SIZEOF_STRUCT_VERA_SPRITE
@ -984,11 +911,11 @@ memcpy_to_vram: {
lda #VERA_ADDRSEL^$ff
and VERA_CTRL
sta VERA_CTRL
// *VERA_ADDRX_L = <vdest
// *VERA_ADDRX_L = BYTE0(vdest)
// Set address
lda #0
sta VERA_ADDRX_L
// *VERA_ADDRX_M = >vdest
// *VERA_ADDRX_M = BYTE1(vdest)
lda #>vdest
sta VERA_ADDRX_M
// *VERA_ADDRX_H = VERA_INC_1 | vbank
@ -1052,12 +979,12 @@ vera_layer_mode_tile: {
sta vera_layer_rowskip+vera_layer_mode_text.layer*SIZEOF_WORD+1
// vera_layer_set_config(layer, config)
jsr vera_layer_set_config
// vera_mapbase_offset[layer] = <mapbase_address
// vera_mapbase_offset[layer] = WORD0(mapbase_address)
// mapbase
lda #<0
sta vera_mapbase_offset+vera_layer_mode_text.layer*SIZEOF_WORD
sta vera_mapbase_offset+vera_layer_mode_text.layer*SIZEOF_WORD+1
// vera_mapbase_bank[layer] = (byte)(>mapbase_address)
// vera_mapbase_bank[layer] = BYTE2(mapbase_address)
sta vera_mapbase_bank+vera_layer_mode_text.layer
// vera_mapbase_address[layer] = mapbase_address
lda #<vera_layer_mode_text.mapbase_address
@ -1072,13 +999,13 @@ vera_layer_mode_tile: {
ldx #mapbase
lda #vera_layer_mode_text.layer
jsr vera_layer_set_mapbase
// vera_tilebase_offset[layer] = <tilebase_address
// vera_tilebase_offset[layer] = WORD0(tilebase_address)
// tilebase
lda #<vera_layer_mode_text.tilebase_address&$ffff
sta vera_tilebase_offset+vera_layer_mode_text.layer*SIZEOF_WORD
lda #>vera_layer_mode_text.tilebase_address&$ffff
sta vera_tilebase_offset+vera_layer_mode_text.layer*SIZEOF_WORD+1
// vera_tilebase_bank[layer] = (byte)>tilebase_address
// vera_tilebase_bank[layer] = BYTE2(tilebase_address)
lda #0
sta vera_tilebase_bank+vera_layer_mode_text.layer
// vera_tilebase_address[layer] = tilebase_address
@ -1216,14 +1143,14 @@ cputc: {
lda #VERA_ADDRSEL^$ff
and VERA_CTRL
sta VERA_CTRL
// <conio_addr
// BYTE0(conio_addr)
lda.z conio_addr
// *VERA_ADDRX_L = <conio_addr
// *VERA_ADDRX_L = BYTE0(conio_addr)
// Set address
sta VERA_ADDRX_L
// >conio_addr
// BYTE1(conio_addr)
lda.z conio_addr+1
// *VERA_ADDRX_M = >conio_addr
// *VERA_ADDRX_M = BYTE1(conio_addr)
sta VERA_ADDRX_M
// CONIO_SCREEN_BANK | VERA_INC_1
lda #VERA_INC_1
@ -1364,7 +1291,7 @@ vera_layer_set_tilebase: {
lda vera_layer_tilebase+vera_layer_mode_text.layer*SIZEOF_POINTER+1
sta.z addr+1
// *addr = tilebase
lda #(>(vera_layer_mode_tile.tilebase_address&$ffff))&VERA_LAYER_TILEBASE_MASK
lda #(>vera_layer_mode_tile.tilebase_address)&VERA_LAYER_TILEBASE_MASK
ldy #0
sta (addr),y
// }
@ -1410,7 +1337,7 @@ vera_layer_get_color: {
}
// Print a newline
cputln: {
.label temp = $37
.label temp = $35
// word temp = conio_line_text[conio_screen_layer]
lda.z conio_screen_layer
asl
@ -1508,10 +1435,10 @@ cscroll: {
}
// Insert a new line, and scroll the upper part of the screen up.
insertup: {
.label cy = $39
.label width = $3a
.label line = $3b
.label start = $3b
.label cy = $37
.label width = $38
.label line = $39
.label start = $39
// unsigned byte cy = conio_cursor_y[conio_screen_layer]
ldy.z conio_screen_layer
lda conio_cursor_y,y
@ -1576,7 +1503,7 @@ insertup: {
jmp __b1
}
clearline: {
.label addr = $41
.label addr = $3d
.label c = $2b
// *VERA_CTRL &= ~VERA_ADDRSEL
// Select DATA0
@ -1595,13 +1522,13 @@ clearline: {
lda.z CONIO_SCREEN_TEXT+1
adc conio_line_text+1,y
sta.z addr+1
// <addr
// BYTE0(addr)
lda.z addr
// *VERA_ADDRX_L = <addr
// *VERA_ADDRX_L = BYTE0(addr)
sta VERA_ADDRX_L
// >addr
// BYTE1(addr)
lda.z addr+1
// *VERA_ADDRX_M = >addr
// *VERA_ADDRX_M = BYTE1(addr)
sta VERA_ADDRX_M
// *VERA_ADDRX_H = VERA_INC_1
lda #VERA_INC_1
@ -1653,25 +1580,25 @@ clearline: {
// - dest: pointer to the location to copy to. Note that the address is a 16 bit value!
// - dest_increment: the increment indicator, VERA needs this because addressing increment is automated by VERA at each access.
// - num: The number of bytes to copy
// memcpy_in_vram(void* zp($3b) dest, byte* zp($3d) src, word zp($3f) num)
// memcpy_in_vram(void* zp($39) dest, byte* zp($3d) src, word zp($3b) num)
memcpy_in_vram: {
.label i = $2d
.label dest = $3b
.label dest = $39
.label src = $3d
.label num = $3f
.label num = $3b
// *VERA_CTRL &= ~VERA_ADDRSEL
// Select DATA0
lda #VERA_ADDRSEL^$ff
and VERA_CTRL
sta VERA_CTRL
// <src
// BYTE0(src)
lda.z src
// *VERA_ADDRX_L = <src
// *VERA_ADDRX_L = BYTE0(src)
// Set address
sta VERA_ADDRX_L
// >src
// BYTE1(src)
lda.z src+1
// *VERA_ADDRX_M = >src
// *VERA_ADDRX_M = BYTE1(src)
sta VERA_ADDRX_M
// *VERA_ADDRX_H = src_increment | src_bank
lda #VERA_INC_1
@ -1681,14 +1608,14 @@ memcpy_in_vram: {
lda #VERA_ADDRSEL
ora VERA_CTRL
sta VERA_CTRL
// <dest
// BYTE0(dest)
lda.z dest
// *VERA_ADDRX_L = <dest
// *VERA_ADDRX_L = BYTE0(dest)
// Set address
sta VERA_ADDRX_L
// >dest
// BYTE1(dest)
lda.z dest+1
// *VERA_ADDRX_M = >dest
// *VERA_ADDRX_M = BYTE1(dest)
sta VERA_ADDRX_M
// *VERA_ADDRX_H = dest_increment | dest_bank
lda #VERA_INC_1

412
src/test/ref/examples/cx16/cx16-bankload.cfg
View File

@ -95,7 +95,7 @@ main::@6: scope:[main] from main::@5
[45] call memcpy_bank_to_vram
to:main::@7
main::@7: scope:[main] from main::@6
[46] *((word*)&main::SPRITE_ATTR) = <main::VRAM_SPRITE/$20
[46] *((word*)&main::SPRITE_ATTR) = _word0_main::VRAM_SPRITE/$20
[47] *((word*)&main::SPRITE_ATTR+OFFSET_STRUCT_VERA_SPRITE_X) = $64
[48] *((word*)&main::SPRITE_ATTR+OFFSET_STRUCT_VERA_SPRITE_Y) = $64
[49] call memcpy_to_vram
@ -366,224 +366,212 @@ memcpy_bank_to_vram: scope:[memcpy_bank_to_vram] from main::@5 main::@6
[182] memcpy_bank_to_vram::vdest#2 = phi( main::@5/VERA_PALETTE+$20, main::@6/main::VRAM_SPRITE )
[183] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[184] memcpy_bank_to_vram::$0 = < memcpy_bank_to_vram::vdest#2
[185] memcpy_bank_to_vram::$1 = < memcpy_bank_to_vram::$0
[186] *VERA_ADDRX_L = memcpy_bank_to_vram::$1
[187] memcpy_bank_to_vram::$2 = < memcpy_bank_to_vram::vdest#2
[188] memcpy_bank_to_vram::$3 = > memcpy_bank_to_vram::$2
[189] *VERA_ADDRX_M = memcpy_bank_to_vram::$3
[190] memcpy_bank_to_vram::$4 = > memcpy_bank_to_vram::vdest#2
[191] memcpy_bank_to_vram::$5 = < memcpy_bank_to_vram::$4
[192] *VERA_ADDRX_H = memcpy_bank_to_vram::$5
[193] *VERA_ADDRX_H = *VERA_ADDRX_H | VERA_INC_1
[194] memcpy_bank_to_vram::end#0 = memcpy_bank_to_vram::beg#0 + memcpy_bank_to_vram::num#2
[195] memcpy_bank_to_vram::$7 = > memcpy_bank_to_vram::beg#0
[196] memcpy_bank_to_vram::$8 = memcpy_bank_to_vram::$7 << 8
[197] memcpy_bank_to_vram::$9 = < memcpy_bank_to_vram::$8
[198] memcpy_bank_to_vram::$10 = < memcpy_bank_to_vram::beg#0
[199] memcpy_bank_to_vram::$11 = > memcpy_bank_to_vram::$10
[200] memcpy_bank_to_vram::$23 = (word)memcpy_bank_to_vram::$9
[201] memcpy_bank_to_vram::$12 = memcpy_bank_to_vram::$23 | memcpy_bank_to_vram::$11
[202] memcpy_bank_to_vram::$13 = memcpy_bank_to_vram::$12 >> 5
[203] memcpy_bank_to_vram::$14 = > memcpy_bank_to_vram::beg#0
[204] memcpy_bank_to_vram::$15 = memcpy_bank_to_vram::$14 << 3
[205] memcpy_bank_to_vram::$16 = < memcpy_bank_to_vram::$15
[206] memcpy_bank_to_vram::$24 = (word)memcpy_bank_to_vram::$16
[207] memcpy_bank_to_vram::$17 = memcpy_bank_to_vram::$13 + memcpy_bank_to_vram::$24
[208] memcpy_bank_to_vram::bank#0 = (byte)memcpy_bank_to_vram::$17
[209] memcpy_bank_to_vram::$18 = < memcpy_bank_to_vram::beg#0
[210] memcpy_bank_to_vram::addr#0 = memcpy_bank_to_vram::$18 & $1fff
[211] memcpy_bank_to_vram::addr#1 = (byte*)memcpy_bank_to_vram::addr#0 + $a000
[212] *((byte*)VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A) = memcpy_bank_to_vram::bank#0
[185] *VERA_ADDRX_L = memcpy_bank_to_vram::$0
[186] memcpy_bank_to_vram::$1 = > memcpy_bank_to_vram::vdest#2
[187] *VERA_ADDRX_M = memcpy_bank_to_vram::$1
[188] memcpy_bank_to_vram::$2 = _byte2_ memcpy_bank_to_vram::vdest#2
[189] *VERA_ADDRX_H = memcpy_bank_to_vram::$2
[190] *VERA_ADDRX_H = *VERA_ADDRX_H | VERA_INC_1
[191] memcpy_bank_to_vram::end#0 = memcpy_bank_to_vram::beg#0 + memcpy_bank_to_vram::num#2
[192] memcpy_bank_to_vram::$4 = _byte2_ memcpy_bank_to_vram::beg#0
[193] memcpy_bank_to_vram::$5 = memcpy_bank_to_vram::$4 << 3
[194] memcpy_bank_to_vram::$6 = > memcpy_bank_to_vram::beg#0
[195] memcpy_bank_to_vram::$7 = memcpy_bank_to_vram::$6 >> 5
[196] memcpy_bank_to_vram::bank#0 = memcpy_bank_to_vram::$5 | memcpy_bank_to_vram::$7
[197] memcpy_bank_to_vram::$9 = _word0_ memcpy_bank_to_vram::beg#0
[198] memcpy_bank_to_vram::addr#0 = memcpy_bank_to_vram::$9 & $1fff
[199] memcpy_bank_to_vram::addr#1 = (byte*)memcpy_bank_to_vram::addr#0 + $a000
[200] *((byte*)VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A) = memcpy_bank_to_vram::bank#0
to:memcpy_bank_to_vram::@1
memcpy_bank_to_vram::@1: scope:[memcpy_bank_to_vram] from memcpy_bank_to_vram memcpy_bank_to_vram::@3
[213] memcpy_bank_to_vram::bank#2 = phi( memcpy_bank_to_vram/memcpy_bank_to_vram::bank#0, memcpy_bank_to_vram::@3/memcpy_bank_to_vram::bank#5 )
[213] memcpy_bank_to_vram::addr#4 = phi( memcpy_bank_to_vram/memcpy_bank_to_vram::addr#1, memcpy_bank_to_vram::@3/memcpy_bank_to_vram::addr#2 )
[213] memcpy_bank_to_vram::pos#2 = phi( memcpy_bank_to_vram/memcpy_bank_to_vram::beg#0, memcpy_bank_to_vram::@3/memcpy_bank_to_vram::pos#1 )
[214] if(memcpy_bank_to_vram::pos#2<memcpy_bank_to_vram::end#0) goto memcpy_bank_to_vram::@2
[201] memcpy_bank_to_vram::bank#2 = phi( memcpy_bank_to_vram/memcpy_bank_to_vram::bank#0, memcpy_bank_to_vram::@3/memcpy_bank_to_vram::bank#5 )
[201] memcpy_bank_to_vram::addr#4 = phi( memcpy_bank_to_vram/memcpy_bank_to_vram::addr#1, memcpy_bank_to_vram::@3/memcpy_bank_to_vram::addr#2 )
[201] memcpy_bank_to_vram::pos#2 = phi( memcpy_bank_to_vram/memcpy_bank_to_vram::beg#0, memcpy_bank_to_vram::@3/memcpy_bank_to_vram::pos#1 )
[202] if(memcpy_bank_to_vram::pos#2<memcpy_bank_to_vram::end#0) goto memcpy_bank_to_vram::@2
to:memcpy_bank_to_vram::@return
memcpy_bank_to_vram::@return: scope:[memcpy_bank_to_vram] from memcpy_bank_to_vram::@1
[215] return
[203] return
to:@return
memcpy_bank_to_vram::@2: scope:[memcpy_bank_to_vram] from memcpy_bank_to_vram::@1
[216] if(memcpy_bank_to_vram::addr#4!=$c000) goto memcpy_bank_to_vram::@3
[204] if(memcpy_bank_to_vram::addr#4!=$c000) goto memcpy_bank_to_vram::@3
to:memcpy_bank_to_vram::@4
memcpy_bank_to_vram::@4: scope:[memcpy_bank_to_vram] from memcpy_bank_to_vram::@2
[217] memcpy_bank_to_vram::bank#1 = ++ memcpy_bank_to_vram::bank#2
[218] *((byte*)VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A) = memcpy_bank_to_vram::bank#1
[205] memcpy_bank_to_vram::bank#1 = ++ memcpy_bank_to_vram::bank#2
[206] *((byte*)VIA1+OFFSET_STRUCT_MOS6522_VIA_PORT_A) = memcpy_bank_to_vram::bank#1
to:memcpy_bank_to_vram::@3
memcpy_bank_to_vram::@3: scope:[memcpy_bank_to_vram] from memcpy_bank_to_vram::@2 memcpy_bank_to_vram::@4
[219] memcpy_bank_to_vram::bank#5 = phi( memcpy_bank_to_vram::@2/memcpy_bank_to_vram::bank#2, memcpy_bank_to_vram::@4/memcpy_bank_to_vram::bank#1 )
[219] memcpy_bank_to_vram::addr#5 = phi( memcpy_bank_to_vram::@2/memcpy_bank_to_vram::addr#4, memcpy_bank_to_vram::@4/(byte*) 40960 )
[220] *VERA_DATA0 = *memcpy_bank_to_vram::addr#5
[221] memcpy_bank_to_vram::addr#2 = ++ memcpy_bank_to_vram::addr#5
[222] memcpy_bank_to_vram::pos#1 = ++ memcpy_bank_to_vram::pos#2
[207] memcpy_bank_to_vram::bank#5 = phi( memcpy_bank_to_vram::@2/memcpy_bank_to_vram::bank#2, memcpy_bank_to_vram::@4/memcpy_bank_to_vram::bank#1 )
[207] memcpy_bank_to_vram::addr#5 = phi( memcpy_bank_to_vram::@2/memcpy_bank_to_vram::addr#4, memcpy_bank_to_vram::@4/(byte*) 40960 )
[208] *VERA_DATA0 = *memcpy_bank_to_vram::addr#5
[209] memcpy_bank_to_vram::addr#2 = ++ memcpy_bank_to_vram::addr#5
[210] memcpy_bank_to_vram::pos#1 = ++ memcpy_bank_to_vram::pos#2
to:memcpy_bank_to_vram::@1
void memcpy_to_vram(byte memcpy_to_vram::vbank , void* memcpy_to_vram::vdest , void* memcpy_to_vram::src , word memcpy_to_vram::num)
memcpy_to_vram: scope:[memcpy_to_vram] from main::@7
[223] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[224] *VERA_ADDRX_L = 0
[225] *VERA_ADDRX_M = >memcpy_to_vram::vdest#0
[226] *VERA_ADDRX_H = VERA_INC_1|memcpy_to_vram::vbank#0
[211] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[212] *VERA_ADDRX_L = 0
[213] *VERA_ADDRX_M = >memcpy_to_vram::vdest#0
[214] *VERA_ADDRX_H = VERA_INC_1|memcpy_to_vram::vbank#0
to:memcpy_to_vram::@1
memcpy_to_vram::@1: scope:[memcpy_to_vram] from memcpy_to_vram memcpy_to_vram::@2
[227] memcpy_to_vram::s#2 = phi( memcpy_to_vram/(byte*)memcpy_to_vram::src#0, memcpy_to_vram::@2/memcpy_to_vram::s#1 )
[228] if(memcpy_to_vram::s#2!=memcpy_to_vram::end#0) goto memcpy_to_vram::@2
[215] memcpy_to_vram::s#2 = phi( memcpy_to_vram/(byte*)memcpy_to_vram::src#0, memcpy_to_vram::@2/memcpy_to_vram::s#1 )
[216] if(memcpy_to_vram::s#2!=memcpy_to_vram::end#0) goto memcpy_to_vram::@2
to:memcpy_to_vram::@return
memcpy_to_vram::@return: scope:[memcpy_to_vram] from memcpy_to_vram::@1
[229] return
[217] return
to:@return
memcpy_to_vram::@2: scope:[memcpy_to_vram] from memcpy_to_vram::@1
[230] *VERA_DATA0 = *memcpy_to_vram::s#2
[231] memcpy_to_vram::s#1 = ++ memcpy_to_vram::s#2
[218] *VERA_DATA0 = *memcpy_to_vram::s#2
[219] memcpy_to_vram::s#1 = ++ memcpy_to_vram::s#2
to:memcpy_to_vram::@1
void vera_layer_mode_tile(byte vera_layer_mode_tile::layer , dword vera_layer_mode_tile::mapbase_address , dword vera_layer_mode_tile::tilebase_address , word vera_layer_mode_tile::mapwidth , word vera_layer_mode_tile::mapheight , byte vera_layer_mode_tile::tilewidth , byte vera_layer_mode_tile::tileheight , byte vera_layer_mode_tile::color_depth)
vera_layer_mode_tile: scope:[vera_layer_mode_tile] from vera_layer_mode_text
[232] phi()
[220] phi()
to:vera_layer_mode_tile::@1
vera_layer_mode_tile::@1: scope:[vera_layer_mode_tile] from vera_layer_mode_tile
[233] *(vera_layer_rowshift+vera_layer_mode_text::layer#0) = 8
[234] *(vera_layer_rowskip+vera_layer_mode_text::layer#0*SIZEOF_WORD) = $100
[221] *(vera_layer_rowshift+vera_layer_mode_text::layer#0) = 8
[222] *(vera_layer_rowskip+vera_layer_mode_text::layer#0*SIZEOF_WORD) = $100
to:vera_layer_mode_tile::@2
vera_layer_mode_tile::@2: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@1
[235] phi()
[236] call vera_layer_set_config
[223] phi()
[224] call vera_layer_set_config
to:vera_layer_mode_tile::@4
vera_layer_mode_tile::@4: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@2
[237] *(vera_mapbase_offset+vera_layer_mode_text::layer#0*SIZEOF_WORD) = 0
[238] *(vera_mapbase_bank+vera_layer_mode_text::layer#0) = 0
[239] *(vera_mapbase_address+vera_layer_mode_text::layer#0*SIZEOF_DWORD) = vera_layer_mode_text::mapbase_address#0
[240] call vera_layer_set_mapbase
[225] *(vera_mapbase_offset+vera_layer_mode_text::layer#0*SIZEOF_WORD) = 0
[226] *(vera_mapbase_bank+vera_layer_mode_text::layer#0) = 0
[227] *(vera_mapbase_address+vera_layer_mode_text::layer#0*SIZEOF_DWORD) = vera_layer_mode_text::mapbase_address#0
[228] call vera_layer_set_mapbase
to:vera_layer_mode_tile::@5
vera_layer_mode_tile::@5: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@4
[241] *(vera_tilebase_offset+vera_layer_mode_text::layer#0*SIZEOF_WORD) = <vera_layer_mode_text::tilebase_address#0
[242] *(vera_tilebase_bank+vera_layer_mode_text::layer#0) = 0
[243] *(vera_tilebase_address+vera_layer_mode_text::layer#0*SIZEOF_DWORD) = vera_layer_mode_text::tilebase_address#0
[229] *(vera_tilebase_offset+vera_layer_mode_text::layer#0*SIZEOF_WORD) = _word0_vera_layer_mode_text::tilebase_address#0
[230] *(vera_tilebase_bank+vera_layer_mode_text::layer#0) = 0
[231] *(vera_tilebase_address+vera_layer_mode_text::layer#0*SIZEOF_DWORD) = vera_layer_mode_text::tilebase_address#0
to:vera_layer_mode_tile::@3
vera_layer_mode_tile::@3: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@5
[244] phi()
[245] call vera_layer_set_tilebase
[232] phi()
[233] call vera_layer_set_tilebase
to:vera_layer_mode_tile::@return
vera_layer_mode_tile::@return: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@3
[246] return
[234] return
to:@return
byte vera_layer_get_mapbase_bank(byte vera_layer_get_mapbase_bank::layer)
vera_layer_get_mapbase_bank: scope:[vera_layer_get_mapbase_bank] from screenlayer
[247] vera_layer_get_mapbase_bank::return#0 = vera_mapbase_bank[vera_layer_get_mapbase_bank::layer#0]
[235] vera_layer_get_mapbase_bank::return#0 = vera_mapbase_bank[vera_layer_get_mapbase_bank::layer#0]
to:vera_layer_get_mapbase_bank::@return
vera_layer_get_mapbase_bank::@return: scope:[vera_layer_get_mapbase_bank] from vera_layer_get_mapbase_bank
[248] return
[236] return
to:@return
word vera_layer_get_mapbase_offset(byte vera_layer_get_mapbase_offset::layer)
vera_layer_get_mapbase_offset: scope:[vera_layer_get_mapbase_offset] from screenlayer::@3
[249] vera_layer_get_mapbase_offset::$0 = vera_layer_get_mapbase_offset::layer#0 << 1
[250] vera_layer_get_mapbase_offset::return#0 = vera_mapbase_offset[vera_layer_get_mapbase_offset::$0]
[237] vera_layer_get_mapbase_offset::$0 = vera_layer_get_mapbase_offset::layer#0 << 1
[238] vera_layer_get_mapbase_offset::return#0 = vera_mapbase_offset[vera_layer_get_mapbase_offset::$0]
to:vera_layer_get_mapbase_offset::@return
vera_layer_get_mapbase_offset::@return: scope:[vera_layer_get_mapbase_offset] from vera_layer_get_mapbase_offset
[251] return
[239] return
to:@return
byte vera_layer_get_rowshift(byte vera_layer_get_rowshift::layer)
vera_layer_get_rowshift: scope:[vera_layer_get_rowshift] from screenlayer::@1
[252] vera_layer_get_rowshift::return#0 = vera_layer_rowshift[vera_layer_get_rowshift::layer#0]
[240] vera_layer_get_rowshift::return#0 = vera_layer_rowshift[vera_layer_get_rowshift::layer#0]
to:vera_layer_get_rowshift::@return
vera_layer_get_rowshift::@return: scope:[vera_layer_get_rowshift] from vera_layer_get_rowshift
[253] return
[241] return
to:@return
word vera_layer_get_rowskip(byte vera_layer_get_rowskip::layer)
vera_layer_get_rowskip: scope:[vera_layer_get_rowskip] from screenlayer::@5
[254] vera_layer_get_rowskip::$0 = vera_layer_get_rowskip::layer#0 << 1
[255] vera_layer_get_rowskip::return#0 = vera_layer_rowskip[vera_layer_get_rowskip::$0]
[242] vera_layer_get_rowskip::$0 = vera_layer_get_rowskip::layer#0 << 1
[243] vera_layer_get_rowskip::return#0 = vera_layer_rowskip[vera_layer_get_rowskip::$0]
to:vera_layer_get_rowskip::@return
vera_layer_get_rowskip::@return: scope:[vera_layer_get_rowskip] from vera_layer_get_rowskip
[256] return
[244] return
to:@return
byte vera_layer_get_backcolor(byte vera_layer_get_backcolor::layer)
vera_layer_get_backcolor: scope:[vera_layer_get_backcolor] from clrscr
[257] vera_layer_get_backcolor::return#0 = vera_layer_backcolor[vera_layer_get_backcolor::layer#0]
[245] vera_layer_get_backcolor::return#0 = vera_layer_backcolor[vera_layer_get_backcolor::layer#0]
to:vera_layer_get_backcolor::@return
vera_layer_get_backcolor::@return: scope:[vera_layer_get_backcolor] from vera_layer_get_backcolor
[258] return
[246] return
to:@return
byte vera_layer_get_textcolor(byte vera_layer_get_textcolor::layer)
vera_layer_get_textcolor: scope:[vera_layer_get_textcolor] from clrscr::@7
[259] vera_layer_get_textcolor::return#0 = vera_layer_textcolor[vera_layer_get_textcolor::layer#0]
[247] vera_layer_get_textcolor::return#0 = vera_layer_textcolor[vera_layer_get_textcolor::layer#0]
to:vera_layer_get_textcolor::@return
vera_layer_get_textcolor::@return: scope:[vera_layer_get_textcolor] from vera_layer_get_textcolor
[260] return
[248] return
to:@return
void cputc(byte cputc::c)
cputc: scope:[cputc] from cputs::@2
[261] vera_layer_get_color::layer#0 = conio_screen_layer
[262] call vera_layer_get_color
[263] vera_layer_get_color::return#3 = vera_layer_get_color::return#2
[249] vera_layer_get_color::layer#0 = conio_screen_layer
[250] call vera_layer_get_color
[251] vera_layer_get_color::return#3 = vera_layer_get_color::return#2
to:cputc::@7
cputc::@7: scope:[cputc] from cputc
[264] cputc::color#0 = vera_layer_get_color::return#3
[265] cputc::$15 = conio_screen_layer << 1
[266] cputc::conio_addr#0 = (byte*)CONIO_SCREEN_TEXT#16 + conio_line_text[cputc::$15]
[267] cputc::$2 = conio_cursor_x[conio_screen_layer] << 1
[268] cputc::conio_addr#1 = cputc::conio_addr#0 + cputc::$2
[269] if(cputc::c#0=='
[252] cputc::color#0 = vera_layer_get_color::return#3
[253] cputc::$15 = conio_screen_layer << 1
[254] cputc::conio_addr#0 = (byte*)CONIO_SCREEN_TEXT#16 + conio_line_text[cputc::$15]
[255] cputc::$2 = conio_cursor_x[conio_screen_layer] << 1
[256] cputc::conio_addr#1 = cputc::conio_addr#0 + cputc::$2
[257] if(cputc::c#0=='
') goto cputc::@1
to:cputc::@2
cputc::@2: scope:[cputc] from cputc::@7
[270] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[271] cputc::$4 = < cputc::conio_addr#1
[272] *VERA_ADDRX_L = cputc::$4
[273] cputc::$5 = > cputc::conio_addr#1
[274] *VERA_ADDRX_M = cputc::$5
[275] cputc::$6 = CONIO_SCREEN_BANK#14 | VERA_INC_1
[276] *VERA_ADDRX_H = cputc::$6
[277] *VERA_DATA0 = cputc::c#0
[278] *VERA_DATA0 = cputc::color#0
[279] conio_cursor_x[conio_screen_layer] = ++ conio_cursor_x[conio_screen_layer]
[280] cputc::scroll_enable#0 = conio_scroll_enable[conio_screen_layer]
[281] if(0!=cputc::scroll_enable#0) goto cputc::@5
[258] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[259] cputc::$4 = < cputc::conio_addr#1
[260] *VERA_ADDRX_L = cputc::$4
[261] cputc::$5 = > cputc::conio_addr#1
[262] *VERA_ADDRX_M = cputc::$5
[263] cputc::$6 = CONIO_SCREEN_BANK#14 | VERA_INC_1
[264] *VERA_ADDRX_H = cputc::$6
[265] *VERA_DATA0 = cputc::c#0
[266] *VERA_DATA0 = cputc::color#0
[267] conio_cursor_x[conio_screen_layer] = ++ conio_cursor_x[conio_screen_layer]
[268] cputc::scroll_enable#0 = conio_scroll_enable[conio_screen_layer]
[269] if(0!=cputc::scroll_enable#0) goto cputc::@5
to:cputc::@3
cputc::@3: scope:[cputc] from cputc::@2
[282] cputc::$16 = (word)conio_cursor_x[conio_screen_layer]
[283] if(cputc::$16!=conio_width) goto cputc::@return
[270] cputc::$16 = (word)conio_cursor_x[conio_screen_layer]
[271] if(cputc::$16!=conio_width) goto cputc::@return
to:cputc::@4
cputc::@4: scope:[cputc] from cputc::@3
[284] phi()
[285] call cputln
[272] phi()
[273] call cputln
to:cputc::@return
cputc::@return: scope:[cputc] from cputc::@1 cputc::@3 cputc::@4 cputc::@5 cputc::@6
[286] return
[274] return
to:@return
cputc::@5: scope:[cputc] from cputc::@2
[287] if(conio_cursor_x[conio_screen_layer]!=conio_screen_width) goto cputc::@return
[275] if(conio_cursor_x[conio_screen_layer]!=conio_screen_width) goto cputc::@return
to:cputc::@6
cputc::@6: scope:[cputc] from cputc::@5
[288] phi()
[289] call cputln
[276] phi()
[277] call cputln
to:cputc::@return
cputc::@1: scope:[cputc] from cputc::@7
[290] phi()
[291] call cputln
[278] phi()
[279] call cputln
to:cputc::@return
void setnam(byte* volatile setnam::filename)
setnam: scope:[setnam] from load_to_bank
[292] strlen::str#0 = setnam::filename
[293] call strlen
[294] strlen::return#0 = strlen::len#2
[280] strlen::str#0 = setnam::filename
[281] call strlen
[282] strlen::return#0 = strlen::len#2
to:setnam::@1
setnam::@1: scope:[setnam] from setnam
[295] setnam::$0 = strlen::return#0
[296] setnam::filename_len = (byte)setnam::$0
[283] setnam::$0 = strlen::return#0
[284] setnam::filename_len = (byte)setnam::$0
asm { ldafilename_len ldxfilename ldyfilename+1 jsr$ffbd }
to:setnam::@return
setnam::@return: scope:[setnam] from setnam::@1
[298] return
[286] return
to:@return
void setlfs(volatile byte setlfs::device)
@ -591,198 +579,198 @@ setlfs: scope:[setlfs] from load_to_bank::@1
asm { ldxdevice lda#1 ldy#0 jsr$ffba }
to:setlfs::@return
setlfs::@return: scope:[setlfs] from setlfs
[300] return
[288] return
to:@return
byte load(byte* volatile load::address , volatile byte load::verify)
load: scope:[load] from load_to_bank::@2
[301] load::status = 0
[289] load::status = 0
asm { ldxaddress ldyaddress+1 ldaverify jsr$ffd5 bcserror lda#$ff error: stastatus }
to:load::@return
load::@return: scope:[load] from load
[303] return
[291] return
to:@return
void vera_layer_set_config(byte vera_layer_set_config::layer , byte vera_layer_set_config::config)
vera_layer_set_config: scope:[vera_layer_set_config] from vera_layer_mode_tile::@2
[304] vera_layer_set_config::addr#0 = *(vera_layer_config+vera_layer_mode_text::layer#0*SIZEOF_POINTER)
[305] *vera_layer_set_config::addr#0 = vera_layer_mode_tile::config#10
[292] vera_layer_set_config::addr#0 = *(vera_layer_config+vera_layer_mode_text::layer#0*SIZEOF_POINTER)
[293] *vera_layer_set_config::addr#0 = vera_layer_mode_tile::config#10
to:vera_layer_set_config::@return
vera_layer_set_config::@return: scope:[vera_layer_set_config] from vera_layer_set_config
[306] return
[294] return
to:@return
void vera_layer_set_tilebase(byte vera_layer_set_tilebase::layer , byte vera_layer_set_tilebase::tilebase)
vera_layer_set_tilebase: scope:[vera_layer_set_tilebase] from vera_layer_mode_tile::@3
[307] vera_layer_set_tilebase::addr#0 = *(vera_layer_tilebase+vera_layer_mode_text::layer#0*SIZEOF_POINTER)
[308] *vera_layer_set_tilebase::addr#0 = ><vera_layer_mode_tile::tilebase_address#0&VERA_LAYER_TILEBASE_MASK
[295] vera_layer_set_tilebase::addr#0 = *(vera_layer_tilebase+vera_layer_mode_text::layer#0*SIZEOF_POINTER)
[296] *vera_layer_set_tilebase::addr#0 = >vera_layer_mode_tile::tilebase_address#0&VERA_LAYER_TILEBASE_MASK
to:vera_layer_set_tilebase::@return
vera_layer_set_tilebase::@return: scope:[vera_layer_set_tilebase] from vera_layer_set_tilebase
[309] return
[297] return
to:@return
byte vera_layer_get_color(byte vera_layer_get_color::layer)
vera_layer_get_color: scope:[vera_layer_get_color] from clearline cputc
[310] vera_layer_get_color::layer#2 = phi( clearline/vera_layer_get_color::layer#1, cputc/vera_layer_get_color::layer#0 )
[311] vera_layer_get_color::$3 = vera_layer_get_color::layer#2 << 1
[312] vera_layer_get_color::addr#0 = vera_layer_config[vera_layer_get_color::$3]
[313] vera_layer_get_color::$0 = *vera_layer_get_color::addr#0 & VERA_LAYER_CONFIG_256C
[314] if(0!=vera_layer_get_color::$0) goto vera_layer_get_color::@1
[298] vera_layer_get_color::layer#2 = phi( clearline/vera_layer_get_color::layer#1, cputc/vera_layer_get_color::layer#0 )
[299] vera_layer_get_color::$3 = vera_layer_get_color::layer#2 << 1
[300] vera_layer_get_color::addr#0 = vera_layer_config[vera_layer_get_color::$3]
[301] vera_layer_get_color::$0 = *vera_layer_get_color::addr#0 & VERA_LAYER_CONFIG_256C
[302] if(0!=vera_layer_get_color::$0) goto vera_layer_get_color::@1
to:vera_layer_get_color::@2
vera_layer_get_color::@2: scope:[vera_layer_get_color] from vera_layer_get_color
[315] vera_layer_get_color::$1 = vera_layer_backcolor[vera_layer_get_color::layer#2] << 4
[316] vera_layer_get_color::return#1 = vera_layer_get_color::$1 | vera_layer_textcolor[vera_layer_get_color::layer#2]
[303] vera_layer_get_color::$1 = vera_layer_backcolor[vera_layer_get_color::layer#2] << 4
[304] vera_layer_get_color::return#1 = vera_layer_get_color::$1 | vera_layer_textcolor[vera_layer_get_color::layer#2]
to:vera_layer_get_color::@return
vera_layer_get_color::@return: scope:[vera_layer_get_color] from vera_layer_get_color::@1 vera_layer_get_color::@2
[317] vera_layer_get_color::return#2 = phi( vera_layer_get_color::@1/vera_layer_get_color::return#0, vera_layer_get_color::@2/vera_layer_get_color::return#1 )
[318] return
[305] vera_layer_get_color::return#2 = phi( vera_layer_get_color::@1/vera_layer_get_color::return#0, vera_layer_get_color::@2/vera_layer_get_color::return#1 )
[306] return
to:@return
vera_layer_get_color::@1: scope:[vera_layer_get_color] from vera_layer_get_color
[319] vera_layer_get_color::return#0 = vera_layer_textcolor[vera_layer_get_color::layer#2]
[307] vera_layer_get_color::return#0 = vera_layer_textcolor[vera_layer_get_color::layer#2]
to:vera_layer_get_color::@return
void cputln()
cputln: scope:[cputln] from cputc::@1 cputc::@4 cputc::@6
[320] cputln::$2 = conio_screen_layer << 1
[321] cputln::temp#0 = conio_line_text[cputln::$2]
[322] cputln::temp#1 = cputln::temp#0 + conio_rowskip
[323] cputln::$3 = conio_screen_layer << 1
[324] conio_line_text[cputln::$3] = cputln::temp#1
[325] conio_cursor_x[conio_screen_layer] = 0
[326] conio_cursor_y[conio_screen_layer] = ++ conio_cursor_y[conio_screen_layer]
[327] call cscroll
[308] cputln::$2 = conio_screen_layer << 1
[309] cputln::temp#0 = conio_line_text[cputln::$2]
[310] cputln::temp#1 = cputln::temp#0 + conio_rowskip
[311] cputln::$3 = conio_screen_layer << 1
[312] conio_line_text[cputln::$3] = cputln::temp#1
[313] conio_cursor_x[conio_screen_layer] = 0
[314] conio_cursor_y[conio_screen_layer] = ++ conio_cursor_y[conio_screen_layer]
[315] call cscroll
to:cputln::@return
cputln::@return: scope:[cputln] from cputln
[328] return
[316] return
to:@return
word strlen(byte* strlen::str)
strlen: scope:[strlen] from setnam
[329] phi()
[317] phi()
to:strlen::@1
strlen::@1: scope:[strlen] from strlen strlen::@2
[330] strlen::len#2 = phi( strlen/0, strlen::@2/strlen::len#1 )
[330] strlen::str#2 = phi( strlen/strlen::str#0, strlen::@2/strlen::str#1 )
[331] if(0!=*strlen::str#2) goto strlen::@2
[318] strlen::len#2 = phi( strlen/0, strlen::@2/strlen::len#1 )
[318] strlen::str#2 = phi( strlen/strlen::str#0, strlen::@2/strlen::str#1 )
[319] if(0!=*strlen::str#2) goto strlen::@2
to:strlen::@return
strlen::@return: scope:[strlen] from strlen::@1
[332] return
[320] return
to:@return
strlen::@2: scope:[strlen] from strlen::@1
[333] strlen::len#1 = ++ strlen::len#2
[334] strlen::str#1 = ++ strlen::str#2
[321] strlen::len#1 = ++ strlen::len#2
[322] strlen::str#1 = ++ strlen::str#2
to:strlen::@1
void cscroll()
cscroll: scope:[cscroll] from cputln
[335] if(conio_cursor_y[conio_screen_layer]<conio_screen_height) goto cscroll::@return
[323] if(conio_cursor_y[conio_screen_layer]<conio_screen_height) goto cscroll::@return
to:cscroll::@1
cscroll::@1: scope:[cscroll] from cscroll
[336] if(0!=conio_scroll_enable[conio_screen_layer]) goto cscroll::@4
[324] if(0!=conio_scroll_enable[conio_screen_layer]) goto cscroll::@4
to:cscroll::@2
cscroll::@2: scope:[cscroll] from cscroll::@1
[337] if(conio_cursor_y[conio_screen_layer]<conio_height) goto cscroll::@return
[325] if(conio_cursor_y[conio_screen_layer]<conio_height) goto cscroll::@return
to:cscroll::@3
cscroll::@3: scope:[cscroll] from cscroll::@2
[338] phi()
[326] phi()
to:cscroll::@return
cscroll::@return: scope:[cscroll] from cscroll cscroll::@2 cscroll::@3 cscroll::@5
[339] return
[327] return
to:@return
cscroll::@4: scope:[cscroll] from cscroll::@1
[340] phi()
[341] call insertup
[328] phi()
[329] call insertup
to:cscroll::@5
cscroll::@5: scope:[cscroll] from cscroll::@4
[342] gotoxy::y#2 = conio_screen_height - 1
[343] call gotoxy
[330] gotoxy::y#2 = conio_screen_height - 1
[331] call gotoxy
to:cscroll::@return
void insertup()
insertup: scope:[insertup] from cscroll::@4
[344] insertup::cy#0 = conio_cursor_y[conio_screen_layer]
[345] insertup::width#0 = conio_screen_width << 1
[332] insertup::cy#0 = conio_cursor_y[conio_screen_layer]
[333] insertup::width#0 = conio_screen_width << 1
to:insertup::@1
insertup::@1: scope:[insertup] from insertup insertup::@4
[346] insertup::i#2 = phi( insertup/1, insertup::@4/insertup::i#1 )
[347] if(insertup::i#2<=insertup::cy#0) goto insertup::@2
[334] insertup::i#2 = phi( insertup/1, insertup::@4/insertup::i#1 )
[335] if(insertup::i#2<=insertup::cy#0) goto insertup::@2
to:insertup::@3
insertup::@3: scope:[insertup] from insertup::@1
[348] phi()
[349] call clearline
[336] phi()
[337] call clearline
to:insertup::@return
insertup::@return: scope:[insertup] from insertup::@3
[350] return
[338] return
to:@return
insertup::@2: scope:[insertup] from insertup::@1
[351] insertup::$3 = insertup::i#2 - 1
[352] insertup::line#0 = insertup::$3 << conio_rowshift
[353] insertup::start#0 = (byte*)CONIO_SCREEN_TEXT#16 + insertup::line#0
[354] memcpy_in_vram::src#0 = insertup::start#0 + conio_rowskip
[355] memcpy_in_vram::dest#0 = (void*)insertup::start#0
[356] memcpy_in_vram::num#0 = insertup::width#0
[357] call memcpy_in_vram
[339] insertup::$3 = insertup::i#2 - 1
[340] insertup::line#0 = insertup::$3 << conio_rowshift
[341] insertup::start#0 = (byte*)CONIO_SCREEN_TEXT#16 + insertup::line#0
[342] memcpy_in_vram::src#0 = insertup::start#0 + conio_rowskip
[343] memcpy_in_vram::dest#0 = (void*)insertup::start#0
[344] memcpy_in_vram::num#0 = insertup::width#0
[345] call memcpy_in_vram
to:insertup::@4
insertup::@4: scope:[insertup] from insertup::@2
[358] insertup::i#1 = ++ insertup::i#2
[346] insertup::i#1 = ++ insertup::i#2
to:insertup::@1
void clearline()
clearline: scope:[clearline] from insertup::@3
[359] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[360] clearline::$5 = conio_screen_layer << 1
[361] clearline::addr#0 = (byte*)CONIO_SCREEN_TEXT#16 + conio_line_text[clearline::$5]
[362] clearline::$1 = < clearline::addr#0
[363] *VERA_ADDRX_L = clearline::$1
[364] clearline::$2 = > clearline::addr#0
[365] *VERA_ADDRX_M = clearline::$2
[366] *VERA_ADDRX_H = VERA_INC_1
[367] vera_layer_get_color::layer#1 = conio_screen_layer
[368] call vera_layer_get_color
[369] vera_layer_get_color::return#4 = vera_layer_get_color::return#2
[347] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[348] clearline::$5 = conio_screen_layer << 1
[349] clearline::addr#0 = (byte*)CONIO_SCREEN_TEXT#16 + conio_line_text[clearline::$5]
[350] clearline::$1 = < clearline::addr#0
[351] *VERA_ADDRX_L = clearline::$1
[352] clearline::$2 = > clearline::addr#0
[353] *VERA_ADDRX_M = clearline::$2
[354] *VERA_ADDRX_H = VERA_INC_1
[355] vera_layer_get_color::layer#1 = conio_screen_layer
[356] call vera_layer_get_color
[357] vera_layer_get_color::return#4 = vera_layer_get_color::return#2
to:clearline::@4
clearline::@4: scope:[clearline] from clearline
[370] clearline::color#0 = vera_layer_get_color::return#4
[358] clearline::color#0 = vera_layer_get_color::return#4
to:clearline::@1
clearline::@1: scope:[clearline] from clearline::@2 clearline::@4
[371] clearline::c#2 = phi( clearline::@2/clearline::c#1, clearline::@4/0 )
[372] if(clearline::c#2<conio_screen_width) goto clearline::@2
[359] clearline::c#2 = phi( clearline::@2/clearline::c#1, clearline::@4/0 )
[360] if(clearline::c#2<conio_screen_width) goto clearline::@2
to:clearline::@3
clearline::@3: scope:[clearline] from clearline::@1
[373] conio_cursor_x[conio_screen_layer] = 0
[361] conio_cursor_x[conio_screen_layer] = 0
to:clearline::@return
clearline::@return: scope:[clearline] from clearline::@3
[374] return
[362] return
to:@return
clearline::@2: scope:[clearline] from clearline::@1
[375] *VERA_DATA0 = ' '
[376] *VERA_DATA0 = clearline::color#0
[377] clearline::c#1 = ++ clearline::c#2
[363] *VERA_DATA0 = ' '
[364] *VERA_DATA0 = clearline::color#0
[365] clearline::c#1 = ++ clearline::c#2
to:clearline::@1
void memcpy_in_vram(byte memcpy_in_vram::dest_bank , void* memcpy_in_vram::dest , byte memcpy_in_vram::dest_increment , byte memcpy_in_vram::src_bank , void* memcpy_in_vram::src , byte memcpy_in_vram::src_increment , word memcpy_in_vram::num)
memcpy_in_vram: scope:[memcpy_in_vram] from insertup::@2
[378] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[379] memcpy_in_vram::$0 = < (void*)memcpy_in_vram::src#0
[380] *VERA_ADDRX_L = memcpy_in_vram::$0
[381] memcpy_in_vram::$1 = > (void*)memcpy_in_vram::src#0
[382] *VERA_ADDRX_M = memcpy_in_vram::$1
[383] *VERA_ADDRX_H = VERA_INC_1
[384] *VERA_CTRL = *VERA_CTRL | VERA_ADDRSEL
[385] memcpy_in_vram::$3 = < memcpy_in_vram::dest#0
[386] *VERA_ADDRX_L = memcpy_in_vram::$3
[387] memcpy_in_vram::$4 = > memcpy_in_vram::dest#0
[388] *VERA_ADDRX_M = memcpy_in_vram::$4
[389] *VERA_ADDRX_H = VERA_INC_1
[366] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[367] memcpy_in_vram::$0 = < (void*)memcpy_in_vram::src#0
[368] *VERA_ADDRX_L = memcpy_in_vram::$0
[369] memcpy_in_vram::$1 = > (void*)memcpy_in_vram::src#0
[370] *VERA_ADDRX_M = memcpy_in_vram::$1
[371] *VERA_ADDRX_H = VERA_INC_1
[372] *VERA_CTRL = *VERA_CTRL | VERA_ADDRSEL
[373] memcpy_in_vram::$3 = < memcpy_in_vram::dest#0
[374] *VERA_ADDRX_L = memcpy_in_vram::$3
[375] memcpy_in_vram::$4 = > memcpy_in_vram::dest#0
[376] *VERA_ADDRX_M = memcpy_in_vram::$4
[377] *VERA_ADDRX_H = VERA_INC_1
to:memcpy_in_vram::@1
memcpy_in_vram::@1: scope:[memcpy_in_vram] from memcpy_in_vram memcpy_in_vram::@2
[390] memcpy_in_vram::i#2 = phi( memcpy_in_vram/0, memcpy_in_vram::@2/memcpy_in_vram::i#1 )
[391] if(memcpy_in_vram::i#2<memcpy_in_vram::num#0) goto memcpy_in_vram::@2
[378] memcpy_in_vram::i#2 = phi( memcpy_in_vram/0, memcpy_in_vram::@2/memcpy_in_vram::i#1 )
[379] if(memcpy_in_vram::i#2<memcpy_in_vram::num#0) goto memcpy_in_vram::@2
to:memcpy_in_vram::@return
memcpy_in_vram::@return: scope:[memcpy_in_vram] from memcpy_in_vram::@1
[392] return
[380] return
to:@return
memcpy_in_vram::@2: scope:[memcpy_in_vram] from memcpy_in_vram::@1
[393] *VERA_DATA1 = *VERA_DATA0
[394] memcpy_in_vram::i#1 = ++ memcpy_in_vram::i#2
[381] *VERA_DATA1 = *VERA_DATA0
[382] memcpy_in_vram::i#1 = ++ memcpy_in_vram::i#2
to:memcpy_in_vram::@1

3585
src/test/ref/examples/cx16/cx16-bankload.log
View File

File diff suppressed because it is too large Load Diff

94
src/test/ref/examples/cx16/cx16-bankload.sym
View File

@ -1,4 +1,4 @@
constant struct VERA_SPRITE $0 = { ADDR: <main::VRAM_SPRITE/$20|VERA_SPRITE_8BPP, X: $140-$20, Y: (word)$f0-$20, CTRL1: $c, CTRL2: $f1 }
constant struct VERA_SPRITE $0 = { ADDR: _word0_main::VRAM_SPRITE/$20|VERA_SPRITE_8BPP, X: $140-$20, Y: (word)$f0-$20, CTRL1: $c, CTRL2: $f1 }
constant const byte BLUE = 6
byte CONIO_SCREEN_BANK
byte CONIO_SCREEN_BANK#14 CONIO_SCREEN_BANK zp[1]:27 100.93636363636364
@ -104,7 +104,7 @@ byte~ clearline::$1 reg byte a 2.00000002E8
byte~ clearline::$2 reg byte a 2.00000002E8
byte~ clearline::$5 reg byte a 2.00000002E8
byte* clearline::addr
byte* clearline::addr#0 addr zp[2]:65 1.00000001E8
byte* clearline::addr#0 addr zp[2]:61 1.00000001E8
word clearline::c
word clearline::c#1 c zp[2]:43 2.0000000002E10
word clearline::c#2 c zp[2]:43 7.50000000075E9
@ -168,8 +168,8 @@ void cputln()
byte~ cputln::$2 reg byte a 200002.0
byte~ cputln::$3 reg byte a 200002.0
word cputln::temp
word cputln::temp#0 temp zp[2]:55 200002.0
word cputln::temp#1 temp zp[2]:55 100001.0
word cputln::temp#0 temp zp[2]:53 200002.0
word cputln::temp#1 temp zp[2]:53 100001.0
void cputs(const byte* cputs::s)
byte cputs::c
byte cputs::c#1 reg byte a 1001.0
@ -191,16 +191,16 @@ byte gotoxy::y#4 reg byte x 4000000.4
void insertup()
byte~ insertup::$3 reg byte a 2.000000002E9
byte insertup::cy
byte insertup::cy#0 cy zp[1]:57 8.416666683333334E7
byte insertup::cy#0 cy zp[1]:55 8.416666683333334E7
byte insertup::i
byte insertup::i#1 reg byte x 2.000000002E9
byte insertup::i#2 reg byte x 4.444444448888889E8
word insertup::line
word insertup::line#0 line zp[2]:59 2.000000002E9
word insertup::line#0 line zp[2]:57 2.000000002E9
byte* insertup::start
byte* insertup::start#0 start zp[2]:59 1.000000001E9
byte* insertup::start#0 start zp[2]:57 1.000000001E9
byte insertup::width
byte insertup::width#0 width zp[1]:58 9.1818182E7
byte insertup::width#0 width zp[1]:56 9.1818182E7
byte load(byte* volatile load::address , volatile byte load::verify)
byte* volatile load::address loadstore zp[2]:40 33.666666666666664
byte load::return
@ -210,14 +210,14 @@ byte load_to_bank(byte load_to_bank::device , byte* load_to_bank::filename , dwo
byte* load_to_bank::addr
dword load_to_bank::address
byte load_to_bank::bank
constant byte load_to_bank::bank#0 bank = (byte)><main::BANK_SPRITE>>5+(word)<>main::BANK_SPRITE<<3
constant byte load_to_bank::bank#0 bank = _byte2_main::BANK_SPRITE<<3|>main::BANK_SPRITE>>5
byte load_to_bank::device
constant byte load_to_bank::device#0 device = 8
byte* load_to_bank::filename
byte load_to_bank::return
void main()
constant const dword main::BANK_SPRITE = $12000
volatile struct VERA_SPRITE main::SPRITE_ATTR loadstore zp[8]:67
volatile struct VERA_SPRITE main::SPRITE_ATTR loadstore zp[8]:63
constant const dword main::VRAM_SPRITE = $10000
constant byte* main::filename[7] = "SPRITE"
constant byte* main::s[$2d] = "
@ -225,26 +225,14 @@ constant byte* main::s[$2d] = "
sprite banked file load and display demo.
"
void memcpy_bank_to_vram(dword memcpy_bank_to_vram::vdest , dword memcpy_bank_to_vram::src , dword memcpy_bank_to_vram::num)
word~ memcpy_bank_to_vram::$0 zp[2]:43 202.0
byte~ memcpy_bank_to_vram::$0 reg byte a 202.0
byte~ memcpy_bank_to_vram::$1 reg byte a 202.0
word~ memcpy_bank_to_vram::$10 zp[2]:59 202.0
byte~ memcpy_bank_to_vram::$11 reg byte x 101.0
word~ memcpy_bank_to_vram::$12 zp[2]:61 202.0
word~ memcpy_bank_to_vram::$13 zp[2]:61 40.4
word~ memcpy_bank_to_vram::$14 zp[2]:63 202.0
word~ memcpy_bank_to_vram::$15 zp[2]:63 202.0
byte~ memcpy_bank_to_vram::$16 reg byte a 101.0
word~ memcpy_bank_to_vram::$17 zp[2]:61 101.0
word~ memcpy_bank_to_vram::$18 zp[2]:15 202.0
word~ memcpy_bank_to_vram::$2 zp[2]:45 202.0
word~ memcpy_bank_to_vram::$23 zp[2]:61 202.0
word~ memcpy_bank_to_vram::$24 zp[2]:65 202.0
byte~ memcpy_bank_to_vram::$3 reg byte a 202.0
word~ memcpy_bank_to_vram::$4 zp[2]:53 202.0
byte~ memcpy_bank_to_vram::$5 reg byte a 202.0
word~ memcpy_bank_to_vram::$7 zp[2]:55 202.0
word~ memcpy_bank_to_vram::$8 zp[2]:55 202.0
byte~ memcpy_bank_to_vram::$9 reg byte y 33.666666666666664
byte~ memcpy_bank_to_vram::$2 reg byte a 202.0
byte~ memcpy_bank_to_vram::$4 reg byte a 202.0
byte~ memcpy_bank_to_vram::$5 zp[1]:55 67.33333333333333
byte~ memcpy_bank_to_vram::$6 reg byte a 202.0
byte~ memcpy_bank_to_vram::$7 reg byte a 202.0
word~ memcpy_bank_to_vram::$9 zp[2]:15 202.0
byte* memcpy_bank_to_vram::addr
word memcpy_bank_to_vram::addr#0 addr zp[2]:15 101.0
byte* memcpy_bank_to_vram::addr#1 addr zp[2]:15 101.0
@ -257,31 +245,31 @@ byte memcpy_bank_to_vram::bank#1 reg byte x 1501.5
byte memcpy_bank_to_vram::bank#2 reg byte x 1034.6666666666667
byte memcpy_bank_to_vram::bank#5 reg byte x 750.75
dword memcpy_bank_to_vram::beg
dword memcpy_bank_to_vram::beg#0 beg zp[4]:11 19.548387096774196
dword memcpy_bank_to_vram::beg#0 beg zp[4]:11 26.578947368421055
dword memcpy_bank_to_vram::end
dword memcpy_bank_to_vram::end#0 end zp[4]:7 39.357142857142854
dword memcpy_bank_to_vram::end#0 end zp[4]:7 58.0
dword memcpy_bank_to_vram::num
dword memcpy_bank_to_vram::num#2 num zp[4]:7 8.416666666666666
dword memcpy_bank_to_vram::num#2 num zp[4]:7 11.222222222222221
dword memcpy_bank_to_vram::pos
dword memcpy_bank_to_vram::pos#1 pos zp[4]:11 2002.0
dword memcpy_bank_to_vram::pos#2 pos zp[4]:11 388.0
dword memcpy_bank_to_vram::src
dword memcpy_bank_to_vram::vdest
dword memcpy_bank_to_vram::vdest#2 vdest zp[4]:3 37.875
dword memcpy_bank_to_vram::vdest#2 vdest zp[4]:3 50.5
void memcpy_in_vram(byte memcpy_in_vram::dest_bank , void* memcpy_in_vram::dest , byte memcpy_in_vram::dest_increment , byte memcpy_in_vram::src_bank , void* memcpy_in_vram::src , byte memcpy_in_vram::src_increment , word memcpy_in_vram::num)
byte~ memcpy_in_vram::$0 reg byte a 2.0000000002E10
byte~ memcpy_in_vram::$1 reg byte a 2.0000000002E10
byte~ memcpy_in_vram::$3 reg byte a 2.0000000002E10
byte~ memcpy_in_vram::$4 reg byte a 2.0000000002E10
void* memcpy_in_vram::dest
void* memcpy_in_vram::dest#0 dest zp[2]:59 1.9090909093636363E9
void* memcpy_in_vram::dest#0 dest zp[2]:57 1.9090909093636363E9
byte memcpy_in_vram::dest_bank
byte memcpy_in_vram::dest_increment
word memcpy_in_vram::i
word memcpy_in_vram::i#1 i zp[2]:45 2.0000000000002E13
word memcpy_in_vram::i#2 i zp[2]:45 1.0000000000001E13
word memcpy_in_vram::num
word memcpy_in_vram::num#0 num zp[2]:63 5.882941176471765E11
word memcpy_in_vram::num#0 num zp[2]:59 5.882941176471765E11
void* memcpy_in_vram::src
byte* memcpy_in_vram::src#0 src zp[2]:61 1.6666666683333334E8
byte memcpy_in_vram::src_bank
@ -296,9 +284,9 @@ byte* memcpy_to_vram::s#2 s zp[2]:15 1334.6666666666667
void* memcpy_to_vram::src
constant void* memcpy_to_vram::src#0 src = (void*)&main::SPRITE_ATTR
byte memcpy_to_vram::vbank
constant byte memcpy_to_vram::vbank#0 vbank = (byte)>VERA_SPRITE_ATTR
constant byte memcpy_to_vram::vbank#0 vbank = _byte2_VERA_SPRITE_ATTR
void* memcpy_to_vram::vdest
constant void* memcpy_to_vram::vdest#0 vdest = (void*)(byte*)<VERA_SPRITE_ATTR
constant void* memcpy_to_vram::vdest#0 vdest = (void*)(byte*)_word0_VERA_SPRITE_ATTR
void screenlayer(byte screenlayer::layer)
word~ screenlayer::$2 zp[2]:30 202.0
byte~ screenlayer::$3 reg byte a 202.0
@ -497,7 +485,7 @@ zp[4]:3 [ memcpy_bank_to_vram::vdest#2 ]
zp[4]:7 [ memcpy_bank_to_vram::num#2 memcpy_bank_to_vram::end#0 ]
zp[4]:11 [ memcpy_bank_to_vram::pos#2 memcpy_bank_to_vram::beg#0 memcpy_bank_to_vram::pos#1 ]
reg byte x [ memcpy_bank_to_vram::bank#2 memcpy_bank_to_vram::bank#0 memcpy_bank_to_vram::bank#5 memcpy_bank_to_vram::bank#1 ]
zp[2]:15 [ memcpy_to_vram::s#2 memcpy_to_vram::s#1 memcpy_bank_to_vram::addr#5 memcpy_bank_to_vram::addr#4 memcpy_bank_to_vram::addr#1 memcpy_bank_to_vram::addr#2 memcpy_bank_to_vram::addr#0 memcpy_bank_to_vram::$18 cputs::s#2 cputs::s#0 clrscr::line_text#2 clrscr::line_text#1 clrscr::line_text#0 ]
zp[2]:15 [ memcpy_to_vram::s#2 memcpy_to_vram::s#1 memcpy_bank_to_vram::addr#5 memcpy_bank_to_vram::addr#4 memcpy_bank_to_vram::addr#1 memcpy_bank_to_vram::addr#2 memcpy_bank_to_vram::addr#0 memcpy_bank_to_vram::$9 cputs::s#2 cputs::s#0 clrscr::line_text#2 clrscr::line_text#1 clrscr::line_text#0 ]
reg byte x [ vera_layer_get_color::layer#2 vera_layer_get_color::layer#1 vera_layer_get_color::layer#0 ]
reg byte a [ vera_layer_get_color::return#2 vera_layer_get_color::return#0 vera_layer_get_color::return#1 ]
reg byte x [ insertup::i#2 insertup::i#1 ]
@ -553,12 +541,12 @@ zp[2]:37 [ setnam::filename ]
zp[1]:39 [ setlfs::device ]
zp[2]:40 [ load::address ]
zp[1]:42 [ load::verify ]
reg byte a [ memcpy_bank_to_vram::$0 ]
reg byte a [ memcpy_bank_to_vram::$1 ]
reg byte a [ memcpy_bank_to_vram::$3 ]
reg byte a [ memcpy_bank_to_vram::$5 ]
reg byte y [ memcpy_bank_to_vram::$9 ]
reg byte x [ memcpy_bank_to_vram::$11 ]
reg byte a [ memcpy_bank_to_vram::$16 ]
reg byte a [ memcpy_bank_to_vram::$2 ]
reg byte a [ memcpy_bank_to_vram::$4 ]
reg byte a [ memcpy_bank_to_vram::$6 ]
reg byte a [ memcpy_bank_to_vram::$7 ]
reg byte a [ vera_layer_get_mapbase_bank::return#0 ]
reg byte a [ vera_layer_get_mapbase_offset::$0 ]
reg byte a [ vera_layer_get_rowshift::return#0 ]
@ -568,32 +556,30 @@ reg byte a [ vera_layer_get_textcolor::return#0 ]
reg byte a [ vera_layer_get_color::return#3 ]
reg byte x [ cputc::color#0 ]
reg byte a [ cputc::$15 ]
zp[2]:43 [ cputc::conio_addr#0 cputc::conio_addr#1 memcpy_bank_to_vram::$0 clearline::c#2 clearline::c#1 strlen::str#2 strlen::str#0 strlen::str#1 ]
zp[2]:43 [ cputc::conio_addr#0 cputc::conio_addr#1 clearline::c#2 clearline::c#1 strlen::str#2 strlen::str#0 strlen::str#1 ]
reg byte a [ cputc::$2 ]
reg byte a [ cputc::$4 ]
reg byte a [ cputc::$5 ]
reg byte a [ cputc::$6 ]
reg byte a [ cputc::scroll_enable#0 ]
zp[2]:45 [ cputc::$16 memcpy_bank_to_vram::$2 memcpy_in_vram::i#2 memcpy_in_vram::i#1 strlen::len#2 strlen::len#1 strlen::return#0 setnam::$0 ]
zp[2]:45 [ cputc::$16 memcpy_in_vram::i#2 memcpy_in_vram::i#1 strlen::len#2 strlen::len#1 strlen::return#0 setnam::$0 ]
zp[1]:47 [ setnam::filename_len ]
zp[1]:48 [ load::status ]
zp[2]:49 [ vera_layer_set_config::addr#0 screenlayer::vera_layer_get_height1_return#0 screenlayer::vera_layer_get_height1_return#1 screenlayer::$5 ]
zp[2]:51 [ vera_layer_set_tilebase::addr#0 screenlayer::vera_layer_get_width1_config#0 vera_layer_get_mapbase_offset::return#2 vera_layer_get_mapbase_offset::return#0 ]
reg byte a [ vera_layer_get_color::$3 ]
zp[2]:53 [ vera_layer_get_color::addr#0 memcpy_bank_to_vram::$4 ]
reg byte a [ vera_layer_get_color::$0 ]
reg byte a [ vera_layer_get_color::$1 ]
reg byte a [ cputln::$2 ]
zp[2]:55 [ cputln::temp#0 cputln::temp#1 memcpy_bank_to_vram::$7 memcpy_bank_to_vram::$8 ]
zp[2]:53 [ cputln::temp#0 cputln::temp#1 vera_layer_get_color::addr#0 ]
reg byte a [ cputln::$3 ]
zp[1]:57 [ insertup::cy#0 ]
zp[1]:58 [ insertup::width#0 ]
zp[1]:55 [ insertup::cy#0 memcpy_bank_to_vram::$5 ]
zp[1]:56 [ insertup::width#0 ]
reg byte a [ insertup::$3 ]
zp[2]:59 [ insertup::line#0 insertup::start#0 memcpy_in_vram::dest#0 memcpy_bank_to_vram::$10 ]
zp[2]:61 [ memcpy_in_vram::src#0 memcpy_bank_to_vram::$23 memcpy_bank_to_vram::$12 memcpy_bank_to_vram::$13 memcpy_bank_to_vram::$17 ]
zp[2]:63 [ memcpy_in_vram::num#0 memcpy_bank_to_vram::$14 memcpy_bank_to_vram::$15 ]
zp[2]:57 [ insertup::line#0 insertup::start#0 memcpy_in_vram::dest#0 ]
zp[2]:59 [ memcpy_in_vram::num#0 ]
reg byte a [ clearline::$5 ]
zp[2]:65 [ clearline::addr#0 memcpy_bank_to_vram::$24 ]
zp[2]:61 [ clearline::addr#0 memcpy_in_vram::src#0 ]
reg byte a [ clearline::$1 ]
reg byte a [ clearline::$2 ]
reg byte a [ vera_layer_get_color::return#4 ]
@ -602,4 +588,4 @@ reg byte a [ memcpy_in_vram::$0 ]
reg byte a [ memcpy_in_vram::$1 ]
reg byte a [ memcpy_in_vram::$3 ]
reg byte a [ memcpy_in_vram::$4 ]
zp[8]:67 [ main::SPRITE_ATTR ]
zp[8]:63 [ main::SPRITE_ATTR ]

278
src/test/ref/examples/cx16/veralib/tilemap_8bpp_16_x_16.asm
View File

@ -82,17 +82,17 @@
// Bit 0: Tile Width (0:8 pixels, 1:16 pixels)
.label VERA_L1_TILEBASE = $9f36
// Variable holding the screen width;
.label conio_screen_width = $1d
.label conio_screen_width = $1f
// Variable holding the screen height;
.label conio_screen_height = $1e
.label conio_screen_height = $20
// Variable holding the screen layer on the VERA card with which conio interacts;
.label conio_screen_layer = $1f
.label conio_screen_layer = $21
// Variables holding the current map width and map height of the layer.
.label conio_width = $20
.label conio_height = $22
.label conio_rowshift = $24
.label conio_rowskip = $25
.label CONIO_SCREEN_BANK = $27
.label conio_width = $22
.label conio_height = $24
.label conio_rowshift = $26
.label conio_rowskip = $27
.label CONIO_SCREEN_BANK = $29
// The screen width
// The screen height
// The text screen base address, which is a 16:0 bit value in VERA VRAM.
@ -107,7 +107,7 @@
// based on the values of VERA_L0_MAPBASE or VERA_L1_MAPBASE, mapping the base address of the selected layer.
// The function setscreenlayermapbase(layer,mapbase) allows to configure bit 16:9 of the
// mapbase address of the time map in VRAM of the selected layer VERA_L0_MAPBASE or VERA_L1_MAPBASE.
.label CONIO_SCREEN_TEXT = $28
.label CONIO_SCREEN_TEXT = $2a
.segment Code
__start: {
// __ma unsigned byte conio_screen_width = 0
@ -748,13 +748,13 @@ screensize: {
// Set the layer with which the conio will interact.
// - layer: value of 0 or 1.
screenlayer: {
.label __2 = $34
.label __4 = $2c
.label __5 = $31
.label vera_layer_get_width1_config = $2a
.label vera_layer_get_width1_return = $34
.label vera_layer_get_height1_config = $2e
.label vera_layer_get_height1_return = $31
.label __2 = $3d
.label __4 = $2e
.label __5 = $34
.label vera_layer_get_width1_config = $2c
.label vera_layer_get_width1_return = $3d
.label vera_layer_get_height1_config = $30
.label vera_layer_get_height1_return = $34
// conio_screen_layer = layer
lda #1
sta.z conio_screen_layer
@ -881,7 +881,7 @@ vera_layer_set_backcolor: {
// so the resulting address in the VERA VRAM is always aligned to a multiple of 512 bytes.
// vera_layer_set_mapbase(byte register(A) layer, byte register(X) mapbase)
vera_layer_set_mapbase: {
.label addr = $34
.label addr = $3d
// byte* addr = vera_layer_mapbase[layer]
asl
tay
@ -899,8 +899,8 @@ vera_layer_set_mapbase: {
// Set the cursor to the specified position
// gotoxy(byte register(X) y)
gotoxy: {
.label __6 = $2c
.label line_offset = $2c
.label __6 = $2e
.label line_offset = $2e
// if(y>CONIO_HEIGHT)
lda.z conio_screen_height
stx.z $ff
@ -952,26 +952,26 @@ gotoxy: {
// - dest: pointer to the location to copy to. Note that the address is a 16 bit value!
// - dest_increment: the increment indicator, VERA needs this because addressing increment is automated by VERA at each access.
// - num: The number of bytes to copy
// memcpy_in_vram(byte zp($18) dest_bank, void* zp($47) dest, byte register(Y) src_bank, byte* zp($45) src, word zp($4d) num)
// memcpy_in_vram(byte zp($18) dest_bank, void* zp($41) dest, byte register(Y) src_bank, byte* zp($3f) src, word zp($43) num)
memcpy_in_vram: {
.label i = $49
.label dest = $47
.label src = $45
.label num = $4d
.label i = $1d
.label dest = $41
.label src = $3f
.label num = $43
.label dest_bank = $18
// *VERA_CTRL &= ~VERA_ADDRSEL
// Select DATA0
lda #VERA_ADDRSEL^$ff
and VERA_CTRL
sta VERA_CTRL
// <src
// BYTE0(src)
lda.z src
// *VERA_ADDRX_L = <src
// *VERA_ADDRX_L = BYTE0(src)
// Set address
sta VERA_ADDRX_L
// >src
// BYTE1(src)
lda.z src+1
// *VERA_ADDRX_M = >src
// *VERA_ADDRX_M = BYTE1(src)
sta VERA_ADDRX_M
// src_increment | src_bank
tya
@ -983,14 +983,14 @@ memcpy_in_vram: {
lda #VERA_ADDRSEL
ora VERA_CTRL
sta VERA_CTRL
// <dest
// BYTE0(dest)
lda.z dest
// *VERA_ADDRX_L = <dest
// *VERA_ADDRX_L = BYTE0(dest)
// Set address
sta VERA_ADDRX_L
// >dest
// BYTE1(dest)
lda.z dest+1
// *VERA_ADDRX_M = >dest
// *VERA_ADDRX_M = BYTE1(dest)
sta VERA_ADDRX_M
// dest_increment | dest_bank
lda #VERA_INC_1
@ -1041,21 +1041,17 @@ memcpy_in_vram: {
// - tilewidth: The width of a tile, which can be 8 or 16 pixels.
// - tileheight: The height of a tile, which can be 8 or 16 pixels.
// - color_depth: The color depth in bits per pixel (BPP), which can be 1, 2, 4 or 8.
// vera_layer_mode_tile(byte zp($d) layer, dword zp($e) mapbase_address, dword zp($12) tilebase_address, word zp($2c) mapwidth, word zp($2a) mapheight, byte zp($16) tilewidth, byte zp($17) tileheight, byte register(X) color_depth)
// vera_layer_mode_tile(byte zp($d) layer, dword zp($e) mapbase_address, dword zp($12) tilebase_address, word zp($2e) mapwidth, word zp($2c) mapheight, byte zp($16) tilewidth, byte zp($17) tileheight, byte register(X) color_depth)
vera_layer_mode_tile: {
.label __1 = $2e
.label __2 = $31
.label __4 = $41
.label __7 = $34
.label __8 = $36
.label __10 = $38
.label __19 = $30
.label __20 = $33
.label __1 = $30
.label __6 = $34
.label __17 = $32
.label __18 = $33
.label mapbase_address = $e
.label tilebase_address = $12
.label layer = $d
.label mapwidth = $2c
.label mapheight = $2a
.label mapwidth = $2e
.label mapheight = $2c
.label tileheight = $17
.label tilewidth = $16
// case 1:
@ -1203,35 +1199,31 @@ vera_layer_mode_tile: {
// vera_layer_set_config(layer, config)
lda.z layer
jsr vera_layer_set_config
// <mapbase_address
// WORD0(mapbase_address)
lda.z mapbase_address
sta.z __1
lda.z mapbase_address+1
sta.z __1+1
// vera_mapbase_offset[layer] = <mapbase_address
// vera_mapbase_offset[layer] = WORD0(mapbase_address)
lda.z layer
asl
sta.z __19
sta.z __17
// mapbase
tay
lda.z __1
sta vera_mapbase_offset,y
lda.z __1+1
sta vera_mapbase_offset+1,y
// >mapbase_address
// BYTE2(mapbase_address)
lda.z mapbase_address+2
sta.z __2
lda.z mapbase_address+3
sta.z __2+1
// vera_mapbase_bank[layer] = (byte)(>mapbase_address)
// vera_mapbase_bank[layer] = BYTE2(mapbase_address)
ldy.z layer
lda.z __2
sta vera_mapbase_bank,y
// vera_mapbase_address[layer] = mapbase_address
tya
asl
asl
sta.z __20
sta.z __18
tay
lda.z mapbase_address
sta vera_mapbase_address,y
@ -1246,39 +1238,30 @@ vera_layer_mode_tile: {
ror.z mapbase_address+2
ror.z mapbase_address+1
ror.z mapbase_address
// <mapbase_address
lda.z mapbase_address
sta.z __4
lda.z mapbase_address+1
sta.z __4+1
// byte mapbase = >(<mapbase_address)
tax
// byte mapbase = BYTE1(mapbase_address)
ldx.z mapbase_address+1
// vera_layer_set_mapbase(layer,mapbase)
lda.z layer
jsr vera_layer_set_mapbase
// <tilebase_address
// WORD0(tilebase_address)
lda.z tilebase_address
sta.z __7
sta.z __6
lda.z tilebase_address+1
sta.z __7+1
// vera_tilebase_offset[layer] = <tilebase_address
sta.z __6+1
// vera_tilebase_offset[layer] = WORD0(tilebase_address)
// tilebase
ldy.z __19
lda.z __7
ldy.z __17
lda.z __6
sta vera_tilebase_offset,y
lda.z __7+1
lda.z __6+1
sta vera_tilebase_offset+1,y
// >tilebase_address
// BYTE2(tilebase_address)
lda.z tilebase_address+2
sta.z __8
lda.z tilebase_address+3
sta.z __8+1
// vera_tilebase_bank[layer] = (byte)>tilebase_address
// vera_tilebase_bank[layer] = BYTE2(tilebase_address)
ldy.z layer
lda.z __8
sta vera_tilebase_bank,y
// vera_tilebase_address[layer] = tilebase_address
ldy.z __20
ldy.z __18
lda.z tilebase_address
sta vera_tilebase_address,y
lda.z tilebase_address+1
@ -1292,12 +1275,8 @@ vera_layer_mode_tile: {
ror.z tilebase_address+2
ror.z tilebase_address+1
ror.z tilebase_address
// <tilebase_address
lda.z tilebase_address
sta.z __10
// byte tilebase = BYTE1(tilebase_address)
lda.z tilebase_address+1
sta.z __10+1
// byte tilebase = >(<tilebase_address)
// tilebase &= VERA_LAYER_TILEBASE_MASK
and #VERA_LAYER_TILEBASE_MASK
tax
@ -1405,9 +1384,9 @@ vera_layer_mode_tile: {
}
// clears the screen and moves the cursor to the upper left-hand corner of the screen.
clrscr: {
.label __1 = $3a
.label line_text = $45
.label color = $3a
.label __1 = $36
.label line_text = $3f
.label color = $36
// char* line_text = CONIO_SCREEN_TEXT
lda.z CONIO_SCREEN_TEXT
sta.z line_text
@ -1456,14 +1435,14 @@ clrscr: {
lda #VERA_ADDRSEL^$ff
and VERA_CTRL
sta VERA_CTRL
// <ch
// BYTE0(ch)
lda.z line_text
// *VERA_ADDRX_L = <ch
// *VERA_ADDRX_L = BYTE0(ch)
// Set address
sta VERA_ADDRX_L
// >ch
// BYTE1(ch)
lda.z line_text+1
// *VERA_ADDRX_M = >ch
// *VERA_ADDRX_M = BYTE1(ch)
sta VERA_ADDRX_M
// CONIO_SCREEN_BANK | VERA_INC_1
lda #VERA_INC_1
@ -1505,24 +1484,24 @@ clrscr: {
// - vdest: The destination address in VRAM
// - src: The source address in RAM
// - num: The number of bytes to copy
// memcpy_to_vram(void* zp($47) vdest)
// memcpy_to_vram(void* zp($41) vdest)
memcpy_to_vram: {
.label end = main.tiles+$100
.label s = $4d
.label vdest = $47
.label s = $43
.label vdest = $41
// *VERA_CTRL &= ~VERA_ADDRSEL
// Select DATA0
lda #VERA_ADDRSEL^$ff
and VERA_CTRL
sta VERA_CTRL
// <vdest
// BYTE0(vdest)
lda.z vdest
// *VERA_ADDRX_L = <vdest
// *VERA_ADDRX_L = BYTE0(vdest)
// Set address
sta VERA_ADDRX_L
// >vdest
// BYTE1(vdest)
lda.z vdest+1
// *VERA_ADDRX_M = >vdest
// *VERA_ADDRX_M = BYTE1(vdest)
sta VERA_ADDRX_M
// *VERA_ADDRX_H = VERA_INC_1 | vbank
lda #VERA_INC_1
@ -1554,26 +1533,23 @@ memcpy_to_vram: {
jmp __b1
}
// --- TILE FUNCTIONS ---
// vera_tile_area(word zp(8) tileindex, byte zp($c) x, byte zp(6) y, byte zp($3a) w, byte zp($18) h, byte zp($4c) hflip, byte zp($3d) vflip)
// vera_tile_area(word zp(8) tileindex, byte zp($c) x, byte zp(6) y, byte zp($36) w, byte zp($18) h, byte zp($46) hflip, byte zp($39) vflip)
vera_tile_area: {
.label __4 = $45
.label __10 = $45
.label vera_vram_address01___0 = $47
.label vera_vram_address01___2 = $4d
.label vera_vram_address01___4 = $49
.label __4 = $3f
.label __10 = $3f
.label mapbase = $19
.label shift = $4b
.label rowskip = $3b
.label hflip = $4c
.label vflip = $3d
.label index_l = $3e
.label index_h = $3d
.label r = $3f
.label shift = $45
.label rowskip = $37
.label hflip = $46
.label vflip = $39
.label index_l = $3a
.label index_h = $39
.label r = $3b
.label tileindex = 8
.label x = $c
.label y = 6
.label h = $18
.label w = $3a
.label w = $36
// dword mapbase = vera_mapbase_address[layer]
lda vera_mapbase_address
sta.z mapbase
@ -1606,10 +1582,10 @@ vera_tile_area: {
// vflip = vera_layer_vflip[vflip]
lda vera_layer_vflip
sta.z vflip
// byte index_l = <tileindex
// byte index_l = BYTE0(tileindex)
lda.z tileindex
sta.z index_l
// byte index_h = >tileindex
// byte index_h = BYTE1(tileindex)
lda.z tileindex+1
// index_h |= hflip
ora.z hflip
@ -1673,33 +1649,19 @@ vera_tile_area: {
lda #VERA_ADDRSEL^$ff
and VERA_CTRL
sta VERA_CTRL
// <bankaddr
// BYTE0(bankaddr)
lda.z mapbase
sta.z vera_vram_address01___0
lda.z mapbase+1
sta.z vera_vram_address01___0+1
// <(<bankaddr)
lda.z vera_vram_address01___0
// *VERA_ADDRX_L = <(<bankaddr)
// *VERA_ADDRX_L = BYTE0(bankaddr)
sta VERA_ADDRX_L
// <bankaddr
lda.z mapbase
sta.z vera_vram_address01___2
// BYTE1(bankaddr)
lda.z mapbase+1
sta.z vera_vram_address01___2+1
// >(<bankaddr)
// *VERA_ADDRX_M = >(<bankaddr)
// *VERA_ADDRX_M = BYTE1(bankaddr)
sta VERA_ADDRX_M
// >bankaddr
// BYTE2(bankaddr)
lda.z mapbase+2
sta.z vera_vram_address01___4
lda.z mapbase+3
sta.z vera_vram_address01___4+1
// <(>bankaddr)
lda.z vera_vram_address01___4
// <(>bankaddr) | incr
// BYTE2(bankaddr) | incr
ora #VERA_INC_1
// *VERA_ADDRX_H = <(>bankaddr) | incr
// *VERA_ADDRX_H = BYTE2(bankaddr) | incr
sta VERA_ADDRX_H
ldy #0
__b2:
@ -1735,9 +1697,9 @@ vera_tile_area: {
jmp __b2
}
// Output a NUL-terminated string at the current cursor position
// cputs(const byte* zp($3b) s)
// cputs(const byte* zp($37) s)
cputs: {
.label s = $3b
.label s = $37
__b1:
// while(c=*s++)
ldy #0
@ -1762,7 +1724,7 @@ kbhit: {
.label IN_DEV = $28a
// Current input device number
.label GETIN = $ffe4
.label ch = $40
.label ch = $3c
// char ch = 0
lda #0
sta.z ch
@ -1805,7 +1767,7 @@ kbhit: {
// - layer: Value of 0 or 1.
// - color_mode: Specifies the color mode to be VERA_LAYER_CONFIG_16 or VERA_LAYER_CONFIG_256 for text mode.
vera_layer_set_text_color_mode: {
.label addr = $41
.label addr = $3d
// byte* addr = vera_layer_config[layer]
lda vera_layer_config+vera_layer_mode_text.layer*SIZEOF_POINTER
sta.z addr
@ -1837,7 +1799,7 @@ vera_layer_get_mapbase_bank: {
// - return: Offset in vera vram of the specified bank.
// vera_layer_get_mapbase_offset(byte register(A) layer)
vera_layer_get_mapbase_offset: {
.label return = $2c
.label return = $2e
// return vera_mapbase_offset[layer];
asl
tay
@ -1863,7 +1825,7 @@ vera_layer_get_rowshift: {
// - return: Skip value to calculate fast from a y value to line offset in tile mode.
// vera_layer_get_rowskip(byte register(A) layer)
vera_layer_get_rowskip: {
.label return = $2c
.label return = $2e
// return vera_layer_rowskip[layer];
asl
tay
@ -1879,7 +1841,7 @@ vera_layer_get_rowskip: {
// - config: Specifies the modes which are specified using T256C / 'Bitmap Mode' / 'Color Depth'.
// vera_layer_set_config(byte register(A) layer, byte register(X) config)
vera_layer_set_config: {
.label addr = $43
.label addr = $3d
// byte* addr = vera_layer_config[layer]
asl
tay
@ -1901,7 +1863,7 @@ vera_layer_set_config: {
// so the resulting address in the VERA VRAM is always aligned to a multiple of 2048 bytes!
// vera_layer_set_tilebase(byte register(A) layer, byte register(X) tilebase)
vera_layer_set_tilebase: {
.label addr = $43
.label addr = $3d
// byte* addr = vera_layer_tilebase[layer]
asl
tay
@ -1942,11 +1904,11 @@ vera_layer_get_textcolor: {
}
// Output one character at the current cursor position
// Moves the cursor forward. Scrolls the entire screen if needed
// cputc(byte zp($3f) c)
// cputc(byte zp($3b) c)
cputc: {
.label __16 = $47
.label conio_addr = $45
.label c = $3f
.label __16 = $41
.label conio_addr = $3f
.label c = $3b
// vera_layer_get_color( conio_screen_layer)
ldx.z conio_screen_layer
jsr vera_layer_get_color
@ -1985,14 +1947,14 @@ cputc: {
lda #VERA_ADDRSEL^$ff
and VERA_CTRL
sta VERA_CTRL
// <conio_addr
// BYTE0(conio_addr)
lda.z conio_addr
// *VERA_ADDRX_L = <conio_addr
// *VERA_ADDRX_L = BYTE0(conio_addr)
// Set address
sta VERA_ADDRX_L
// >conio_addr
// BYTE1(conio_addr)
lda.z conio_addr+1
// *VERA_ADDRX_M = >conio_addr
// *VERA_ADDRX_M = BYTE1(conio_addr)
sta VERA_ADDRX_M
// CONIO_SCREEN_BANK | VERA_INC_1
lda #VERA_INC_1
@ -2050,7 +2012,7 @@ cputc: {
// Note that on the VERA, the transparent color has value 0.
// vera_layer_get_color(byte register(X) layer)
vera_layer_get_color: {
.label addr = $4d
.label addr = $43
// byte* addr = vera_layer_config[layer]
txa
asl
@ -2083,7 +2045,7 @@ vera_layer_get_color: {
}
// Print a newline
cputln: {
.label temp = $49
.label temp = $43
// word temp = conio_line_text[conio_screen_layer]
lda.z conio_screen_layer
asl
@ -2151,10 +2113,10 @@ cscroll: {
}
// Insert a new line, and scroll the upper part of the screen up.
insertup: {
.label cy = $4b
.label width = $4c
.label line = $47
.label start = $47
.label cy = $45
.label width = $46
.label line = $41
.label start = $41
// unsigned byte cy = conio_cursor_y[conio_screen_layer]
ldy.z conio_screen_layer
lda conio_cursor_y,y
@ -2222,8 +2184,8 @@ insertup: {
jmp __b1
}
clearline: {
.label addr = $4d
.label c = $49
.label addr = $47
.label c = $1d
// *VERA_CTRL &= ~VERA_ADDRSEL
// Select DATA0
lda #VERA_ADDRSEL^$ff
@ -2241,13 +2203,13 @@ clearline: {
lda.z CONIO_SCREEN_TEXT+1
adc conio_line_text+1,y
sta.z addr+1
// <addr
// BYTE0(addr)
lda.z addr
// *VERA_ADDRX_L = <addr
// *VERA_ADDRX_L = BYTE0(addr)
sta VERA_ADDRX_L
// >addr
// BYTE1(addr)
lda.z addr+1
// *VERA_ADDRX_M = >addr
// *VERA_ADDRX_M = BYTE1(addr)
sta VERA_ADDRX_M
// *VERA_ADDRX_H = VERA_INC_1
lda #VERA_INC_1

527
src/test/ref/examples/cx16/veralib/tilemap_8bpp_16_x_16.cfg
View File

@ -498,8 +498,8 @@ vera_layer_mode_tile::@8: scope:[vera_layer_mode_tile] from vera_layer_mode_til
vera_layer_mode_tile::@12: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@8
[245] vera_layer_mode_tile::config#8 = vera_layer_mode_tile::config#17 | VERA_LAYER_WIDTH_256
[246] vera_layer_rowshift[vera_layer_mode_tile::layer#10] = 9
[247] vera_layer_mode_tile::$16 = vera_layer_mode_tile::layer#10 << 1
[248] vera_layer_rowskip[vera_layer_mode_tile::$16] = $200
[247] vera_layer_mode_tile::$14 = vera_layer_mode_tile::layer#10 << 1
[248] vera_layer_rowskip[vera_layer_mode_tile::$14] = $200
to:vera_layer_mode_tile::@13
vera_layer_mode_tile::@13: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@10 vera_layer_mode_tile::@11 vera_layer_mode_tile::@12 vera_layer_mode_tile::@8 vera_layer_mode_tile::@9
[249] vera_layer_mode_tile::config#21 = phi( vera_layer_mode_tile::@8/vera_layer_mode_tile::config#17, vera_layer_mode_tile::@9/vera_layer_mode_tile::config#17, vera_layer_mode_tile::@10/vera_layer_mode_tile::config#6, vera_layer_mode_tile::@11/vera_layer_mode_tile::config#7, vera_layer_mode_tile::@12/vera_layer_mode_tile::config#8 )
@ -524,236 +524,231 @@ vera_layer_mode_tile::@20: scope:[vera_layer_mode_tile] from vera_layer_mode_ti
[258] call vera_layer_set_config
to:vera_layer_mode_tile::@27
vera_layer_mode_tile::@27: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@20
[259] vera_layer_mode_tile::$1 = < vera_layer_mode_tile::mapbase_address#10
[260] vera_layer_mode_tile::$19 = vera_layer_mode_tile::layer#10 << 1
[261] vera_mapbase_offset[vera_layer_mode_tile::$19] = vera_layer_mode_tile::$1
[262] vera_layer_mode_tile::$2 = > vera_layer_mode_tile::mapbase_address#10
[263] vera_mapbase_bank[vera_layer_mode_tile::layer#10] = (byte)vera_layer_mode_tile::$2
[264] vera_layer_mode_tile::$20 = vera_layer_mode_tile::layer#10 << 2
[265] vera_mapbase_address[vera_layer_mode_tile::$20] = vera_layer_mode_tile::mapbase_address#10
[259] vera_layer_mode_tile::$1 = _word0_ vera_layer_mode_tile::mapbase_address#10
[260] vera_layer_mode_tile::$17 = vera_layer_mode_tile::layer#10 << 1
[261] vera_mapbase_offset[vera_layer_mode_tile::$17] = vera_layer_mode_tile::$1
[262] vera_layer_mode_tile::$2 = _byte2_ vera_layer_mode_tile::mapbase_address#10
[263] vera_mapbase_bank[vera_layer_mode_tile::layer#10] = vera_layer_mode_tile::$2
[264] vera_layer_mode_tile::$18 = vera_layer_mode_tile::layer#10 << 2
[265] vera_mapbase_address[vera_layer_mode_tile::$18] = vera_layer_mode_tile::mapbase_address#10
[266] vera_layer_mode_tile::mapbase_address#0 = vera_layer_mode_tile::mapbase_address#10 >> 1
[267] vera_layer_mode_tile::$4 = < vera_layer_mode_tile::mapbase_address#0
[268] vera_layer_mode_tile::mapbase#0 = > vera_layer_mode_tile::$4
[269] vera_layer_set_mapbase::layer#0 = vera_layer_mode_tile::layer#10
[270] vera_layer_set_mapbase::mapbase#0 = vera_layer_mode_tile::mapbase#0
[271] call vera_layer_set_mapbase
[267] vera_layer_mode_tile::mapbase#0 = > vera_layer_mode_tile::mapbase_address#0
[268] vera_layer_set_mapbase::layer#0 = vera_layer_mode_tile::layer#10
[269] vera_layer_set_mapbase::mapbase#0 = vera_layer_mode_tile::mapbase#0
[270] call vera_layer_set_mapbase
to:vera_layer_mode_tile::@28
vera_layer_mode_tile::@28: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@27
[272] vera_layer_mode_tile::$7 = < vera_layer_mode_tile::tilebase_address#10
[273] vera_tilebase_offset[vera_layer_mode_tile::$19] = vera_layer_mode_tile::$7
[274] vera_layer_mode_tile::$8 = > vera_layer_mode_tile::tilebase_address#10
[275] vera_tilebase_bank[vera_layer_mode_tile::layer#10] = (byte)vera_layer_mode_tile::$8
[276] vera_tilebase_address[vera_layer_mode_tile::$20] = vera_layer_mode_tile::tilebase_address#10
[277] vera_layer_mode_tile::tilebase_address#0 = vera_layer_mode_tile::tilebase_address#10 >> 1
[278] vera_layer_mode_tile::$10 = < vera_layer_mode_tile::tilebase_address#0
[279] vera_layer_mode_tile::tilebase#0 = > vera_layer_mode_tile::$10
[280] vera_layer_mode_tile::tilebase#1 = vera_layer_mode_tile::tilebase#0 & VERA_LAYER_TILEBASE_MASK
[281] if(vera_layer_mode_tile::tilewidth#10==8) goto vera_layer_mode_tile::@23
[271] vera_layer_mode_tile::$6 = _word0_ vera_layer_mode_tile::tilebase_address#10
[272] vera_tilebase_offset[vera_layer_mode_tile::$17] = vera_layer_mode_tile::$6
[273] vera_layer_mode_tile::$7 = _byte2_ vera_layer_mode_tile::tilebase_address#10
[274] vera_tilebase_bank[vera_layer_mode_tile::layer#10] = vera_layer_mode_tile::$7
[275] vera_tilebase_address[vera_layer_mode_tile::$18] = vera_layer_mode_tile::tilebase_address#10
[276] vera_layer_mode_tile::tilebase_address#0 = vera_layer_mode_tile::tilebase_address#10 >> 1
[277] vera_layer_mode_tile::tilebase#0 = > vera_layer_mode_tile::tilebase_address#0
[278] vera_layer_mode_tile::tilebase#1 = vera_layer_mode_tile::tilebase#0 & VERA_LAYER_TILEBASE_MASK
[279] if(vera_layer_mode_tile::tilewidth#10==8) goto vera_layer_mode_tile::@23
to:vera_layer_mode_tile::@21
vera_layer_mode_tile::@21: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@28
[282] if(vera_layer_mode_tile::tilewidth#10!=$10) goto vera_layer_mode_tile::@23
[280] if(vera_layer_mode_tile::tilewidth#10!=$10) goto vera_layer_mode_tile::@23
to:vera_layer_mode_tile::@22
vera_layer_mode_tile::@22: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@21
[283] vera_layer_mode_tile::tilebase#3 = vera_layer_mode_tile::tilebase#1 | VERA_TILEBASE_WIDTH_16
[281] vera_layer_mode_tile::tilebase#3 = vera_layer_mode_tile::tilebase#1 | VERA_TILEBASE_WIDTH_16
to:vera_layer_mode_tile::@23
vera_layer_mode_tile::@23: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@21 vera_layer_mode_tile::@22 vera_layer_mode_tile::@28
[284] vera_layer_mode_tile::tilebase#12 = phi( vera_layer_mode_tile::@21/vera_layer_mode_tile::tilebase#1, vera_layer_mode_tile::@28/vera_layer_mode_tile::tilebase#1, vera_layer_mode_tile::@22/vera_layer_mode_tile::tilebase#3 )
[285] if(vera_layer_mode_tile::tileheight#10==8) goto vera_layer_mode_tile::@26
[282] vera_layer_mode_tile::tilebase#12 = phi( vera_layer_mode_tile::@21/vera_layer_mode_tile::tilebase#1, vera_layer_mode_tile::@28/vera_layer_mode_tile::tilebase#1, vera_layer_mode_tile::@22/vera_layer_mode_tile::tilebase#3 )
[283] if(vera_layer_mode_tile::tileheight#10==8) goto vera_layer_mode_tile::@26
to:vera_layer_mode_tile::@24
vera_layer_mode_tile::@24: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@23
[286] if(vera_layer_mode_tile::tileheight#10!=$10) goto vera_layer_mode_tile::@26
[284] if(vera_layer_mode_tile::tileheight#10!=$10) goto vera_layer_mode_tile::@26
to:vera_layer_mode_tile::@25
vera_layer_mode_tile::@25: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@24
[287] vera_layer_mode_tile::tilebase#5 = vera_layer_mode_tile::tilebase#12 | VERA_TILEBASE_HEIGHT_16
[285] vera_layer_mode_tile::tilebase#5 = vera_layer_mode_tile::tilebase#12 | VERA_TILEBASE_HEIGHT_16
to:vera_layer_mode_tile::@26
vera_layer_mode_tile::@26: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@23 vera_layer_mode_tile::@24 vera_layer_mode_tile::@25
[288] vera_layer_mode_tile::tilebase#10 = phi( vera_layer_mode_tile::@24/vera_layer_mode_tile::tilebase#12, vera_layer_mode_tile::@23/vera_layer_mode_tile::tilebase#12, vera_layer_mode_tile::@25/vera_layer_mode_tile::tilebase#5 )
[289] vera_layer_set_tilebase::layer#0 = vera_layer_mode_tile::layer#10
[290] vera_layer_set_tilebase::tilebase#0 = vera_layer_mode_tile::tilebase#10
[291] call vera_layer_set_tilebase
[286] vera_layer_mode_tile::tilebase#10 = phi( vera_layer_mode_tile::@24/vera_layer_mode_tile::tilebase#12, vera_layer_mode_tile::@23/vera_layer_mode_tile::tilebase#12, vera_layer_mode_tile::@25/vera_layer_mode_tile::tilebase#5 )
[287] vera_layer_set_tilebase::layer#0 = vera_layer_mode_tile::layer#10
[288] vera_layer_set_tilebase::tilebase#0 = vera_layer_mode_tile::tilebase#10
[289] call vera_layer_set_tilebase
to:vera_layer_mode_tile::@return
vera_layer_mode_tile::@return: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@26
[292] return
[290] return
to:@return
vera_layer_mode_tile::@18: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@15
[293] vera_layer_mode_tile::config#11 = vera_layer_mode_tile::config#21 | VERA_LAYER_HEIGHT_128
[291] vera_layer_mode_tile::config#11 = vera_layer_mode_tile::config#21 | VERA_LAYER_HEIGHT_128
to:vera_layer_mode_tile::@20
vera_layer_mode_tile::@17: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@14
[294] vera_layer_mode_tile::config#10 = vera_layer_mode_tile::config#21 | VERA_LAYER_HEIGHT_64
[292] vera_layer_mode_tile::config#10 = vera_layer_mode_tile::config#21 | VERA_LAYER_HEIGHT_64
to:vera_layer_mode_tile::@20
vera_layer_mode_tile::@11: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@7
[295] vera_layer_mode_tile::config#7 = vera_layer_mode_tile::config#17 | VERA_LAYER_WIDTH_128
[296] vera_layer_rowshift[vera_layer_mode_tile::layer#10] = 8
[297] vera_layer_mode_tile::$15 = vera_layer_mode_tile::layer#10 << 1
[298] vera_layer_rowskip[vera_layer_mode_tile::$15] = $100
[293] vera_layer_mode_tile::config#7 = vera_layer_mode_tile::config#17 | VERA_LAYER_WIDTH_128
[294] vera_layer_rowshift[vera_layer_mode_tile::layer#10] = 8
[295] vera_layer_mode_tile::$13 = vera_layer_mode_tile::layer#10 << 1
[296] vera_layer_rowskip[vera_layer_mode_tile::$13] = $100
to:vera_layer_mode_tile::@13
vera_layer_mode_tile::@10: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@6
[299] vera_layer_mode_tile::config#6 = vera_layer_mode_tile::config#17 | VERA_LAYER_WIDTH_64
[300] vera_layer_rowshift[vera_layer_mode_tile::layer#10] = 7
[301] vera_layer_mode_tile::$14 = vera_layer_mode_tile::layer#10 << 1
[302] vera_layer_rowskip[vera_layer_mode_tile::$14] = $80
[297] vera_layer_mode_tile::config#6 = vera_layer_mode_tile::config#17 | VERA_LAYER_WIDTH_64
[298] vera_layer_rowshift[vera_layer_mode_tile::layer#10] = 7
[299] vera_layer_mode_tile::$12 = vera_layer_mode_tile::layer#10 << 1
[300] vera_layer_rowskip[vera_layer_mode_tile::$12] = $80
to:vera_layer_mode_tile::@13
vera_layer_mode_tile::@9: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@5
[303] vera_layer_rowshift[vera_layer_mode_tile::layer#10] = 6
[304] vera_layer_mode_tile::$13 = vera_layer_mode_tile::layer#10 << 1
[305] vera_layer_rowskip[vera_layer_mode_tile::$13] = $40
[301] vera_layer_rowshift[vera_layer_mode_tile::layer#10] = 6
[302] vera_layer_mode_tile::$11 = vera_layer_mode_tile::layer#10 << 1
[303] vera_layer_rowskip[vera_layer_mode_tile::$11] = $40
to:vera_layer_mode_tile::@13
void clrscr()
clrscr: scope:[clrscr] from main::@16 main::@18
[306] clrscr::line_text#0 = (byte*)CONIO_SCREEN_TEXT#17
[307] vera_layer_get_backcolor::layer#0 = conio_screen_layer
[308] call vera_layer_get_backcolor
[309] vera_layer_get_backcolor::return#0 = vera_layer_get_backcolor::return#1
[304] clrscr::line_text#0 = (byte*)CONIO_SCREEN_TEXT#17
[305] vera_layer_get_backcolor::layer#0 = conio_screen_layer
[306] call vera_layer_get_backcolor
[307] vera_layer_get_backcolor::return#0 = vera_layer_get_backcolor::return#1
to:clrscr::@7
clrscr::@7: scope:[clrscr] from clrscr
[310] clrscr::$0 = vera_layer_get_backcolor::return#0
[311] clrscr::$1 = clrscr::$0 << 4
[312] vera_layer_get_textcolor::layer#0 = conio_screen_layer
[313] call vera_layer_get_textcolor
[314] vera_layer_get_textcolor::return#0 = vera_layer_get_textcolor::return#1
[308] clrscr::$0 = vera_layer_get_backcolor::return#0
[309] clrscr::$1 = clrscr::$0 << 4
[310] vera_layer_get_textcolor::layer#0 = conio_screen_layer
[311] call vera_layer_get_textcolor
[312] vera_layer_get_textcolor::return#0 = vera_layer_get_textcolor::return#1
to:clrscr::@8
clrscr::@8: scope:[clrscr] from clrscr::@7
[315] clrscr::$2 = vera_layer_get_textcolor::return#0
[316] clrscr::color#0 = clrscr::$1 | clrscr::$2
[313] clrscr::$2 = vera_layer_get_textcolor::return#0
[314] clrscr::color#0 = clrscr::$1 | clrscr::$2
to:clrscr::@1
clrscr::@1: scope:[clrscr] from clrscr::@6 clrscr::@8
[317] clrscr::line_text#2 = phi( clrscr::@6/clrscr::line_text#1, clrscr::@8/clrscr::line_text#0 )
[317] clrscr::l#2 = phi( clrscr::@6/clrscr::l#1, clrscr::@8/0 )
[318] if(clrscr::l#2<conio_height) goto clrscr::@2
[315] clrscr::line_text#2 = phi( clrscr::@6/clrscr::line_text#1, clrscr::@8/clrscr::line_text#0 )
[315] clrscr::l#2 = phi( clrscr::@6/clrscr::l#1, clrscr::@8/0 )
[316] if(clrscr::l#2<conio_height) goto clrscr::@2
to:clrscr::@3
clrscr::@3: scope:[clrscr] from clrscr::@1
[319] conio_cursor_x[conio_screen_layer] = 0
[320] conio_cursor_y[conio_screen_layer] = 0
[321] clrscr::$9 = conio_screen_layer << 1
[322] conio_line_text[clrscr::$9] = 0
[317] conio_cursor_x[conio_screen_layer] = 0
[318] conio_cursor_y[conio_screen_layer] = 0
[319] clrscr::$9 = conio_screen_layer << 1
[320] conio_line_text[clrscr::$9] = 0
to:clrscr::@return
clrscr::@return: scope:[clrscr] from clrscr::@3
[323] return
[321] return
to:@return
clrscr::@2: scope:[clrscr] from clrscr::@1
[324] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[325] clrscr::$5 = < clrscr::line_text#2
[326] *VERA_ADDRX_L = clrscr::$5
[327] clrscr::$6 = > clrscr::line_text#2
[328] *VERA_ADDRX_M = clrscr::$6
[329] clrscr::$7 = CONIO_SCREEN_BANK#15 | VERA_INC_1
[330] *VERA_ADDRX_H = clrscr::$7
[322] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[323] clrscr::$5 = < clrscr::line_text#2
[324] *VERA_ADDRX_L = clrscr::$5
[325] clrscr::$6 = > clrscr::line_text#2
[326] *VERA_ADDRX_M = clrscr::$6
[327] clrscr::$7 = CONIO_SCREEN_BANK#15 | VERA_INC_1
[328] *VERA_ADDRX_H = clrscr::$7
to:clrscr::@4
clrscr::@4: scope:[clrscr] from clrscr::@2 clrscr::@5
[331] clrscr::c#2 = phi( clrscr::@2/0, clrscr::@5/clrscr::c#1 )
[332] if(clrscr::c#2<conio_width) goto clrscr::@5
[329] clrscr::c#2 = phi( clrscr::@2/0, clrscr::@5/clrscr::c#1 )
[330] if(clrscr::c#2<conio_width) goto clrscr::@5
to:clrscr::@6
clrscr::@6: scope:[clrscr] from clrscr::@4
[333] clrscr::line_text#1 = clrscr::line_text#2 + conio_rowskip
[334] clrscr::l#1 = ++ clrscr::l#2
[331] clrscr::line_text#1 = clrscr::line_text#2 + conio_rowskip
[332] clrscr::l#1 = ++ clrscr::l#2
to:clrscr::@1
clrscr::@5: scope:[clrscr] from clrscr::@4
[335] *VERA_DATA0 = ' '
[336] *VERA_DATA0 = clrscr::color#0
[337] clrscr::c#1 = ++ clrscr::c#2
[333] *VERA_DATA0 = ' '
[334] *VERA_DATA0 = clrscr::color#0
[335] clrscr::c#1 = ++ clrscr::c#2
to:clrscr::@4
void memcpy_to_vram(byte memcpy_to_vram::vbank , void* memcpy_to_vram::vdest , void* memcpy_to_vram::src , word memcpy_to_vram::num)
memcpy_to_vram: scope:[memcpy_to_vram] from main::@22 main::@3
[338] memcpy_to_vram::vdest#2 = phi( main::@22/(void*)(byte*) 0, main::@3/memcpy_to_vram::vdest#1 )
[339] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[340] memcpy_to_vram::$0 = < memcpy_to_vram::vdest#2
[341] *VERA_ADDRX_L = memcpy_to_vram::$0
[342] memcpy_to_vram::$1 = > memcpy_to_vram::vdest#2
[343] *VERA_ADDRX_M = memcpy_to_vram::$1
[344] *VERA_ADDRX_H = VERA_INC_1
[336] memcpy_to_vram::vdest#2 = phi( main::@22/(void*)(byte*) 0, main::@3/memcpy_to_vram::vdest#1 )
[337] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[338] memcpy_to_vram::$0 = < memcpy_to_vram::vdest#2
[339] *VERA_ADDRX_L = memcpy_to_vram::$0
[340] memcpy_to_vram::$1 = > memcpy_to_vram::vdest#2
[341] *VERA_ADDRX_M = memcpy_to_vram::$1
[342] *VERA_ADDRX_H = VERA_INC_1
to:memcpy_to_vram::@1
memcpy_to_vram::@1: scope:[memcpy_to_vram] from memcpy_to_vram memcpy_to_vram::@2
[345] memcpy_to_vram::s#2 = phi( memcpy_to_vram/(byte*)(void*)main::tiles, memcpy_to_vram::@2/memcpy_to_vram::s#1 )
[346] if(memcpy_to_vram::s#2!=memcpy_to_vram::end#0) goto memcpy_to_vram::@2
[343] memcpy_to_vram::s#2 = phi( memcpy_to_vram/(byte*)(void*)main::tiles, memcpy_to_vram::@2/memcpy_to_vram::s#1 )
[344] if(memcpy_to_vram::s#2!=memcpy_to_vram::end#0) goto memcpy_to_vram::@2
to:memcpy_to_vram::@return
memcpy_to_vram::@return: scope:[memcpy_to_vram] from memcpy_to_vram::@1
[347] return
[345] return
to:@return
memcpy_to_vram::@2: scope:[memcpy_to_vram] from memcpy_to_vram::@1
[348] *VERA_DATA0 = *memcpy_to_vram::s#2
[349] memcpy_to_vram::s#1 = ++ memcpy_to_vram::s#2
[346] *VERA_DATA0 = *memcpy_to_vram::s#2
[347] memcpy_to_vram::s#1 = ++ memcpy_to_vram::s#2
to:memcpy_to_vram::@1
void vera_tile_area(byte vera_tile_area::layer , word vera_tile_area::tileindex , byte vera_tile_area::x , byte vera_tile_area::y , byte vera_tile_area::w , byte vera_tile_area::h , byte vera_tile_area::hflip , byte vera_tile_area::vflip , byte vera_tile_area::offset)
vera_tile_area: scope:[vera_tile_area] from main::@10 main::@12 main::@15 main::@4 main::@6
[350] vera_tile_area::w#11 = phi( main::@10/$28, main::@12/2, main::@15/$28, main::@4/$28, main::@6/1 )
[350] vera_tile_area::h#6 = phi( main::@10/$1e, main::@12/2, main::@15/$1e, main::@4/$1e, main::@6/1 )
[350] vera_tile_area::x#5 = phi( main::@10/0, main::@12/vera_tile_area::x#3, main::@15/0, main::@4/0, main::@6/vera_tile_area::x#1 )
[350] vera_tile_area::y#5 = phi( main::@10/0, main::@12/vera_tile_area::y#3, main::@15/0, main::@4/0, main::@6/vera_tile_area::y#1 )
[350] vera_tile_area::tileindex#5 = phi( main::@10/0, main::@12/vera_tile_area::tileindex#3, main::@15/0, main::@4/0, main::@6/vera_tile_area::tileindex#1 )
[351] vera_tile_area::mapbase#0 = *vera_mapbase_address
[352] vera_tile_area::shift#0 = *vera_layer_rowshift
[353] vera_tile_area::rowskip#0 = 1 << vera_tile_area::shift#0
[354] vera_tile_area::hflip#0 = *vera_layer_hflip
[355] vera_tile_area::vflip#0 = *vera_layer_vflip
[356] vera_tile_area::index_l#0 = < vera_tile_area::tileindex#5
[357] vera_tile_area::index_h#0 = > vera_tile_area::tileindex#5
[358] vera_tile_area::index_h#1 = vera_tile_area::index_h#0 | vera_tile_area::hflip#0
[359] vera_tile_area::index_h#2 = vera_tile_area::index_h#1 | vera_tile_area::vflip#0
[360] vera_tile_area::$10 = (word)vera_tile_area::y#5
[361] vera_tile_area::$4 = vera_tile_area::$10 << vera_tile_area::shift#0
[362] vera_tile_area::mapbase#1 = vera_tile_area::mapbase#0 + vera_tile_area::$4
[363] vera_tile_area::$5 = vera_tile_area::x#5 << 1
[364] vera_tile_area::mapbase#2 = vera_tile_area::mapbase#1 + vera_tile_area::$5
[348] vera_tile_area::w#11 = phi( main::@10/$28, main::@12/2, main::@15/$28, main::@4/$28, main::@6/1 )
[348] vera_tile_area::h#6 = phi( main::@10/$1e, main::@12/2, main::@15/$1e, main::@4/$1e, main::@6/1 )
[348] vera_tile_area::x#5 = phi( main::@10/0, main::@12/vera_tile_area::x#3, main::@15/0, main::@4/0, main::@6/vera_tile_area::x#1 )
[348] vera_tile_area::y#5 = phi( main::@10/0, main::@12/vera_tile_area::y#3, main::@15/0, main::@4/0, main::@6/vera_tile_area::y#1 )
[348] vera_tile_area::tileindex#5 = phi( main::@10/0, main::@12/vera_tile_area::tileindex#3, main::@15/0, main::@4/0, main::@6/vera_tile_area::tileindex#1 )
[349] vera_tile_area::mapbase#0 = *vera_mapbase_address
[350] vera_tile_area::shift#0 = *vera_layer_rowshift
[351] vera_tile_area::rowskip#0 = 1 << vera_tile_area::shift#0
[352] vera_tile_area::hflip#0 = *vera_layer_hflip
[353] vera_tile_area::vflip#0 = *vera_layer_vflip
[354] vera_tile_area::index_l#0 = < vera_tile_area::tileindex#5
[355] vera_tile_area::index_h#0 = > vera_tile_area::tileindex#5
[356] vera_tile_area::index_h#1 = vera_tile_area::index_h#0 | vera_tile_area::hflip#0
[357] vera_tile_area::index_h#2 = vera_tile_area::index_h#1 | vera_tile_area::vflip#0
[358] vera_tile_area::$10 = (word)vera_tile_area::y#5
[359] vera_tile_area::$4 = vera_tile_area::$10 << vera_tile_area::shift#0
[360] vera_tile_area::mapbase#1 = vera_tile_area::mapbase#0 + vera_tile_area::$4
[361] vera_tile_area::$5 = vera_tile_area::x#5 << 1
[362] vera_tile_area::mapbase#2 = vera_tile_area::mapbase#1 + vera_tile_area::$5
to:vera_tile_area::@1
vera_tile_area::@1: scope:[vera_tile_area] from vera_tile_area vera_tile_area::@4
[365] vera_tile_area::mapbase#10 = phi( vera_tile_area/vera_tile_area::mapbase#2, vera_tile_area::@4/vera_tile_area::mapbase#3 )
[365] vera_tile_area::r#2 = phi( vera_tile_area/0, vera_tile_area::@4/vera_tile_area::r#1 )
[366] if(vera_tile_area::r#2<vera_tile_area::h#6) goto vera_tile_area::vera_vram_address01
[363] vera_tile_area::mapbase#10 = phi( vera_tile_area/vera_tile_area::mapbase#2, vera_tile_area::@4/vera_tile_area::mapbase#3 )
[363] vera_tile_area::r#2 = phi( vera_tile_area/0, vera_tile_area::@4/vera_tile_area::r#1 )
[364] if(vera_tile_area::r#2<vera_tile_area::h#6) goto vera_tile_area::vera_vram_address01
to:vera_tile_area::@return
vera_tile_area::@return: scope:[vera_tile_area] from vera_tile_area::@1
[367] return
[365] return
to:@return
vera_tile_area::vera_vram_address01: scope:[vera_tile_area] from vera_tile_area::@1
[368] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[369] vera_tile_area::vera_vram_address01_$0 = < vera_tile_area::mapbase#10
[370] vera_tile_area::vera_vram_address01_$1 = < vera_tile_area::vera_vram_address01_$0
[371] *VERA_ADDRX_L = vera_tile_area::vera_vram_address01_$1
[372] vera_tile_area::vera_vram_address01_$2 = < vera_tile_area::mapbase#10
[373] vera_tile_area::vera_vram_address01_$3 = > vera_tile_area::vera_vram_address01_$2
[374] *VERA_ADDRX_M = vera_tile_area::vera_vram_address01_$3
[375] vera_tile_area::vera_vram_address01_$4 = > vera_tile_area::mapbase#10
[376] vera_tile_area::vera_vram_address01_$5 = < vera_tile_area::vera_vram_address01_$4
[377] vera_tile_area::vera_vram_address01_$6 = vera_tile_area::vera_vram_address01_$5 | VERA_INC_1
[378] *VERA_ADDRX_H = vera_tile_area::vera_vram_address01_$6
[366] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[367] vera_tile_area::vera_vram_address01_$0 = < vera_tile_area::mapbase#10
[368] *VERA_ADDRX_L = vera_tile_area::vera_vram_address01_$0
[369] vera_tile_area::vera_vram_address01_$1 = > vera_tile_area::mapbase#10
[370] *VERA_ADDRX_M = vera_tile_area::vera_vram_address01_$1
[371] vera_tile_area::vera_vram_address01_$2 = _byte2_ vera_tile_area::mapbase#10
[372] vera_tile_area::vera_vram_address01_$3 = vera_tile_area::vera_vram_address01_$2 | VERA_INC_1
[373] *VERA_ADDRX_H = vera_tile_area::vera_vram_address01_$3
to:vera_tile_area::@2
vera_tile_area::@2: scope:[vera_tile_area] from vera_tile_area::@3 vera_tile_area::vera_vram_address01
[379] vera_tile_area::c#2 = phi( vera_tile_area::@3/vera_tile_area::c#1, vera_tile_area::vera_vram_address01/0 )
[380] if(vera_tile_area::c#2<vera_tile_area::w#11) goto vera_tile_area::@3
[374] vera_tile_area::c#2 = phi( vera_tile_area::@3/vera_tile_area::c#1, vera_tile_area::vera_vram_address01/0 )
[375] if(vera_tile_area::c#2<vera_tile_area::w#11) goto vera_tile_area::@3
to:vera_tile_area::@4
vera_tile_area::@4: scope:[vera_tile_area] from vera_tile_area::@2
[381] vera_tile_area::mapbase#3 = vera_tile_area::mapbase#10 + vera_tile_area::rowskip#0
[382] vera_tile_area::r#1 = ++ vera_tile_area::r#2
[376] vera_tile_area::mapbase#3 = vera_tile_area::mapbase#10 + vera_tile_area::rowskip#0
[377] vera_tile_area::r#1 = ++ vera_tile_area::r#2
to:vera_tile_area::@1
vera_tile_area::@3: scope:[vera_tile_area] from vera_tile_area::@2
[383] *VERA_DATA0 = vera_tile_area::index_l#0
[384] *VERA_DATA0 = vera_tile_area::index_h#2
[385] vera_tile_area::c#1 = ++ vera_tile_area::c#2
[378] *VERA_DATA0 = vera_tile_area::index_l#0
[379] *VERA_DATA0 = vera_tile_area::index_h#2
[380] vera_tile_area::c#1 = ++ vera_tile_area::c#2
to:vera_tile_area::@2
void cputs(const byte* cputs::s)
cputs: scope:[cputs] from main::@25 main::@26 main::@27 main::@28 main::@29 main::@30 main::@31 main::@32
[386] cputs::s#10 = phi( main::@25/main::s, main::@26/main::s1, main::@27/main::s2, main::@28/main::s3, main::@29/main::s4, main::@30/main::s5, main::@31/main::s6, main::@32/main::s7 )
[381] cputs::s#10 = phi( main::@25/main::s, main::@26/main::s1, main::@27/main::s2, main::@28/main::s3, main::@29/main::s4, main::@30/main::s5, main::@31/main::s6, main::@32/main::s7 )
to:cputs::@1
cputs::@1: scope:[cputs] from cputs cputs::@2
[387] cputs::s#9 = phi( cputs/cputs::s#10, cputs::@2/cputs::s#0 )
[388] cputs::c#1 = *cputs::s#9
[389] cputs::s#0 = ++ cputs::s#9
[390] if(0!=cputs::c#1) goto cputs::@2
[382] cputs::s#9 = phi( cputs/cputs::s#10, cputs::@2/cputs::s#0 )
[383] cputs::c#1 = *cputs::s#9
[384] cputs::s#0 = ++ cputs::s#9
[385] if(0!=cputs::c#1) goto cputs::@2
to:cputs::@return
cputs::@return: scope:[cputs] from cputs::@1
[391] return
[386] return
to:@return
cputs::@2: scope:[cputs] from cputs::@1
[392] cputc::c#0 = cputs::c#1
[393] call cputc
[387] cputc::c#0 = cputs::c#1
[388] call cputc
to:cputs::@1
byte kbhit()
kbhit: scope:[kbhit] from main::@14 main::@9
[394] kbhit::ch = 0
[389] kbhit::ch = 0
kickasm( uses kbhit::chptr uses kbhit::IN_DEV uses kbhit::GETIN) {{ jsr _kbhit
bne L3
@ -783,264 +778,264 @@ kbhit: scope:[kbhit] from main::@14 main::@9
continue1:
nop
}}
[396] kbhit::return#0 = kbhit::ch
[391] kbhit::return#0 = kbhit::ch
to:kbhit::@return
kbhit::@return: scope:[kbhit] from kbhit
[397] kbhit::return#1 = kbhit::return#0
[398] return
[392] kbhit::return#1 = kbhit::return#0
[393] return
to:@return
void vera_layer_set_text_color_mode(byte vera_layer_set_text_color_mode::layer , byte vera_layer_set_text_color_mode::color_mode)
vera_layer_set_text_color_mode: scope:[vera_layer_set_text_color_mode] from vera_layer_mode_text::@1
[399] vera_layer_set_text_color_mode::addr#0 = *(vera_layer_config+vera_layer_mode_text::layer#0*SIZEOF_POINTER)
[400] *vera_layer_set_text_color_mode::addr#0 = *vera_layer_set_text_color_mode::addr#0 & ~VERA_LAYER_CONFIG_256C
[401] *vera_layer_set_text_color_mode::addr#0 = *vera_layer_set_text_color_mode::addr#0
[394] vera_layer_set_text_color_mode::addr#0 = *(vera_layer_config+vera_layer_mode_text::layer#0*SIZEOF_POINTER)
[395] *vera_layer_set_text_color_mode::addr#0 = *vera_layer_set_text_color_mode::addr#0 & ~VERA_LAYER_CONFIG_256C
[396] *vera_layer_set_text_color_mode::addr#0 = *vera_layer_set_text_color_mode::addr#0
to:vera_layer_set_text_color_mode::@return
vera_layer_set_text_color_mode::@return: scope:[vera_layer_set_text_color_mode] from vera_layer_set_text_color_mode
[402] return
[397] return
to:@return
byte vera_layer_get_mapbase_bank(byte vera_layer_get_mapbase_bank::layer)
vera_layer_get_mapbase_bank: scope:[vera_layer_get_mapbase_bank] from screenlayer
[403] vera_layer_get_mapbase_bank::return#0 = vera_mapbase_bank[vera_layer_get_mapbase_bank::layer#0]
[398] vera_layer_get_mapbase_bank::return#0 = vera_mapbase_bank[vera_layer_get_mapbase_bank::layer#0]
to:vera_layer_get_mapbase_bank::@return
vera_layer_get_mapbase_bank::@return: scope:[vera_layer_get_mapbase_bank] from vera_layer_get_mapbase_bank
[404] return
[399] return
to:@return
word vera_layer_get_mapbase_offset(byte vera_layer_get_mapbase_offset::layer)
vera_layer_get_mapbase_offset: scope:[vera_layer_get_mapbase_offset] from screenlayer::@3
[405] vera_layer_get_mapbase_offset::$0 = vera_layer_get_mapbase_offset::layer#0 << 1
[406] vera_layer_get_mapbase_offset::return#0 = vera_mapbase_offset[vera_layer_get_mapbase_offset::$0]
[400] vera_layer_get_mapbase_offset::$0 = vera_layer_get_mapbase_offset::layer#0 << 1
[401] vera_layer_get_mapbase_offset::return#0 = vera_mapbase_offset[vera_layer_get_mapbase_offset::$0]
to:vera_layer_get_mapbase_offset::@return
vera_layer_get_mapbase_offset::@return: scope:[vera_layer_get_mapbase_offset] from vera_layer_get_mapbase_offset
[407] return
[402] return
to:@return
byte vera_layer_get_rowshift(byte vera_layer_get_rowshift::layer)
vera_layer_get_rowshift: scope:[vera_layer_get_rowshift] from screenlayer::@1
[408] vera_layer_get_rowshift::return#0 = vera_layer_rowshift[vera_layer_get_rowshift::layer#0]
[403] vera_layer_get_rowshift::return#0 = vera_layer_rowshift[vera_layer_get_rowshift::layer#0]
to:vera_layer_get_rowshift::@return
vera_layer_get_rowshift::@return: scope:[vera_layer_get_rowshift] from vera_layer_get_rowshift
[409] return
[404] return
to:@return
word vera_layer_get_rowskip(byte vera_layer_get_rowskip::layer)
vera_layer_get_rowskip: scope:[vera_layer_get_rowskip] from screenlayer::@5
[410] vera_layer_get_rowskip::$0 = vera_layer_get_rowskip::layer#0 << 1
[411] vera_layer_get_rowskip::return#0 = vera_layer_rowskip[vera_layer_get_rowskip::$0]
[405] vera_layer_get_rowskip::$0 = vera_layer_get_rowskip::layer#0 << 1
[406] vera_layer_get_rowskip::return#0 = vera_layer_rowskip[vera_layer_get_rowskip::$0]
to:vera_layer_get_rowskip::@return
vera_layer_get_rowskip::@return: scope:[vera_layer_get_rowskip] from vera_layer_get_rowskip
[412] return
[407] return
to:@return
void vera_layer_set_config(byte vera_layer_set_config::layer , byte vera_layer_set_config::config)
vera_layer_set_config: scope:[vera_layer_set_config] from vera_layer_mode_tile::@20
[413] vera_layer_set_config::$0 = vera_layer_set_config::layer#0 << 1
[414] vera_layer_set_config::addr#0 = vera_layer_config[vera_layer_set_config::$0]
[415] *vera_layer_set_config::addr#0 = vera_layer_set_config::config#0
[408] vera_layer_set_config::$0 = vera_layer_set_config::layer#0 << 1
[409] vera_layer_set_config::addr#0 = vera_layer_config[vera_layer_set_config::$0]
[410] *vera_layer_set_config::addr#0 = vera_layer_set_config::config#0
to:vera_layer_set_config::@return
vera_layer_set_config::@return: scope:[vera_layer_set_config] from vera_layer_set_config
[416] return
[411] return
to:@return
void vera_layer_set_tilebase(byte vera_layer_set_tilebase::layer , byte vera_layer_set_tilebase::tilebase)
vera_layer_set_tilebase: scope:[vera_layer_set_tilebase] from vera_layer_mode_tile::@26
[417] vera_layer_set_tilebase::$0 = vera_layer_set_tilebase::layer#0 << 1
[418] vera_layer_set_tilebase::addr#0 = vera_layer_tilebase[vera_layer_set_tilebase::$0]
[419] *vera_layer_set_tilebase::addr#0 = vera_layer_set_tilebase::tilebase#0
[412] vera_layer_set_tilebase::$0 = vera_layer_set_tilebase::layer#0 << 1
[413] vera_layer_set_tilebase::addr#0 = vera_layer_tilebase[vera_layer_set_tilebase::$0]
[414] *vera_layer_set_tilebase::addr#0 = vera_layer_set_tilebase::tilebase#0
to:vera_layer_set_tilebase::@return
vera_layer_set_tilebase::@return: scope:[vera_layer_set_tilebase] from vera_layer_set_tilebase
[420] return
[415] return
to:@return
byte vera_layer_get_backcolor(byte vera_layer_get_backcolor::layer)
vera_layer_get_backcolor: scope:[vera_layer_get_backcolor] from clrscr
[421] vera_layer_get_backcolor::return#1 = vera_layer_backcolor[vera_layer_get_backcolor::layer#0]
[416] vera_layer_get_backcolor::return#1 = vera_layer_backcolor[vera_layer_get_backcolor::layer#0]
to:vera_layer_get_backcolor::@return
vera_layer_get_backcolor::@return: scope:[vera_layer_get_backcolor] from vera_layer_get_backcolor
[422] return
[417] return
to:@return
byte vera_layer_get_textcolor(byte vera_layer_get_textcolor::layer)
vera_layer_get_textcolor: scope:[vera_layer_get_textcolor] from clrscr::@7
[423] vera_layer_get_textcolor::return#1 = vera_layer_textcolor[vera_layer_get_textcolor::layer#0]
[418] vera_layer_get_textcolor::return#1 = vera_layer_textcolor[vera_layer_get_textcolor::layer#0]
to:vera_layer_get_textcolor::@return
vera_layer_get_textcolor::@return: scope:[vera_layer_get_textcolor] from vera_layer_get_textcolor
[424] return
[419] return
to:@return
void cputc(byte cputc::c)
cputc: scope:[cputc] from cputs::@2
[425] vera_layer_get_color::layer#0 = conio_screen_layer
[426] call vera_layer_get_color
[427] vera_layer_get_color::return#0 = vera_layer_get_color::return#3
[420] vera_layer_get_color::layer#0 = conio_screen_layer
[421] call vera_layer_get_color
[422] vera_layer_get_color::return#0 = vera_layer_get_color::return#3
to:cputc::@7
cputc::@7: scope:[cputc] from cputc
[428] cputc::color#0 = vera_layer_get_color::return#0
[429] cputc::$15 = conio_screen_layer << 1
[430] cputc::conio_addr#0 = (byte*)CONIO_SCREEN_TEXT#17 + conio_line_text[cputc::$15]
[431] cputc::$2 = conio_cursor_x[conio_screen_layer] << 1
[432] cputc::conio_addr#1 = cputc::conio_addr#0 + cputc::$2
[433] if(cputc::c#0=='
[423] cputc::color#0 = vera_layer_get_color::return#0
[424] cputc::$15 = conio_screen_layer << 1
[425] cputc::conio_addr#0 = (byte*)CONIO_SCREEN_TEXT#17 + conio_line_text[cputc::$15]
[426] cputc::$2 = conio_cursor_x[conio_screen_layer] << 1
[427] cputc::conio_addr#1 = cputc::conio_addr#0 + cputc::$2
[428] if(cputc::c#0=='
') goto cputc::@1
to:cputc::@2
cputc::@2: scope:[cputc] from cputc::@7
[434] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[435] cputc::$4 = < cputc::conio_addr#1
[436] *VERA_ADDRX_L = cputc::$4
[437] cputc::$5 = > cputc::conio_addr#1
[438] *VERA_ADDRX_M = cputc::$5
[439] cputc::$6 = CONIO_SCREEN_BANK#15 | VERA_INC_1
[440] *VERA_ADDRX_H = cputc::$6
[441] *VERA_DATA0 = cputc::c#0
[442] *VERA_DATA0 = cputc::color#0
[443] conio_cursor_x[conio_screen_layer] = ++ conio_cursor_x[conio_screen_layer]
[444] cputc::scroll_enable#0 = conio_scroll_enable[conio_screen_layer]
[445] if(0!=cputc::scroll_enable#0) goto cputc::@5
[429] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[430] cputc::$4 = < cputc::conio_addr#1
[431] *VERA_ADDRX_L = cputc::$4
[432] cputc::$5 = > cputc::conio_addr#1
[433] *VERA_ADDRX_M = cputc::$5
[434] cputc::$6 = CONIO_SCREEN_BANK#15 | VERA_INC_1
[435] *VERA_ADDRX_H = cputc::$6
[436] *VERA_DATA0 = cputc::c#0
[437] *VERA_DATA0 = cputc::color#0
[438] conio_cursor_x[conio_screen_layer] = ++ conio_cursor_x[conio_screen_layer]
[439] cputc::scroll_enable#0 = conio_scroll_enable[conio_screen_layer]
[440] if(0!=cputc::scroll_enable#0) goto cputc::@5
to:cputc::@3
cputc::@3: scope:[cputc] from cputc::@2
[446] cputc::$16 = (word)conio_cursor_x[conio_screen_layer]
[447] if(cputc::$16!=conio_width) goto cputc::@return
[441] cputc::$16 = (word)conio_cursor_x[conio_screen_layer]
[442] if(cputc::$16!=conio_width) goto cputc::@return
to:cputc::@4
cputc::@4: scope:[cputc] from cputc::@3
[448] phi()
[449] call cputln
[443] phi()
[444] call cputln
to:cputc::@return
cputc::@return: scope:[cputc] from cputc::@1 cputc::@3 cputc::@4 cputc::@5 cputc::@6
[450] return
[445] return
to:@return
cputc::@5: scope:[cputc] from cputc::@2
[451] if(conio_cursor_x[conio_screen_layer]!=conio_screen_width) goto cputc::@return
[446] if(conio_cursor_x[conio_screen_layer]!=conio_screen_width) goto cputc::@return
to:cputc::@6
cputc::@6: scope:[cputc] from cputc::@5
[452] phi()
[453] call cputln
[447] phi()
[448] call cputln
to:cputc::@return
cputc::@1: scope:[cputc] from cputc::@7
[454] phi()
[455] call cputln
[449] phi()
[450] call cputln
to:cputc::@return
byte vera_layer_get_color(byte vera_layer_get_color::layer)
vera_layer_get_color: scope:[vera_layer_get_color] from clearline cputc
[456] vera_layer_get_color::layer#2 = phi( clearline/vera_layer_get_color::layer#1, cputc/vera_layer_get_color::layer#0 )
[457] vera_layer_get_color::$3 = vera_layer_get_color::layer#2 << 1
[458] vera_layer_get_color::addr#0 = vera_layer_config[vera_layer_get_color::$3]
[459] vera_layer_get_color::$0 = *vera_layer_get_color::addr#0 & VERA_LAYER_CONFIG_256C
[460] if(0!=vera_layer_get_color::$0) goto vera_layer_get_color::@1
[451] vera_layer_get_color::layer#2 = phi( clearline/vera_layer_get_color::layer#1, cputc/vera_layer_get_color::layer#0 )
[452] vera_layer_get_color::$3 = vera_layer_get_color::layer#2 << 1
[453] vera_layer_get_color::addr#0 = vera_layer_config[vera_layer_get_color::$3]
[454] vera_layer_get_color::$0 = *vera_layer_get_color::addr#0 & VERA_LAYER_CONFIG_256C
[455] if(0!=vera_layer_get_color::$0) goto vera_layer_get_color::@1
to:vera_layer_get_color::@2
vera_layer_get_color::@2: scope:[vera_layer_get_color] from vera_layer_get_color
[461] vera_layer_get_color::$1 = vera_layer_backcolor[vera_layer_get_color::layer#2] << 4
[462] vera_layer_get_color::return#2 = vera_layer_get_color::$1 | vera_layer_textcolor[vera_layer_get_color::layer#2]
[456] vera_layer_get_color::$1 = vera_layer_backcolor[vera_layer_get_color::layer#2] << 4
[457] vera_layer_get_color::return#2 = vera_layer_get_color::$1 | vera_layer_textcolor[vera_layer_get_color::layer#2]
to:vera_layer_get_color::@return
vera_layer_get_color::@return: scope:[vera_layer_get_color] from vera_layer_get_color::@1 vera_layer_get_color::@2
[463] vera_layer_get_color::return#3 = phi( vera_layer_get_color::@1/vera_layer_get_color::return#1, vera_layer_get_color::@2/vera_layer_get_color::return#2 )
[464] return
[458] vera_layer_get_color::return#3 = phi( vera_layer_get_color::@1/vera_layer_get_color::return#1, vera_layer_get_color::@2/vera_layer_get_color::return#2 )
[459] return
to:@return
vera_layer_get_color::@1: scope:[vera_layer_get_color] from vera_layer_get_color
[465] vera_layer_get_color::return#1 = vera_layer_textcolor[vera_layer_get_color::layer#2]
[460] vera_layer_get_color::return#1 = vera_layer_textcolor[vera_layer_get_color::layer#2]
to:vera_layer_get_color::@return
void cputln()
cputln: scope:[cputln] from cputc::@1 cputc::@4 cputc::@6
[466] cputln::$2 = conio_screen_layer << 1
[467] cputln::temp#0 = conio_line_text[cputln::$2]
[468] cputln::temp#1 = cputln::temp#0 + conio_rowskip
[469] cputln::$3 = conio_screen_layer << 1
[470] conio_line_text[cputln::$3] = cputln::temp#1
[471] conio_cursor_x[conio_screen_layer] = 0
[472] conio_cursor_y[conio_screen_layer] = ++ conio_cursor_y[conio_screen_layer]
[473] call cscroll
[461] cputln::$2 = conio_screen_layer << 1
[462] cputln::temp#0 = conio_line_text[cputln::$2]
[463] cputln::temp#1 = cputln::temp#0 + conio_rowskip
[464] cputln::$3 = conio_screen_layer << 1
[465] conio_line_text[cputln::$3] = cputln::temp#1
[466] conio_cursor_x[conio_screen_layer] = 0
[467] conio_cursor_y[conio_screen_layer] = ++ conio_cursor_y[conio_screen_layer]
[468] call cscroll
to:cputln::@return
cputln::@return: scope:[cputln] from cputln
[474] return
[469] return
to:@return
void cscroll()
cscroll: scope:[cscroll] from cputln
[475] if(conio_cursor_y[conio_screen_layer]<conio_screen_height) goto cscroll::@return
[470] if(conio_cursor_y[conio_screen_layer]<conio_screen_height) goto cscroll::@return
to:cscroll::@1
cscroll::@1: scope:[cscroll] from cscroll
[476] if(0!=conio_scroll_enable[conio_screen_layer]) goto cscroll::@4
[471] if(0!=conio_scroll_enable[conio_screen_layer]) goto cscroll::@4
to:cscroll::@2
cscroll::@2: scope:[cscroll] from cscroll::@1
[477] if(conio_cursor_y[conio_screen_layer]<conio_height) goto cscroll::@return
[472] if(conio_cursor_y[conio_screen_layer]<conio_height) goto cscroll::@return
to:cscroll::@3
cscroll::@3: scope:[cscroll] from cscroll::@2
[478] phi()
[473] phi()
to:cscroll::@return
cscroll::@return: scope:[cscroll] from cscroll cscroll::@2 cscroll::@3 cscroll::@5
[479] return
[474] return
to:@return
cscroll::@4: scope:[cscroll] from cscroll::@1
[480] phi()
[481] call insertup
[475] phi()
[476] call insertup
to:cscroll::@5
cscroll::@5: scope:[cscroll] from cscroll::@4
[482] gotoxy::y#2 = conio_screen_height - 1
[483] call gotoxy
[477] gotoxy::y#2 = conio_screen_height - 1
[478] call gotoxy
to:cscroll::@return
void insertup()
insertup: scope:[insertup] from cscroll::@4
[484] insertup::cy#0 = conio_cursor_y[conio_screen_layer]
[485] insertup::width#0 = conio_screen_width << 1
[479] insertup::cy#0 = conio_cursor_y[conio_screen_layer]
[480] insertup::width#0 = conio_screen_width << 1
to:insertup::@1
insertup::@1: scope:[insertup] from insertup insertup::@4
[486] insertup::i#2 = phi( insertup/1, insertup::@4/insertup::i#1 )
[487] if(insertup::i#2<=insertup::cy#0) goto insertup::@2
[481] insertup::i#2 = phi( insertup/1, insertup::@4/insertup::i#1 )
[482] if(insertup::i#2<=insertup::cy#0) goto insertup::@2
to:insertup::@3
insertup::@3: scope:[insertup] from insertup::@1
[488] phi()
[489] call clearline
[483] phi()
[484] call clearline
to:insertup::@return
insertup::@return: scope:[insertup] from insertup::@3
[490] return
[485] return
to:@return
insertup::@2: scope:[insertup] from insertup::@1
[491] insertup::$3 = insertup::i#2 - 1
[492] insertup::line#0 = insertup::$3 << conio_rowshift
[493] insertup::start#0 = (byte*)CONIO_SCREEN_TEXT#17 + insertup::line#0
[494] memcpy_in_vram::src#0 = insertup::start#0 + conio_rowskip
[495] memcpy_in_vram::dest#0 = (void*)insertup::start#0
[496] memcpy_in_vram::num#0 = insertup::width#0
[497] memcpy_in_vram::src#4 = (void*)memcpy_in_vram::src#0
[498] call memcpy_in_vram
[486] insertup::$3 = insertup::i#2 - 1
[487] insertup::line#0 = insertup::$3 << conio_rowshift
[488] insertup::start#0 = (byte*)CONIO_SCREEN_TEXT#17 + insertup::line#0
[489] memcpy_in_vram::src#0 = insertup::start#0 + conio_rowskip
[490] memcpy_in_vram::dest#0 = (void*)insertup::start#0
[491] memcpy_in_vram::num#0 = insertup::width#0
[492] memcpy_in_vram::src#4 = (void*)memcpy_in_vram::src#0
[493] call memcpy_in_vram
to:insertup::@4
insertup::@4: scope:[insertup] from insertup::@2
[499] insertup::i#1 = ++ insertup::i#2
[494] insertup::i#1 = ++ insertup::i#2
to:insertup::@1
void clearline()
clearline: scope:[clearline] from insertup::@3
[500] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[501] clearline::$5 = conio_screen_layer << 1
[502] clearline::addr#0 = (byte*)CONIO_SCREEN_TEXT#17 + conio_line_text[clearline::$5]
[503] clearline::$1 = < clearline::addr#0
[504] *VERA_ADDRX_L = clearline::$1
[505] clearline::$2 = > clearline::addr#0
[506] *VERA_ADDRX_M = clearline::$2
[507] *VERA_ADDRX_H = VERA_INC_1
[508] vera_layer_get_color::layer#1 = conio_screen_layer
[509] call vera_layer_get_color
[510] vera_layer_get_color::return#4 = vera_layer_get_color::return#3
[495] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[496] clearline::$5 = conio_screen_layer << 1
[497] clearline::addr#0 = (byte*)CONIO_SCREEN_TEXT#17 + conio_line_text[clearline::$5]
[498] clearline::$1 = < clearline::addr#0
[499] *VERA_ADDRX_L = clearline::$1
[500] clearline::$2 = > clearline::addr#0
[501] *VERA_ADDRX_M = clearline::$2
[502] *VERA_ADDRX_H = VERA_INC_1
[503] vera_layer_get_color::layer#1 = conio_screen_layer
[504] call vera_layer_get_color
[505] vera_layer_get_color::return#4 = vera_layer_get_color::return#3
to:clearline::@4
clearline::@4: scope:[clearline] from clearline
[511] clearline::color#0 = vera_layer_get_color::return#4
[506] clearline::color#0 = vera_layer_get_color::return#4
to:clearline::@1
clearline::@1: scope:[clearline] from clearline::@2 clearline::@4
[512] clearline::c#2 = phi( clearline::@2/clearline::c#1, clearline::@4/0 )
[513] if(clearline::c#2<conio_screen_width) goto clearline::@2
[507] clearline::c#2 = phi( clearline::@2/clearline::c#1, clearline::@4/0 )
[508] if(clearline::c#2<conio_screen_width) goto clearline::@2
to:clearline::@3
clearline::@3: scope:[clearline] from clearline::@1
[514] conio_cursor_x[conio_screen_layer] = 0
[509] conio_cursor_x[conio_screen_layer] = 0
to:clearline::@return
clearline::@return: scope:[clearline] from clearline::@3
[515] return
[510] return
to:@return
clearline::@2: scope:[clearline] from clearline::@1
[516] *VERA_DATA0 = ' '
[517] *VERA_DATA0 = clearline::color#0
[518] clearline::c#1 = ++ clearline::c#2
[511] *VERA_DATA0 = ' '
[512] *VERA_DATA0 = clearline::color#0
[513] clearline::c#1 = ++ clearline::c#2
to:clearline::@1

4481
src/test/ref/examples/cx16/veralib/tilemap_8bpp_16_x_16.log
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src/test/ref/examples/cx16/veralib/tilemap_8bpp_16_x_16.sym
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@ -1,9 +1,9 @@
constant const byte BLACK = 0
constant const byte BLUE = 6
byte CONIO_SCREEN_BANK
byte CONIO_SCREEN_BANK#15 CONIO_SCREEN_BANK zp[1]:39 66.48502994011976
byte CONIO_SCREEN_BANK#15 CONIO_SCREEN_BANK zp[1]:41 66.48502994011976
byte* CONIO_SCREEN_TEXT
word CONIO_SCREEN_TEXT#17 CONIO_SCREEN_TEXT zp[2]:40 0.4675925925925926
word CONIO_SCREEN_TEXT#17 CONIO_SCREEN_TEXT zp[2]:42 0.4675925925925926
constant byte RADIX::BINARY = 2
constant byte RADIX::DECIMAL = $a
constant byte RADIX::HEXADECIMAL = $10
@ -53,15 +53,15 @@ byte~ clearline::$1 reg byte a 2.00000002E8
byte~ clearline::$2 reg byte a 2.00000002E8
byte~ clearline::$5 reg byte a 2.00000002E8
byte* clearline::addr
byte* clearline::addr#0 addr zp[2]:77 1.00000001E8
byte* clearline::addr#0 addr zp[2]:71 1.00000001E8
word clearline::c
word clearline::c#1 c zp[2]:73 2.0000000002E10
word clearline::c#2 c zp[2]:73 7.50000000075E9
word clearline::c#1 c zp[2]:29 2.0000000002E10
word clearline::c#2 c zp[2]:29 7.50000000075E9
byte clearline::color
byte clearline::color#0 reg byte x 1.6833333336666665E9
void clrscr()
byte~ clrscr::$0 reg byte a 202.0
byte~ clrscr::$1 zp[1]:58 40.4
byte~ clrscr::$1 zp[1]:54 40.4
byte~ clrscr::$2 reg byte a 202.0
byte~ clrscr::$5 reg byte a 2002.0
byte~ clrscr::$6 reg byte a 2002.0
@ -72,25 +72,25 @@ byte clrscr::c#1 reg byte y 20002.0
byte clrscr::c#2 reg byte y 7500.75
byte* clrscr::ch
byte clrscr::color
byte clrscr::color#0 color zp[1]:58 594.2352941176471
byte clrscr::color#0 color zp[1]:54 594.2352941176471
byte clrscr::l
byte clrscr::l#1 reg byte x 2002.0
byte clrscr::l#2 reg byte x 200.2
byte* clrscr::line_text
byte* clrscr::line_text#0 line_text zp[2]:69 18.363636363636363
byte* clrscr::line_text#1 line_text zp[2]:69 1001.0
byte* clrscr::line_text#2 line_text zp[2]:69 293.2142857142857
byte* clrscr::line_text#0 line_text zp[2]:63 18.363636363636363
byte* clrscr::line_text#1 line_text zp[2]:63 1001.0
byte* clrscr::line_text#2 line_text zp[2]:63 293.2142857142857
constant byte* conio_cursor_x[2] = { 0, 0 }
constant byte* conio_cursor_y[2] = { 0, 0 }
word conio_height loadstore zp[2]:34 6629.834437086093
word conio_height loadstore zp[2]:36 6629.834437086093
constant word* conio_line_text[2] = { 0, 0 }
byte conio_rowshift loadstore zp[1]:36 5941177.088235294
word conio_rowskip loadstore zp[2]:37 5650288.734463277
volatile byte conio_screen_height loadstore zp[1]:30 76433.29299363057
byte conio_screen_layer loadstore zp[1]:31 1374285.1199999999
volatile byte conio_screen_width loadstore zp[1]:29 5.191715029015544E7
byte conio_rowshift loadstore zp[1]:38 5941177.088235294
word conio_rowskip loadstore zp[2]:39 5650288.734463277
volatile byte conio_screen_height loadstore zp[1]:32 76433.29299363057
byte conio_screen_layer loadstore zp[1]:33 1374285.1199999999
volatile byte conio_screen_width loadstore zp[1]:31 5.191715029015544E7
constant byte* conio_scroll_enable[2] = { 1, 1 }
word conio_width loadstore zp[2]:32 131.40522875816993
word conio_width loadstore zp[2]:34 131.40522875816993
void conio_x16_init()
constant byte* const conio_x16_init::BASIC_CURSOR_LINE = (byte*) 214
byte conio_x16_init::line
@ -99,39 +99,39 @@ byte conio_x16_init::line#1 line zp[1]:2 22.0
byte conio_x16_init::line#3 line zp[1]:2 33.0
void cputc(byte cputc::c)
byte~ cputc::$15 reg byte a 20002.0
word~ cputc::$16 zp[2]:71 20002.0
word~ cputc::$16 zp[2]:65 20002.0
byte~ cputc::$2 reg byte a 20002.0
byte~ cputc::$4 reg byte a 20002.0
byte~ cputc::$5 reg byte a 20002.0
byte~ cputc::$6 reg byte a 20002.0
byte cputc::c
byte cputc::c#0 c zp[1]:63 1235.4705882352941
byte cputc::c#0 c zp[1]:59 1235.4705882352941
byte cputc::color
byte cputc::color#0 reg byte x 1428.7142857142858
byte* cputc::conio_addr
byte* cputc::conio_addr#0 conio_addr zp[2]:69 10001.0
byte* cputc::conio_addr#1 conio_addr zp[2]:69 6000.6
byte* cputc::conio_addr#0 conio_addr zp[2]:63 10001.0
byte* cputc::conio_addr#1 conio_addr zp[2]:63 6000.6
byte cputc::scroll_enable
byte cputc::scroll_enable#0 reg byte a 20002.0
void cputln()
byte~ cputln::$2 reg byte a 200002.0
byte~ cputln::$3 reg byte a 200002.0
word cputln::temp
word cputln::temp#0 temp zp[2]:73 200002.0
word cputln::temp#1 temp zp[2]:73 100001.0
word cputln::temp#0 temp zp[2]:67 200002.0
word cputln::temp#1 temp zp[2]:67 100001.0
void cputs(const byte* cputs::s)
byte cputs::c
byte cputs::c#1 reg byte a 1001.0
const byte* cputs::s
const byte* cputs::s#0 s zp[2]:59 500.5
const byte* cputs::s#10 s zp[2]:59 101.0
const byte* cputs::s#9 s zp[2]:59 1552.0
const byte* cputs::s#0 s zp[2]:55 500.5
const byte* cputs::s#10 s zp[2]:55 101.0
const byte* cputs::s#9 s zp[2]:55 1552.0
void cscroll()
void gotoxy(byte gotoxy::x , byte gotoxy::y)
byte~ gotoxy::$5 reg byte a 2.0000002E7
word~ gotoxy::$6 zp[2]:44 2.0000002E7
word~ gotoxy::$6 zp[2]:46 2.0000002E7
word gotoxy::line_offset
word gotoxy::line_offset#0 line_offset zp[2]:44 1.0000001E7
word gotoxy::line_offset#0 line_offset zp[2]:46 1.0000001E7
byte gotoxy::x
byte gotoxy::y
byte gotoxy::y#1 reg byte x 22.0
@ -141,20 +141,20 @@ byte gotoxy::y#5 reg byte x 4000000.4
void insertup()
byte~ insertup::$3 reg byte a 2.000000002E9
byte insertup::cy
byte insertup::cy#0 cy zp[1]:75 7.769230784615384E7
byte insertup::cy#0 cy zp[1]:69 7.769230784615384E7
byte insertup::i
byte insertup::i#1 reg byte x 2.000000002E9
byte insertup::i#2 reg byte x 4.000000004E8
word insertup::line
word insertup::line#0 line zp[2]:71 2.000000002E9
word insertup::line#0 line zp[2]:65 2.000000002E9
byte* insertup::start
byte* insertup::start#0 start zp[2]:71 1.000000001E9
byte* insertup::start#0 start zp[2]:65 1.000000001E9
byte insertup::width
byte insertup::width#0 width zp[1]:76 8.416666683333334E7
byte insertup::width#0 width zp[1]:70 8.416666683333334E7
byte kbhit()
constant byte* const kbhit::GETIN = (byte*) 65508
constant byte* const kbhit::IN_DEV = (byte*) 650
volatile byte kbhit::ch loadstore zp[1]:64 1001.0
volatile byte kbhit::ch loadstore zp[1]:60 1001.0
constant byte* const kbhit::chptr = &kbhit::ch
byte kbhit::return
byte kbhit::return#0 reg byte a 2002.0
@ -237,21 +237,21 @@ byte~ memcpy_in_vram::$3 reg byte a 2.0000000002E10
byte~ memcpy_in_vram::$4 reg byte a 2.0000000002E10
byte~ memcpy_in_vram::$5 reg byte a 2.0000000002E10
void* memcpy_in_vram::dest
void* memcpy_in_vram::dest#0 dest zp[2]:71 6.666666673333334E8
void* memcpy_in_vram::dest#3 dest zp[2]:71 1.9090909093636363E9
void* memcpy_in_vram::dest#0 dest zp[2]:65 6.666666673333334E8
void* memcpy_in_vram::dest#3 dest zp[2]:65 1.9090909093636363E9
byte memcpy_in_vram::dest_bank
byte memcpy_in_vram::dest_bank#3 dest_bank zp[1]:24 7.692307693076923E8
byte memcpy_in_vram::dest_increment
word memcpy_in_vram::i
word memcpy_in_vram::i#1 i zp[2]:73 2.00000000002E11
word memcpy_in_vram::i#2 i zp[2]:73 1.00000000001E11
word memcpy_in_vram::i#1 i zp[2]:29 2.00000000002E11
word memcpy_in_vram::i#2 i zp[2]:29 1.00000000001E11
word memcpy_in_vram::num
word memcpy_in_vram::num#0 num zp[2]:77 1.000000001E9
word memcpy_in_vram::num#4 num zp[2]:77 5.315789473789474E9
word memcpy_in_vram::num#0 num zp[2]:67 1.000000001E9
word memcpy_in_vram::num#4 num zp[2]:67 5.315789473789474E9
void* memcpy_in_vram::src
byte* memcpy_in_vram::src#0 src zp[2]:69 3.333333336666667E8
void* memcpy_in_vram::src#3 src zp[2]:69 5.25000000075E9
void* memcpy_in_vram::src#4 src zp[2]:69 2.000000002E9
byte* memcpy_in_vram::src#0 src zp[2]:63 3.333333336666667E8
void* memcpy_in_vram::src#3 src zp[2]:63 5.25000000075E9
void* memcpy_in_vram::src#4 src zp[2]:63 2.000000002E9
byte memcpy_in_vram::src_bank
byte memcpy_in_vram::src_bank#3 reg byte y 1.6666666668333333E9
byte memcpy_in_vram::src_increment
@ -262,41 +262,41 @@ byte* memcpy_to_vram::end
constant byte* memcpy_to_vram::end#0 end = (byte*)(void*)main::tiles+$100
word memcpy_to_vram::num
byte* memcpy_to_vram::s
byte* memcpy_to_vram::s#1 s zp[2]:77 200002.0
byte* memcpy_to_vram::s#2 s zp[2]:77 133334.66666666666
byte* memcpy_to_vram::s#1 s zp[2]:67 200002.0
byte* memcpy_to_vram::s#2 s zp[2]:67 133334.66666666666
void* memcpy_to_vram::src
byte memcpy_to_vram::vbank
void* memcpy_to_vram::vdest
void* memcpy_to_vram::vdest#1 vdest zp[2]:71 202.0
void* memcpy_to_vram::vdest#2 vdest zp[2]:71 525.75
void* memcpy_to_vram::vdest#1 vdest zp[2]:65 202.0
void* memcpy_to_vram::vdest#2 vdest zp[2]:65 525.75
void screenlayer(byte screenlayer::layer)
word~ screenlayer::$2 zp[2]:52 202.0
word~ screenlayer::$2 zp[2]:61 202.0
byte~ screenlayer::$3 reg byte a 202.0
word~ screenlayer::$4 zp[2]:44 202.0
word~ screenlayer::$5 zp[2]:49 202.0
word~ screenlayer::$4 zp[2]:46 202.0
word~ screenlayer::$5 zp[2]:52 202.0
byte screenlayer::layer
byte~ screenlayer::vera_layer_get_height1_$0 reg byte a 202.0
byte~ screenlayer::vera_layer_get_height1_$1 reg byte a 202.0
byte~ screenlayer::vera_layer_get_height1_$2 reg byte a 202.0
byte~ screenlayer::vera_layer_get_height1_$3 reg byte a 202.0
byte* screenlayer::vera_layer_get_height1_config
byte* screenlayer::vera_layer_get_height1_config#0 vera_layer_get_height1_config zp[2]:46 202.0
byte* screenlayer::vera_layer_get_height1_config#0 vera_layer_get_height1_config zp[2]:48 202.0
byte screenlayer::vera_layer_get_height1_layer
byte screenlayer::vera_layer_get_height1_layer#0 reg byte a 202.0
word screenlayer::vera_layer_get_height1_return
word screenlayer::vera_layer_get_height1_return#0 vera_layer_get_height1_return zp[2]:49 202.0
word screenlayer::vera_layer_get_height1_return#1 vera_layer_get_height1_return zp[2]:49 202.0
word screenlayer::vera_layer_get_height1_return#0 vera_layer_get_height1_return zp[2]:52 202.0
word screenlayer::vera_layer_get_height1_return#1 vera_layer_get_height1_return zp[2]:52 202.0
byte~ screenlayer::vera_layer_get_width1_$0 reg byte a 202.0
byte~ screenlayer::vera_layer_get_width1_$1 reg byte a 202.0
byte~ screenlayer::vera_layer_get_width1_$2 reg byte a 202.0
byte~ screenlayer::vera_layer_get_width1_$3 reg byte a 202.0
byte* screenlayer::vera_layer_get_width1_config
byte* screenlayer::vera_layer_get_width1_config#0 vera_layer_get_width1_config zp[2]:42 202.0
byte* screenlayer::vera_layer_get_width1_config#0 vera_layer_get_width1_config zp[2]:44 202.0
byte screenlayer::vera_layer_get_width1_layer
byte screenlayer::vera_layer_get_width1_layer#0 reg byte a 202.0
word screenlayer::vera_layer_get_width1_return
word screenlayer::vera_layer_get_width1_return#0 vera_layer_get_width1_return zp[2]:52 202.0
word screenlayer::vera_layer_get_width1_return#1 vera_layer_get_width1_return zp[2]:52 202.0
word screenlayer::vera_layer_get_width1_return#0 vera_layer_get_width1_return zp[2]:61 202.0
word screenlayer::vera_layer_get_width1_return#1 vera_layer_get_width1_return zp[2]:61 202.0
void screensize(byte* screensize::x , byte* screensize::y)
byte~ screensize::$1 reg byte a 202.0
byte~ screensize::$3 reg byte a 202.0
@ -322,7 +322,7 @@ byte~ vera_layer_get_color::$0 reg byte a 2.000000002E9
byte~ vera_layer_get_color::$1 reg byte a 2.000000002E9
byte~ vera_layer_get_color::$3 reg byte a 2.000000002E9
byte* vera_layer_get_color::addr
byte* vera_layer_get_color::addr#0 addr zp[2]:77 2.000000002E9
byte* vera_layer_get_color::addr#0 addr zp[2]:67 2.000000002E9
byte vera_layer_get_color::layer
byte vera_layer_get_color::layer#0 reg byte x 20002.0
byte vera_layer_get_color::layer#1 reg byte x 2.00000002E8
@ -344,8 +344,8 @@ byte~ vera_layer_get_mapbase_offset::$0 reg byte a 2002.0
byte vera_layer_get_mapbase_offset::layer
byte vera_layer_get_mapbase_offset::layer#0 reg byte a 1102.0
word vera_layer_get_mapbase_offset::return
word vera_layer_get_mapbase_offset::return#0 return zp[2]:44 367.33333333333337
word vera_layer_get_mapbase_offset::return#2 return zp[2]:44 202.0
word vera_layer_get_mapbase_offset::return#0 return zp[2]:46 367.33333333333337
word vera_layer_get_mapbase_offset::return#2 return zp[2]:46 202.0
byte vera_layer_get_rowshift(byte vera_layer_get_rowshift::layer)
byte vera_layer_get_rowshift::layer
byte vera_layer_get_rowshift::layer#0 reg byte x 1102.0
@ -357,8 +357,8 @@ byte~ vera_layer_get_rowskip::$0 reg byte a 2002.0
byte vera_layer_get_rowskip::layer
byte vera_layer_get_rowskip::layer#0 reg byte a 1102.0
word vera_layer_get_rowskip::return
word vera_layer_get_rowskip::return#0 return zp[2]:44 367.33333333333337
word vera_layer_get_rowskip::return#2 return zp[2]:44 202.0
word vera_layer_get_rowskip::return#0 return zp[2]:46 367.33333333333337
word vera_layer_get_rowskip::return#2 return zp[2]:46 202.0
byte vera_layer_get_textcolor(byte vera_layer_get_textcolor::layer)
byte vera_layer_get_textcolor::layer
byte vera_layer_get_textcolor::layer#0 reg byte x 1102.0
@ -384,18 +384,16 @@ constant byte vera_layer_mode_text::tileheight#0 tileheight = 8
byte vera_layer_mode_text::tilewidth
constant byte vera_layer_mode_text::tilewidth#0 tilewidth = 8
void vera_layer_mode_tile(byte vera_layer_mode_tile::layer , dword vera_layer_mode_tile::mapbase_address , dword vera_layer_mode_tile::tilebase_address , word vera_layer_mode_tile::mapwidth , word vera_layer_mode_tile::mapheight , byte vera_layer_mode_tile::tilewidth , byte vera_layer_mode_tile::tileheight , byte vera_layer_mode_tile::color_depth)
word~ vera_layer_mode_tile::$1 zp[2]:46 1001.0
word~ vera_layer_mode_tile::$10 zp[2]:56 2002.0
word~ vera_layer_mode_tile::$1 zp[2]:48 1001.0
byte~ vera_layer_mode_tile::$11 reg byte a 2002.0
byte~ vera_layer_mode_tile::$12 reg byte a 2002.0
byte~ vera_layer_mode_tile::$13 reg byte a 2002.0
byte~ vera_layer_mode_tile::$14 reg byte a 2002.0
byte~ vera_layer_mode_tile::$15 reg byte a 2002.0
byte~ vera_layer_mode_tile::$16 reg byte a 2002.0
byte~ vera_layer_mode_tile::$19 zp[1]:48 231.0
word~ vera_layer_mode_tile::$2 zp[2]:49 1001.0
byte~ vera_layer_mode_tile::$20 zp[1]:51 250.25
word~ vera_layer_mode_tile::$4 zp[2]:65 2002.0
word~ vera_layer_mode_tile::$7 zp[2]:52 2002.0
word~ vera_layer_mode_tile::$8 zp[2]:54 1001.0
byte~ vera_layer_mode_tile::$17 zp[1]:50 250.25
byte~ vera_layer_mode_tile::$18 zp[1]:51 273.0
byte~ vera_layer_mode_tile::$2 reg byte a 2002.0
word~ vera_layer_mode_tile::$6 zp[2]:52 2002.0
byte~ vera_layer_mode_tile::$7 reg byte a 2002.0
byte vera_layer_mode_tile::color_depth
byte vera_layer_mode_tile::color_depth#5 reg byte x 1001.0
byte vera_layer_mode_tile::config
@ -409,16 +407,16 @@ byte vera_layer_mode_tile::config#6 reg byte x 500.5
byte vera_layer_mode_tile::config#7 reg byte x 500.5
byte vera_layer_mode_tile::config#8 reg byte x 500.5
byte vera_layer_mode_tile::layer
byte vera_layer_mode_tile::layer#10 layer zp[1]:13 220.80882352941177
byte vera_layer_mode_tile::layer#10 layer zp[1]:13 227.49999999999994
byte vera_layer_mode_tile::mapbase
byte vera_layer_mode_tile::mapbase#0 reg byte x 1001.0
dword vera_layer_mode_tile::mapbase_address
dword vera_layer_mode_tile::mapbase_address#0 mapbase_address zp[4]:14 2002.0
dword vera_layer_mode_tile::mapbase_address#10 mapbase_address zp[4]:14 88.97777777777777
word vera_layer_mode_tile::mapheight
word vera_layer_mode_tile::mapheight#10 mapheight zp[2]:42 133.46666666666667
word vera_layer_mode_tile::mapheight#10 mapheight zp[2]:44 133.46666666666667
word vera_layer_mode_tile::mapwidth
word vera_layer_mode_tile::mapwidth#10 mapwidth zp[2]:44 400.4
word vera_layer_mode_tile::mapwidth#10 mapwidth zp[2]:46 400.4
byte vera_layer_mode_tile::tilebase
byte vera_layer_mode_tile::tilebase#0 reg byte a 2002.0
byte vera_layer_mode_tile::tilebase#1 reg byte x 1334.6666666666667
@ -428,11 +426,11 @@ byte vera_layer_mode_tile::tilebase#3 reg byte x 2002.0
byte vera_layer_mode_tile::tilebase#5 reg byte x 2002.0
dword vera_layer_mode_tile::tilebase_address
dword vera_layer_mode_tile::tilebase_address#0 tilebase_address zp[4]:18 2002.0
dword vera_layer_mode_tile::tilebase_address#10 tilebase_address zp[4]:18 71.5
dword vera_layer_mode_tile::tilebase_address#10 tilebase_address zp[4]:18 72.8
byte vera_layer_mode_tile::tileheight
byte vera_layer_mode_tile::tileheight#10 tileheight zp[1]:23 30.8
byte vera_layer_mode_tile::tileheight#10 tileheight zp[1]:23 31.77777777777778
byte vera_layer_mode_tile::tilewidth
byte vera_layer_mode_tile::tilewidth#10 tilewidth zp[1]:22 32.81967213114754
byte vera_layer_mode_tile::tilewidth#10 tilewidth zp[1]:22 33.932203389830505
constant byte* vera_layer_rowshift[2] = { 0, 0 }
constant word* vera_layer_rowskip[2] = { 0, 0 }
byte vera_layer_set_backcolor(byte vera_layer_set_backcolor::layer , byte vera_layer_set_backcolor::color)
@ -447,7 +445,7 @@ byte vera_layer_set_backcolor::return
void vera_layer_set_config(byte vera_layer_set_config::layer , byte vera_layer_set_config::config)
byte~ vera_layer_set_config::$0 reg byte a 20002.0
byte* vera_layer_set_config::addr
byte* vera_layer_set_config::addr#0 addr zp[2]:67 20002.0
byte* vera_layer_set_config::addr#0 addr zp[2]:61 20002.0
byte vera_layer_set_config::config
byte vera_layer_set_config::config#0 reg byte x 3667.333333333333
byte vera_layer_set_config::layer
@ -455,7 +453,7 @@ byte vera_layer_set_config::layer#0 reg byte a 5501.0
void vera_layer_set_mapbase(byte vera_layer_set_mapbase::layer , byte vera_layer_set_mapbase::mapbase)
byte~ vera_layer_set_mapbase::$0 reg byte a 20002.0
byte* vera_layer_set_mapbase::addr
byte* vera_layer_set_mapbase::addr#0 addr zp[2]:52 20002.0
byte* vera_layer_set_mapbase::addr#0 addr zp[2]:61 20002.0
byte vera_layer_set_mapbase::layer
byte vera_layer_set_mapbase::layer#0 reg byte a 1001.0
byte vera_layer_set_mapbase::layer#3 reg byte a 11002.0
@ -464,7 +462,7 @@ byte vera_layer_set_mapbase::mapbase#0 reg byte x 2002.0
byte vera_layer_set_mapbase::mapbase#3 reg byte x 3667.333333333333
void vera_layer_set_text_color_mode(byte vera_layer_set_text_color_mode::layer , byte vera_layer_set_text_color_mode::color_mode)
byte* vera_layer_set_text_color_mode::addr
byte* vera_layer_set_text_color_mode::addr#0 addr zp[2]:65 2502.5
byte* vera_layer_set_text_color_mode::addr#0 addr zp[2]:61 2502.5
byte vera_layer_set_text_color_mode::color_mode
byte vera_layer_set_text_color_mode::layer
byte vera_layer_set_textcolor(byte vera_layer_set_textcolor::layer , byte vera_layer_set_textcolor::color)
@ -478,7 +476,7 @@ byte vera_layer_set_textcolor::return
void vera_layer_set_tilebase(byte vera_layer_set_tilebase::layer , byte vera_layer_set_tilebase::tilebase)
byte~ vera_layer_set_tilebase::$0 reg byte a 20002.0
byte* vera_layer_set_tilebase::addr
byte* vera_layer_set_tilebase::addr#0 addr zp[2]:67 20002.0
byte* vera_layer_set_tilebase::addr#0 addr zp[2]:61 20002.0
byte vera_layer_set_tilebase::layer
byte vera_layer_set_tilebase::layer#0 reg byte a 5501.0
byte vera_layer_set_tilebase::tilebase
@ -490,54 +488,51 @@ constant dword* vera_mapbase_address[2] = { 0, 0 }
constant byte* vera_mapbase_bank[2] = { 0, 0 }
constant word* vera_mapbase_offset[2] = { 0, 0 }
void vera_tile_area(byte vera_tile_area::layer , word vera_tile_area::tileindex , byte vera_tile_area::x , byte vera_tile_area::y , byte vera_tile_area::w , byte vera_tile_area::h , byte vera_tile_area::hflip , byte vera_tile_area::vflip , byte vera_tile_area::offset)
word~ vera_tile_area::$10 zp[2]:69 20002.0
word~ vera_tile_area::$4 zp[2]:69 20002.0
word~ vera_tile_area::$10 zp[2]:63 20002.0
word~ vera_tile_area::$4 zp[2]:63 20002.0
byte~ vera_tile_area::$5 reg byte a 20002.0
byte vera_tile_area::c
byte vera_tile_area::c#1 reg byte y 2.00000002E8
byte vera_tile_area::c#2 reg byte y 7.500000075E7
byte vera_tile_area::h
byte vera_tile_area::h#6 h zp[1]:24 285714.3142857143
byte vera_tile_area::h#6 h zp[1]:24 312500.03125
byte vera_tile_area::hflip
byte vera_tile_area::hflip#0 hflip zp[1]:76 5000.5
byte vera_tile_area::hflip#0 hflip zp[1]:70 5000.5
byte vera_tile_area::index_h
byte vera_tile_area::index_h#0 reg byte a 20002.0
byte vera_tile_area::index_h#1 reg byte a 20002.0
byte vera_tile_area::index_h#2 index_h zp[1]:61 3846538.5384615385
byte vera_tile_area::index_h#2 index_h zp[1]:57 4348260.956521738
byte vera_tile_area::index_l
byte vera_tile_area::index_l#0 index_l zp[1]:62 3448620.7586206896
byte vera_tile_area::index_l#0 index_l zp[1]:58 3846538.5384615385
byte vera_tile_area::layer
dword vera_tile_area::mapbase
dword vera_tile_area::mapbase#0 mapbase zp[4]:25 1818.3636363636363
dword vera_tile_area::mapbase#1 mapbase zp[4]:25 10001.0
dword vera_tile_area::mapbase#10 mapbase zp[4]:25 2778333.6666666665
dword vera_tile_area::mapbase#10 mapbase zp[4]:25 3334000.4
dword vera_tile_area::mapbase#2 mapbase zp[4]:25 20002.0
dword vera_tile_area::mapbase#3 mapbase zp[4]:25 1.0000001E7
byte vera_tile_area::offset
byte vera_tile_area::r
byte vera_tile_area::r#1 r zp[1]:63 2.0000002E7
byte vera_tile_area::r#2 r zp[1]:63 1578947.5263157894
byte vera_tile_area::r#1 r zp[1]:59 2.0000002E7
byte vera_tile_area::r#2 r zp[1]:59 1875000.1875
word vera_tile_area::rowskip
word vera_tile_area::rowskip#0 rowskip zp[2]:59 312812.5625
word vera_tile_area::rowskip#0 rowskip zp[2]:55 345172.4827586207
byte vera_tile_area::shift
byte vera_tile_area::shift#0 shift zp[1]:75 3333.6666666666665
byte vera_tile_area::shift#0 shift zp[1]:69 3333.6666666666665
word vera_tile_area::tileindex
word vera_tile_area::tileindex#1 tileindex zp[2]:8 667.3333333333334
word vera_tile_area::tileindex#3 tileindex zp[2]:8 667.3333333333334
word vera_tile_area::tileindex#5 tileindex zp[2]:8 3143.4285714285716
word~ vera_tile_area::vera_vram_address01_$0 zp[2]:71 2.0000002E7
byte~ vera_tile_area::vera_vram_address01_$0 reg byte a 2.0000002E7
byte~ vera_tile_area::vera_vram_address01_$1 reg byte a 2.0000002E7
word~ vera_tile_area::vera_vram_address01_$2 zp[2]:77 2.0000002E7
byte~ vera_tile_area::vera_vram_address01_$2 reg byte a 2.0000002E7
byte~ vera_tile_area::vera_vram_address01_$3 reg byte a 2.0000002E7
word~ vera_tile_area::vera_vram_address01_$4 zp[2]:73 2.0000002E7
byte~ vera_tile_area::vera_vram_address01_$5 reg byte a 2.0000002E7
byte~ vera_tile_area::vera_vram_address01_$6 reg byte a 2.0000002E7
dword vera_tile_area::vera_vram_address01_bankaddr
byte vera_tile_area::vera_vram_address01_incr
byte vera_tile_area::vflip
byte vera_tile_area::vflip#0 vflip zp[1]:61 5000.5
byte vera_tile_area::vflip#0 vflip zp[1]:57 5000.5
byte vera_tile_area::w
byte vera_tile_area::w#11 w zp[1]:58 2857142.8857142855
byte vera_tile_area::w#11 w zp[1]:54 3125000.03125
byte vera_tile_area::x
byte vera_tile_area::x#1 x zp[1]:12 1001.0
byte vera_tile_area::x#3 x zp[1]:12 1001.0
@ -585,13 +580,14 @@ reg byte y [ vera_tile_area::c#2 vera_tile_area::c#1 ]
reg byte x [ vera_layer_get_color::layer#2 vera_layer_get_color::layer#1 vera_layer_get_color::layer#0 ]
reg byte a [ vera_layer_get_color::return#3 vera_layer_get_color::return#1 vera_layer_get_color::return#2 ]
reg byte x [ insertup::i#2 insertup::i#1 ]
zp[1]:29 [ conio_screen_width ]
zp[1]:30 [ conio_screen_height ]
zp[1]:31 [ conio_screen_layer ]
zp[2]:32 [ conio_width ]
zp[2]:34 [ conio_height ]
zp[1]:36 [ conio_rowshift ]
zp[2]:37 [ conio_rowskip ]
zp[2]:29 [ clearline::c#2 clearline::c#1 memcpy_in_vram::i#2 memcpy_in_vram::i#1 ]
zp[1]:31 [ conio_screen_width ]
zp[1]:32 [ conio_screen_height ]
zp[1]:33 [ conio_screen_layer ]
zp[2]:34 [ conio_width ]
zp[2]:36 [ conio_height ]
zp[1]:38 [ conio_rowshift ]
zp[2]:39 [ conio_rowskip ]
reg byte a [ kbhit::return#2 ]
reg byte a [ main::$35 ]
reg byte a [ kbhit::return#3 ]
@ -603,12 +599,12 @@ reg byte a [ screensize::vscale#0 ]
reg byte a [ screensize::$3 ]
reg byte x [ vera_layer_get_mapbase_bank::layer#0 ]
reg byte a [ vera_layer_get_mapbase_bank::return#2 ]
zp[1]:39 [ CONIO_SCREEN_BANK#15 ]
zp[1]:41 [ CONIO_SCREEN_BANK#15 ]
reg byte a [ vera_layer_get_mapbase_offset::layer#0 ]
zp[2]:40 [ CONIO_SCREEN_TEXT#17 ]
zp[2]:42 [ CONIO_SCREEN_TEXT#17 ]
reg byte a [ screenlayer::vera_layer_get_width1_layer#0 ]
reg byte a [ screenlayer::vera_layer_get_width1_$2 ]
zp[2]:42 [ screenlayer::vera_layer_get_width1_config#0 vera_layer_mode_tile::mapheight#10 ]
zp[2]:44 [ screenlayer::vera_layer_get_width1_config#0 vera_layer_mode_tile::mapheight#10 ]
reg byte a [ screenlayer::vera_layer_get_width1_$0 ]
reg byte a [ screenlayer::vera_layer_get_width1_$1 ]
reg byte a [ screenlayer::vera_layer_get_width1_$3 ]
@ -622,7 +618,7 @@ reg byte a [ screenlayer::vera_layer_get_height1_$0 ]
reg byte a [ screenlayer::vera_layer_get_height1_$1 ]
reg byte a [ screenlayer::vera_layer_get_height1_$3 ]
reg byte a [ vera_layer_set_mapbase::$0 ]
zp[2]:44 [ gotoxy::$6 gotoxy::line_offset#0 vera_layer_get_rowskip::return#2 screenlayer::$4 vera_layer_get_rowskip::return#0 vera_layer_get_mapbase_offset::return#2 vera_layer_get_mapbase_offset::return#0 vera_layer_mode_tile::mapwidth#10 ]
zp[2]:46 [ gotoxy::$6 gotoxy::line_offset#0 vera_layer_get_rowskip::return#2 screenlayer::$4 vera_layer_get_rowskip::return#0 vera_layer_get_mapbase_offset::return#2 vera_layer_get_mapbase_offset::return#0 vera_layer_mode_tile::mapwidth#10 ]
reg byte a [ gotoxy::$5 ]
reg byte a [ memcpy_in_vram::$0 ]
reg byte a [ memcpy_in_vram::$1 ]
@ -630,27 +626,26 @@ reg byte a [ memcpy_in_vram::$2 ]
reg byte a [ memcpy_in_vram::$3 ]
reg byte a [ memcpy_in_vram::$4 ]
reg byte a [ memcpy_in_vram::$5 ]
reg byte a [ vera_layer_mode_tile::$16 ]
reg byte a [ vera_layer_mode_tile::$14 ]
reg byte a [ vera_layer_set_config::layer#0 ]
reg byte x [ vera_layer_set_config::config#0 ]
zp[2]:46 [ vera_layer_mode_tile::$1 screenlayer::vera_layer_get_height1_config#0 ]
zp[1]:48 [ vera_layer_mode_tile::$19 ]
zp[2]:49 [ vera_layer_mode_tile::$2 screenlayer::vera_layer_get_height1_return#0 screenlayer::vera_layer_get_height1_return#1 screenlayer::$5 ]
zp[1]:51 [ vera_layer_mode_tile::$20 ]
zp[2]:48 [ vera_layer_mode_tile::$1 screenlayer::vera_layer_get_height1_config#0 ]
zp[1]:50 [ vera_layer_mode_tile::$17 ]
reg byte a [ vera_layer_mode_tile::$2 ]
zp[1]:51 [ vera_layer_mode_tile::$18 ]
reg byte x [ vera_layer_mode_tile::mapbase#0 ]
zp[2]:52 [ vera_layer_mode_tile::$7 vera_layer_set_mapbase::addr#0 screenlayer::vera_layer_get_width1_return#0 screenlayer::vera_layer_get_width1_return#1 screenlayer::$2 ]
zp[2]:54 [ vera_layer_mode_tile::$8 ]
zp[2]:56 [ vera_layer_mode_tile::$10 ]
zp[2]:52 [ vera_layer_mode_tile::$6 screenlayer::vera_layer_get_height1_return#0 screenlayer::vera_layer_get_height1_return#1 screenlayer::$5 ]
reg byte a [ vera_layer_mode_tile::$7 ]
reg byte a [ vera_layer_mode_tile::tilebase#0 ]
reg byte a [ vera_layer_set_tilebase::layer#0 ]
reg byte x [ vera_layer_set_tilebase::tilebase#0 ]
reg byte a [ vera_layer_mode_tile::$15 ]
reg byte a [ vera_layer_mode_tile::$14 ]
reg byte a [ vera_layer_mode_tile::$13 ]
reg byte a [ vera_layer_mode_tile::$12 ]
reg byte a [ vera_layer_mode_tile::$11 ]
reg byte x [ vera_layer_get_backcolor::layer#0 ]
reg byte a [ vera_layer_get_backcolor::return#0 ]
reg byte a [ clrscr::$0 ]
zp[1]:58 [ clrscr::$1 clrscr::color#0 vera_tile_area::w#11 ]
zp[1]:54 [ clrscr::$1 clrscr::color#0 vera_tile_area::w#11 ]
reg byte x [ vera_layer_get_textcolor::layer#0 ]
reg byte a [ vera_layer_get_textcolor::return#0 ]
reg byte a [ clrscr::$2 ]
@ -660,52 +655,51 @@ reg byte a [ clrscr::$6 ]
reg byte a [ clrscr::$7 ]
reg byte a [ memcpy_to_vram::$0 ]
reg byte a [ memcpy_to_vram::$1 ]
zp[2]:59 [ vera_tile_area::rowskip#0 cputs::s#9 cputs::s#10 cputs::s#0 ]
zp[1]:61 [ vera_tile_area::vflip#0 vera_tile_area::index_h#2 ]
zp[1]:62 [ vera_tile_area::index_l#0 ]
zp[2]:55 [ vera_tile_area::rowskip#0 cputs::s#9 cputs::s#10 cputs::s#0 ]
zp[1]:57 [ vera_tile_area::vflip#0 vera_tile_area::index_h#2 ]
zp[1]:58 [ vera_tile_area::index_l#0 ]
reg byte a [ vera_tile_area::index_h#0 ]
reg byte a [ vera_tile_area::index_h#1 ]
reg byte a [ vera_tile_area::$5 ]
reg byte a [ vera_tile_area::vera_vram_address01_$0 ]
reg byte a [ vera_tile_area::vera_vram_address01_$1 ]
reg byte a [ vera_tile_area::vera_vram_address01_$2 ]
reg byte a [ vera_tile_area::vera_vram_address01_$3 ]
reg byte a [ vera_tile_area::vera_vram_address01_$5 ]
reg byte a [ vera_tile_area::vera_vram_address01_$6 ]
reg byte a [ cputs::c#1 ]
zp[1]:63 [ cputc::c#0 vera_tile_area::r#2 vera_tile_area::r#1 ]
zp[1]:64 [ kbhit::ch ]
zp[1]:59 [ cputc::c#0 vera_tile_area::r#2 vera_tile_area::r#1 ]
zp[1]:60 [ kbhit::ch ]
reg byte a [ kbhit::return#0 ]
reg byte a [ kbhit::return#1 ]
zp[2]:65 [ vera_layer_set_text_color_mode::addr#0 vera_layer_mode_tile::$4 ]
reg byte a [ vera_layer_get_mapbase_bank::return#0 ]
reg byte a [ vera_layer_get_mapbase_offset::$0 ]
reg byte a [ vera_layer_get_rowshift::return#0 ]
reg byte a [ vera_layer_get_rowskip::$0 ]
reg byte a [ vera_layer_set_config::$0 ]
reg byte a [ vera_layer_set_tilebase::$0 ]
zp[2]:67 [ vera_layer_set_tilebase::addr#0 vera_layer_set_config::addr#0 ]
zp[2]:61 [ vera_layer_set_tilebase::addr#0 vera_layer_set_config::addr#0 vera_layer_set_text_color_mode::addr#0 vera_layer_set_mapbase::addr#0 screenlayer::vera_layer_get_width1_return#0 screenlayer::vera_layer_get_width1_return#1 screenlayer::$2 ]
reg byte a [ vera_layer_get_backcolor::return#1 ]
reg byte a [ vera_layer_get_textcolor::return#1 ]
reg byte a [ vera_layer_get_color::return#0 ]
reg byte x [ cputc::color#0 ]
reg byte a [ cputc::$15 ]
zp[2]:69 [ cputc::conio_addr#0 cputc::conio_addr#1 vera_tile_area::$10 vera_tile_area::$4 clrscr::line_text#2 clrscr::line_text#1 clrscr::line_text#0 memcpy_in_vram::src#3 memcpy_in_vram::src#4 memcpy_in_vram::src#0 ]
zp[2]:63 [ cputc::conio_addr#0 cputc::conio_addr#1 vera_tile_area::$10 vera_tile_area::$4 clrscr::line_text#2 clrscr::line_text#1 clrscr::line_text#0 memcpy_in_vram::src#3 memcpy_in_vram::src#4 memcpy_in_vram::src#0 ]
reg byte a [ cputc::$2 ]
reg byte a [ cputc::$4 ]
reg byte a [ cputc::$5 ]
reg byte a [ cputc::$6 ]
reg byte a [ cputc::scroll_enable#0 ]
zp[2]:71 [ cputc::$16 vera_tile_area::vera_vram_address01_$0 memcpy_to_vram::vdest#2 memcpy_to_vram::vdest#1 memcpy_in_vram::dest#3 memcpy_in_vram::dest#0 insertup::start#0 insertup::line#0 ]
zp[2]:65 [ cputc::$16 memcpy_to_vram::vdest#2 memcpy_to_vram::vdest#1 memcpy_in_vram::dest#3 memcpy_in_vram::dest#0 insertup::start#0 insertup::line#0 ]
reg byte a [ vera_layer_get_color::$3 ]
reg byte a [ vera_layer_get_color::$0 ]
reg byte a [ vera_layer_get_color::$1 ]
reg byte a [ cputln::$2 ]
zp[2]:73 [ cputln::temp#0 cputln::temp#1 vera_tile_area::vera_vram_address01_$4 clearline::c#2 clearline::c#1 memcpy_in_vram::i#2 memcpy_in_vram::i#1 ]
zp[2]:67 [ cputln::temp#0 cputln::temp#1 vera_layer_get_color::addr#0 memcpy_to_vram::s#2 memcpy_to_vram::s#1 memcpy_in_vram::num#4 memcpy_in_vram::num#0 ]
reg byte a [ cputln::$3 ]
zp[1]:75 [ insertup::cy#0 vera_tile_area::shift#0 ]
zp[1]:76 [ insertup::width#0 vera_tile_area::hflip#0 ]
zp[1]:69 [ insertup::cy#0 vera_tile_area::shift#0 ]
zp[1]:70 [ insertup::width#0 vera_tile_area::hflip#0 ]
reg byte a [ insertup::$3 ]
reg byte a [ clearline::$5 ]
zp[2]:77 [ clearline::addr#0 vera_layer_get_color::addr#0 vera_tile_area::vera_vram_address01_$2 memcpy_to_vram::s#2 memcpy_to_vram::s#1 memcpy_in_vram::num#4 memcpy_in_vram::num#0 ]
zp[2]:71 [ clearline::addr#0 ]
reg byte a [ clearline::$1 ]
reg byte a [ clearline::$2 ]
reg byte a [ vera_layer_get_color::return#4 ]

2095
src/test/ref/examples/cx16/veralib/tilemap_8bpp_8_x_8.asm Normal file
View File

File diff suppressed because it is too large Load Diff

975
src/test/ref/examples/cx16/veralib/tilemap_8bpp_8_x_8.cfg Normal file
View File

@ -0,0 +1,975 @@
void __start()
__start: scope:[__start] from
[0] phi()
to:__start::__init1
__start::__init1: scope:[__start] from __start
[1] conio_screen_width = 0
[2] conio_screen_height = 0
[3] conio_screen_layer = 1
[4] conio_width = 0
[5] conio_height = 0
[6] conio_rowshift = 0
[7] conio_rowskip = 0
[8] call conio_x16_init
to:__start::@1
__start::@1: scope:[__start] from __start::__init1
[9] phi()
[10] call main
to:__start::@return
__start::@return: scope:[__start] from __start::@1
[11] return
to:@return
void conio_x16_init()
conio_x16_init: scope:[conio_x16_init] from __start::__init1
[12] conio_x16_init::line#0 = *conio_x16_init::BASIC_CURSOR_LINE
[13] call vera_layer_mode_text
to:conio_x16_init::@3
conio_x16_init::@3: scope:[conio_x16_init] from conio_x16_init
[14] phi()
[15] call screensize
to:conio_x16_init::@4
conio_x16_init::@4: scope:[conio_x16_init] from conio_x16_init::@3
[16] phi()
[17] call screenlayer
to:conio_x16_init::@5
conio_x16_init::@5: scope:[conio_x16_init] from conio_x16_init::@4
[18] phi()
[19] call vera_layer_set_textcolor
to:conio_x16_init::@6
conio_x16_init::@6: scope:[conio_x16_init] from conio_x16_init::@5
[20] phi()
[21] call vera_layer_set_backcolor
to:conio_x16_init::@7
conio_x16_init::@7: scope:[conio_x16_init] from conio_x16_init::@6
[22] phi()
[23] call vera_layer_set_mapbase
to:conio_x16_init::@8
conio_x16_init::@8: scope:[conio_x16_init] from conio_x16_init::@7
[24] phi()
[25] call vera_layer_set_mapbase
to:conio_x16_init::@9
conio_x16_init::@9: scope:[conio_x16_init] from conio_x16_init::@8
[26] if(conio_x16_init::line#0<conio_screen_height) goto conio_x16_init::@1
to:conio_x16_init::@2
conio_x16_init::@2: scope:[conio_x16_init] from conio_x16_init::@9
[27] conio_x16_init::line#1 = conio_screen_height - 1
to:conio_x16_init::@1
conio_x16_init::@1: scope:[conio_x16_init] from conio_x16_init::@2 conio_x16_init::@9
[28] conio_x16_init::line#3 = phi( conio_x16_init::@2/conio_x16_init::line#1, conio_x16_init::@9/conio_x16_init::line#0 )
[29] gotoxy::y#1 = conio_x16_init::line#3
[30] call gotoxy
to:conio_x16_init::@return
conio_x16_init::@return: scope:[conio_x16_init] from conio_x16_init::@1
[31] return
to:@return
void main()
main: scope:[main] from __start::@1
[32] phi()
to:main::textcolor1
main::textcolor1: scope:[main] from main
[33] vera_layer_set_textcolor::layer#1 = conio_screen_layer
[34] call vera_layer_set_textcolor
to:main::bgcolor1
main::bgcolor1: scope:[main] from main::textcolor1
[35] vera_layer_set_backcolor::layer#1 = conio_screen_layer
[36] call vera_layer_set_backcolor
to:main::@12
main::@12: scope:[main] from main::bgcolor1
[37] phi()
[38] call clrscr
to:main::@14
main::@14: scope:[main] from main::@12
[39] phi()
[40] call vera_layer_mode_tile
to:main::@15
main::@15: scope:[main] from main::@14
[41] phi()
[42] call memcpy_to_vram
to:main::@1
main::@1: scope:[main] from main::@15 main::@16
[43] main::t#5 = phi( main::@15/1, main::@16/main::t#1 )
[43] main::tilebase#7 = phi( main::@15/(byte*) 16384+$40, main::@16/main::tilebase#2 )
to:main::@2
main::@2: scope:[main] from main::@1 main::@2
[44] main::p#2 = phi( main::@1/0, main::@2/main::p#1 )
[45] main::tiles[main::p#2] = main::tiles[main::p#2] + 1
[46] main::p#1 = ++ main::p#2
[47] if(main::p#1!=$40) goto main::@2
to:main::@3
main::@3: scope:[main] from main::@2
[48] memcpy_to_vram::vdest#1 = (void*)main::tilebase#7
[49] call memcpy_to_vram
to:main::@16
main::@16: scope:[main] from main::@3
[50] main::tilebase#2 = main::tilebase#7 + $40
[51] main::t#1 = ++ main::t#5
[52] if(main::t#1!=0) goto main::@1
to:main::@4
main::@4: scope:[main] from main::@16
[53] phi()
[54] call vera_tile_area
to:main::@5
main::@5: scope:[main] from main::@4 main::@7
[55] main::r#5 = phi( main::@4/0, main::@7/main::r#1 )
[55] main::row#9 = phi( main::@4/1, main::@7/main::row#1 )
[55] main::tile#10 = phi( main::@4/0, main::@7/main::tile#12 )
to:main::@6
main::@6: scope:[main] from main::@17 main::@5
[56] main::c#2 = phi( main::@17/main::c#1, main::@5/0 )
[56] main::column#2 = phi( main::@17/main::column#1, main::@5/1 )
[56] main::tile#6 = phi( main::@17/main::tile#12, main::@5/main::tile#10 )
[57] vera_tile_area::tileindex#1 = main::tile#6
[58] vera_tile_area::x#1 = main::column#2
[59] vera_tile_area::y#1 = main::row#9
[60] call vera_tile_area
to:main::@17
main::@17: scope:[main] from main::@6
[61] main::column#1 = main::column#2 + 2
[62] main::tile#1 = ++ main::tile#6
[63] main::tile#12 = main::tile#1 & $ff
[64] main::c#1 = ++ main::c#2
[65] if(main::c#1!=$20) goto main::@6
to:main::@7
main::@7: scope:[main] from main::@17
[66] main::row#1 = main::row#9 + 2
[67] main::r#1 = ++ main::r#5
[68] if(main::r#1!=8) goto main::@5
to:main::@8
main::@8: scope:[main] from main::@10 main::@7
[69] main::r1#5 = phi( main::@10/main::r1#1, main::@7/0 )
[69] main::row#11 = phi( main::@10/main::row#3, main::@7/$14 )
[69] main::tile#11 = phi( main::@10/main::tile#13, main::@7/0 )
to:main::@9
main::@9: scope:[main] from main::@18 main::@8
[70] main::c1#2 = phi( main::@18/main::c1#1, main::@8/0 )
[70] main::column1#2 = phi( main::@18/main::column1#1, main::@8/1 )
[70] main::tile#8 = phi( main::@18/main::tile#13, main::@8/main::tile#11 )
[71] vera_tile_area::tileindex#2 = main::tile#8
[72] vera_tile_area::x#2 = main::column1#2
[73] vera_tile_area::y#2 = main::row#11
[74] call vera_tile_area
to:main::@18
main::@18: scope:[main] from main::@9
[75] main::column1#1 = main::column1#2 + 2
[76] main::tile#4 = ++ main::tile#8
[77] main::tile#13 = main::tile#4 & $ff
[78] main::c1#1 = ++ main::c1#2
[79] if(main::c1#1!=$20) goto main::@9
to:main::@10
main::@10: scope:[main] from main::@18
[80] main::row#3 = main::row#11 + 2
[81] main::r1#1 = ++ main::r1#5
[82] if(main::r1#1!=8) goto main::@8
to:main::vera_layer_show1
main::vera_layer_show1: scope:[main] from main::@10
[83] *VERA_DC_VIDEO = *VERA_DC_VIDEO | *vera_layer_enable
to:main::@13
main::@13: scope:[main] from main::vera_layer_show1
[84] phi()
[85] call gotoxy
to:main::@19
main::@19: scope:[main] from main::@13
[86] phi()
[87] call cputs
to:main::@20
main::@20: scope:[main] from main::@19
[88] phi()
[89] call cputs
to:main::@21
main::@21: scope:[main] from main::@20
[90] phi()
[91] call cputs
to:main::@22
main::@22: scope:[main] from main::@21
[92] phi()
[93] call cputs
to:main::@23
main::@23: scope:[main] from main::@22
[94] phi()
[95] call cputs
to:main::@24
main::@24: scope:[main] from main::@23
[96] phi()
[97] call cputs
to:main::@25
main::@25: scope:[main] from main::@24
[98] phi()
[99] call cputs
to:main::@26
main::@26: scope:[main] from main::@25
[100] phi()
[101] call cputs
to:main::@11
main::@11: scope:[main] from main::@26 main::@27
[102] phi()
[103] call kbhit
[104] kbhit::return#2 = kbhit::return#1
to:main::@27
main::@27: scope:[main] from main::@11
[105] main::$25 = kbhit::return#2
[106] if(0==main::$25) goto main::@11
to:main::@return
main::@return: scope:[main] from main::@27
[107] return
to:@return
void vera_layer_mode_text(byte vera_layer_mode_text::layer , dword vera_layer_mode_text::mapbase_address , dword vera_layer_mode_text::tilebase_address , word vera_layer_mode_text::mapwidth , word vera_layer_mode_text::mapheight , byte vera_layer_mode_text::tilewidth , byte vera_layer_mode_text::tileheight , word vera_layer_mode_text::color_mode)
vera_layer_mode_text: scope:[vera_layer_mode_text] from conio_x16_init
[108] phi()
[109] call vera_layer_mode_tile
to:vera_layer_mode_text::@1
vera_layer_mode_text::@1: scope:[vera_layer_mode_text] from vera_layer_mode_text
[110] phi()
[111] call vera_layer_set_text_color_mode
to:vera_layer_mode_text::@return
vera_layer_mode_text::@return: scope:[vera_layer_mode_text] from vera_layer_mode_text::@1
[112] return
to:@return
void screensize(byte* screensize::x , byte* screensize::y)
screensize: scope:[screensize] from conio_x16_init::@3
[113] screensize::hscale#0 = *VERA_DC_HSCALE >> 7
[114] screensize::$1 = $28 << screensize::hscale#0
[115] *screensize::x#0 = screensize::$1
[116] screensize::vscale#0 = *VERA_DC_VSCALE >> 7
[117] screensize::$3 = $1e << screensize::vscale#0
[118] *screensize::y#0 = screensize::$3
to:screensize::@return
screensize::@return: scope:[screensize] from screensize
[119] return
to:@return
void screenlayer(byte screenlayer::layer)
screenlayer: scope:[screenlayer] from conio_x16_init::@4
[120] conio_screen_layer = screenlayer::layer#0
[121] vera_layer_get_mapbase_bank::layer#0 = conio_screen_layer
[122] call vera_layer_get_mapbase_bank
[123] vera_layer_get_mapbase_bank::return#2 = vera_layer_get_mapbase_bank::return#0
to:screenlayer::@3
screenlayer::@3: scope:[screenlayer] from screenlayer
[124] CONIO_SCREEN_BANK#11 = vera_layer_get_mapbase_bank::return#2
[125] vera_layer_get_mapbase_offset::layer#0 = conio_screen_layer
[126] call vera_layer_get_mapbase_offset
[127] vera_layer_get_mapbase_offset::return#2 = vera_layer_get_mapbase_offset::return#0
to:screenlayer::@4
screenlayer::@4: scope:[screenlayer] from screenlayer::@3
[128] CONIO_SCREEN_TEXT#13 = vera_layer_get_mapbase_offset::return#2
[129] screenlayer::vera_layer_get_width1_layer#0 = conio_screen_layer
to:screenlayer::vera_layer_get_width1
screenlayer::vera_layer_get_width1: scope:[screenlayer] from screenlayer::@4
[130] screenlayer::vera_layer_get_width1_$2 = screenlayer::vera_layer_get_width1_layer#0 << 1
[131] screenlayer::vera_layer_get_width1_config#0 = vera_layer_config[screenlayer::vera_layer_get_width1_$2]
[132] screenlayer::vera_layer_get_width1_$0 = *screenlayer::vera_layer_get_width1_config#0 & VERA_LAYER_WIDTH_MASK
[133] screenlayer::vera_layer_get_width1_$1 = screenlayer::vera_layer_get_width1_$0 >> 4
[134] screenlayer::vera_layer_get_width1_$3 = screenlayer::vera_layer_get_width1_$1 << 1
[135] screenlayer::vera_layer_get_width1_return#0 = VERA_LAYER_WIDTH[screenlayer::vera_layer_get_width1_$3]
to:screenlayer::vera_layer_get_width1_@return
screenlayer::vera_layer_get_width1_@return: scope:[screenlayer] from screenlayer::vera_layer_get_width1
[136] screenlayer::vera_layer_get_width1_return#1 = screenlayer::vera_layer_get_width1_return#0
to:screenlayer::@1
screenlayer::@1: scope:[screenlayer] from screenlayer::vera_layer_get_width1_@return
[137] screenlayer::$2 = screenlayer::vera_layer_get_width1_return#1
[138] conio_width = screenlayer::$2
[139] vera_layer_get_rowshift::layer#0 = conio_screen_layer
[140] call vera_layer_get_rowshift
[141] vera_layer_get_rowshift::return#2 = vera_layer_get_rowshift::return#0
to:screenlayer::@5
screenlayer::@5: scope:[screenlayer] from screenlayer::@1
[142] screenlayer::$3 = vera_layer_get_rowshift::return#2
[143] conio_rowshift = screenlayer::$3
[144] vera_layer_get_rowskip::layer#0 = conio_screen_layer
[145] call vera_layer_get_rowskip
[146] vera_layer_get_rowskip::return#2 = vera_layer_get_rowskip::return#0
to:screenlayer::@6
screenlayer::@6: scope:[screenlayer] from screenlayer::@5
[147] screenlayer::$4 = vera_layer_get_rowskip::return#2
[148] conio_rowskip = screenlayer::$4
[149] screenlayer::vera_layer_get_height1_layer#0 = conio_screen_layer
to:screenlayer::vera_layer_get_height1
screenlayer::vera_layer_get_height1: scope:[screenlayer] from screenlayer::@6
[150] screenlayer::vera_layer_get_height1_$2 = screenlayer::vera_layer_get_height1_layer#0 << 1
[151] screenlayer::vera_layer_get_height1_config#0 = vera_layer_config[screenlayer::vera_layer_get_height1_$2]
[152] screenlayer::vera_layer_get_height1_$0 = *screenlayer::vera_layer_get_height1_config#0 & VERA_LAYER_HEIGHT_MASK
[153] screenlayer::vera_layer_get_height1_$1 = screenlayer::vera_layer_get_height1_$0 >> 6
[154] screenlayer::vera_layer_get_height1_$3 = screenlayer::vera_layer_get_height1_$1 << 1
[155] screenlayer::vera_layer_get_height1_return#0 = VERA_LAYER_HEIGHT[screenlayer::vera_layer_get_height1_$3]
to:screenlayer::vera_layer_get_height1_@return
screenlayer::vera_layer_get_height1_@return: scope:[screenlayer] from screenlayer::vera_layer_get_height1
[156] screenlayer::vera_layer_get_height1_return#1 = screenlayer::vera_layer_get_height1_return#0
to:screenlayer::@2
screenlayer::@2: scope:[screenlayer] from screenlayer::vera_layer_get_height1_@return
[157] screenlayer::$5 = screenlayer::vera_layer_get_height1_return#1
[158] conio_height = screenlayer::$5
to:screenlayer::@return
screenlayer::@return: scope:[screenlayer] from screenlayer::@2
[159] return
to:@return
byte vera_layer_set_textcolor(byte vera_layer_set_textcolor::layer , byte vera_layer_set_textcolor::color)
vera_layer_set_textcolor: scope:[vera_layer_set_textcolor] from conio_x16_init::@5 main::textcolor1
[160] vera_layer_set_textcolor::layer#2 = phi( conio_x16_init::@5/1, main::textcolor1/vera_layer_set_textcolor::layer#1 )
[161] vera_layer_textcolor[vera_layer_set_textcolor::layer#2] = WHITE
to:vera_layer_set_textcolor::@return
vera_layer_set_textcolor::@return: scope:[vera_layer_set_textcolor] from vera_layer_set_textcolor
[162] return
to:@return
byte vera_layer_set_backcolor(byte vera_layer_set_backcolor::layer , byte vera_layer_set_backcolor::color)
vera_layer_set_backcolor: scope:[vera_layer_set_backcolor] from conio_x16_init::@6 main::bgcolor1
[163] vera_layer_set_backcolor::color#2 = phi( conio_x16_init::@6/BLUE, main::bgcolor1/BLACK )
[163] vera_layer_set_backcolor::layer#2 = phi( conio_x16_init::@6/1, main::bgcolor1/vera_layer_set_backcolor::layer#1 )
[164] vera_layer_backcolor[vera_layer_set_backcolor::layer#2] = vera_layer_set_backcolor::color#2
to:vera_layer_set_backcolor::@return
vera_layer_set_backcolor::@return: scope:[vera_layer_set_backcolor] from vera_layer_set_backcolor
[165] return
to:@return
void vera_layer_set_mapbase(byte vera_layer_set_mapbase::layer , byte vera_layer_set_mapbase::mapbase)
vera_layer_set_mapbase: scope:[vera_layer_set_mapbase] from conio_x16_init::@7 conio_x16_init::@8 vera_layer_mode_tile::@27
[166] vera_layer_set_mapbase::mapbase#3 = phi( conio_x16_init::@7/$20, conio_x16_init::@8/0, vera_layer_mode_tile::@27/vera_layer_set_mapbase::mapbase#0 )
[166] vera_layer_set_mapbase::layer#3 = phi( conio_x16_init::@7/0, conio_x16_init::@8/1, vera_layer_mode_tile::@27/vera_layer_set_mapbase::layer#0 )
[167] vera_layer_set_mapbase::$0 = vera_layer_set_mapbase::layer#3 << 1
[168] vera_layer_set_mapbase::addr#0 = vera_layer_mapbase[vera_layer_set_mapbase::$0]
[169] *vera_layer_set_mapbase::addr#0 = vera_layer_set_mapbase::mapbase#3
to:vera_layer_set_mapbase::@return
vera_layer_set_mapbase::@return: scope:[vera_layer_set_mapbase] from vera_layer_set_mapbase
[170] return
to:@return
void gotoxy(byte gotoxy::x , byte gotoxy::y)
gotoxy: scope:[gotoxy] from conio_x16_init::@1 cscroll::@5 main::@13
[171] gotoxy::y#4 = phi( conio_x16_init::@1/gotoxy::y#1, cscroll::@5/gotoxy::y#2, main::@13/$32 )
[172] if(gotoxy::y#4<=conio_screen_height) goto gotoxy::@4
to:gotoxy::@1
gotoxy::@4: scope:[gotoxy] from gotoxy
[173] phi()
to:gotoxy::@1
gotoxy::@1: scope:[gotoxy] from gotoxy gotoxy::@4
[174] gotoxy::y#5 = phi( gotoxy::@4/gotoxy::y#4, gotoxy/0 )
[175] if(0<conio_screen_width) goto gotoxy::@2
to:gotoxy::@3
gotoxy::@3: scope:[gotoxy] from gotoxy::@1
[176] phi()
to:gotoxy::@2
gotoxy::@2: scope:[gotoxy] from gotoxy::@1 gotoxy::@3
[177] conio_cursor_x[conio_screen_layer] = 0
[178] conio_cursor_y[conio_screen_layer] = gotoxy::y#5
[179] gotoxy::$6 = (word)gotoxy::y#5
[180] gotoxy::line_offset#0 = gotoxy::$6 << conio_rowshift
[181] gotoxy::$5 = conio_screen_layer << 1
[182] conio_line_text[gotoxy::$5] = gotoxy::line_offset#0
to:gotoxy::@return
gotoxy::@return: scope:[gotoxy] from gotoxy::@2
[183] return
to:@return
void clrscr()
clrscr: scope:[clrscr] from main::@12
[184] clrscr::line_text#0 = (byte*)CONIO_SCREEN_TEXT#13
[185] vera_layer_get_backcolor::layer#0 = conio_screen_layer
[186] call vera_layer_get_backcolor
[187] vera_layer_get_backcolor::return#2 = vera_layer_get_backcolor::return#0
to:clrscr::@7
clrscr::@7: scope:[clrscr] from clrscr
[188] clrscr::$0 = vera_layer_get_backcolor::return#2
[189] clrscr::$1 = clrscr::$0 << 4
[190] vera_layer_get_textcolor::layer#0 = conio_screen_layer
[191] call vera_layer_get_textcolor
[192] vera_layer_get_textcolor::return#2 = vera_layer_get_textcolor::return#0
to:clrscr::@8
clrscr::@8: scope:[clrscr] from clrscr::@7
[193] clrscr::$2 = vera_layer_get_textcolor::return#2
[194] clrscr::color#0 = clrscr::$1 | clrscr::$2
to:clrscr::@1
clrscr::@1: scope:[clrscr] from clrscr::@6 clrscr::@8
[195] clrscr::line_text#2 = phi( clrscr::@6/clrscr::line_text#1, clrscr::@8/clrscr::line_text#0 )
[195] clrscr::l#2 = phi( clrscr::@6/clrscr::l#1, clrscr::@8/0 )
[196] if(clrscr::l#2<conio_height) goto clrscr::@2
to:clrscr::@3
clrscr::@3: scope:[clrscr] from clrscr::@1
[197] conio_cursor_x[conio_screen_layer] = 0
[198] conio_cursor_y[conio_screen_layer] = 0
[199] clrscr::$9 = conio_screen_layer << 1
[200] conio_line_text[clrscr::$9] = 0
to:clrscr::@return
clrscr::@return: scope:[clrscr] from clrscr::@3
[201] return
to:@return
clrscr::@2: scope:[clrscr] from clrscr::@1
[202] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[203] clrscr::$5 = < clrscr::line_text#2
[204] *VERA_ADDRX_L = clrscr::$5
[205] clrscr::$6 = > clrscr::line_text#2
[206] *VERA_ADDRX_M = clrscr::$6
[207] clrscr::$7 = CONIO_SCREEN_BANK#11 | VERA_INC_1
[208] *VERA_ADDRX_H = clrscr::$7
to:clrscr::@4
clrscr::@4: scope:[clrscr] from clrscr::@2 clrscr::@5
[209] clrscr::c#2 = phi( clrscr::@2/0, clrscr::@5/clrscr::c#1 )
[210] if(clrscr::c#2<conio_width) goto clrscr::@5
to:clrscr::@6
clrscr::@6: scope:[clrscr] from clrscr::@4
[211] clrscr::line_text#1 = clrscr::line_text#2 + conio_rowskip
[212] clrscr::l#1 = ++ clrscr::l#2
to:clrscr::@1
clrscr::@5: scope:[clrscr] from clrscr::@4
[213] *VERA_DATA0 = ' '
[214] *VERA_DATA0 = clrscr::color#0
[215] clrscr::c#1 = ++ clrscr::c#2
to:clrscr::@4
void vera_layer_mode_tile(byte vera_layer_mode_tile::layer , dword vera_layer_mode_tile::mapbase_address , dword vera_layer_mode_tile::tilebase_address , word vera_layer_mode_tile::mapwidth , word vera_layer_mode_tile::mapheight , byte vera_layer_mode_tile::tilewidth , byte vera_layer_mode_tile::tileheight , byte vera_layer_mode_tile::color_depth)
vera_layer_mode_tile: scope:[vera_layer_mode_tile] from main::@14 vera_layer_mode_text
[216] vera_layer_mode_tile::tileheight#10 = phi( main::@14/8, vera_layer_mode_text/vera_layer_mode_text::tileheight#0 )
[216] vera_layer_mode_tile::tilewidth#10 = phi( main::@14/8, vera_layer_mode_text/vera_layer_mode_text::tilewidth#0 )
[216] vera_layer_mode_tile::tilebase_address#10 = phi( main::@14/$14000, vera_layer_mode_text/vera_layer_mode_text::tilebase_address#0 )
[216] vera_layer_mode_tile::mapbase_address#10 = phi( main::@14/$4000, vera_layer_mode_text/vera_layer_mode_text::mapbase_address#0 )
[216] vera_layer_mode_tile::mapheight#10 = phi( main::@14/$80, vera_layer_mode_text/vera_layer_mode_text::mapheight#0 )
[216] vera_layer_mode_tile::layer#10 = phi( main::@14/0, vera_layer_mode_text/vera_layer_mode_text::layer#0 )
[216] vera_layer_mode_tile::mapwidth#10 = phi( main::@14/$80, vera_layer_mode_text/vera_layer_mode_text::mapwidth#0 )
[216] vera_layer_mode_tile::color_depth#2 = phi( main::@14/8, vera_layer_mode_text/1 )
[217] if(vera_layer_mode_tile::color_depth#2==1) goto vera_layer_mode_tile::@5
to:vera_layer_mode_tile::@1
vera_layer_mode_tile::@1: scope:[vera_layer_mode_tile] from vera_layer_mode_tile
[218] if(vera_layer_mode_tile::color_depth#2==2) goto vera_layer_mode_tile::@5
to:vera_layer_mode_tile::@2
vera_layer_mode_tile::@2: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@1
[219] if(vera_layer_mode_tile::color_depth#2==4) goto vera_layer_mode_tile::@5
to:vera_layer_mode_tile::@3
vera_layer_mode_tile::@3: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@2
[220] if(vera_layer_mode_tile::color_depth#2!=8) goto vera_layer_mode_tile::@5
to:vera_layer_mode_tile::@4
vera_layer_mode_tile::@4: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@3
[221] phi()
to:vera_layer_mode_tile::@5
vera_layer_mode_tile::@5: scope:[vera_layer_mode_tile] from vera_layer_mode_tile vera_layer_mode_tile::@1 vera_layer_mode_tile::@2 vera_layer_mode_tile::@3 vera_layer_mode_tile::@4
[222] vera_layer_mode_tile::config#17 = phi( vera_layer_mode_tile::@3/0, vera_layer_mode_tile/VERA_LAYER_COLOR_DEPTH_1BPP, vera_layer_mode_tile::@1/VERA_LAYER_COLOR_DEPTH_2BPP, vera_layer_mode_tile::@2/VERA_LAYER_COLOR_DEPTH_4BPP, vera_layer_mode_tile::@4/VERA_LAYER_COLOR_DEPTH_8BPP )
[223] if(vera_layer_mode_tile::mapwidth#10==$20) goto vera_layer_mode_tile::@9
to:vera_layer_mode_tile::@6
vera_layer_mode_tile::@6: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@5
[224] if(vera_layer_mode_tile::mapwidth#10==$40) goto vera_layer_mode_tile::@10
to:vera_layer_mode_tile::@7
vera_layer_mode_tile::@7: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@6
[225] if(vera_layer_mode_tile::mapwidth#10==$80) goto vera_layer_mode_tile::@11
to:vera_layer_mode_tile::@8
vera_layer_mode_tile::@8: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@7
[226] if(vera_layer_mode_tile::mapwidth#10!=$100) goto vera_layer_mode_tile::@13
to:vera_layer_mode_tile::@12
vera_layer_mode_tile::@12: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@8
[227] vera_layer_mode_tile::config#8 = vera_layer_mode_tile::config#17 | VERA_LAYER_WIDTH_256
[228] vera_layer_rowshift[vera_layer_mode_tile::layer#10] = 9
[229] vera_layer_mode_tile::$14 = vera_layer_mode_tile::layer#10 << 1
[230] vera_layer_rowskip[vera_layer_mode_tile::$14] = $200
to:vera_layer_mode_tile::@13
vera_layer_mode_tile::@13: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@10 vera_layer_mode_tile::@11 vera_layer_mode_tile::@12 vera_layer_mode_tile::@8 vera_layer_mode_tile::@9
[231] vera_layer_mode_tile::config#21 = phi( vera_layer_mode_tile::@8/vera_layer_mode_tile::config#17, vera_layer_mode_tile::@9/vera_layer_mode_tile::config#17, vera_layer_mode_tile::@10/vera_layer_mode_tile::config#6, vera_layer_mode_tile::@11/vera_layer_mode_tile::config#7, vera_layer_mode_tile::@12/vera_layer_mode_tile::config#8 )
[232] if(vera_layer_mode_tile::mapheight#10==$20) goto vera_layer_mode_tile::@20
to:vera_layer_mode_tile::@14
vera_layer_mode_tile::@14: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@13
[233] if(vera_layer_mode_tile::mapheight#10==$40) goto vera_layer_mode_tile::@17
to:vera_layer_mode_tile::@15
vera_layer_mode_tile::@15: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@14
[234] if(vera_layer_mode_tile::mapheight#10==$80) goto vera_layer_mode_tile::@18
to:vera_layer_mode_tile::@16
vera_layer_mode_tile::@16: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@15
[235] if(vera_layer_mode_tile::mapheight#10!=$100) goto vera_layer_mode_tile::@20
to:vera_layer_mode_tile::@19
vera_layer_mode_tile::@19: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@16
[236] vera_layer_mode_tile::config#12 = vera_layer_mode_tile::config#21 | VERA_LAYER_HEIGHT_256
to:vera_layer_mode_tile::@20
vera_layer_mode_tile::@20: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@13 vera_layer_mode_tile::@16 vera_layer_mode_tile::@17 vera_layer_mode_tile::@18 vera_layer_mode_tile::@19
[237] vera_layer_mode_tile::config#25 = phi( vera_layer_mode_tile::@16/vera_layer_mode_tile::config#21, vera_layer_mode_tile::@13/vera_layer_mode_tile::config#21, vera_layer_mode_tile::@17/vera_layer_mode_tile::config#10, vera_layer_mode_tile::@18/vera_layer_mode_tile::config#11, vera_layer_mode_tile::@19/vera_layer_mode_tile::config#12 )
[238] vera_layer_set_config::layer#0 = vera_layer_mode_tile::layer#10
[239] vera_layer_set_config::config#0 = vera_layer_mode_tile::config#25
[240] call vera_layer_set_config
to:vera_layer_mode_tile::@27
vera_layer_mode_tile::@27: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@20
[241] vera_layer_mode_tile::$1 = _word0_ vera_layer_mode_tile::mapbase_address#10
[242] vera_layer_mode_tile::$17 = vera_layer_mode_tile::layer#10 << 1
[243] vera_mapbase_offset[vera_layer_mode_tile::$17] = vera_layer_mode_tile::$1
[244] vera_layer_mode_tile::$2 = _byte2_ vera_layer_mode_tile::mapbase_address#10
[245] vera_mapbase_bank[vera_layer_mode_tile::layer#10] = vera_layer_mode_tile::$2
[246] vera_layer_mode_tile::$18 = vera_layer_mode_tile::layer#10 << 2
[247] vera_mapbase_address[vera_layer_mode_tile::$18] = vera_layer_mode_tile::mapbase_address#10
[248] vera_layer_mode_tile::mapbase_address#0 = vera_layer_mode_tile::mapbase_address#10 >> 1
[249] vera_layer_mode_tile::mapbase#0 = > vera_layer_mode_tile::mapbase_address#0
[250] vera_layer_set_mapbase::layer#0 = vera_layer_mode_tile::layer#10
[251] vera_layer_set_mapbase::mapbase#0 = vera_layer_mode_tile::mapbase#0
[252] call vera_layer_set_mapbase
to:vera_layer_mode_tile::@28
vera_layer_mode_tile::@28: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@27
[253] vera_layer_mode_tile::$6 = _word0_ vera_layer_mode_tile::tilebase_address#10
[254] vera_tilebase_offset[vera_layer_mode_tile::$17] = vera_layer_mode_tile::$6
[255] vera_layer_mode_tile::$7 = _byte2_ vera_layer_mode_tile::tilebase_address#10
[256] vera_tilebase_bank[vera_layer_mode_tile::layer#10] = vera_layer_mode_tile::$7
[257] vera_tilebase_address[vera_layer_mode_tile::$18] = vera_layer_mode_tile::tilebase_address#10
[258] vera_layer_mode_tile::tilebase_address#0 = vera_layer_mode_tile::tilebase_address#10 >> 1
[259] vera_layer_mode_tile::tilebase#0 = > vera_layer_mode_tile::tilebase_address#0
[260] vera_layer_mode_tile::tilebase#1 = vera_layer_mode_tile::tilebase#0 & VERA_LAYER_TILEBASE_MASK
[261] if(vera_layer_mode_tile::tilewidth#10==8) goto vera_layer_mode_tile::@23
to:vera_layer_mode_tile::@21
vera_layer_mode_tile::@21: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@28
[262] if(vera_layer_mode_tile::tilewidth#10!=$10) goto vera_layer_mode_tile::@23
to:vera_layer_mode_tile::@22
vera_layer_mode_tile::@22: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@21
[263] vera_layer_mode_tile::tilebase#3 = vera_layer_mode_tile::tilebase#1 | VERA_TILEBASE_WIDTH_16
to:vera_layer_mode_tile::@23
vera_layer_mode_tile::@23: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@21 vera_layer_mode_tile::@22 vera_layer_mode_tile::@28
[264] vera_layer_mode_tile::tilebase#12 = phi( vera_layer_mode_tile::@21/vera_layer_mode_tile::tilebase#1, vera_layer_mode_tile::@28/vera_layer_mode_tile::tilebase#1, vera_layer_mode_tile::@22/vera_layer_mode_tile::tilebase#3 )
[265] if(vera_layer_mode_tile::tileheight#10==8) goto vera_layer_mode_tile::@26
to:vera_layer_mode_tile::@24
vera_layer_mode_tile::@24: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@23
[266] if(vera_layer_mode_tile::tileheight#10!=$10) goto vera_layer_mode_tile::@26
to:vera_layer_mode_tile::@25
vera_layer_mode_tile::@25: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@24
[267] vera_layer_mode_tile::tilebase#5 = vera_layer_mode_tile::tilebase#12 | VERA_TILEBASE_HEIGHT_16
to:vera_layer_mode_tile::@26
vera_layer_mode_tile::@26: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@23 vera_layer_mode_tile::@24 vera_layer_mode_tile::@25
[268] vera_layer_mode_tile::tilebase#10 = phi( vera_layer_mode_tile::@24/vera_layer_mode_tile::tilebase#12, vera_layer_mode_tile::@23/vera_layer_mode_tile::tilebase#12, vera_layer_mode_tile::@25/vera_layer_mode_tile::tilebase#5 )
[269] vera_layer_set_tilebase::layer#0 = vera_layer_mode_tile::layer#10
[270] vera_layer_set_tilebase::tilebase#0 = vera_layer_mode_tile::tilebase#10
[271] call vera_layer_set_tilebase
to:vera_layer_mode_tile::@return
vera_layer_mode_tile::@return: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@26
[272] return
to:@return
vera_layer_mode_tile::@18: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@15
[273] vera_layer_mode_tile::config#11 = vera_layer_mode_tile::config#21 | VERA_LAYER_HEIGHT_128
to:vera_layer_mode_tile::@20
vera_layer_mode_tile::@17: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@14
[274] vera_layer_mode_tile::config#10 = vera_layer_mode_tile::config#21 | VERA_LAYER_HEIGHT_64
to:vera_layer_mode_tile::@20
vera_layer_mode_tile::@11: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@7
[275] vera_layer_mode_tile::config#7 = vera_layer_mode_tile::config#17 | VERA_LAYER_WIDTH_128
[276] vera_layer_rowshift[vera_layer_mode_tile::layer#10] = 8
[277] vera_layer_mode_tile::$13 = vera_layer_mode_tile::layer#10 << 1
[278] vera_layer_rowskip[vera_layer_mode_tile::$13] = $100
to:vera_layer_mode_tile::@13
vera_layer_mode_tile::@10: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@6
[279] vera_layer_mode_tile::config#6 = vera_layer_mode_tile::config#17 | VERA_LAYER_WIDTH_64
[280] vera_layer_rowshift[vera_layer_mode_tile::layer#10] = 7
[281] vera_layer_mode_tile::$12 = vera_layer_mode_tile::layer#10 << 1
[282] vera_layer_rowskip[vera_layer_mode_tile::$12] = $80
to:vera_layer_mode_tile::@13
vera_layer_mode_tile::@9: scope:[vera_layer_mode_tile] from vera_layer_mode_tile::@5
[283] vera_layer_rowshift[vera_layer_mode_tile::layer#10] = 6
[284] vera_layer_mode_tile::$11 = vera_layer_mode_tile::layer#10 << 1
[285] vera_layer_rowskip[vera_layer_mode_tile::$11] = $40
to:vera_layer_mode_tile::@13
void memcpy_to_vram(byte memcpy_to_vram::vbank , void* memcpy_to_vram::vdest , void* memcpy_to_vram::src , word memcpy_to_vram::num)
memcpy_to_vram: scope:[memcpy_to_vram] from main::@15 main::@3
[286] memcpy_to_vram::vdest#2 = phi( main::@15/(void*)(byte*) 16384, main::@3/memcpy_to_vram::vdest#1 )
[287] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[288] memcpy_to_vram::$0 = < memcpy_to_vram::vdest#2
[289] *VERA_ADDRX_L = memcpy_to_vram::$0
[290] memcpy_to_vram::$1 = > memcpy_to_vram::vdest#2
[291] *VERA_ADDRX_M = memcpy_to_vram::$1
[292] *VERA_ADDRX_H = VERA_INC_1|1
to:memcpy_to_vram::@1
memcpy_to_vram::@1: scope:[memcpy_to_vram] from memcpy_to_vram memcpy_to_vram::@2
[293] memcpy_to_vram::s#2 = phi( memcpy_to_vram/(byte*)(void*)main::tiles, memcpy_to_vram::@2/memcpy_to_vram::s#1 )
[294] if(memcpy_to_vram::s#2!=memcpy_to_vram::end#0) goto memcpy_to_vram::@2
to:memcpy_to_vram::@return
memcpy_to_vram::@return: scope:[memcpy_to_vram] from memcpy_to_vram::@1
[295] return
to:@return
memcpy_to_vram::@2: scope:[memcpy_to_vram] from memcpy_to_vram::@1
[296] *VERA_DATA0 = *memcpy_to_vram::s#2
[297] memcpy_to_vram::s#1 = ++ memcpy_to_vram::s#2
to:memcpy_to_vram::@1
void vera_tile_area(byte vera_tile_area::layer , word vera_tile_area::tileindex , byte vera_tile_area::x , byte vera_tile_area::y , byte vera_tile_area::w , byte vera_tile_area::h , byte vera_tile_area::hflip , byte vera_tile_area::vflip , byte vera_tile_area::offset)
vera_tile_area: scope:[vera_tile_area] from main::@4 main::@6 main::@9
[298] vera_tile_area::w#9 = phi( main::@9/2, main::@4/$50, main::@6/1 )
[298] vera_tile_area::h#4 = phi( main::@9/2, main::@4/$3c, main::@6/1 )
[298] vera_tile_area::x#3 = phi( main::@9/vera_tile_area::x#2, main::@4/0, main::@6/vera_tile_area::x#1 )
[298] vera_tile_area::y#3 = phi( main::@9/vera_tile_area::y#2, main::@4/0, main::@6/vera_tile_area::y#1 )
[298] vera_tile_area::tileindex#3 = phi( main::@9/vera_tile_area::tileindex#2, main::@4/0, main::@6/vera_tile_area::tileindex#1 )
[299] vera_tile_area::mapbase#0 = *vera_mapbase_address
[300] vera_tile_area::shift#0 = *vera_layer_rowshift
[301] vera_tile_area::rowskip#0 = 1 << vera_tile_area::shift#0
[302] vera_tile_area::hflip#0 = *vera_layer_hflip
[303] vera_tile_area::vflip#0 = *vera_layer_vflip
[304] vera_tile_area::index_l#0 = < vera_tile_area::tileindex#3
[305] vera_tile_area::index_h#0 = > vera_tile_area::tileindex#3
[306] vera_tile_area::index_h#1 = vera_tile_area::index_h#0 | vera_tile_area::hflip#0
[307] vera_tile_area::index_h#2 = vera_tile_area::index_h#1 | vera_tile_area::vflip#0
[308] vera_tile_area::$10 = (word)vera_tile_area::y#3
[309] vera_tile_area::$4 = vera_tile_area::$10 << vera_tile_area::shift#0
[310] vera_tile_area::mapbase#1 = vera_tile_area::mapbase#0 + vera_tile_area::$4
[311] vera_tile_area::$5 = vera_tile_area::x#3 << 1
[312] vera_tile_area::mapbase#2 = vera_tile_area::mapbase#1 + vera_tile_area::$5
to:vera_tile_area::@1
vera_tile_area::@1: scope:[vera_tile_area] from vera_tile_area vera_tile_area::@4
[313] vera_tile_area::mapbase#10 = phi( vera_tile_area/vera_tile_area::mapbase#2, vera_tile_area::@4/vera_tile_area::mapbase#3 )
[313] vera_tile_area::r#2 = phi( vera_tile_area/0, vera_tile_area::@4/vera_tile_area::r#1 )
[314] if(vera_tile_area::r#2<vera_tile_area::h#4) goto vera_tile_area::vera_vram_address01
to:vera_tile_area::@return
vera_tile_area::@return: scope:[vera_tile_area] from vera_tile_area::@1
[315] return
to:@return
vera_tile_area::vera_vram_address01: scope:[vera_tile_area] from vera_tile_area::@1
[316] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[317] vera_tile_area::vera_vram_address01_$0 = < vera_tile_area::mapbase#10
[318] *VERA_ADDRX_L = vera_tile_area::vera_vram_address01_$0
[319] vera_tile_area::vera_vram_address01_$1 = > vera_tile_area::mapbase#10
[320] *VERA_ADDRX_M = vera_tile_area::vera_vram_address01_$1
[321] vera_tile_area::vera_vram_address01_$2 = _byte2_ vera_tile_area::mapbase#10
[322] vera_tile_area::vera_vram_address01_$3 = vera_tile_area::vera_vram_address01_$2 | VERA_INC_1
[323] *VERA_ADDRX_H = vera_tile_area::vera_vram_address01_$3
to:vera_tile_area::@2
vera_tile_area::@2: scope:[vera_tile_area] from vera_tile_area::@3 vera_tile_area::vera_vram_address01
[324] vera_tile_area::c#2 = phi( vera_tile_area::@3/vera_tile_area::c#1, vera_tile_area::vera_vram_address01/0 )
[325] if(vera_tile_area::c#2<vera_tile_area::w#9) goto vera_tile_area::@3
to:vera_tile_area::@4
vera_tile_area::@4: scope:[vera_tile_area] from vera_tile_area::@2
[326] vera_tile_area::mapbase#3 = vera_tile_area::mapbase#10 + vera_tile_area::rowskip#0
[327] vera_tile_area::r#1 = ++ vera_tile_area::r#2
to:vera_tile_area::@1
vera_tile_area::@3: scope:[vera_tile_area] from vera_tile_area::@2
[328] *VERA_DATA0 = vera_tile_area::index_l#0
[329] *VERA_DATA0 = vera_tile_area::index_h#2
[330] vera_tile_area::c#1 = ++ vera_tile_area::c#2
to:vera_tile_area::@2
void cputs(const byte* cputs::s)
cputs: scope:[cputs] from main::@19 main::@20 main::@21 main::@22 main::@23 main::@24 main::@25 main::@26
[331] cputs::s#10 = phi( main::@19/main::s, main::@20/main::s1, main::@21/main::s2, main::@22/main::s3, main::@23/main::s4, main::@24/main::s5, main::@25/main::s6, main::@26/main::s7 )
to:cputs::@1
cputs::@1: scope:[cputs] from cputs cputs::@2
[332] cputs::s#9 = phi( cputs/cputs::s#10, cputs::@2/cputs::s#0 )
[333] cputs::c#1 = *cputs::s#9
[334] cputs::s#0 = ++ cputs::s#9
[335] if(0!=cputs::c#1) goto cputs::@2
to:cputs::@return
cputs::@return: scope:[cputs] from cputs::@1
[336] return
to:@return
cputs::@2: scope:[cputs] from cputs::@1
[337] cputc::c#0 = cputs::c#1
[338] call cputc
to:cputs::@1
byte kbhit()
kbhit: scope:[kbhit] from main::@11
[339] kbhit::ch = 0
kickasm( uses kbhit::chptr uses kbhit::IN_DEV uses kbhit::GETIN) {{ jsr _kbhit
bne L3
jmp continue1
.var via1 = $9f60 //VIA#1
.var d1pra = via1+1
_kbhit:
ldy d1pra // The count of keys pressed is stored in RAM bank 0.
stz d1pra // Set d1pra to zero to access RAM bank 0.
lda $A00A // Get number of characters from this address in the ROM of the CX16 (ROM 38).
sty d1pra // Set d1pra to previous value.
rts
L3:
ldy IN_DEV // Save current input device
stz IN_DEV // Keyboard
phy
jsr GETIN // Read char, and return in .A
ply
sta chptr // Store the character read in ch
sty IN_DEV // Restore input device
ldx #>$0000
rts
continue1:
nop
}}
[341] kbhit::return#0 = kbhit::ch
to:kbhit::@return
kbhit::@return: scope:[kbhit] from kbhit
[342] kbhit::return#1 = kbhit::return#0
[343] return
to:@return
void vera_layer_set_text_color_mode(byte vera_layer_set_text_color_mode::layer , byte vera_layer_set_text_color_mode::color_mode)
vera_layer_set_text_color_mode: scope:[vera_layer_set_text_color_mode] from vera_layer_mode_text::@1
[344] vera_layer_set_text_color_mode::addr#0 = *(vera_layer_config+vera_layer_mode_text::layer#0*SIZEOF_POINTER)
[345] *vera_layer_set_text_color_mode::addr#0 = *vera_layer_set_text_color_mode::addr#0 & ~VERA_LAYER_CONFIG_256C
[346] *vera_layer_set_text_color_mode::addr#0 = *vera_layer_set_text_color_mode::addr#0
to:vera_layer_set_text_color_mode::@return
vera_layer_set_text_color_mode::@return: scope:[vera_layer_set_text_color_mode] from vera_layer_set_text_color_mode
[347] return
to:@return
byte vera_layer_get_mapbase_bank(byte vera_layer_get_mapbase_bank::layer)
vera_layer_get_mapbase_bank: scope:[vera_layer_get_mapbase_bank] from screenlayer
[348] vera_layer_get_mapbase_bank::return#0 = vera_mapbase_bank[vera_layer_get_mapbase_bank::layer#0]
to:vera_layer_get_mapbase_bank::@return
vera_layer_get_mapbase_bank::@return: scope:[vera_layer_get_mapbase_bank] from vera_layer_get_mapbase_bank
[349] return
to:@return
word vera_layer_get_mapbase_offset(byte vera_layer_get_mapbase_offset::layer)
vera_layer_get_mapbase_offset: scope:[vera_layer_get_mapbase_offset] from screenlayer::@3
[350] vera_layer_get_mapbase_offset::$0 = vera_layer_get_mapbase_offset::layer#0 << 1
[351] vera_layer_get_mapbase_offset::return#0 = vera_mapbase_offset[vera_layer_get_mapbase_offset::$0]
to:vera_layer_get_mapbase_offset::@return
vera_layer_get_mapbase_offset::@return: scope:[vera_layer_get_mapbase_offset] from vera_layer_get_mapbase_offset
[352] return
to:@return
byte vera_layer_get_rowshift(byte vera_layer_get_rowshift::layer)
vera_layer_get_rowshift: scope:[vera_layer_get_rowshift] from screenlayer::@1
[353] vera_layer_get_rowshift::return#0 = vera_layer_rowshift[vera_layer_get_rowshift::layer#0]
to:vera_layer_get_rowshift::@return
vera_layer_get_rowshift::@return: scope:[vera_layer_get_rowshift] from vera_layer_get_rowshift
[354] return
to:@return
word vera_layer_get_rowskip(byte vera_layer_get_rowskip::layer)
vera_layer_get_rowskip: scope:[vera_layer_get_rowskip] from screenlayer::@5
[355] vera_layer_get_rowskip::$0 = vera_layer_get_rowskip::layer#0 << 1
[356] vera_layer_get_rowskip::return#0 = vera_layer_rowskip[vera_layer_get_rowskip::$0]
to:vera_layer_get_rowskip::@return
vera_layer_get_rowskip::@return: scope:[vera_layer_get_rowskip] from vera_layer_get_rowskip
[357] return
to:@return
byte vera_layer_get_backcolor(byte vera_layer_get_backcolor::layer)
vera_layer_get_backcolor: scope:[vera_layer_get_backcolor] from clrscr
[358] vera_layer_get_backcolor::return#0 = vera_layer_backcolor[vera_layer_get_backcolor::layer#0]
to:vera_layer_get_backcolor::@return
vera_layer_get_backcolor::@return: scope:[vera_layer_get_backcolor] from vera_layer_get_backcolor
[359] return
to:@return
byte vera_layer_get_textcolor(byte vera_layer_get_textcolor::layer)
vera_layer_get_textcolor: scope:[vera_layer_get_textcolor] from clrscr::@7
[360] vera_layer_get_textcolor::return#0 = vera_layer_textcolor[vera_layer_get_textcolor::layer#0]
to:vera_layer_get_textcolor::@return
vera_layer_get_textcolor::@return: scope:[vera_layer_get_textcolor] from vera_layer_get_textcolor
[361] return
to:@return
void vera_layer_set_config(byte vera_layer_set_config::layer , byte vera_layer_set_config::config)
vera_layer_set_config: scope:[vera_layer_set_config] from vera_layer_mode_tile::@20
[362] vera_layer_set_config::$0 = vera_layer_set_config::layer#0 << 1
[363] vera_layer_set_config::addr#0 = vera_layer_config[vera_layer_set_config::$0]
[364] *vera_layer_set_config::addr#0 = vera_layer_set_config::config#0
to:vera_layer_set_config::@return
vera_layer_set_config::@return: scope:[vera_layer_set_config] from vera_layer_set_config
[365] return
to:@return
void vera_layer_set_tilebase(byte vera_layer_set_tilebase::layer , byte vera_layer_set_tilebase::tilebase)
vera_layer_set_tilebase: scope:[vera_layer_set_tilebase] from vera_layer_mode_tile::@26
[366] vera_layer_set_tilebase::$0 = vera_layer_set_tilebase::layer#0 << 1
[367] vera_layer_set_tilebase::addr#0 = vera_layer_tilebase[vera_layer_set_tilebase::$0]
[368] *vera_layer_set_tilebase::addr#0 = vera_layer_set_tilebase::tilebase#0
to:vera_layer_set_tilebase::@return
vera_layer_set_tilebase::@return: scope:[vera_layer_set_tilebase] from vera_layer_set_tilebase
[369] return
to:@return
void cputc(byte cputc::c)
cputc: scope:[cputc] from cputs::@2
[370] vera_layer_get_color::layer#0 = conio_screen_layer
[371] call vera_layer_get_color
[372] vera_layer_get_color::return#3 = vera_layer_get_color::return#2
to:cputc::@7
cputc::@7: scope:[cputc] from cputc
[373] cputc::color#0 = vera_layer_get_color::return#3
[374] cputc::$15 = conio_screen_layer << 1
[375] cputc::conio_addr#0 = (byte*)CONIO_SCREEN_TEXT#13 + conio_line_text[cputc::$15]
[376] cputc::$2 = conio_cursor_x[conio_screen_layer] << 1
[377] cputc::conio_addr#1 = cputc::conio_addr#0 + cputc::$2
[378] if(cputc::c#0=='
') goto cputc::@1
to:cputc::@2
cputc::@2: scope:[cputc] from cputc::@7
[379] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[380] cputc::$4 = < cputc::conio_addr#1
[381] *VERA_ADDRX_L = cputc::$4
[382] cputc::$5 = > cputc::conio_addr#1
[383] *VERA_ADDRX_M = cputc::$5
[384] cputc::$6 = CONIO_SCREEN_BANK#11 | VERA_INC_1
[385] *VERA_ADDRX_H = cputc::$6
[386] *VERA_DATA0 = cputc::c#0
[387] *VERA_DATA0 = cputc::color#0
[388] conio_cursor_x[conio_screen_layer] = ++ conio_cursor_x[conio_screen_layer]
[389] cputc::scroll_enable#0 = conio_scroll_enable[conio_screen_layer]
[390] if(0!=cputc::scroll_enable#0) goto cputc::@5
to:cputc::@3
cputc::@3: scope:[cputc] from cputc::@2
[391] cputc::$16 = (word)conio_cursor_x[conio_screen_layer]
[392] if(cputc::$16!=conio_width) goto cputc::@return
to:cputc::@4
cputc::@4: scope:[cputc] from cputc::@3
[393] phi()
[394] call cputln
to:cputc::@return
cputc::@return: scope:[cputc] from cputc::@1 cputc::@3 cputc::@4 cputc::@5 cputc::@6
[395] return
to:@return
cputc::@5: scope:[cputc] from cputc::@2
[396] if(conio_cursor_x[conio_screen_layer]!=conio_screen_width) goto cputc::@return
to:cputc::@6
cputc::@6: scope:[cputc] from cputc::@5
[397] phi()
[398] call cputln
to:cputc::@return
cputc::@1: scope:[cputc] from cputc::@7
[399] phi()
[400] call cputln
to:cputc::@return
byte vera_layer_get_color(byte vera_layer_get_color::layer)
vera_layer_get_color: scope:[vera_layer_get_color] from clearline cputc
[401] vera_layer_get_color::layer#2 = phi( clearline/vera_layer_get_color::layer#1, cputc/vera_layer_get_color::layer#0 )
[402] vera_layer_get_color::$3 = vera_layer_get_color::layer#2 << 1
[403] vera_layer_get_color::addr#0 = vera_layer_config[vera_layer_get_color::$3]
[404] vera_layer_get_color::$0 = *vera_layer_get_color::addr#0 & VERA_LAYER_CONFIG_256C
[405] if(0!=vera_layer_get_color::$0) goto vera_layer_get_color::@1
to:vera_layer_get_color::@2
vera_layer_get_color::@2: scope:[vera_layer_get_color] from vera_layer_get_color
[406] vera_layer_get_color::$1 = vera_layer_backcolor[vera_layer_get_color::layer#2] << 4
[407] vera_layer_get_color::return#1 = vera_layer_get_color::$1 | vera_layer_textcolor[vera_layer_get_color::layer#2]
to:vera_layer_get_color::@return
vera_layer_get_color::@return: scope:[vera_layer_get_color] from vera_layer_get_color::@1 vera_layer_get_color::@2
[408] vera_layer_get_color::return#2 = phi( vera_layer_get_color::@1/vera_layer_get_color::return#0, vera_layer_get_color::@2/vera_layer_get_color::return#1 )
[409] return
to:@return
vera_layer_get_color::@1: scope:[vera_layer_get_color] from vera_layer_get_color
[410] vera_layer_get_color::return#0 = vera_layer_textcolor[vera_layer_get_color::layer#2]
to:vera_layer_get_color::@return
void cputln()
cputln: scope:[cputln] from cputc::@1 cputc::@4 cputc::@6
[411] cputln::$2 = conio_screen_layer << 1
[412] cputln::temp#0 = conio_line_text[cputln::$2]
[413] cputln::temp#1 = cputln::temp#0 + conio_rowskip
[414] cputln::$3 = conio_screen_layer << 1
[415] conio_line_text[cputln::$3] = cputln::temp#1
[416] conio_cursor_x[conio_screen_layer] = 0
[417] conio_cursor_y[conio_screen_layer] = ++ conio_cursor_y[conio_screen_layer]
[418] call cscroll
to:cputln::@return
cputln::@return: scope:[cputln] from cputln
[419] return
to:@return
void cscroll()
cscroll: scope:[cscroll] from cputln
[420] if(conio_cursor_y[conio_screen_layer]<conio_screen_height) goto cscroll::@return
to:cscroll::@1
cscroll::@1: scope:[cscroll] from cscroll
[421] if(0!=conio_scroll_enable[conio_screen_layer]) goto cscroll::@4
to:cscroll::@2
cscroll::@2: scope:[cscroll] from cscroll::@1
[422] if(conio_cursor_y[conio_screen_layer]<conio_height) goto cscroll::@return
to:cscroll::@3
cscroll::@3: scope:[cscroll] from cscroll::@2
[423] phi()
to:cscroll::@return
cscroll::@return: scope:[cscroll] from cscroll cscroll::@2 cscroll::@3 cscroll::@5
[424] return
to:@return
cscroll::@4: scope:[cscroll] from cscroll::@1
[425] phi()
[426] call insertup
to:cscroll::@5
cscroll::@5: scope:[cscroll] from cscroll::@4
[427] gotoxy::y#2 = conio_screen_height - 1
[428] call gotoxy
to:cscroll::@return
void insertup()
insertup: scope:[insertup] from cscroll::@4
[429] insertup::cy#0 = conio_cursor_y[conio_screen_layer]
[430] insertup::width#0 = conio_screen_width << 1
to:insertup::@1
insertup::@1: scope:[insertup] from insertup insertup::@4
[431] insertup::i#2 = phi( insertup/1, insertup::@4/insertup::i#1 )
[432] if(insertup::i#2<=insertup::cy#0) goto insertup::@2
to:insertup::@3
insertup::@3: scope:[insertup] from insertup::@1
[433] phi()
[434] call clearline
to:insertup::@return
insertup::@return: scope:[insertup] from insertup::@3
[435] return
to:@return
insertup::@2: scope:[insertup] from insertup::@1
[436] insertup::$3 = insertup::i#2 - 1
[437] insertup::line#0 = insertup::$3 << conio_rowshift
[438] insertup::start#0 = (byte*)CONIO_SCREEN_TEXT#13 + insertup::line#0
[439] memcpy_in_vram::src#0 = insertup::start#0 + conio_rowskip
[440] memcpy_in_vram::dest#0 = (void*)insertup::start#0
[441] memcpy_in_vram::num#0 = insertup::width#0
[442] call memcpy_in_vram
to:insertup::@4
insertup::@4: scope:[insertup] from insertup::@2
[443] insertup::i#1 = ++ insertup::i#2
to:insertup::@1
void clearline()
clearline: scope:[clearline] from insertup::@3
[444] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[445] clearline::$5 = conio_screen_layer << 1
[446] clearline::addr#0 = (byte*)CONIO_SCREEN_TEXT#13 + conio_line_text[clearline::$5]
[447] clearline::$1 = < clearline::addr#0
[448] *VERA_ADDRX_L = clearline::$1
[449] clearline::$2 = > clearline::addr#0
[450] *VERA_ADDRX_M = clearline::$2
[451] *VERA_ADDRX_H = VERA_INC_1
[452] vera_layer_get_color::layer#1 = conio_screen_layer
[453] call vera_layer_get_color
[454] vera_layer_get_color::return#4 = vera_layer_get_color::return#2
to:clearline::@4
clearline::@4: scope:[clearline] from clearline
[455] clearline::color#0 = vera_layer_get_color::return#4
to:clearline::@1
clearline::@1: scope:[clearline] from clearline::@2 clearline::@4
[456] clearline::c#2 = phi( clearline::@2/clearline::c#1, clearline::@4/0 )
[457] if(clearline::c#2<conio_screen_width) goto clearline::@2
to:clearline::@3
clearline::@3: scope:[clearline] from clearline::@1
[458] conio_cursor_x[conio_screen_layer] = 0
to:clearline::@return
clearline::@return: scope:[clearline] from clearline::@3
[459] return
to:@return
clearline::@2: scope:[clearline] from clearline::@1
[460] *VERA_DATA0 = ' '
[461] *VERA_DATA0 = clearline::color#0
[462] clearline::c#1 = ++ clearline::c#2
to:clearline::@1
void memcpy_in_vram(byte memcpy_in_vram::dest_bank , void* memcpy_in_vram::dest , byte memcpy_in_vram::dest_increment , byte memcpy_in_vram::src_bank , void* memcpy_in_vram::src , byte memcpy_in_vram::src_increment , word memcpy_in_vram::num)
memcpy_in_vram: scope:[memcpy_in_vram] from insertup::@2
[463] *VERA_CTRL = *VERA_CTRL & ~VERA_ADDRSEL
[464] memcpy_in_vram::$0 = < (void*)memcpy_in_vram::src#0
[465] *VERA_ADDRX_L = memcpy_in_vram::$0
[466] memcpy_in_vram::$1 = > (void*)memcpy_in_vram::src#0
[467] *VERA_ADDRX_M = memcpy_in_vram::$1
[468] *VERA_ADDRX_H = VERA_INC_1
[469] *VERA_CTRL = *VERA_CTRL | VERA_ADDRSEL
[470] memcpy_in_vram::$3 = < memcpy_in_vram::dest#0
[471] *VERA_ADDRX_L = memcpy_in_vram::$3
[472] memcpy_in_vram::$4 = > memcpy_in_vram::dest#0
[473] *VERA_ADDRX_M = memcpy_in_vram::$4
[474] *VERA_ADDRX_H = VERA_INC_1
to:memcpy_in_vram::@1
memcpy_in_vram::@1: scope:[memcpy_in_vram] from memcpy_in_vram memcpy_in_vram::@2
[475] memcpy_in_vram::i#2 = phi( memcpy_in_vram/0, memcpy_in_vram::@2/memcpy_in_vram::i#1 )
[476] if(memcpy_in_vram::i#2<memcpy_in_vram::num#0) goto memcpy_in_vram::@2
to:memcpy_in_vram::@return
memcpy_in_vram::@return: scope:[memcpy_in_vram] from memcpy_in_vram::@1
[477] return
to:@return
memcpy_in_vram::@2: scope:[memcpy_in_vram] from memcpy_in_vram::@1
[478] *VERA_DATA1 = *VERA_DATA0
[479] memcpy_in_vram::i#1 = ++ memcpy_in_vram::i#2
to:memcpy_in_vram::@1

14839
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constant const byte BLACK = 0
constant const byte BLUE = 6
byte CONIO_SCREEN_BANK
byte CONIO_SCREEN_BANK#11 CONIO_SCREEN_BANK zp[1]:40 57.52849740932643
byte* CONIO_SCREEN_TEXT
word CONIO_SCREEN_TEXT#13 CONIO_SCREEN_TEXT zp[2]:41 0.4190871369294606
constant byte RADIX::BINARY = 2
constant byte RADIX::DECIMAL = $a
constant byte RADIX::HEXADECIMAL = $10
constant byte RADIX::OCTAL = 8
constant byte SIZEOF_POINTER = 2
constant const byte VERA_ADDRSEL = 1
constant byte* const VERA_ADDRX_H = (byte*) 40738
constant byte* const VERA_ADDRX_L = (byte*) 40736
constant byte* const VERA_ADDRX_M = (byte*) 40737
constant byte* const VERA_CTRL = (byte*) 40741
constant byte* const VERA_DATA0 = (byte*) 40739
constant byte* const VERA_DATA1 = (byte*) 40740
constant byte* const VERA_DC_HSCALE = (byte*) 40746
constant byte* const VERA_DC_VIDEO = (byte*) 40745
constant byte* const VERA_DC_VSCALE = (byte*) 40747
constant const byte VERA_INC_1 = $10
constant byte* const VERA_L0_CONFIG = (byte*) 40749
constant byte* const VERA_L0_MAPBASE = (byte*) 40750
constant byte* const VERA_L0_TILEBASE = (byte*) 40751
constant byte* const VERA_L1_CONFIG = (byte*) 40756
constant byte* const VERA_L1_MAPBASE = (byte*) 40757
constant byte* const VERA_L1_TILEBASE = (byte*) 40758
constant const byte VERA_LAYER0_ENABLE = $10
constant const byte VERA_LAYER1_ENABLE = $20
constant const byte VERA_LAYER_COLOR_DEPTH_1BPP = 0
constant const byte VERA_LAYER_COLOR_DEPTH_2BPP = 1
constant const byte VERA_LAYER_COLOR_DEPTH_4BPP = 2
constant const byte VERA_LAYER_COLOR_DEPTH_8BPP = 3
constant const byte VERA_LAYER_CONFIG_256C = 8
constant const word* VERA_LAYER_HEIGHT[4] = { $20, $40, $80, $100 }
constant const byte VERA_LAYER_HEIGHT_128 = $80
constant const byte VERA_LAYER_HEIGHT_256 = $c0
constant const byte VERA_LAYER_HEIGHT_64 = $40
constant const byte VERA_LAYER_HEIGHT_MASK = $c0
constant const byte VERA_LAYER_TILEBASE_MASK = $fc
constant const word* VERA_LAYER_WIDTH[4] = { $20, $40, $80, $100 }
constant const byte VERA_LAYER_WIDTH_128 = $20
constant const byte VERA_LAYER_WIDTH_256 = $30
constant const byte VERA_LAYER_WIDTH_64 = $10
constant const byte VERA_LAYER_WIDTH_MASK = $30
constant const byte VERA_TILEBASE_HEIGHT_16 = 2
constant const byte VERA_TILEBASE_WIDTH_16 = 1
constant const byte WHITE = 1
void __start()
void clearline()
byte~ clearline::$1 reg byte a 2.00000002E8
byte~ clearline::$2 reg byte a 2.00000002E8
byte~ clearline::$5 reg byte a 2.00000002E8
byte* clearline::addr
byte* clearline::addr#0 addr zp[2]:73 1.00000001E8
word clearline::c
word clearline::c#1 c zp[2]:61 2.0000000002E10
word clearline::c#2 c zp[2]:61 7.50000000075E9
byte clearline::color
byte clearline::color#0 reg byte x 1.6833333336666665E9
void clrscr()
byte~ clrscr::$0 reg byte a 202.0
byte~ clrscr::$1 zp[1]:47 40.4
byte~ clrscr::$2 reg byte a 202.0
byte~ clrscr::$5 reg byte a 2002.0
byte~ clrscr::$6 reg byte a 2002.0
byte~ clrscr::$7 reg byte a 2002.0
byte~ clrscr::$9 reg byte a 202.0
byte clrscr::c
byte clrscr::c#1 reg byte y 20002.0
byte clrscr::c#2 reg byte y 7500.75
byte* clrscr::ch
byte clrscr::color
byte clrscr::color#0 color zp[1]:47 594.2352941176471
byte clrscr::l
byte clrscr::l#1 reg byte x 2002.0
byte clrscr::l#2 reg byte x 200.2
byte* clrscr::line_text
byte* clrscr::line_text#0 line_text zp[2]:61 18.363636363636363
byte* clrscr::line_text#1 line_text zp[2]:61 1001.0
byte* clrscr::line_text#2 line_text zp[2]:61 293.2142857142857
constant byte* conio_cursor_x[2] = { 0, 0 }
constant byte* conio_cursor_y[2] = { 0, 0 }
word conio_height loadstore zp[2]:35 5655.960451977401
constant word* conio_line_text[2] = { 0, 0 }
byte conio_rowshift loadstore zp[1]:37 5372340.984042553
word conio_rowskip loadstore zp[2]:38 4950995.574257425
volatile byte conio_screen_height loadstore zp[1]:31 71856.4491017964
byte conio_screen_layer loadstore zp[1]:32 1311340.679389313
volatile byte conio_screen_width loadstore zp[1]:30 4.960400993069307E7
constant byte* conio_scroll_enable[2] = { 1, 1 }
word conio_width loadstore zp[2]:33 112.31843575418995
void conio_x16_init()
constant byte* const conio_x16_init::BASIC_CURSOR_LINE = (byte*) 214
byte conio_x16_init::line
byte conio_x16_init::line#0 line zp[1]:2 2.1999999999999997
byte conio_x16_init::line#1 line zp[1]:2 22.0
byte conio_x16_init::line#3 line zp[1]:2 33.0
void cputc(byte cputc::c)
byte~ cputc::$15 reg byte a 20002.0
word~ cputc::$16 zp[2]:63 20002.0
byte~ cputc::$2 reg byte a 20002.0
byte~ cputc::$4 reg byte a 20002.0
byte~ cputc::$5 reg byte a 20002.0
byte~ cputc::$6 reg byte a 20002.0
byte cputc::c
byte cputc::c#0 c zp[1]:57 1235.4705882352941
byte cputc::color
byte cputc::color#0 reg byte x 1428.7142857142858
byte* cputc::conio_addr
byte* cputc::conio_addr#0 conio_addr zp[2]:61 10001.0
byte* cputc::conio_addr#1 conio_addr zp[2]:61 6000.6
byte cputc::scroll_enable
byte cputc::scroll_enable#0 reg byte a 20002.0
void cputln()
byte~ cputln::$2 reg byte a 200002.0
byte~ cputln::$3 reg byte a 200002.0
word cputln::temp
word cputln::temp#0 temp zp[2]:65 200002.0
word cputln::temp#1 temp zp[2]:65 100001.0
void cputs(const byte* cputs::s)
byte cputs::c
byte cputs::c#1 reg byte a 1001.0
const byte* cputs::s
const byte* cputs::s#0 s zp[2]:28 500.5
const byte* cputs::s#10 s zp[2]:28 101.0
const byte* cputs::s#9 s zp[2]:28 1552.0
void cscroll()
void gotoxy(byte gotoxy::x , byte gotoxy::y)
byte~ gotoxy::$5 reg byte a 2.0000002E7
word~ gotoxy::$6 zp[2]:45 2.0000002E7
word gotoxy::line_offset
word gotoxy::line_offset#0 line_offset zp[2]:45 1.0000001E7
byte gotoxy::x
byte gotoxy::y
byte gotoxy::y#1 reg byte x 22.0
byte gotoxy::y#2 reg byte x 2000002.0
byte gotoxy::y#4 reg byte x 7000004.666666666
byte gotoxy::y#5 reg byte x 4000000.4
void insertup()
byte~ insertup::$3 reg byte a 2.000000002E9
byte insertup::cy
byte insertup::cy#0 cy zp[1]:67 8.416666683333334E7
byte insertup::i
byte insertup::i#1 reg byte x 2.000000002E9
byte insertup::i#2 reg byte x 4.444444448888889E8
word insertup::line
word insertup::line#0 line zp[2]:69 2.000000002E9
byte* insertup::start
byte* insertup::start#0 start zp[2]:69 1.000000001E9
byte insertup::width
byte insertup::width#0 width zp[1]:68 9.1818182E7
byte kbhit()
constant byte* const kbhit::GETIN = (byte*) 65508
constant byte* const kbhit::IN_DEV = (byte*) 650
volatile byte kbhit::ch loadstore zp[1]:58 1001.0
constant byte* const kbhit::chptr = &kbhit::ch
byte kbhit::return
byte kbhit::return#0 reg byte a 2002.0
byte kbhit::return#1 reg byte a 367.33333333333337
byte kbhit::return#2 reg byte a 202.0
void main()
byte~ main::$25 reg byte a 202.0
byte main::bgcolor1_color
byte main::c
byte main::c#1 c zp[1]:10 1501.5
byte main::c#2 c zp[1]:10 250.25
byte main::c1
byte main::c1#1 reg byte x 1501.5
byte main::c1#2 reg byte x 250.25
byte main::column
byte main::column#1 reg byte x 400.4
byte main::column#2 reg byte x 600.5999999999999
byte main::column1
byte main::column1#1 column1 zp[1]:12 400.4
byte main::column1#2 column1 zp[1]:12 600.5999999999999
byte main::p
byte main::p#1 reg byte x 1501.5
byte main::p#2 reg byte x 2002.0
byte main::r
byte main::r#1 r zp[1]:7 151.5
byte main::r#5 r zp[1]:7 16.833333333333332
byte main::r1
byte main::r1#1 r1 zp[1]:11 151.5
byte main::r1#5 r1 zp[1]:11 16.833333333333332
byte main::row
byte main::row#1 row zp[1]:6 67.33333333333333
byte main::row#11 row zp[1]:6 109.36363636363637
byte main::row#3 row zp[1]:6 67.33333333333333
byte main::row#9 row zp[1]:6 109.36363636363637
constant byte* main::s[$38] = "vera in tile mode 8 x 8, color depth 8 bits per pixel.
"
constant byte* main::s1[$3a] = "in this mode, tiles are 8 pixels wide and 8 pixels tall.
"
constant byte* main::s2[$2f] = "each tile can have a variation of 256 colors.
"
constant byte* main::s3[$44] = "the vera palette of 256 colors, can be used by setting the palette
"
constant byte* main::s4[$17] = "offset for each tile.
"
constant byte* main::s5[$4b] = "here each column is displaying the same tile, but with different offsets!
"
constant byte* main::s6[$3f] = "each offset aligns to multiples of 16 colors in the palette!.
"
constant byte* main::s7[$3e] = "however, the first color will always be transparent (black).
"
byte main::t
byte main::t#1 t zp[1]:5 151.5
byte main::t#5 t zp[1]:5 25.25
byte main::textcolor1_color
word main::tile
word main::tile#1 tile zp[2]:8 2002.0
word main::tile#10 tile zp[2]:8 202.0
word main::tile#11 tile zp[2]:8 202.0
word main::tile#12 tile zp[2]:8 350.5
word main::tile#13 tile zp[2]:8 350.5
word main::tile#4 tile zp[2]:8 2002.0
word main::tile#6 tile zp[2]:8 517.3333333333334
word main::tile#8 tile zp[2]:8 517.3333333333334
byte* main::tilebase
byte* main::tilebase#2 tilebase zp[2]:3 67.33333333333333
byte* main::tilebase#7 tilebase zp[2]:3 28.857142857142858
constant byte* main::tiles[$40] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
byte main::vera_layer_show1_layer
void memcpy_in_vram(byte memcpy_in_vram::dest_bank , void* memcpy_in_vram::dest , byte memcpy_in_vram::dest_increment , byte memcpy_in_vram::src_bank , void* memcpy_in_vram::src , byte memcpy_in_vram::src_increment , word memcpy_in_vram::num)
byte~ memcpy_in_vram::$0 reg byte a 2.0000000002E10
byte~ memcpy_in_vram::$1 reg byte a 2.0000000002E10
byte~ memcpy_in_vram::$3 reg byte a 2.0000000002E10
byte~ memcpy_in_vram::$4 reg byte a 2.0000000002E10
void* memcpy_in_vram::dest
void* memcpy_in_vram::dest#0 dest zp[2]:69 1.9090909093636363E9
byte memcpy_in_vram::dest_bank
byte memcpy_in_vram::dest_increment
word memcpy_in_vram::i
word memcpy_in_vram::i#1 i zp[2]:61 2.0000000000002E13
word memcpy_in_vram::i#2 i zp[2]:61 1.0000000000001E13
word memcpy_in_vram::num
word memcpy_in_vram::num#0 num zp[2]:71 5.882941176471765E11
void* memcpy_in_vram::src
byte* memcpy_in_vram::src#0 src zp[2]:73 1.6666666683333334E8
byte memcpy_in_vram::src_bank
byte memcpy_in_vram::src_increment
void memcpy_to_vram(byte memcpy_to_vram::vbank , void* memcpy_to_vram::vdest , void* memcpy_to_vram::src , word memcpy_to_vram::num)
byte~ memcpy_to_vram::$0 reg byte a 2002.0
byte~ memcpy_to_vram::$1 reg byte a 2002.0
byte* memcpy_to_vram::end
constant byte* memcpy_to_vram::end#0 end = (byte*)(void*)main::tiles+$40
word memcpy_to_vram::num
byte* memcpy_to_vram::s
byte* memcpy_to_vram::s#1 s zp[2]:28 200002.0
byte* memcpy_to_vram::s#2 s zp[2]:28 133334.66666666666
void* memcpy_to_vram::src
byte memcpy_to_vram::vbank
void* memcpy_to_vram::vdest
void* memcpy_to_vram::vdest#1 vdest zp[2]:61 202.0
void* memcpy_to_vram::vdest#2 vdest zp[2]:61 525.75
void screenlayer(byte screenlayer::layer)
word~ screenlayer::$2 zp[2]:59 202.0
byte~ screenlayer::$3 reg byte a 202.0
word~ screenlayer::$4 zp[2]:45 202.0
word~ screenlayer::$5 zp[2]:52 202.0
byte screenlayer::layer
constant byte screenlayer::layer#0 layer = 1
byte~ screenlayer::vera_layer_get_height1_$0 reg byte a 202.0
byte~ screenlayer::vera_layer_get_height1_$1 reg byte a 202.0
byte~ screenlayer::vera_layer_get_height1_$2 reg byte a 202.0
byte~ screenlayer::vera_layer_get_height1_$3 reg byte a 202.0
byte* screenlayer::vera_layer_get_height1_config
byte* screenlayer::vera_layer_get_height1_config#0 vera_layer_get_height1_config zp[2]:48 202.0
byte screenlayer::vera_layer_get_height1_layer
byte screenlayer::vera_layer_get_height1_layer#0 reg byte a 202.0
word screenlayer::vera_layer_get_height1_return
word screenlayer::vera_layer_get_height1_return#0 vera_layer_get_height1_return zp[2]:52 202.0
word screenlayer::vera_layer_get_height1_return#1 vera_layer_get_height1_return zp[2]:52 202.0
byte~ screenlayer::vera_layer_get_width1_$0 reg byte a 202.0
byte~ screenlayer::vera_layer_get_width1_$1 reg byte a 202.0
byte~ screenlayer::vera_layer_get_width1_$2 reg byte a 202.0
byte~ screenlayer::vera_layer_get_width1_$3 reg byte a 202.0
byte* screenlayer::vera_layer_get_width1_config
byte* screenlayer::vera_layer_get_width1_config#0 vera_layer_get_width1_config zp[2]:43 202.0
byte screenlayer::vera_layer_get_width1_layer
byte screenlayer::vera_layer_get_width1_layer#0 reg byte a 202.0
word screenlayer::vera_layer_get_width1_return
word screenlayer::vera_layer_get_width1_return#0 vera_layer_get_width1_return zp[2]:59 202.0
word screenlayer::vera_layer_get_width1_return#1 vera_layer_get_width1_return zp[2]:59 202.0
void screensize(byte* screensize::x , byte* screensize::y)
byte~ screensize::$1 reg byte a 202.0
byte~ screensize::$3 reg byte a 202.0
byte screensize::hscale
byte screensize::hscale#0 reg byte a 202.0
byte screensize::vscale
byte screensize::vscale#0 reg byte a 202.0
byte* screensize::x
constant byte* screensize::x#0 x = &conio_screen_width
byte* screensize::y
constant byte* screensize::y#0 y = &conio_screen_height
constant byte* vera_layer_backcolor[2] = { BLUE, BLUE }
constant byte** vera_layer_config[2] = { VERA_L0_CONFIG, VERA_L1_CONFIG }
constant byte* vera_layer_enable[2] = { VERA_LAYER0_ENABLE, VERA_LAYER1_ENABLE }
byte vera_layer_get_backcolor(byte vera_layer_get_backcolor::layer)
byte vera_layer_get_backcolor::layer
byte vera_layer_get_backcolor::layer#0 reg byte x 1102.0
byte vera_layer_get_backcolor::return
byte vera_layer_get_backcolor::return#0 reg byte a 367.33333333333337
byte vera_layer_get_backcolor::return#2 reg byte a 202.0
byte vera_layer_get_color(byte vera_layer_get_color::layer)
byte~ vera_layer_get_color::$0 reg byte a 2.000000002E9
byte~ vera_layer_get_color::$1 reg byte a 2.000000002E9
byte~ vera_layer_get_color::$3 reg byte a 2.000000002E9
byte* vera_layer_get_color::addr
byte* vera_layer_get_color::addr#0 addr zp[2]:65 2.000000002E9
byte vera_layer_get_color::layer
byte vera_layer_get_color::layer#0 reg byte x 20002.0
byte vera_layer_get_color::layer#1 reg byte x 2.00000002E8
byte vera_layer_get_color::layer#2 reg byte x 6.833350010000001E8
byte vera_layer_get_color::return
byte vera_layer_get_color::return#0 reg byte a 2.000000002E9
byte vera_layer_get_color::return#1 reg byte a 2.000000002E9
byte vera_layer_get_color::return#2 reg byte a 5.25002501E8
byte vera_layer_get_color::return#3 reg byte a 20002.0
byte vera_layer_get_color::return#4 reg byte a 2.00000002E8
byte vera_layer_get_mapbase_bank(byte vera_layer_get_mapbase_bank::layer)
byte vera_layer_get_mapbase_bank::layer
byte vera_layer_get_mapbase_bank::layer#0 reg byte x 1102.0
byte vera_layer_get_mapbase_bank::return
byte vera_layer_get_mapbase_bank::return#0 reg byte a 367.33333333333337
byte vera_layer_get_mapbase_bank::return#2 reg byte a 202.0
word vera_layer_get_mapbase_offset(byte vera_layer_get_mapbase_offset::layer)
byte~ vera_layer_get_mapbase_offset::$0 reg byte a 2002.0
byte vera_layer_get_mapbase_offset::layer
byte vera_layer_get_mapbase_offset::layer#0 reg byte a 1102.0
word vera_layer_get_mapbase_offset::return
word vera_layer_get_mapbase_offset::return#0 return zp[2]:45 367.33333333333337
word vera_layer_get_mapbase_offset::return#2 return zp[2]:45 202.0
byte vera_layer_get_rowshift(byte vera_layer_get_rowshift::layer)
byte vera_layer_get_rowshift::layer
byte vera_layer_get_rowshift::layer#0 reg byte x 1102.0
byte vera_layer_get_rowshift::return
byte vera_layer_get_rowshift::return#0 reg byte a 367.33333333333337
byte vera_layer_get_rowshift::return#2 reg byte a 202.0
word vera_layer_get_rowskip(byte vera_layer_get_rowskip::layer)
byte~ vera_layer_get_rowskip::$0 reg byte a 2002.0
byte vera_layer_get_rowskip::layer
byte vera_layer_get_rowskip::layer#0 reg byte a 1102.0
word vera_layer_get_rowskip::return
word vera_layer_get_rowskip::return#0 return zp[2]:45 367.33333333333337
word vera_layer_get_rowskip::return#2 return zp[2]:45 202.0
byte vera_layer_get_textcolor(byte vera_layer_get_textcolor::layer)
byte vera_layer_get_textcolor::layer
byte vera_layer_get_textcolor::layer#0 reg byte x 1102.0
byte vera_layer_get_textcolor::return
byte vera_layer_get_textcolor::return#0 reg byte a 367.33333333333337
byte vera_layer_get_textcolor::return#2 reg byte a 202.0
constant const byte* vera_layer_hflip[2] = { 0, 4 }
constant byte** vera_layer_mapbase[2] = { VERA_L0_MAPBASE, VERA_L1_MAPBASE }
void vera_layer_mode_text(byte vera_layer_mode_text::layer , dword vera_layer_mode_text::mapbase_address , dword vera_layer_mode_text::tilebase_address , word vera_layer_mode_text::mapwidth , word vera_layer_mode_text::mapheight , byte vera_layer_mode_text::tilewidth , byte vera_layer_mode_text::tileheight , word vera_layer_mode_text::color_mode)
word vera_layer_mode_text::color_mode
byte vera_layer_mode_text::layer
constant byte vera_layer_mode_text::layer#0 layer = 1
dword vera_layer_mode_text::mapbase_address
constant dword vera_layer_mode_text::mapbase_address#0 mapbase_address = 0
word vera_layer_mode_text::mapheight
constant word vera_layer_mode_text::mapheight#0 mapheight = $40
word vera_layer_mode_text::mapwidth
constant word vera_layer_mode_text::mapwidth#0 mapwidth = $80
dword vera_layer_mode_text::tilebase_address
constant dword vera_layer_mode_text::tilebase_address#0 tilebase_address = $f800
byte vera_layer_mode_text::tileheight
constant byte vera_layer_mode_text::tileheight#0 tileheight = 8
byte vera_layer_mode_text::tilewidth
constant byte vera_layer_mode_text::tilewidth#0 tilewidth = 8
void vera_layer_mode_tile(byte vera_layer_mode_tile::layer , dword vera_layer_mode_tile::mapbase_address , dword vera_layer_mode_tile::tilebase_address , word vera_layer_mode_tile::mapwidth , word vera_layer_mode_tile::mapheight , byte vera_layer_mode_tile::tilewidth , byte vera_layer_mode_tile::tileheight , byte vera_layer_mode_tile::color_depth)
word~ vera_layer_mode_tile::$1 zp[2]:48 1001.0
byte~ vera_layer_mode_tile::$11 reg byte a 2002.0
byte~ vera_layer_mode_tile::$12 reg byte a 2002.0
byte~ vera_layer_mode_tile::$13 reg byte a 2002.0
byte~ vera_layer_mode_tile::$14 reg byte a 2002.0
byte~ vera_layer_mode_tile::$17 zp[1]:50 250.25
byte~ vera_layer_mode_tile::$18 zp[1]:51 273.0
byte~ vera_layer_mode_tile::$2 reg byte a 2002.0
word~ vera_layer_mode_tile::$6 zp[2]:52 2002.0
byte~ vera_layer_mode_tile::$7 reg byte a 2002.0
byte vera_layer_mode_tile::color_depth
byte vera_layer_mode_tile::color_depth#2 reg byte x 1001.0
byte vera_layer_mode_tile::config
byte vera_layer_mode_tile::config#10 reg byte x 2002.0
byte vera_layer_mode_tile::config#11 reg byte x 2002.0
byte vera_layer_mode_tile::config#12 reg byte x 2002.0
byte vera_layer_mode_tile::config#17 reg byte x 625.625
byte vera_layer_mode_tile::config#21 reg byte x 2002.0000000000002
byte vera_layer_mode_tile::config#25 reg byte x 3003.0
byte vera_layer_mode_tile::config#6 reg byte x 500.5
byte vera_layer_mode_tile::config#7 reg byte x 500.5
byte vera_layer_mode_tile::config#8 reg byte x 500.5
byte vera_layer_mode_tile::layer
byte vera_layer_mode_tile::layer#10 layer zp[1]:13 227.49999999999994
byte vera_layer_mode_tile::mapbase
byte vera_layer_mode_tile::mapbase#0 reg byte x 1001.0
dword vera_layer_mode_tile::mapbase_address
dword vera_layer_mode_tile::mapbase_address#0 mapbase_address zp[4]:14 2002.0
dword vera_layer_mode_tile::mapbase_address#10 mapbase_address zp[4]:14 88.97777777777777
word vera_layer_mode_tile::mapheight
word vera_layer_mode_tile::mapheight#10 mapheight zp[2]:43 133.46666666666667
word vera_layer_mode_tile::mapwidth
word vera_layer_mode_tile::mapwidth#10 mapwidth zp[2]:45 400.4
byte vera_layer_mode_tile::tilebase
byte vera_layer_mode_tile::tilebase#0 reg byte a 2002.0
byte vera_layer_mode_tile::tilebase#1 reg byte x 1334.6666666666667
byte vera_layer_mode_tile::tilebase#10 reg byte x 2002.0
byte vera_layer_mode_tile::tilebase#12 reg byte x 2002.0000000000002
byte vera_layer_mode_tile::tilebase#3 reg byte x 2002.0
byte vera_layer_mode_tile::tilebase#5 reg byte x 2002.0
dword vera_layer_mode_tile::tilebase_address
dword vera_layer_mode_tile::tilebase_address#0 tilebase_address zp[4]:18 2002.0
dword vera_layer_mode_tile::tilebase_address#10 tilebase_address zp[4]:18 72.8
byte vera_layer_mode_tile::tileheight
byte vera_layer_mode_tile::tileheight#10 tileheight zp[1]:23 31.77777777777778
byte vera_layer_mode_tile::tilewidth
byte vera_layer_mode_tile::tilewidth#10 tilewidth zp[1]:22 33.932203389830505
constant byte* vera_layer_rowshift[2] = { 0, 0 }
constant word* vera_layer_rowskip[2] = { 0, 0 }
byte vera_layer_set_backcolor(byte vera_layer_set_backcolor::layer , byte vera_layer_set_backcolor::color)
byte vera_layer_set_backcolor::color
byte vera_layer_set_backcolor::color#2 reg byte a 101.0
byte vera_layer_set_backcolor::layer
byte vera_layer_set_backcolor::layer#1 reg byte x 22.0
byte vera_layer_set_backcolor::layer#2 reg byte x 112.0
byte vera_layer_set_backcolor::old
byte vera_layer_set_backcolor::return
void vera_layer_set_config(byte vera_layer_set_config::layer , byte vera_layer_set_config::config)
byte~ vera_layer_set_config::$0 reg byte a 20002.0
byte* vera_layer_set_config::addr
byte* vera_layer_set_config::addr#0 addr zp[2]:59 20002.0
byte vera_layer_set_config::config
byte vera_layer_set_config::config#0 reg byte x 3667.333333333333
byte vera_layer_set_config::layer
byte vera_layer_set_config::layer#0 reg byte a 5501.0
void vera_layer_set_mapbase(byte vera_layer_set_mapbase::layer , byte vera_layer_set_mapbase::mapbase)
byte~ vera_layer_set_mapbase::$0 reg byte a 20002.0
byte* vera_layer_set_mapbase::addr
byte* vera_layer_set_mapbase::addr#0 addr zp[2]:59 20002.0
byte vera_layer_set_mapbase::layer
byte vera_layer_set_mapbase::layer#0 reg byte a 1001.0
byte vera_layer_set_mapbase::layer#3 reg byte a 11002.0
byte vera_layer_set_mapbase::mapbase
byte vera_layer_set_mapbase::mapbase#0 reg byte x 2002.0
byte vera_layer_set_mapbase::mapbase#3 reg byte x 3667.333333333333
void vera_layer_set_text_color_mode(byte vera_layer_set_text_color_mode::layer , byte vera_layer_set_text_color_mode::color_mode)
byte* vera_layer_set_text_color_mode::addr
byte* vera_layer_set_text_color_mode::addr#0 addr zp[2]:59 2502.5
byte vera_layer_set_text_color_mode::color_mode
byte vera_layer_set_text_color_mode::layer
byte vera_layer_set_textcolor(byte vera_layer_set_textcolor::layer , byte vera_layer_set_textcolor::color)
byte vera_layer_set_textcolor::color
byte vera_layer_set_textcolor::layer
byte vera_layer_set_textcolor::layer#1 reg byte x 22.0
byte vera_layer_set_textcolor::layer#2 reg byte x 112.0
byte vera_layer_set_textcolor::old
byte vera_layer_set_textcolor::return
void vera_layer_set_tilebase(byte vera_layer_set_tilebase::layer , byte vera_layer_set_tilebase::tilebase)
byte~ vera_layer_set_tilebase::$0 reg byte a 20002.0
byte* vera_layer_set_tilebase::addr
byte* vera_layer_set_tilebase::addr#0 addr zp[2]:59 20002.0
byte vera_layer_set_tilebase::layer
byte vera_layer_set_tilebase::layer#0 reg byte a 5501.0
byte vera_layer_set_tilebase::tilebase
byte vera_layer_set_tilebase::tilebase#0 reg byte x 3667.333333333333
constant byte* vera_layer_textcolor[2] = { WHITE, WHITE }
constant byte** vera_layer_tilebase[2] = { VERA_L0_TILEBASE, VERA_L1_TILEBASE }
constant const byte* vera_layer_vflip[2] = { 0, 8 }
constant dword* vera_mapbase_address[2] = { 0, 0 }
constant byte* vera_mapbase_bank[2] = { 0, 0 }
constant word* vera_mapbase_offset[2] = { 0, 0 }
void vera_tile_area(byte vera_tile_area::layer , word vera_tile_area::tileindex , byte vera_tile_area::x , byte vera_tile_area::y , byte vera_tile_area::w , byte vera_tile_area::h , byte vera_tile_area::hflip , byte vera_tile_area::vflip , byte vera_tile_area::offset)
word~ vera_tile_area::$10 zp[2]:63 20002.0
word~ vera_tile_area::$4 zp[2]:63 20002.0
byte~ vera_tile_area::$5 reg byte a 20002.0
byte vera_tile_area::c
byte vera_tile_area::c#1 reg byte y 2.00000002E8
byte vera_tile_area::c#2 reg byte y 7.500000075E7
byte vera_tile_area::h
byte vera_tile_area::h#4 h zp[1]:47 312500.03125
byte vera_tile_area::hflip
byte vera_tile_area::hflip#0 hflip zp[1]:54 5000.5
byte vera_tile_area::index_h
byte vera_tile_area::index_h#0 reg byte a 20002.0
byte vera_tile_area::index_h#1 reg byte a 20002.0
byte vera_tile_area::index_h#2 index_h zp[1]:55 4348260.956521738
byte vera_tile_area::index_l
byte vera_tile_area::index_l#0 index_l zp[1]:56 3846538.5384615385
byte vera_tile_area::layer
dword vera_tile_area::mapbase
dword vera_tile_area::mapbase#0 mapbase zp[4]:24 1818.3636363636363
dword vera_tile_area::mapbase#1 mapbase zp[4]:24 10001.0
dword vera_tile_area::mapbase#10 mapbase zp[4]:24 3334000.4
dword vera_tile_area::mapbase#2 mapbase zp[4]:24 20002.0
dword vera_tile_area::mapbase#3 mapbase zp[4]:24 1.0000001E7
byte vera_tile_area::offset
byte vera_tile_area::r
byte vera_tile_area::r#1 r zp[1]:67 2.0000002E7
byte vera_tile_area::r#2 r zp[1]:67 1875000.1875
word vera_tile_area::rowskip
word vera_tile_area::rowskip#0 rowskip zp[2]:61 345172.4827586207
byte vera_tile_area::shift
byte vera_tile_area::shift#0 shift zp[1]:68 3333.6666666666665
word vera_tile_area::tileindex
word vera_tile_area::tileindex#1 tileindex zp[2]:8 667.3333333333334
word vera_tile_area::tileindex#2 tileindex zp[2]:8 667.3333333333334
word vera_tile_area::tileindex#3 tileindex zp[2]:8 3143.4285714285716
byte~ vera_tile_area::vera_vram_address01_$0 reg byte a 2.0000002E7
byte~ vera_tile_area::vera_vram_address01_$1 reg byte a 2.0000002E7
byte~ vera_tile_area::vera_vram_address01_$2 reg byte a 2.0000002E7
byte~ vera_tile_area::vera_vram_address01_$3 reg byte a 2.0000002E7
dword vera_tile_area::vera_vram_address01_bankaddr
byte vera_tile_area::vera_vram_address01_incr
byte vera_tile_area::vflip
byte vera_tile_area::vflip#0 vflip zp[1]:55 5000.5
byte vera_tile_area::w
byte vera_tile_area::w#9 w zp[1]:57 3125000.03125
byte vera_tile_area::x
byte vera_tile_area::x#1 x zp[1]:12 1001.0
byte vera_tile_area::x#2 x zp[1]:12 1001.0
byte vera_tile_area::x#3 x zp[1]:12 923.3076923076923
byte vera_tile_area::y
byte vera_tile_area::y#1 y zp[1]:6 2002.0
byte vera_tile_area::y#2 y zp[1]:6 2002.0
byte vera_tile_area::y#3 y zp[1]:6 200.2
constant dword* vera_tilebase_address[2] = { 0, 0 }
constant byte* vera_tilebase_bank[2] = { 0, 0 }
constant word* vera_tilebase_offset[2] = { 0, 0 }
zp[1]:2 [ conio_x16_init::line#3 conio_x16_init::line#1 conio_x16_init::line#0 ]
zp[2]:3 [ main::tilebase#7 main::tilebase#2 ]
zp[1]:5 [ main::t#5 main::t#1 ]
reg byte x [ main::p#2 main::p#1 ]
zp[1]:6 [ main::row#9 main::row#1 vera_tile_area::y#3 vera_tile_area::y#2 vera_tile_area::y#1 main::row#11 main::row#3 ]
zp[1]:7 [ main::r#5 main::r#1 ]
zp[2]:8 [ main::tile#6 main::tile#10 main::tile#12 main::tile#1 vera_tile_area::tileindex#3 vera_tile_area::tileindex#2 vera_tile_area::tileindex#1 main::tile#8 main::tile#11 main::tile#13 main::tile#4 ]
reg byte x [ main::column#2 main::column#1 ]
zp[1]:10 [ main::c#2 main::c#1 ]
zp[1]:11 [ main::r1#5 main::r1#1 ]
zp[1]:12 [ main::column1#2 main::column1#1 vera_tile_area::x#3 vera_tile_area::x#2 vera_tile_area::x#1 ]
reg byte x [ main::c1#2 main::c1#1 ]
reg byte x [ vera_layer_set_textcolor::layer#2 vera_layer_set_textcolor::layer#1 ]
reg byte x [ vera_layer_set_backcolor::layer#2 vera_layer_set_backcolor::layer#1 ]
reg byte a [ vera_layer_set_backcolor::color#2 ]
reg byte a [ vera_layer_set_mapbase::layer#3 vera_layer_set_mapbase::layer#0 ]
reg byte x [ vera_layer_set_mapbase::mapbase#3 vera_layer_set_mapbase::mapbase#0 ]
reg byte x [ gotoxy::y#5 gotoxy::y#4 gotoxy::y#1 gotoxy::y#2 ]
reg byte x [ clrscr::l#2 clrscr::l#1 ]
reg byte y [ clrscr::c#2 clrscr::c#1 ]
reg byte x [ vera_layer_mode_tile::color_depth#2 ]
zp[1]:13 [ vera_layer_mode_tile::layer#10 ]
zp[4]:14 [ vera_layer_mode_tile::mapbase_address#10 vera_layer_mode_tile::mapbase_address#0 ]
zp[4]:18 [ vera_layer_mode_tile::tilebase_address#10 vera_layer_mode_tile::tilebase_address#0 ]
zp[1]:22 [ vera_layer_mode_tile::tilewidth#10 ]
zp[1]:23 [ vera_layer_mode_tile::tileheight#10 ]
reg byte x [ vera_layer_mode_tile::config#25 vera_layer_mode_tile::config#21 vera_layer_mode_tile::config#17 vera_layer_mode_tile::config#6 vera_layer_mode_tile::config#7 vera_layer_mode_tile::config#8 vera_layer_mode_tile::config#10 vera_layer_mode_tile::config#11 vera_layer_mode_tile::config#12 ]
reg byte x [ vera_layer_mode_tile::tilebase#10 vera_layer_mode_tile::tilebase#12 vera_layer_mode_tile::tilebase#1 vera_layer_mode_tile::tilebase#3 vera_layer_mode_tile::tilebase#5 ]
zp[4]:24 [ vera_tile_area::mapbase#10 vera_tile_area::mapbase#2 vera_tile_area::mapbase#3 vera_tile_area::mapbase#1 vera_tile_area::mapbase#0 ]
reg byte y [ vera_tile_area::c#2 vera_tile_area::c#1 ]
zp[2]:28 [ cputs::s#9 cputs::s#10 cputs::s#0 memcpy_to_vram::s#2 memcpy_to_vram::s#1 ]
reg byte x [ vera_layer_get_color::layer#2 vera_layer_get_color::layer#1 vera_layer_get_color::layer#0 ]
reg byte a [ vera_layer_get_color::return#2 vera_layer_get_color::return#0 vera_layer_get_color::return#1 ]
reg byte x [ insertup::i#2 insertup::i#1 ]
zp[1]:30 [ conio_screen_width ]
zp[1]:31 [ conio_screen_height ]
zp[1]:32 [ conio_screen_layer ]
zp[2]:33 [ conio_width ]
zp[2]:35 [ conio_height ]
zp[1]:37 [ conio_rowshift ]
zp[2]:38 [ conio_rowskip ]
reg byte a [ kbhit::return#2 ]
reg byte a [ main::$25 ]
reg byte a [ screensize::hscale#0 ]
reg byte a [ screensize::$1 ]
reg byte a [ screensize::vscale#0 ]
reg byte a [ screensize::$3 ]
reg byte x [ vera_layer_get_mapbase_bank::layer#0 ]
reg byte a [ vera_layer_get_mapbase_bank::return#2 ]
zp[1]:40 [ CONIO_SCREEN_BANK#11 ]
reg byte a [ vera_layer_get_mapbase_offset::layer#0 ]
zp[2]:41 [ CONIO_SCREEN_TEXT#13 ]
reg byte a [ screenlayer::vera_layer_get_width1_layer#0 ]
reg byte a [ screenlayer::vera_layer_get_width1_$2 ]
zp[2]:43 [ screenlayer::vera_layer_get_width1_config#0 vera_layer_mode_tile::mapheight#10 ]
reg byte a [ screenlayer::vera_layer_get_width1_$0 ]
reg byte a [ screenlayer::vera_layer_get_width1_$1 ]
reg byte a [ screenlayer::vera_layer_get_width1_$3 ]
reg byte x [ vera_layer_get_rowshift::layer#0 ]
reg byte a [ vera_layer_get_rowshift::return#2 ]
reg byte a [ screenlayer::$3 ]
reg byte a [ vera_layer_get_rowskip::layer#0 ]
reg byte a [ screenlayer::vera_layer_get_height1_layer#0 ]
reg byte a [ screenlayer::vera_layer_get_height1_$2 ]
reg byte a [ screenlayer::vera_layer_get_height1_$0 ]
reg byte a [ screenlayer::vera_layer_get_height1_$1 ]
reg byte a [ screenlayer::vera_layer_get_height1_$3 ]
reg byte a [ vera_layer_set_mapbase::$0 ]
zp[2]:45 [ gotoxy::$6 gotoxy::line_offset#0 vera_layer_get_rowskip::return#2 screenlayer::$4 vera_layer_get_rowskip::return#0 vera_layer_get_mapbase_offset::return#2 vera_layer_get_mapbase_offset::return#0 vera_layer_mode_tile::mapwidth#10 ]
reg byte a [ gotoxy::$5 ]
reg byte x [ vera_layer_get_backcolor::layer#0 ]
reg byte a [ vera_layer_get_backcolor::return#2 ]
reg byte a [ clrscr::$0 ]
zp[1]:47 [ clrscr::$1 clrscr::color#0 vera_tile_area::h#4 ]
reg byte x [ vera_layer_get_textcolor::layer#0 ]
reg byte a [ vera_layer_get_textcolor::return#2 ]
reg byte a [ clrscr::$2 ]
reg byte a [ clrscr::$9 ]
reg byte a [ clrscr::$5 ]
reg byte a [ clrscr::$6 ]
reg byte a [ clrscr::$7 ]
reg byte a [ vera_layer_mode_tile::$14 ]
reg byte a [ vera_layer_set_config::layer#0 ]
reg byte x [ vera_layer_set_config::config#0 ]
zp[2]:48 [ vera_layer_mode_tile::$1 screenlayer::vera_layer_get_height1_config#0 ]
zp[1]:50 [ vera_layer_mode_tile::$17 ]
reg byte a [ vera_layer_mode_tile::$2 ]
zp[1]:51 [ vera_layer_mode_tile::$18 ]
reg byte x [ vera_layer_mode_tile::mapbase#0 ]
zp[2]:52 [ vera_layer_mode_tile::$6 screenlayer::vera_layer_get_height1_return#0 screenlayer::vera_layer_get_height1_return#1 screenlayer::$5 ]
reg byte a [ vera_layer_mode_tile::$7 ]
reg byte a [ vera_layer_mode_tile::tilebase#0 ]
reg byte a [ vera_layer_set_tilebase::layer#0 ]
reg byte x [ vera_layer_set_tilebase::tilebase#0 ]
reg byte a [ vera_layer_mode_tile::$13 ]
reg byte a [ vera_layer_mode_tile::$12 ]
reg byte a [ vera_layer_mode_tile::$11 ]
reg byte a [ memcpy_to_vram::$0 ]
reg byte a [ memcpy_to_vram::$1 ]
zp[1]:54 [ vera_tile_area::hflip#0 ]
zp[1]:55 [ vera_tile_area::vflip#0 vera_tile_area::index_h#2 ]
zp[1]:56 [ vera_tile_area::index_l#0 ]
reg byte a [ vera_tile_area::index_h#0 ]
reg byte a [ vera_tile_area::index_h#1 ]
reg byte a [ vera_tile_area::$5 ]
reg byte a [ vera_tile_area::vera_vram_address01_$0 ]
reg byte a [ vera_tile_area::vera_vram_address01_$1 ]
reg byte a [ vera_tile_area::vera_vram_address01_$2 ]
reg byte a [ vera_tile_area::vera_vram_address01_$3 ]
reg byte a [ cputs::c#1 ]
zp[1]:57 [ cputc::c#0 vera_tile_area::w#9 ]
zp[1]:58 [ kbhit::ch ]
reg byte a [ kbhit::return#0 ]
reg byte a [ kbhit::return#1 ]
reg byte a [ vera_layer_get_mapbase_bank::return#0 ]
reg byte a [ vera_layer_get_mapbase_offset::$0 ]
reg byte a [ vera_layer_get_rowshift::return#0 ]
reg byte a [ vera_layer_get_rowskip::$0 ]
reg byte a [ vera_layer_get_backcolor::return#0 ]
reg byte a [ vera_layer_get_textcolor::return#0 ]
reg byte a [ vera_layer_set_config::$0 ]
reg byte a [ vera_layer_set_tilebase::$0 ]
zp[2]:59 [ vera_layer_set_tilebase::addr#0 vera_layer_set_config::addr#0 vera_layer_set_text_color_mode::addr#0 vera_layer_set_mapbase::addr#0 screenlayer::vera_layer_get_width1_return#0 screenlayer::vera_layer_get_width1_return#1 screenlayer::$2 ]
reg byte a [ vera_layer_get_color::return#3 ]
reg byte x [ cputc::color#0 ]
reg byte a [ cputc::$15 ]
zp[2]:61 [ cputc::conio_addr#0 cputc::conio_addr#1 vera_tile_area::rowskip#0 memcpy_in_vram::i#2 memcpy_in_vram::i#1 clearline::c#2 clearline::c#1 memcpy_to_vram::vdest#2 memcpy_to_vram::vdest#1 clrscr::line_text#2 clrscr::line_text#1 clrscr::line_text#0 ]
reg byte a [ cputc::$2 ]
reg byte a [ cputc::$4 ]
reg byte a [ cputc::$5 ]
reg byte a [ cputc::$6 ]
reg byte a [ cputc::scroll_enable#0 ]
zp[2]:63 [ cputc::$16 vera_tile_area::$10 vera_tile_area::$4 ]
reg byte a [ vera_layer_get_color::$3 ]
reg byte a [ vera_layer_get_color::$0 ]
reg byte a [ vera_layer_get_color::$1 ]
reg byte a [ cputln::$2 ]
zp[2]:65 [ cputln::temp#0 cputln::temp#1 vera_layer_get_color::addr#0 ]
reg byte a [ cputln::$3 ]
zp[1]:67 [ insertup::cy#0 vera_tile_area::r#2 vera_tile_area::r#1 ]
zp[1]:68 [ insertup::width#0 vera_tile_area::shift#0 ]
reg byte a [ insertup::$3 ]
zp[2]:69 [ insertup::line#0 insertup::start#0 memcpy_in_vram::dest#0 ]
zp[2]:71 [ memcpy_in_vram::num#0 ]
reg byte a [ clearline::$5 ]
zp[2]:73 [ clearline::addr#0 memcpy_in_vram::src#0 ]
reg byte a [ clearline::$1 ]
reg byte a [ clearline::$2 ]
reg byte a [ vera_layer_get_color::return#4 ]
reg byte x [ clearline::color#0 ]
reg byte a [ memcpy_in_vram::$0 ]
reg byte a [ memcpy_in_vram::$1 ]
reg byte a [ memcpy_in_vram::$3 ]
reg byte a [ memcpy_in_vram::$4 ]