diff --git a/.idea/libraries/Maven__cml_kickass_kickassembler_5_16_65ce02_c.xml b/.idea/libraries/Maven__cml_kickass_kickassembler_5_16_65ce02_e.xml similarity index 57% rename from .idea/libraries/Maven__cml_kickass_kickassembler_5_16_65ce02_c.xml rename to .idea/libraries/Maven__cml_kickass_kickassembler_5_16_65ce02_e.xml index bae8a68ff..b6ef1ba12 100644 --- a/.idea/libraries/Maven__cml_kickass_kickassembler_5_16_65ce02_c.xml +++ b/.idea/libraries/Maven__cml_kickass_kickassembler_5_16_65ce02_e.xml @@ -1,13 +1,13 @@ - + - + - + - + \ No newline at end of file diff --git a/kickc.iml b/kickc.iml index 8dd51f79b..5162c4488 100644 --- a/kickc.iml +++ b/kickc.iml @@ -18,7 +18,7 @@ - + diff --git a/pom.xml b/pom.xml index e98c88f3f..e89a9eec5 100644 --- a/pom.xml +++ b/pom.xml @@ -44,7 +44,7 @@ cml.kickass kickassembler - 5.16-65ce02.c + 5.16-65ce02.e info.picocli diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.d/_remote.repositories b/repo/cml/kickass/kickassembler/5.16-65ce02.d/_remote.repositories new file mode 100644 index 000000000..6eb8831ae --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.d/_remote.repositories @@ -0,0 +1,4 @@ +#NOTE: This is a Maven Resolver internal implementation file, its format can be changed without prior notice. +#Fri Jul 31 00:23:06 CEST 2020 +kickassembler-5.16-65ce02.d.jar>= +kickassembler-5.16-65ce02.d.pom>= diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.d/kickassembler-5.16-65ce02.d.jar b/repo/cml/kickass/kickassembler/5.16-65ce02.d/kickassembler-5.16-65ce02.d.jar new file mode 100644 index 000000000..a87008c4a Binary files /dev/null and b/repo/cml/kickass/kickassembler/5.16-65ce02.d/kickassembler-5.16-65ce02.d.jar differ diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.d/kickassembler-5.16-65ce02.d.jar.md5 b/repo/cml/kickass/kickassembler/5.16-65ce02.d/kickassembler-5.16-65ce02.d.jar.md5 new file mode 100644 index 000000000..3e9c00c7a --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.d/kickassembler-5.16-65ce02.d.jar.md5 @@ -0,0 +1 @@ +17a2b80e163f52c920d39d40221e908f \ No newline at end of file diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.d/kickassembler-5.16-65ce02.d.jar.sha1 b/repo/cml/kickass/kickassembler/5.16-65ce02.d/kickassembler-5.16-65ce02.d.jar.sha1 new file mode 100644 index 000000000..9056be054 --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.d/kickassembler-5.16-65ce02.d.jar.sha1 @@ -0,0 +1 @@ +2324604a6056e7abea57d0ff0658a510dce79924 \ No newline at end of file diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.d/kickassembler-5.16-65ce02.d.pom b/repo/cml/kickass/kickassembler/5.16-65ce02.d/kickassembler-5.16-65ce02.d.pom new file mode 100644 index 000000000..4f2faa8e4 --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.d/kickassembler-5.16-65ce02.d.pom @@ -0,0 +1,9 @@ + + + 4.0.0 + cml.kickass + kickassembler + 5.16-65ce02.d + POM was created from install:install-file + diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.d/kickassembler-5.16-65ce02.d.pom.md5 b/repo/cml/kickass/kickassembler/5.16-65ce02.d/kickassembler-5.16-65ce02.d.pom.md5 new file mode 100644 index 000000000..2415316e6 --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.d/kickassembler-5.16-65ce02.d.pom.md5 @@ -0,0 +1 @@ +02be1cb2feea3e175a36baabf757d9a9 \ No newline at end of file diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.d/kickassembler-5.16-65ce02.d.pom.sha1 b/repo/cml/kickass/kickassembler/5.16-65ce02.d/kickassembler-5.16-65ce02.d.pom.sha1 new file mode 100644 index 000000000..ca50e09b5 --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.d/kickassembler-5.16-65ce02.d.pom.sha1 @@ -0,0 +1 @@ +e80e48a7153044c9e8957324ca049f16163bb990 \ No newline at end of file diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.e/_remote.repositories b/repo/cml/kickass/kickassembler/5.16-65ce02.e/_remote.repositories new file mode 100644 index 000000000..c8c214e91 --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.e/_remote.repositories @@ -0,0 +1,4 @@ +#NOTE: This is a Maven Resolver internal implementation file, its format can be changed without prior notice. +#Fri Jul 31 00:50:45 CEST 2020 +kickassembler-5.16-65ce02.e.pom>= +kickassembler-5.16-65ce02.e.jar>= diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.e/kickassembler-5.16-65ce02.e.jar b/repo/cml/kickass/kickassembler/5.16-65ce02.e/kickassembler-5.16-65ce02.e.jar new file mode 100644 index 000000000..9c94eac5b Binary files /dev/null and b/repo/cml/kickass/kickassembler/5.16-65ce02.e/kickassembler-5.16-65ce02.e.jar differ diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.e/kickassembler-5.16-65ce02.e.jar.md5 b/repo/cml/kickass/kickassembler/5.16-65ce02.e/kickassembler-5.16-65ce02.e.jar.md5 new file mode 100644 index 000000000..ddcf0830f --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.e/kickassembler-5.16-65ce02.e.jar.md5 @@ -0,0 +1 @@ +f1a64f50cb6870ff6c7b13c4d201028a \ No newline at end of file diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.e/kickassembler-5.16-65ce02.e.jar.sha1 b/repo/cml/kickass/kickassembler/5.16-65ce02.e/kickassembler-5.16-65ce02.e.jar.sha1 new file mode 100644 index 000000000..ab38434ca --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.e/kickassembler-5.16-65ce02.e.jar.sha1 @@ -0,0 +1 @@ +2f3307d297148acf5a271f18f7af0e64e1fdfbe3 \ No newline at end of file diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.e/kickassembler-5.16-65ce02.e.pom b/repo/cml/kickass/kickassembler/5.16-65ce02.e/kickassembler-5.16-65ce02.e.pom new file mode 100644 index 000000000..2b094cc72 --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.e/kickassembler-5.16-65ce02.e.pom @@ -0,0 +1,9 @@ + + + 4.0.0 + cml.kickass + kickassembler + 5.16-65ce02.e + POM was created from install:install-file + diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.e/kickassembler-5.16-65ce02.e.pom.md5 b/repo/cml/kickass/kickassembler/5.16-65ce02.e/kickassembler-5.16-65ce02.e.pom.md5 new file mode 100644 index 000000000..3a55c4407 --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.e/kickassembler-5.16-65ce02.e.pom.md5 @@ -0,0 +1 @@ +e54284159764694c09d763b5ca35bd1d \ No newline at end of file diff --git a/repo/cml/kickass/kickassembler/5.16-65ce02.e/kickassembler-5.16-65ce02.e.pom.sha1 b/repo/cml/kickass/kickassembler/5.16-65ce02.e/kickassembler-5.16-65ce02.e.pom.sha1 new file mode 100644 index 000000000..dfdc82e38 --- /dev/null +++ b/repo/cml/kickass/kickassembler/5.16-65ce02.e/kickassembler-5.16-65ce02.e.pom.sha1 @@ -0,0 +1 @@ +ca2150506e9ed3fb420d124cdcff4944bc706d21 \ No newline at end of file diff --git a/repo/cml/kickass/kickassembler/maven-metadata.xml b/repo/cml/kickass/kickassembler/maven-metadata.xml index 3abb798ed..719b9dfd4 100644 --- a/repo/cml/kickass/kickassembler/maven-metadata.xml +++ b/repo/cml/kickass/kickassembler/maven-metadata.xml @@ -3,7 +3,7 @@ cml.kickass kickassembler - 5.16-65ce02.c + 5.16-65ce02.e 4.19 5.7 @@ -16,7 +16,9 @@ 5.16-65ce02.a 5.16-65ce02.b 5.16-65ce02.c + 5.16-65ce02.d + 5.16-65ce02.e - 20200726001040 + 20200730225045 diff --git a/repo/cml/kickass/kickassembler/maven-metadata.xml.md5 b/repo/cml/kickass/kickassembler/maven-metadata.xml.md5 index 3031e5737..6b1d9a934 100644 --- a/repo/cml/kickass/kickassembler/maven-metadata.xml.md5 +++ b/repo/cml/kickass/kickassembler/maven-metadata.xml.md5 @@ -1 +1 @@ -adfabf6e204c3daac799ee85ec8f7319 \ No newline at end of file +50b97bdbdec01718f617ba829a5b7a34 \ No newline at end of file diff --git a/repo/cml/kickass/kickassembler/maven-metadata.xml.sha1 b/repo/cml/kickass/kickassembler/maven-metadata.xml.sha1 index 33a3ae852..7d5dc49ee 100644 --- a/repo/cml/kickass/kickassembler/maven-metadata.xml.sha1 +++ b/repo/cml/kickass/kickassembler/maven-metadata.xml.sha1 @@ -1 +1 @@ -c05e418489895864cd4f28522cb3ea9e8ba1abe9 \ No newline at end of file +02f4562d6d64f6c5f0d97d8f443bbafc765445da \ No newline at end of file diff --git a/src/main/java/dk/camelot64/cpufamily6502/Cpu65xx.java b/src/main/java/dk/camelot64/cpufamily6502/Cpu65xx.java index 75998530a..1da9cab8c 100644 --- a/src/main/java/dk/camelot64/cpufamily6502/Cpu65xx.java +++ b/src/main/java/dk/camelot64/cpufamily6502/Cpu65xx.java @@ -1,9 +1,6 @@ package dk.camelot64.cpufamily6502; -import java.util.ArrayList; -import java.util.LinkedHashMap; -import java.util.List; -import java.util.Map; +import java.util.*; /** * A 6502 family CPU. The CPU has an instruction set. @@ -34,6 +31,14 @@ public class Cpu65xx { } } + /** + * Get the CPU name. + * @return The name + */ + public String getName() { + return name; + } + /** * Add an instruction opcode to the instruction set. * @@ -43,7 +48,7 @@ public class Cpu65xx { * @param cycles The number of cycles */ protected void addOpcode(int opcode, String mnemonic, CpuAddressingMode addressingMode, double cycles, String clobberString) { - addOpcode(new int[opcode], mnemonic, addressingMode, cycles, clobberString); + addOpcode(new int[] { opcode }, mnemonic, addressingMode, cycles, clobberString); } /** @@ -68,6 +73,20 @@ public class Cpu65xx { opcodesByMnemonicAddrMode.put(cpuOpcode.getMnemonic() + "_" + cpuOpcode.getAddressingMode().getName(), cpuOpcode); } + /** + * Remove an opcode from the instruction set. (should only be done during initialization) + * @param mnemonic The lower case mnemonic + * @param addressingMode The addressing mode + */ + protected void removeOpcode(String mnemonic, CpuAddressingMode addressingMode) { + final CpuOpcode opcode = getOpcode(mnemonic, addressingMode); + if(opcode==null) + throw new RuntimeException("Opcode not found "+mnemonic+" "+addressingMode.getName()); + allOpcodes.remove(opcode); + opcodesByMnemonicAddrMode.remove(opcode.getMnemonic() + "_" + opcode.getAddressingMode().getName()); + } + + /** * Get a specific instruction opcode form the instruction set @@ -76,7 +95,7 @@ public class Cpu65xx { * @param addressingMode The addressing mode * @return The opcode, if is exists. Null if the instruction set does not have the opcode. */ - private CpuOpcode getOpcode(String mnemonic, CpuAddressingMode addressingMode) { + protected CpuOpcode getOpcode(String mnemonic, CpuAddressingMode addressingMode) { String key = mnemonic.toLowerCase() + "_" + addressingMode.getName(); return opcodesByMnemonicAddrMode.get(key); } @@ -119,4 +138,11 @@ public class Cpu65xx { return cpuOpcode; } + /** + * Get all the opcodes of the CPU + * @return The opcodes + */ + public Collection getAllOpcodes() { + return Collections.unmodifiableCollection(allOpcodes); + } } diff --git a/src/main/java/dk/camelot64/cpufamily6502/CpuClobber.java b/src/main/java/dk/camelot64/cpufamily6502/CpuClobber.java index 8da3c8da2..eff204301 100644 --- a/src/main/java/dk/camelot64/cpufamily6502/CpuClobber.java +++ b/src/main/java/dk/camelot64/cpufamily6502/CpuClobber.java @@ -123,7 +123,7 @@ public class CpuClobber implements Serializable { ); } - private String toClobberString() { + public String toClobberString() { return (registerA ? "A" : "") + (registerX ? "X" : "") + diff --git a/src/main/java/dk/camelot64/cpufamily6502/CpuOpcode.java b/src/main/java/dk/camelot64/cpufamily6502/CpuOpcode.java index c84774d3a..7fcfe0c0f 100644 --- a/src/main/java/dk/camelot64/cpufamily6502/CpuOpcode.java +++ b/src/main/java/dk/camelot64/cpufamily6502/CpuOpcode.java @@ -1,5 +1,7 @@ package dk.camelot64.cpufamily6502; +import java.util.Arrays; + /** A specific opcode in the instruction set of a 6502 family CPU. */ public class CpuOpcode { @@ -125,4 +127,13 @@ public class CpuOpcode { return clobber.isRegisterPC(); } + @Override + public String toString() { + return + Arrays.toString(opcode) + " "+ + mnemonic + " " + addressingMode.getName() + " - " + + "cycles:" +cycles + " " + + "clobber:" + clobber.toClobberString() + ; + } } diff --git a/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu6502Illegal.java b/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu6502Illegal.java index 60f5c3da0..82d3a95e7 100644 --- a/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu6502Illegal.java +++ b/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu6502Illegal.java @@ -27,7 +27,7 @@ public class Cpu6502Illegal extends Cpu65xx { addOpcode(0x1f, "slo", CpuAddressingMode.ABX, 7.0, "Acnz"); addOpcode(0x23, "rla", CpuAddressingMode.IZX, 8.0, "Acnz"); addOpcode(0x27, "rla", CpuAddressingMode.ZP, 5.0, "Acnz"); - addOpcode(0x2b, "anc", CpuAddressingMode.IMM, 2.0, "Acnz"); + addOpcode(0x2b, "anc2", CpuAddressingMode.IMM, 2.0, "Acnz"); addOpcode(0x2f, "rla", CpuAddressingMode.ABS, 6.0, "Acnz"); addOpcode(0x33, "rla", CpuAddressingMode.IZY, 8.0, "Acnz"); addOpcode(0x37, "rla", CpuAddressingMode.ZPX, 6.0, "Acnz"); @@ -74,11 +74,11 @@ public class Cpu6502Illegal extends Cpu65xx { addOpcode(0xd3, "dcp", CpuAddressingMode.IZY, 8.0, "cnz"); addOpcode(0xd7, "dcp", CpuAddressingMode.ZPX, 6.0, "cnz"); addOpcode(0xdb, "dcp", CpuAddressingMode.ABY, 7.0, "cnz"); - addOpcode(0xe2, "isc", CpuAddressingMode.IZX, 8.0, "Acvnz"); - addOpcode(0xe6, "isc", CpuAddressingMode.ZP, 5.0, "Acvnz"); - addOpcode(0xea, "sbc", CpuAddressingMode.IMM, 2.0, "Acvnz"); - addOpcode(0xee, "isc", CpuAddressingMode.ABS, 6.0, "Acvnz"); - addOpcode(0xef, "dcp", CpuAddressingMode.ABX, 7.0, "cnz"); + addOpcode(0xdf, "dcp", CpuAddressingMode.ABX, 7.0, "cnz"); + addOpcode(0xe3, "isc", CpuAddressingMode.IZX, 8.0, "Acvnz"); + addOpcode(0xe7, "isc", CpuAddressingMode.ZP, 5.0, "Acvnz"); + addOpcode(0xe9, "sbc", CpuAddressingMode.IMM, 2.0, "Acvnz"); + addOpcode(0xef, "isc", CpuAddressingMode.ABS, 6.0, "Acvnz"); addOpcode(0xf3, "isc", CpuAddressingMode.IZY, 8.0, "Acvnz"); addOpcode(0xf7, "isc", CpuAddressingMode.ZPX, 6.0, "Acvnz"); addOpcode(0xfb, "isc", CpuAddressingMode.ABY, 7.0, "Acvnz"); diff --git a/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu65C02.java b/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu65C02.java index d7a424197..5d315e97f 100644 --- a/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu65C02.java +++ b/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu65C02.java @@ -33,7 +33,7 @@ public class Cpu65C02 extends Cpu65xx { addOpcode(0x34,"bit", CpuAddressingMode.ZPX,4,"nvz"); addOpcode(0x37,"rmb3", CpuAddressingMode.ZP,5,""); addOpcode(0x3A,"dec", CpuAddressingMode.NON,2,"Anz"); - addOpcode(0x3C,"bit", CpuAddressingMode.ZPX,4.5,"nvz"); + addOpcode(0x3C,"bit", CpuAddressingMode.ABX,4.5,"nvz"); addOpcode(0x3F,"bbr3", CpuAddressingMode.REZ,5,""); addOpcode(0x47,"rmb4", CpuAddressingMode.ZP,5,""); addOpcode(0x4F,"bbr4", CpuAddressingMode.REZ,5,""); @@ -50,14 +50,14 @@ public class Cpu65C02 extends Cpu65xx { addOpcode(0x7A,"ply", CpuAddressingMode.NON,4,"Ynz"); addOpcode(0x7C,"jmp", CpuAddressingMode.IAX,6,""); addOpcode(0x7F,"bbr7", CpuAddressingMode.REZ,5,""); - addOpcode(0x80,"bra", CpuAddressingMode.NON,3,""); + addOpcode(0x80,"bra", CpuAddressingMode.REL,3,""); addOpcode(0x87,"smb0", CpuAddressingMode.ZP,5,""); - addOpcode(0x89,"bit", CpuAddressingMode.IAX,2,"z"); + addOpcode(0x89,"bit", CpuAddressingMode.IMM,2,"z"); addOpcode(0x8F,"bbs0", CpuAddressingMode.REZ,5,""); addOpcode(0x92,"sta", CpuAddressingMode.INZ,5,""); addOpcode(0x97,"smb1", CpuAddressingMode.ZP,5,""); addOpcode(0x9C,"stz", CpuAddressingMode.ABS,4,""); - addOpcode(0x9E,"stz", CpuAddressingMode.ZPX,5,""); + addOpcode(0x9E,"stz", CpuAddressingMode.ABX,5,""); addOpcode(0x9F,"bbs1", CpuAddressingMode.REZ,5,""); addOpcode(0xA7,"smb2", CpuAddressingMode.ZP,5,""); addOpcode(0xAF,"bbs2", CpuAddressingMode.REZ,5,""); diff --git a/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu65CE02.java b/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu65CE02.java index d5feaf907..56b17dba8 100644 --- a/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu65CE02.java +++ b/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu65CE02.java @@ -17,64 +17,76 @@ public class Cpu65CE02 extends Cpu65xx { public Cpu65CE02() { super(NAME, Cpu65C02.INSTANCE); - addOpcode(0x2, "cle", CpuAddressingMode.NON, 2, "e"); - addOpcode(0x3, "see", CpuAddressingMode.NON, 2, "e"); - addOpcode(0xB, "tsy", CpuAddressingMode.NON, 1, "Ynz"); - addOpcode(0x12, "ora", CpuAddressingMode.IZZ, 5, "Anz"); - addOpcode(0x13, "lbpl", CpuAddressingMode.REL, 3, "P"); - addOpcode(0x1B, "inz", CpuAddressingMode.NON, 1, "Znz"); - addOpcode(0x22, "jsr", CpuAddressingMode.IND, 7, "PS"); - addOpcode(0x23, "jsr", CpuAddressingMode.IAX, 7, "PS"); - addOpcode(0x2B, "tys", CpuAddressingMode.NON, 1, "S"); - addOpcode(0x32, "and", CpuAddressingMode.IZZ, 5, "Anz"); - addOpcode(0x33, "lbmi", CpuAddressingMode.REL, 3, "P"); - addOpcode(0x3B, "dez", CpuAddressingMode.NON, 1, "Znz"); - addOpcode(0x42, "neg", CpuAddressingMode.NON, 2, "Anz"); - addOpcode(0x43, "asr", CpuAddressingMode.NON, 2, "Acnz"); - addOpcode(0x44, "asr", CpuAddressingMode.ZP, 4, "cnz"); - addOpcode(0x4B, "taz", CpuAddressingMode.NON, 1, "Znz"); - addOpcode(0x52, "eor", CpuAddressingMode.IZZ, 5, "Anz"); - addOpcode(0x53, "lbvc", CpuAddressingMode.REL, 3, "P"); - addOpcode(0x54, "asr", CpuAddressingMode.ZPX, 4, "cnz"); - addOpcode(0x5B, "tab", CpuAddressingMode.NON, 1, "B"); - addOpcode(0x5C, "map", CpuAddressingMode.NON, 2, ""); - addOpcode(0x62, "rtn", CpuAddressingMode.IMM, 7, "P"); - addOpcode(0x63, "lbsr", CpuAddressingMode.REL, 3, "P"); - addOpcode(0x6B, "tza", CpuAddressingMode.NON, 1, "Anz"); - addOpcode(0x72, "adc", CpuAddressingMode.IZZ, 5, "Acvnz"); - addOpcode(0x73, "lbvs", CpuAddressingMode.REL, 3, "P"); - addOpcode(0x7B, "tba", CpuAddressingMode.NON, 1, "Anz"); - addOpcode(0x82, "sta", CpuAddressingMode.ISY, 6, ""); - addOpcode(0x83, "lbra", CpuAddressingMode.REL, 3, "P"); - addOpcode(0x8B, "sty", CpuAddressingMode.ABS, 4, ""); - addOpcode(0x92, "sta", CpuAddressingMode.IZZ, 5, ""); - addOpcode(0x93, "lbcc", CpuAddressingMode.REL, 3, "P"); - addOpcode(0x9B, "stx", CpuAddressingMode.ABS, 4, ""); - addOpcode(0xA3, "ldz", CpuAddressingMode.IMM, 2, "Znz"); - addOpcode(0xAB, "ldz", CpuAddressingMode.ABS, 4, "Znz"); - addOpcode(0xB2, "lda", CpuAddressingMode.IZZ, 5, "Anz"); - addOpcode(0xB3, "lbcs", CpuAddressingMode.REL, 3, "P"); - addOpcode(0xBB, "ldz", CpuAddressingMode.ABS, 4, "Znz"); - addOpcode(0xC2, "cpz", CpuAddressingMode.IMM, 2, "cnz"); - addOpcode(0xC3, "dew", CpuAddressingMode.ZP, 5, "nz"); - addOpcode(0xCB, "asw", CpuAddressingMode.ABS, 7, "cnz"); - addOpcode(0xD2, "cmp", CpuAddressingMode.IZZ, 5, "cnz"); - addOpcode(0xD3, "lbne", CpuAddressingMode.REL, 3, "P"); - addOpcode(0xD4, "cpz", CpuAddressingMode.ZP, 3, "cnz"); - addOpcode(0xDB, "phz", CpuAddressingMode.NON, 3, "S"); - addOpcode(0xDC, "cpz", CpuAddressingMode.ABS, 4, "cnz"); - addOpcode(0xE2, "lda", CpuAddressingMode.ISY, 6, "Anz"); - addOpcode(0xE3, "inw", CpuAddressingMode.ZP, 5, "nz"); - addOpcode(0xEA, "eom", CpuAddressingMode.NON, 1, ""); - addOpcode(0xEB, "row", CpuAddressingMode.ABS, 6, "cnz"); - addOpcode(0xF2, "sbc", CpuAddressingMode.IZZ, 5, "Acvnz"); - addOpcode(0xF3, "lbeq", CpuAddressingMode.REL, 3, "P"); - addOpcode(0xF4, "phw", CpuAddressingMode.IMM, 5, "S"); - addOpcode(0xFB, "plz", CpuAddressingMode.NON, 3, "ZnzS"); - addOpcode(0xFC, "phw", CpuAddressingMode.ABS, 7, "S"); + + // Remove all opcodes not present on 65CE02 - eg. (zp), which is changed to (zp),y + removeOpcode("ora", CpuAddressingMode.INZ); + removeOpcode("and", CpuAddressingMode.INZ); + removeOpcode("eor", CpuAddressingMode.INZ); + removeOpcode("adc", CpuAddressingMode.INZ); + removeOpcode("sta", CpuAddressingMode.INZ); + removeOpcode("lda", CpuAddressingMode.INZ); + removeOpcode("cmp", CpuAddressingMode.INZ); + removeOpcode("sbc", CpuAddressingMode.INZ); + + addOpcode(0x2,"cle",CpuAddressingMode.NON,2,"e"); + addOpcode(0x3,"see",CpuAddressingMode.NON,2,"e"); + addOpcode(0xB,"tsy",CpuAddressingMode.NON,1,"Ynz"); + addOpcode(0x12,"ora",CpuAddressingMode.IZZ,5,"Anz"); + addOpcode(0x13,"lbpl",CpuAddressingMode.REL,3,"P"); + addOpcode(0x1B,"inz",CpuAddressingMode.NON,1,"Znz"); + addOpcode(0x22,"jsr",CpuAddressingMode.IND,7,"PS"); + addOpcode(0x23,"jsr",CpuAddressingMode.IAX,7,"PS"); + addOpcode(0x2B,"tys",CpuAddressingMode.NON,1,"S"); + addOpcode(0x32,"and",CpuAddressingMode.IZZ,5,"Anz"); + addOpcode(0x33,"lbmi",CpuAddressingMode.REL,3,"P"); + addOpcode(0x3B,"dez",CpuAddressingMode.NON,1,"Znz"); + addOpcode(0x42,"neg",CpuAddressingMode.NON,2,"Anz"); + addOpcode(0x43,"asr",CpuAddressingMode.NON,2,"Acnz"); + addOpcode(0x44,"asr",CpuAddressingMode.ZP,4,"cnz"); + addOpcode(0x4B,"taz",CpuAddressingMode.NON,1,"Znz"); + addOpcode(0x52,"eor",CpuAddressingMode.IZZ,5,"Anz"); + addOpcode(0x53,"lbvc",CpuAddressingMode.REL,3,"P"); + addOpcode(0x54,"asr",CpuAddressingMode.ZPX,4,"cnz"); + addOpcode(0x5B,"tab",CpuAddressingMode.NON,1,"B"); + addOpcode(0x5C,"map",CpuAddressingMode.NON,2,""); + addOpcode(0x62,"rtn",CpuAddressingMode.IMM,7,"P"); + addOpcode(0x63,"lbsr",CpuAddressingMode.REL,3,"P"); + addOpcode(0x6B,"tza",CpuAddressingMode.NON,1,"Anz"); + addOpcode(0x72,"adc",CpuAddressingMode.IZZ,5,"Acvnz"); + addOpcode(0x73,"lbvs",CpuAddressingMode.REL,3,"P"); + addOpcode(0x7B,"tba",CpuAddressingMode.NON,1,"Anz"); + addOpcode(0x82,"sta",CpuAddressingMode.ISY,6,""); + addOpcode(0x83,"lbra",CpuAddressingMode.REL,3,"P"); + addOpcode(0x8B,"sty",CpuAddressingMode.ABX,4,""); + addOpcode(0x92,"sta",CpuAddressingMode.IZZ,5,""); + addOpcode(0x93,"lbcc",CpuAddressingMode.REL,3,"P"); + addOpcode(0x9B,"stx",CpuAddressingMode.ABY,4,""); + addOpcode(0xA3,"ldz",CpuAddressingMode.IMM,2,"Znz"); + addOpcode(0xAB,"ldz",CpuAddressingMode.ABS,4,"Znz"); + addOpcode(0xB2,"lda",CpuAddressingMode.IZZ,5,"Anz"); + addOpcode(0xB3,"lbcs",CpuAddressingMode.REL,3,"P"); + addOpcode(0xBB,"ldz",CpuAddressingMode.ABX,4,"Znz"); + addOpcode(0xC2,"cpz",CpuAddressingMode.IMM,2,"cnz"); + addOpcode(0xC3,"dew",CpuAddressingMode.ABS,5,"nz"); + addOpcode(0xCB,"asw",CpuAddressingMode.ABS,7,"cnz"); + addOpcode(0xD2,"cmp",CpuAddressingMode.IZZ,5,"cnz"); + addOpcode(0xD3,"lbne",CpuAddressingMode.REL,3,"P"); + addOpcode(0xD4,"cpz",CpuAddressingMode.ZP,3,"cnz"); + addOpcode(0xDB,"phz",CpuAddressingMode.NON,3,"S"); + addOpcode(0xDC,"cpz",CpuAddressingMode.ABS,4,"cnz"); + addOpcode(0xE2,"lda",CpuAddressingMode.ISY,6,"Anz"); + addOpcode(0xE3,"inw",CpuAddressingMode.ABS,5,"nz"); + addOpcode(0xEB,"row",CpuAddressingMode.ABS,6,"cnz"); + addOpcode(0xF2,"sbc",CpuAddressingMode.IZZ,5,"Acvnz"); + addOpcode(0xF3,"lbeq",CpuAddressingMode.REL,3,"P"); + addOpcode(0xF4,"phw",CpuAddressingMode.IMM,5,"S"); + addOpcode(0xFB,"plz",CpuAddressingMode.NON,3,"ZnzS"); + addOpcode(0xFC,"phw",CpuAddressingMode.ABS,7,"S"); + addOpcode(0xEA,"eom",CpuAddressingMode.NON,1,""); // TODO: Instruction Cycle changes on 65CE02 } + } diff --git a/src/main/repo/mvn-repo-install.sh b/src/main/repo/mvn-repo-install.sh index b94fcae79..678c9e456 100755 --- a/src/main/repo/mvn-repo-install.sh +++ b/src/main/repo/mvn-repo-install.sh @@ -1,3 +1,19 @@ #!/usr/bin/env bash + +# Prepare by making the "official" metadata local +cp ./repo/cml/kickass/kickassembler/maven-metadata.xml ./repo/cml/kickass/kickassembler/maven-metadata-local.xml + # mvn install:install-file -Dmaven.repo.local=./repo/ -Dfile=/Applications/KickAssembler/KickAss.jar -DgroupId=cml.kickass -DartifactId=kickassembler -Dpackaging=jar -DgeneratePom=true -DcreateChecksum=true -Dversion=5.16 -mvn install:install-file -Dmaven.repo.local=./repo/ -Dfile=/Users/jespergravgaard/c64/kickassembler65ce02/out/KickAss65CE02.jar -DgroupId=cml.kickass -DartifactId=kickassembler -Dpackaging=jar -DgeneratePom=true -DcreateChecksum=true -Dversion=5.16-65ce02.c +mvn install:install-file -Dmaven.repo.local=./repo/ -Dfile=/Users/jespergravgaard/c64/kickassembler65ce02/out/KickAss65CE02.jar -DgroupId=cml.kickass -DartifactId=kickassembler -Dpackaging=jar -DgeneratePom=true -DcreateChecksum=true -Dversion=5.16-65ce02.e + +# Finalize by making the local metadata official +pushd ./repo/cml/kickass/kickassembler +mv maven-metadata-local.xml maven-metadata.xml +mv maven-metadata-local.xml.md5 maven-metadata.xml.md5 +mv maven-metadata-local.xml.sha1 maven-metadata.xml.sha1 +popd + +# Remove stuff that Maven adds, that we don't need +rm -rf ./repo/classworlds +rm -rf ./repo/junit +rm -rf ./repo/org diff --git a/src/test/java/dk/camelot64/cpufamily6502/TestCpuFamilyKickAssCompatibility.java b/src/test/java/dk/camelot64/cpufamily6502/TestCpuFamilyKickAssCompatibility.java new file mode 100644 index 000000000..5bc29cf81 --- /dev/null +++ b/src/test/java/dk/camelot64/cpufamily6502/TestCpuFamilyKickAssCompatibility.java @@ -0,0 +1,100 @@ +package dk.camelot64.cpufamily6502; + +import dk.camelot64.cpufamily6502.cpus.Cpu6502Illegal; +import dk.camelot64.cpufamily6502.cpus.Cpu6502Official; +import dk.camelot64.cpufamily6502.cpus.Cpu65C02; +import dk.camelot64.cpufamily6502.cpus.Cpu65CE02; +import kickass._65xx._65xxArgType; +import kickass._65xx.cpus.*; +import org.junit.Assert; +import org.junit.Test; + +import java.util.*; + +import static junit.framework.TestCase.assertNotNull; +import static junit.framework.TestCase.assertTrue; + +public class TestCpuFamilyKickAssCompatibility { + + @Test + public void testOpcodes6502Official() { + assertOpcodesMatch(Cpu6502Official.INSTANCE, CPU_6502NoIllegals.instance); + } + + @Test + public void testOpcodes6502Illegal() { + assertOpcodesMatch(Cpu6502Illegal.INSTANCE, CPU_6502WithIllegals.instance); + } + + @Test + public void testOpcodes65C02() { + assertOpcodesMatch(Cpu65C02.INSTANCE, CPU_65C02.instance); + } + + @Test + public void testOpcodes65CE02() { + assertOpcodesMatch(Cpu65CE02.INSTANCE, CPU_65CE02.instance); + } + + private void assertOpcodesMatch(Cpu65xx kcCpu, Cpu kaCpu) { + final Collection kcAllOpcodes = kcCpu.getAllOpcodes(); + final Map kaAllMnemonics = kaCpu.mnemonics; + final Map> kaAddressingModeMap = getKAAddressingModeMap(); + + // Test that each KickC opcode has a matching KickAss opcode + for(CpuOpcode kcOpcode : kcAllOpcodes) { + final int[] kaOpcodes = kaAllMnemonics.get(kcOpcode.getMnemonic()); + assertNotNull("KickAss CPU " + kaCpu.name + " does not know the KickC CPU " + kcCpu.getName() + " mnemonic", kcOpcode.getMnemonic()); + final List<_65xxArgType> kaArgTypes = kaAddressingModeMap.get(kcOpcode.getAddressingMode()); + assertNotNull("KickAss addressing mode not found " + kcOpcode.getAddressingMode().getName(), kaArgTypes); + // Try each argtype + boolean found = false; + for(_65xxArgType kaArgType : kaArgTypes) { + final int kaArgTypeIdx = kaArgType.getIdNo(); + if(kaOpcodes!=null && kaOpcodes.length>kaArgTypeIdx) { + final int kaOpcodeRaw = kaOpcodes[kaArgTypeIdx]; + if(kaOpcodeRaw >= 0) { + found = true; + final int[] kaOpcode = new int[]{kaOpcodeRaw}; + Assert.assertArrayEquals("KickAss opcode not matching for mnemonic " + kcOpcode.toString(), kcOpcode.getOpcode(), kaOpcode); + } + } + } + assertTrue("KickAss opcode not found for mnemonic " + kcOpcode.toString(), found); + } + + } + + /** + * Get the KickAss ArgType that matches a KickC addressing mode. + * @return The argtype. + */ + Map> getKAAddressingModeMap() { + final HashMap> map = new HashMap<>(); + map.put(CpuAddressingMode.NON, Collections.singletonList(_65xxArgType.noArgument)); + map.put(CpuAddressingMode.IMM, Arrays.asList(_65xxArgType.immediate, _65xxArgType.immediateWord)); + map.put(CpuAddressingMode.ZP, Collections.singletonList(_65xxArgType.zeropage)); + map.put(CpuAddressingMode.ZPX, Collections.singletonList(_65xxArgType.zeropageX)); + map.put(CpuAddressingMode.ZPY, Collections.singletonList(_65xxArgType.zeropageY)); + map.put(CpuAddressingMode.ABS, Collections.singletonList(_65xxArgType.absolute)); + map.put(CpuAddressingMode.ABX, Collections.singletonList(_65xxArgType.absoluteX)); + map.put(CpuAddressingMode.ABY, Collections.singletonList(_65xxArgType.absoluteY)); + map.put(CpuAddressingMode.IZX, Collections.singletonList(_65xxArgType.indirectZeropageX)); + map.put(CpuAddressingMode.IAX, Collections.singletonList(_65xxArgType.indirectX)); + map.put(CpuAddressingMode.IZY, Collections.singletonList(_65xxArgType.indirectZeropageY)); + map.put(CpuAddressingMode.IZZ, Collections.singletonList(_65xxArgType.indirectZeropageZ)); + map.put(CpuAddressingMode.IND, Collections.singletonList(_65xxArgType.indirect)); + map.put(CpuAddressingMode.INZ, Collections.singletonList(_65xxArgType.indirectZeropage)); + map.put(CpuAddressingMode.LIN, Collections.singletonList(_65xxArgType.indirect32Zeropage)); + map.put(CpuAddressingMode.LIZ, Collections.singletonList(_65xxArgType.indirect32ZeropageZ)); + map.put(CpuAddressingMode.ISY, Collections.singletonList(_65xxArgType.indirectStackZeropageY)); + map.put(CpuAddressingMode.REL, Arrays.asList(_65xxArgType.relative, _65xxArgType.relativeWord)); + map.put(CpuAddressingMode.REZ, Collections.singletonList(_65xxArgType.zeropageRelative)); + // TODO: Handle Immediate Word, relative Word + return map; + } + + + // map.entrySet().stream().collect(Collectors.toMap(Map.Entry::getValue, Map.Entry::getKey)) + +}