From 3fa29f5ec210c7e965163fb7c194ee97f541c725 Mon Sep 17 00:00:00 2001 From: jespergravgaard Date: Tue, 11 Jun 2019 20:02:37 +0200 Subject: [PATCH] Added variable word ROR and word=word&word --- src/main/fragment/vwuz1=vwuz2_band_vwuz3.asm | 6 + .../fragment/vwuz1=vwuz2_plus__hi_vwuz2.asm | 7 + src/main/fragment/vwuz1=vwuz2_ror_vbuxx.asm | 12 + src/main/fragment/vwuz1=vwuz2_ror_vbuyy.asm | 12 + src/test/kc/sandbox.kc | 2 +- src/test/ref/sandbox.asm | 25 +- src/test/ref/sandbox.cfg | 61 +- src/test/ref/sandbox.log | 694 +++++++++--------- src/test/ref/sandbox.sym | 11 +- 9 files changed, 414 insertions(+), 416 deletions(-) create mode 100644 src/main/fragment/vwuz1=vwuz2_band_vwuz3.asm create mode 100644 src/main/fragment/vwuz1=vwuz2_plus__hi_vwuz2.asm create mode 100644 src/main/fragment/vwuz1=vwuz2_ror_vbuxx.asm create mode 100644 src/main/fragment/vwuz1=vwuz2_ror_vbuyy.asm diff --git a/src/main/fragment/vwuz1=vwuz2_band_vwuz3.asm b/src/main/fragment/vwuz1=vwuz2_band_vwuz3.asm new file mode 100644 index 000000000..ee29fb63d --- /dev/null +++ b/src/main/fragment/vwuz1=vwuz2_band_vwuz3.asm @@ -0,0 +1,6 @@ +lda {z2} +and {z3} +sta {z1} +lda {z2}+1 +and {z3}+1 +sta {z1}+1 \ No newline at end of file diff --git a/src/main/fragment/vwuz1=vwuz2_plus__hi_vwuz2.asm b/src/main/fragment/vwuz1=vwuz2_plus__hi_vwuz2.asm new file mode 100644 index 000000000..fec3cca1c --- /dev/null +++ b/src/main/fragment/vwuz1=vwuz2_plus__hi_vwuz2.asm @@ -0,0 +1,7 @@ +lda {z2} +clc +adc {z2}+1 +sta {z1} +lda {z2}+1 +adc #0 +sta {z1}+1 \ No newline at end of file diff --git a/src/main/fragment/vwuz1=vwuz2_ror_vbuxx.asm b/src/main/fragment/vwuz1=vwuz2_ror_vbuxx.asm new file mode 100644 index 000000000..0fe4fb01d --- /dev/null +++ b/src/main/fragment/vwuz1=vwuz2_ror_vbuxx.asm @@ -0,0 +1,12 @@ +lda {z2} +sta {z1} +lda {z2}+1 +sta {z1}+1 +cpx #0 +beq !e+ +!: +lsr {z1}+1 +ror {z1} +dex +bne !- +!e: \ No newline at end of file diff --git a/src/main/fragment/vwuz1=vwuz2_ror_vbuyy.asm b/src/main/fragment/vwuz1=vwuz2_ror_vbuyy.asm new file mode 100644 index 000000000..12b5268fe --- /dev/null +++ b/src/main/fragment/vwuz1=vwuz2_ror_vbuyy.asm @@ -0,0 +1,12 @@ +lda {z2} +sta {z1} +lda {z2}+1 +sta {z1}+1 +cpy #0 +beq !e+ +!: +lsr {z1}+1 +ror {z1} +dey +bne !- +!e: \ No newline at end of file diff --git a/src/test/kc/sandbox.kc b/src/test/kc/sandbox.kc index d84bb18f5..e5dce106a 100644 --- a/src/test/kc/sandbox.kc +++ b/src/test/kc/sandbox.kc @@ -90,7 +90,7 @@ word div10(word val){ val = (val >> 1) + 1; val += val << 1; val += val >> 4; - val += val >> 4 >> 4; // >> 8 is not supported? + val += val >> 8; // >> 8 is not supported? FIXED! return val >> 4; } diff --git a/src/test/ref/sandbox.asm b/src/test/ref/sandbox.asm index c8147852f..5e0da2398 100644 --- a/src/test/ref/sandbox.asm +++ b/src/test/ref/sandbox.asm @@ -563,12 +563,11 @@ append: { div10: { .label _0 = $21 .label _2 = $23 - .label _3 = 4 - .label _4 = $25 - .label _5 = $25 + .label _3 = $25 + .label _4 = 4 .label val = $21 .label val_1 = $23 - .label val_2 = 4 + .label val_2 = $25 .label val_3 = 4 .label return = 4 .label val_4 = 2 @@ -611,27 +610,25 @@ div10: { lda val_2+1 adc val_1+1 sta val_2+1 - sta _4+1 + ldy #8 lda val_2 sta _4 - ldy #4 + lda val_2+1 + sta _4+1 + cpy #0 + beq !e+ !: lsr _4+1 ror _4 dey bne !- - ldy #4 - !: - lsr _5+1 - ror _5 - dey - bne !- + !e: lda val_3 clc - adc _5 + adc val_2 sta val_3 lda val_3+1 - adc _5+1 + adc val_2+1 sta val_3+1 ldy #4 !: diff --git a/src/test/ref/sandbox.cfg b/src/test/ref/sandbox.cfg index d5e6acaf4..c09a42633 100644 --- a/src/test/ref/sandbox.cfg +++ b/src/test/ref/sandbox.cfg @@ -390,57 +390,56 @@ div10: scope:[div10] from main::@6 [185] (word) div10::val#1 ← (word) div10::val#0 + (word~) div10::$2 [186] (word~) div10::$3 ← (word) div10::val#1 >> (byte) 4 [187] (word) div10::val#2 ← (word) div10::val#1 + (word~) div10::$3 - [188] (word~) div10::$4 ← (word) div10::val#2 >> (byte) 4 - [189] (word~) div10::$5 ← (word~) div10::$4 >> (byte) 4 - [190] (word) div10::val#3 ← (word) div10::val#2 + (word~) div10::$5 - [191] (word) div10::return#0 ← (word) div10::val#3 >> (byte) 4 + [188] (word~) div10::$4 ← (word) div10::val#2 >> (byte) 8 + [189] (word) div10::val#3 ← (word) div10::val#2 + (word~) div10::$4 + [190] (word) div10::return#0 ← (word) div10::val#3 >> (byte) 4 to:div10::@return div10::@return: scope:[div10] from div10 - [192] return + [191] return to:@return div16u: scope:[div16u] from main::@2 - [193] (word) divr16u::dividend#1 ← (word) div16u::dividend#0 - [194] call divr16u - [195] (word) divr16u::return#2 ← (word) divr16u::return#0 + [192] (word) divr16u::dividend#1 ← (word) div16u::dividend#0 + [193] call divr16u + [194] (word) divr16u::return#2 ← (word) divr16u::return#0 to:div16u::@1 div16u::@1: scope:[div16u] from div16u - [196] (word) div16u::return#0 ← (word) divr16u::return#2 + [195] (word) div16u::return#0 ← (word) divr16u::return#2 to:div16u::@return div16u::@return: scope:[div16u] from div16u::@1 - [197] return + [196] return to:@return divr16u: scope:[divr16u] from div16u - [198] phi() + [197] phi() to:divr16u::@1 divr16u::@1: scope:[divr16u] from divr16u divr16u::@3 - [199] (byte) divr16u::i#2 ← phi( divr16u/(byte) 0 divr16u::@3/(byte) divr16u::i#1 ) - [199] (word) divr16u::quotient#3 ← phi( divr16u/(byte) 0 divr16u::@3/(word) divr16u::return#0 ) - [199] (word) divr16u::dividend#2 ← phi( divr16u/(word) divr16u::dividend#1 divr16u::@3/(word) divr16u::dividend#0 ) - [199] (word) divr16u::rem#4 ← phi( divr16u/(byte) 0 divr16u::@3/(word) divr16u::rem#9 ) - [200] (word) divr16u::rem#0 ← (word) divr16u::rem#4 << (byte) 1 - [201] (byte~) divr16u::$1 ← > (word) divr16u::dividend#2 - [202] (byte~) divr16u::$2 ← (byte~) divr16u::$1 & (byte) $80 - [203] if((byte~) divr16u::$2==(byte) 0) goto divr16u::@2 + [198] (byte) divr16u::i#2 ← phi( divr16u/(byte) 0 divr16u::@3/(byte) divr16u::i#1 ) + [198] (word) divr16u::quotient#3 ← phi( divr16u/(byte) 0 divr16u::@3/(word) divr16u::return#0 ) + [198] (word) divr16u::dividend#2 ← phi( divr16u/(word) divr16u::dividend#1 divr16u::@3/(word) divr16u::dividend#0 ) + [198] (word) divr16u::rem#4 ← phi( divr16u/(byte) 0 divr16u::@3/(word) divr16u::rem#9 ) + [199] (word) divr16u::rem#0 ← (word) divr16u::rem#4 << (byte) 1 + [200] (byte~) divr16u::$1 ← > (word) divr16u::dividend#2 + [201] (byte~) divr16u::$2 ← (byte~) divr16u::$1 & (byte) $80 + [202] if((byte~) divr16u::$2==(byte) 0) goto divr16u::@2 to:divr16u::@4 divr16u::@4: scope:[divr16u] from divr16u::@1 - [204] (word) divr16u::rem#1 ← (word) divr16u::rem#0 | (byte) 1 + [203] (word) divr16u::rem#1 ← (word) divr16u::rem#0 | (byte) 1 to:divr16u::@2 divr16u::@2: scope:[divr16u] from divr16u::@1 divr16u::@4 - [205] (word) divr16u::rem#5 ← phi( divr16u::@1/(word) divr16u::rem#0 divr16u::@4/(word) divr16u::rem#1 ) - [206] (word) divr16u::dividend#0 ← (word) divr16u::dividend#2 << (byte) 1 - [207] (word) divr16u::quotient#1 ← (word) divr16u::quotient#3 << (byte) 1 - [208] if((word) divr16u::rem#5<(const word) div16u::divisor#0) goto divr16u::@3 + [204] (word) divr16u::rem#5 ← phi( divr16u::@1/(word) divr16u::rem#0 divr16u::@4/(word) divr16u::rem#1 ) + [205] (word) divr16u::dividend#0 ← (word) divr16u::dividend#2 << (byte) 1 + [206] (word) divr16u::quotient#1 ← (word) divr16u::quotient#3 << (byte) 1 + [207] if((word) divr16u::rem#5<(const word) div16u::divisor#0) goto divr16u::@3 to:divr16u::@5 divr16u::@5: scope:[divr16u] from divr16u::@2 - [209] (word) divr16u::quotient#2 ← ++ (word) divr16u::quotient#1 - [210] (word) divr16u::rem#2 ← (word) divr16u::rem#5 - (const word) div16u::divisor#0 + [208] (word) divr16u::quotient#2 ← ++ (word) divr16u::quotient#1 + [209] (word) divr16u::rem#2 ← (word) divr16u::rem#5 - (const word) div16u::divisor#0 to:divr16u::@3 divr16u::@3: scope:[divr16u] from divr16u::@2 divr16u::@5 - [211] (word) divr16u::return#0 ← phi( divr16u::@2/(word) divr16u::quotient#1 divr16u::@5/(word) divr16u::quotient#2 ) - [211] (word) divr16u::rem#9 ← phi( divr16u::@2/(word) divr16u::rem#5 divr16u::@5/(word) divr16u::rem#2 ) - [212] (byte) divr16u::i#1 ← ++ (byte) divr16u::i#2 - [213] if((byte) divr16u::i#1!=(byte) $10) goto divr16u::@1 + [210] (word) divr16u::return#0 ← phi( divr16u::@2/(word) divr16u::quotient#1 divr16u::@5/(word) divr16u::quotient#2 ) + [210] (word) divr16u::rem#9 ← phi( divr16u::@2/(word) divr16u::rem#5 divr16u::@5/(word) divr16u::rem#2 ) + [211] (byte) divr16u::i#1 ← ++ (byte) divr16u::i#2 + [212] if((byte) divr16u::i#1!=(byte) $10) goto divr16u::@1 to:divr16u::@return divr16u::@return: scope:[divr16u] from divr16u::@3 - [214] return + [213] return to:@return diff --git a/src/test/ref/sandbox.log b/src/test/ref/sandbox.log index 5d37d7c58..b62f7c882 100644 --- a/src/test/ref/sandbox.log +++ b/src/test/ref/sandbox.log @@ -1060,11 +1060,10 @@ div10: scope:[div10] from main::@6 (word) div10::val#1 ← (word) div10::val#0 + (word~) div10::$2 (word~) div10::$3 ← (word) div10::val#1 >> (number) 4 (word) div10::val#2 ← (word) div10::val#1 + (word~) div10::$3 - (word~) div10::$4 ← (word) div10::val#2 >> (number) 4 - (word~) div10::$5 ← (word~) div10::$4 >> (number) 4 - (word) div10::val#3 ← (word) div10::val#2 + (word~) div10::$5 - (word~) div10::$6 ← (word) div10::val#3 >> (number) 4 - (word) div10::return#0 ← (word~) div10::$6 + (word~) div10::$4 ← (word) div10::val#2 >> (number) 8 + (word) div10::val#3 ← (word) div10::val#2 + (word~) div10::$4 + (word~) div10::$5 ← (word) div10::val#3 >> (number) 4 + (word) div10::return#0 ← (word~) div10::$5 to:div10::@return div10::@return: scope:[div10] from div10 (word) div10::return#3 ← phi( div10/(word) div10::return#0 ) @@ -1258,7 +1257,6 @@ SYMBOL TABLE SSA (word~) div10::$3 (word~) div10::$4 (word~) div10::$5 -(word~) div10::$6 (label) div10::@return (word) div10::return (word) div10::return#0 @@ -2317,9 +2315,8 @@ Adding number conversion cast (unumber) 1 in (number~) div10::$1 ← (word~) div Adding number conversion cast (unumber) div10::$1 in (number~) div10::$1 ← (word~) div10::$0 + (unumber)(number) 1 Adding number conversion cast (unumber) 1 in (word~) div10::$2 ← (word) div10::val#0 << (number) 1 Adding number conversion cast (unumber) 4 in (word~) div10::$3 ← (word) div10::val#1 >> (number) 4 -Adding number conversion cast (unumber) 4 in (word~) div10::$4 ← (word) div10::val#2 >> (number) 4 -Adding number conversion cast (unumber) 4 in (word~) div10::$5 ← (word~) div10::$4 >> (number) 4 -Adding number conversion cast (unumber) 4 in (word~) div10::$6 ← (word) div10::val#3 >> (number) 4 +Adding number conversion cast (unumber) 8 in (word~) div10::$4 ← (word) div10::val#2 >> (number) 8 +Adding number conversion cast (unumber) 4 in (word~) div10::$5 ← (word) div10::val#3 >> (number) 4 Adding number conversion cast (unumber) $17 in *((byte*) VICBANK#0) ← (number) $17 Adding number conversion cast (unumber) $6e85 in (word) main::u#1 ← (number) $6e85 Adding number conversion cast (unumber) 0 in *((byte*) zp1#0) ← (number) 0 @@ -2465,8 +2462,7 @@ Simplifying constant integer cast 1 Simplifying constant integer cast 1 Simplifying constant integer cast 1 Simplifying constant integer cast 4 -Simplifying constant integer cast 4 -Simplifying constant integer cast 4 +Simplifying constant integer cast 8 Simplifying constant integer cast 4 Simplifying constant integer cast $17 Simplifying constant integer cast $6e85 @@ -2551,8 +2547,7 @@ Finalized unsigned number type (byte) 1 Finalized unsigned number type (byte) 1 Finalized unsigned number type (byte) 1 Finalized unsigned number type (byte) 4 -Finalized unsigned number type (byte) 4 -Finalized unsigned number type (byte) 4 +Finalized unsigned number type (byte) 8 Finalized unsigned number type (byte) 4 Finalized unsigned number type (byte) $17 Finalized unsigned number type (word) $6e85 @@ -2698,7 +2693,7 @@ Alias (byte) myprintf::bLeadZero#2 = (byte) myprintf::bLeadZero#29 (byte) myprin Alias (byte*) myprintf::dst#21 = (byte*) myprintf::dst#9 Alias (byte) myprintf::return#0 = (byte) myprintf::bLen#15 (byte) myprintf::bLen#27 (byte) myprintf::return#4 (byte) myprintf::return#1 Alias (word) div10::val#0 = (word~) div10::$1 -Alias (word) div10::return#0 = (word~) div10::$6 (word) div10::return#3 (word) div10::return#1 +Alias (word) div10::return#0 = (word~) div10::$5 (word) div10::return#3 (word) div10::return#1 Alias (word) div16u::return#2 = (word) div16u::return#4 Alias (word) main::u#12 = (word) main::u#5 (word) main::u#6 (word) main::u#13 (word) main::u#7 Alias (word) main::v#1 = (word~) main::$0 (word) main::v#3 @@ -2909,10 +2904,10 @@ Simple Condition (bool~) myprintf::$43 [268] if((byte) myprintf::digit#2<(byte) Simple Condition (bool~) myprintf::$48 [280] if((byte) myprintf::bDigits#3>(byte) myprintf::b#17) goto myprintf::@38 Simple Condition (bool~) myprintf::$52 [295] if((byte) myprintf::bArg#12==(byte) 0) goto myprintf::@54 Simple Condition (bool~) myprintf::$53 [300] if((byte) myprintf::bArg#12==(byte) 1) goto myprintf::@55 -Simple Condition (bool~) main::$1 [355] if(*((byte*) zp2#0)<(byte) $c8) goto main::@2 -Simple Condition (bool~) main::$8 [374] if(*((byte*) zp1#0)<(byte) $a) goto main::@1 -Simple Condition (bool~) main::$10 [390] if(*((byte*) zp2#0)<(byte) $c8) goto main::@6 -Simple Condition (bool~) main::$17 [409] if(*((byte*) zp1#0)<(byte) $a) goto main::@5 +Simple Condition (bool~) main::$1 [354] if(*((byte*) zp2#0)<(byte) $c8) goto main::@2 +Simple Condition (bool~) main::$8 [373] if(*((byte*) zp1#0)<(byte) $a) goto main::@1 +Simple Condition (bool~) main::$10 [389] if(*((byte*) zp2#0)<(byte) $c8) goto main::@6 +Simple Condition (bool~) main::$17 [408] if(*((byte*) zp1#0)<(byte) $a) goto main::@5 Successful SSA optimization Pass2ConditionalJumpSimplification Rewriting ! if()-condition to reversed if() [71] (bool~) utoa::$3 ← ! (bool~) utoa::$2 Successful SSA optimization Pass2ConditionalAndOrRewriting @@ -3015,8 +3010,8 @@ Constant (const byte*) append::dst#0 = utoa::dst#5 Successful SSA optimization Pass2ConstantIdentification Resolved ranged next value [23] divr16u::i#1 ← ++ divr16u::i#2 to ++ Resolved ranged comparison value [25] if(divr16u::i#1!=rangelast(0,$f)) goto divr16u::@1 to (number) $10 -Eliminating unused variable (byte) myprintf::return#2 and assignment [185] (byte) myprintf::return#2 ← (byte) myprintf::return#0 -Eliminating unused variable (byte) myprintf::return#3 and assignment [208] (byte) myprintf::return#3 ← (byte) myprintf::return#0 +Eliminating unused variable (byte) myprintf::return#2 and assignment [184] (byte) myprintf::return#2 ← (byte) myprintf::return#0 +Eliminating unused variable (byte) myprintf::return#3 and assignment [207] (byte) myprintf::return#3 ← (byte) myprintf::return#0 Eliminating unused constant (const byte) utoa::bStarted#4 Eliminating unused constant (const byte) myprintf::b#0 Eliminating unused constant (const byte) myprintf::digit#0 @@ -3051,22 +3046,22 @@ Simple Condition (bool~) myprintf::$13 [96] if((byte) myprintf::b#1==(byte) 'x') Simple Condition (bool~) myprintf::$34 [117] if((byte) myprintf::bTrailing#10==(byte) 0) goto myprintf::@74 Simple Condition (bool~) myprintf::$44 [133] if((byte) myprintf::bTrailing#10!=(byte) 0) goto myprintf::@75 Simple Condition (bool~) myprintf::$54 [142] if((byte) myprintf::b#1>=(byte) $41) goto myprintf::@76 -Simple Condition (bool~) utoa::$1 [213] if((word) utoa::value#4>=(word) $2710) goto utoa::@5 -Simple Condition (bool~) utoa::$5 [214] if((word) utoa::value#6>=(word) $3e8) goto utoa::@6 -Simple Condition (bool~) utoa::$9 [215] if((word) utoa::value#11>=(byte) $64) goto utoa::@7 -Simple Condition (bool~) utoa::$13 [216] if((word) utoa::value#10>=(byte) $a) goto utoa::@8 -Simple Condition (bool~) myprintf::$5 [217] if((byte) myprintf::b#1<=(byte) '9') goto myprintf::@41 -Simple Condition (bool~) myprintf::$14 [218] if((byte) myprintf::b#1==(byte) 'X') goto myprintf::@47 -Simple Condition (bool~) myprintf::$35 [219] if((byte) myprintf::bDigits#14>(byte) myprintf::b#17) goto myprintf::@27 -Simple Condition (bool~) myprintf::$45 [220] if((byte) myprintf::bDigits#16>(byte) myprintf::b#17) goto myprintf::@38 -Simple Condition (bool~) myprintf::$55 [221] if((byte) myprintf::b#1<=(byte) $5a) goto myprintf::@68 +Simple Condition (bool~) utoa::$1 [212] if((word) utoa::value#4>=(word) $2710) goto utoa::@5 +Simple Condition (bool~) utoa::$5 [213] if((word) utoa::value#6>=(word) $3e8) goto utoa::@6 +Simple Condition (bool~) utoa::$9 [214] if((word) utoa::value#11>=(byte) $64) goto utoa::@7 +Simple Condition (bool~) utoa::$13 [215] if((word) utoa::value#10>=(byte) $a) goto utoa::@8 +Simple Condition (bool~) myprintf::$5 [216] if((byte) myprintf::b#1<=(byte) '9') goto myprintf::@41 +Simple Condition (bool~) myprintf::$14 [217] if((byte) myprintf::b#1==(byte) 'X') goto myprintf::@47 +Simple Condition (bool~) myprintf::$35 [218] if((byte) myprintf::bDigits#14>(byte) myprintf::b#17) goto myprintf::@27 +Simple Condition (bool~) myprintf::$45 [219] if((byte) myprintf::bDigits#16>(byte) myprintf::b#17) goto myprintf::@38 +Simple Condition (bool~) myprintf::$55 [220] if((byte) myprintf::b#1<=(byte) $5a) goto myprintf::@68 Successful SSA optimization Pass2ConditionalJumpSimplification Negating conditional jump and destination [81] if((byte) myprintf::b#1<(byte) '1') goto myprintf::@4 Negating conditional jump and destination [117] if((byte) myprintf::bTrailing#10!=(byte) 0) goto myprintf::@26 Negating conditional jump and destination [133] if((byte) myprintf::bTrailing#10==(byte) 0) goto myprintf::@40 Negating conditional jump and destination [142] if((byte) myprintf::b#1<(byte) $41) goto myprintf::@60 -Negating conditional jump and destination [220] if((byte) myprintf::bDigits#16<=(byte) myprintf::b#17) goto myprintf::@40 -Negating conditional jump and destination [221] if((byte) myprintf::b#1>(byte) $5a) goto myprintf::@60 +Negating conditional jump and destination [219] if((byte) myprintf::bDigits#16<=(byte) myprintf::b#17) goto myprintf::@40 +Negating conditional jump and destination [220] if((byte) myprintf::b#1>(byte) $5a) goto myprintf::@60 Successful SSA optimization Pass2ConditionalJumpSequenceImprovement Constant right-side identified [39] (byte*) utoa::dst#0 ← ++ (const byte*) utoa::dst#5 Successful SSA optimization Pass2ConstantRValueConsolidation @@ -3074,7 +3069,7 @@ Constant (const byte*) utoa::dst#0 = ++utoa::dst#5 Successful SSA optimization Pass2ConstantIdentification if() condition always false - eliminating [30] if((const byte) utoa::bStarted#0==(byte) 1) goto utoa::@5 Successful SSA optimization Pass2ConstantIfs -Rewriting conditional comparison [221] if((byte) myprintf::b#1>(byte) $5a) goto myprintf::@60 +Rewriting conditional comparison [220] if((byte) myprintf::b#1>(byte) $5a) goto myprintf::@60 Adding number conversion cast (unumber) $5a+1 in if((byte) myprintf::b#1>=(byte) $5a+(number) 1) goto myprintf::@60 Adding number conversion cast (unumber) 1 in if((byte) myprintf::b#1>=(unumber)(byte) $5a+(number) 1) goto myprintf::@60 Successful SSA optimization PassNAddNumberTypeConversions @@ -3211,7 +3206,7 @@ Calls in [] to main:3 Calls in [main] to div16u:13 myprintf:27 Print:29 div10:39 myprintf:53 Print:55 Calls in [myprintf] to utoa:134 Calls in [utoa] to append:253 append:263 append:273 append:281 -Calls in [div16u] to divr16u:307 +Calls in [div16u] to divr16u:306 Created 59 initial phi equivalence classes Coalesced [24] myprintf::w1#46 ← myprintf::w1#0 @@ -3322,17 +3317,17 @@ Coalesced [280] append::value#9 ← append::value#1 Coalesced [284] utoa::value#15 ← utoa::value#0 Coalesced [287] append::value#13 ← append::value#8 Coalesced [294] append::value#14 ← append::value#0 -Coalesced [311] divr16u::dividend#8 ← divr16u::dividend#1 -Coalesced [318] divr16u::rem#12 ← divr16u::rem#1 -Coalesced [325] divr16u::rem#14 ← divr16u::rem#2 -Coalesced [326] divr16u::return#6 ← divr16u::quotient#2 -Coalesced [332] divr16u::rem#10 ← divr16u::rem#9 -Coalesced [333] divr16u::dividend#9 ← divr16u::dividend#0 -Coalesced [334] divr16u::quotient#9 ← divr16u::return#0 -Coalesced [335] divr16u::i#7 ← divr16u::i#1 -Coalesced [336] divr16u::rem#13 ← divr16u::rem#5 -Coalesced [337] divr16u::return#5 ← divr16u::quotient#1 -Coalesced [338] divr16u::rem#11 ← divr16u::rem#0 +Coalesced [310] divr16u::dividend#8 ← divr16u::dividend#1 +Coalesced [317] divr16u::rem#12 ← divr16u::rem#1 +Coalesced [324] divr16u::rem#14 ← divr16u::rem#2 +Coalesced [325] divr16u::return#6 ← divr16u::quotient#2 +Coalesced [331] divr16u::rem#10 ← divr16u::rem#9 +Coalesced [332] divr16u::dividend#9 ← divr16u::dividend#0 +Coalesced [333] divr16u::quotient#9 ← divr16u::return#0 +Coalesced [334] divr16u::i#7 ← divr16u::i#1 +Coalesced [335] divr16u::rem#13 ← divr16u::rem#5 +Coalesced [336] divr16u::return#5 ← divr16u::quotient#1 +Coalesced [337] divr16u::rem#11 ← divr16u::rem#0 Coalesced down to 29 phi equivalence classes Culled Empty Block (label) @8 Culled Empty Block (label) @15 @@ -3814,59 +3809,58 @@ div10: scope:[div10] from main::@6 [185] (word) div10::val#1 ← (word) div10::val#0 + (word~) div10::$2 [186] (word~) div10::$3 ← (word) div10::val#1 >> (byte) 4 [187] (word) div10::val#2 ← (word) div10::val#1 + (word~) div10::$3 - [188] (word~) div10::$4 ← (word) div10::val#2 >> (byte) 4 - [189] (word~) div10::$5 ← (word~) div10::$4 >> (byte) 4 - [190] (word) div10::val#3 ← (word) div10::val#2 + (word~) div10::$5 - [191] (word) div10::return#0 ← (word) div10::val#3 >> (byte) 4 + [188] (word~) div10::$4 ← (word) div10::val#2 >> (byte) 8 + [189] (word) div10::val#3 ← (word) div10::val#2 + (word~) div10::$4 + [190] (word) div10::return#0 ← (word) div10::val#3 >> (byte) 4 to:div10::@return div10::@return: scope:[div10] from div10 - [192] return + [191] return to:@return div16u: scope:[div16u] from main::@2 - [193] (word) divr16u::dividend#1 ← (word) div16u::dividend#0 - [194] call divr16u - [195] (word) divr16u::return#2 ← (word) divr16u::return#0 + [192] (word) divr16u::dividend#1 ← (word) div16u::dividend#0 + [193] call divr16u + [194] (word) divr16u::return#2 ← (word) divr16u::return#0 to:div16u::@1 div16u::@1: scope:[div16u] from div16u - [196] (word) div16u::return#0 ← (word) divr16u::return#2 + [195] (word) div16u::return#0 ← (word) divr16u::return#2 to:div16u::@return div16u::@return: scope:[div16u] from div16u::@1 - [197] return + [196] return to:@return divr16u: scope:[divr16u] from div16u - [198] phi() + [197] phi() to:divr16u::@1 divr16u::@1: scope:[divr16u] from divr16u divr16u::@3 - [199] (byte) divr16u::i#2 ← phi( divr16u/(byte) 0 divr16u::@3/(byte) divr16u::i#1 ) - [199] (word) divr16u::quotient#3 ← phi( divr16u/(byte) 0 divr16u::@3/(word) divr16u::return#0 ) - [199] (word) divr16u::dividend#2 ← phi( divr16u/(word) divr16u::dividend#1 divr16u::@3/(word) divr16u::dividend#0 ) - [199] (word) divr16u::rem#4 ← phi( divr16u/(byte) 0 divr16u::@3/(word) divr16u::rem#9 ) - [200] (word) divr16u::rem#0 ← (word) divr16u::rem#4 << (byte) 1 - [201] (byte~) divr16u::$1 ← > (word) divr16u::dividend#2 - [202] (byte~) divr16u::$2 ← (byte~) divr16u::$1 & (byte) $80 - [203] if((byte~) divr16u::$2==(byte) 0) goto divr16u::@2 + [198] (byte) divr16u::i#2 ← phi( divr16u/(byte) 0 divr16u::@3/(byte) divr16u::i#1 ) + [198] (word) divr16u::quotient#3 ← phi( divr16u/(byte) 0 divr16u::@3/(word) divr16u::return#0 ) + [198] (word) divr16u::dividend#2 ← phi( divr16u/(word) divr16u::dividend#1 divr16u::@3/(word) divr16u::dividend#0 ) + [198] (word) divr16u::rem#4 ← phi( divr16u/(byte) 0 divr16u::@3/(word) divr16u::rem#9 ) + [199] (word) divr16u::rem#0 ← (word) divr16u::rem#4 << (byte) 1 + [200] (byte~) divr16u::$1 ← > (word) divr16u::dividend#2 + [201] (byte~) divr16u::$2 ← (byte~) divr16u::$1 & (byte) $80 + [202] if((byte~) divr16u::$2==(byte) 0) goto divr16u::@2 to:divr16u::@4 divr16u::@4: scope:[divr16u] from divr16u::@1 - [204] (word) divr16u::rem#1 ← (word) divr16u::rem#0 | (byte) 1 + [203] (word) divr16u::rem#1 ← (word) divr16u::rem#0 | (byte) 1 to:divr16u::@2 divr16u::@2: scope:[divr16u] from divr16u::@1 divr16u::@4 - [205] (word) divr16u::rem#5 ← phi( divr16u::@1/(word) divr16u::rem#0 divr16u::@4/(word) divr16u::rem#1 ) - [206] (word) divr16u::dividend#0 ← (word) divr16u::dividend#2 << (byte) 1 - [207] (word) divr16u::quotient#1 ← (word) divr16u::quotient#3 << (byte) 1 - [208] if((word) divr16u::rem#5<(const word) div16u::divisor#0) goto divr16u::@3 + [204] (word) divr16u::rem#5 ← phi( divr16u::@1/(word) divr16u::rem#0 divr16u::@4/(word) divr16u::rem#1 ) + [205] (word) divr16u::dividend#0 ← (word) divr16u::dividend#2 << (byte) 1 + [206] (word) divr16u::quotient#1 ← (word) divr16u::quotient#3 << (byte) 1 + [207] if((word) divr16u::rem#5<(const word) div16u::divisor#0) goto divr16u::@3 to:divr16u::@5 divr16u::@5: scope:[divr16u] from divr16u::@2 - [209] (word) divr16u::quotient#2 ← ++ (word) divr16u::quotient#1 - [210] (word) divr16u::rem#2 ← (word) divr16u::rem#5 - (const word) div16u::divisor#0 + [208] (word) divr16u::quotient#2 ← ++ (word) divr16u::quotient#1 + [209] (word) divr16u::rem#2 ← (word) divr16u::rem#5 - (const word) div16u::divisor#0 to:divr16u::@3 divr16u::@3: scope:[divr16u] from divr16u::@2 divr16u::@5 - [211] (word) divr16u::return#0 ← phi( divr16u::@2/(word) divr16u::quotient#1 divr16u::@5/(word) divr16u::quotient#2 ) - [211] (word) divr16u::rem#9 ← phi( divr16u::@2/(word) divr16u::rem#5 divr16u::@5/(word) divr16u::rem#2 ) - [212] (byte) divr16u::i#1 ← ++ (byte) divr16u::i#2 - [213] if((byte) divr16u::i#1!=(byte) $10) goto divr16u::@1 + [210] (word) divr16u::return#0 ← phi( divr16u::@2/(word) divr16u::quotient#1 divr16u::@5/(word) divr16u::quotient#2 ) + [210] (word) divr16u::rem#9 ← phi( divr16u::@2/(word) divr16u::rem#5 divr16u::@5/(word) divr16u::rem#2 ) + [211] (byte) divr16u::i#1 ← ++ (byte) divr16u::i#2 + [212] if((byte) divr16u::i#1!=(byte) $10) goto divr16u::@1 to:divr16u::@return divr16u::@return: scope:[divr16u] from divr16u::@3 - [214] return + [213] return to:@return @@ -3901,14 +3895,13 @@ VARIABLE REGISTER WEIGHTS (word~) div10::$2 4.0 (word~) div10::$3 4.0 (word~) div10::$4 4.0 -(word~) div10::$5 4.0 (word) div10::return (word) div10::return#0 34.33333333333333 (word) div10::return#2 202.0 (word) div10::val (word) div10::val#0 3.0 (word) div10::val#1 3.0 -(word) div10::val#2 2.0 +(word) div10::val#2 3.0 (word) div10::val#3 4.0 (word) div10::val#4 103.0 (word()) div16u((word) div16u::dividend , (word) div16u::divisor) @@ -4139,7 +4132,6 @@ Added variable div10::val#1 to zero page equivalence class [ div10::val#1 ] Added variable div10::$3 to zero page equivalence class [ div10::$3 ] Added variable div10::val#2 to zero page equivalence class [ div10::val#2 ] Added variable div10::$4 to zero page equivalence class [ div10::$4 ] -Added variable div10::$5 to zero page equivalence class [ div10::$5 ] Added variable div10::val#3 to zero page equivalence class [ div10::val#3 ] Added variable div10::return#0 to zero page equivalence class [ div10::return#0 ] Added variable divr16u::return#2 to zero page equivalence class [ divr16u::return#2 ] @@ -4211,7 +4203,6 @@ Complete equivalence classes [ div10::$3 ] [ div10::val#2 ] [ div10::$4 ] -[ div10::$5 ] [ div10::val#3 ] [ div10::return#0 ] [ divr16u::return#2 ] @@ -4282,13 +4273,12 @@ Allocated zp ZP_WORD:97 [ div10::val#1 ] Allocated zp ZP_WORD:99 [ div10::$3 ] Allocated zp ZP_WORD:101 [ div10::val#2 ] Allocated zp ZP_WORD:103 [ div10::$4 ] -Allocated zp ZP_WORD:105 [ div10::$5 ] -Allocated zp ZP_WORD:107 [ div10::val#3 ] -Allocated zp ZP_WORD:109 [ div10::return#0 ] -Allocated zp ZP_WORD:111 [ divr16u::return#2 ] -Allocated zp ZP_WORD:113 [ div16u::return#0 ] -Allocated zp ZP_BYTE:115 [ divr16u::$1 ] -Allocated zp ZP_BYTE:116 [ divr16u::$2 ] +Allocated zp ZP_WORD:105 [ div10::val#3 ] +Allocated zp ZP_WORD:107 [ div10::return#0 ] +Allocated zp ZP_WORD:109 [ divr16u::return#2 ] +Allocated zp ZP_WORD:111 [ div16u::return#0 ] +Allocated zp ZP_BYTE:113 [ divr16u::$1 ] +Allocated zp ZP_BYTE:114 [ divr16u::$2 ] INITIAL ASM //SEG0 File Comments @@ -5629,12 +5619,11 @@ div10: { .label _2 = $5f .label _3 = $63 .label _4 = $67 - .label _5 = $69 .label val = $5d .label val_1 = $61 .label val_2 = $65 - .label val_3 = $6b - .label return = $6d + .label val_3 = $69 + .label return = $6b .label val_4 = $3a .label return_2 = $3c //SEG412 [182] (word~) div10::$0 ← (word) div10::val#4 >> (byte) 1 -- vwuz1=vwuz2_ror_1 @@ -5686,37 +5675,29 @@ div10: { lda val_1+1 adc _3+1 sta val_2+1 - //SEG418 [188] (word~) div10::$4 ← (word) div10::val#2 >> (byte) 4 -- vwuz1=vwuz2_ror_4 - lda val_2+1 - sta _4+1 + //SEG418 [188] (word~) div10::$4 ← (word) div10::val#2 >> (byte) 8 -- vwuz1=vwuz2_ror_vbuc1 + ldy #8 lda val_2 sta _4 - ldy #4 + lda val_2+1 + sta _4+1 + cpy #0 + beq !e+ !: lsr _4+1 ror _4 dey bne !- - //SEG419 [189] (word~) div10::$5 ← (word~) div10::$4 >> (byte) 4 -- vwuz1=vwuz2_ror_4 - lda _4+1 - sta _5+1 - lda _4 - sta _5 - ldy #4 - !: - lsr _5+1 - ror _5 - dey - bne !- - //SEG420 [190] (word) div10::val#3 ← (word) div10::val#2 + (word~) div10::$5 -- vwuz1=vwuz2_plus_vwuz3 + !e: + //SEG419 [189] (word) div10::val#3 ← (word) div10::val#2 + (word~) div10::$4 -- vwuz1=vwuz2_plus_vwuz3 lda val_2 clc - adc _5 + adc _4 sta val_3 lda val_2+1 - adc _5+1 + adc _4+1 sta val_3+1 - //SEG421 [191] (word) div10::return#0 ← (word) div10::val#3 >> (byte) 4 -- vwuz1=vwuz2_ror_4 + //SEG420 [190] (word) div10::return#0 ← (word) div10::val#3 >> (byte) 4 -- vwuz1=vwuz2_ror_4 lda val_3+1 sta return+1 lda val_3 @@ -5728,12 +5709,12 @@ div10: { dey bne !- jmp breturn - //SEG422 div10::@return + //SEG421 div10::@return breturn: - //SEG423 [192] return + //SEG422 [191] return rts } -//SEG424 div16u +//SEG423 div16u // Performs division on two 16 bit unsigned words // Returns the quotient dividend/divisor. // The remainder will be set into the global variable rem16u @@ -5741,113 +5722,113 @@ div10: { // div16u(word zeropage($2e) dividend) div16u: { .label divisor = $a - .label return = $71 + .label return = $6f .label dividend = $2e .label return_2 = $30 - //SEG425 [193] (word) divr16u::dividend#1 ← (word) div16u::dividend#0 -- vwuz1=vwuz2 + //SEG424 [192] (word) divr16u::dividend#1 ← (word) div16u::dividend#0 -- vwuz1=vwuz2 lda dividend sta divr16u.dividend lda dividend+1 sta divr16u.dividend+1 - //SEG426 [194] call divr16u - //SEG427 [198] phi from div16u to divr16u [phi:div16u->divr16u] + //SEG425 [193] call divr16u + //SEG426 [197] phi from div16u to divr16u [phi:div16u->divr16u] divr16u_from_div16u: jsr divr16u - //SEG428 [195] (word) divr16u::return#2 ← (word) divr16u::return#0 -- vwuz1=vwuz2 + //SEG427 [194] (word) divr16u::return#2 ← (word) divr16u::return#0 -- vwuz1=vwuz2 lda divr16u.return sta divr16u.return_2 lda divr16u.return+1 sta divr16u.return_2+1 jmp b1 - //SEG429 div16u::@1 + //SEG428 div16u::@1 b1: - //SEG430 [196] (word) div16u::return#0 ← (word) divr16u::return#2 -- vwuz1=vwuz2 + //SEG429 [195] (word) div16u::return#0 ← (word) divr16u::return#2 -- vwuz1=vwuz2 lda divr16u.return_2 sta return lda divr16u.return_2+1 sta return+1 jmp breturn - //SEG431 div16u::@return + //SEG430 div16u::@return breturn: - //SEG432 [197] return + //SEG431 [196] return rts } -//SEG433 divr16u +//SEG432 divr16u // Performs division on two 16 bit unsigned words and an initial remainder // Returns the quotient dividend/divisor. // The final remainder will be set into the global variable rem16u // Implemented using simple binary division // divr16u(word zeropage($29) dividend, word zeropage($27) rem) divr16u: { - .label _1 = $73 - .label _2 = $74 + .label _1 = $71 + .label _2 = $72 .label rem = $27 .label dividend = $29 .label quotient = $2b .label i = $2d .label return = $2b - .label return_2 = $6f - //SEG434 [199] phi from divr16u to divr16u::@1 [phi:divr16u->divr16u::@1] + .label return_2 = $6d + //SEG433 [198] phi from divr16u to divr16u::@1 [phi:divr16u->divr16u::@1] b1_from_divr16u: - //SEG435 [199] phi (byte) divr16u::i#2 = (byte) 0 [phi:divr16u->divr16u::@1#0] -- vbuz1=vbuc1 + //SEG434 [198] phi (byte) divr16u::i#2 = (byte) 0 [phi:divr16u->divr16u::@1#0] -- vbuz1=vbuc1 lda #0 sta i - //SEG436 [199] phi (word) divr16u::quotient#3 = (byte) 0 [phi:divr16u->divr16u::@1#1] -- vwuz1=vbuc1 + //SEG435 [198] phi (word) divr16u::quotient#3 = (byte) 0 [phi:divr16u->divr16u::@1#1] -- vwuz1=vbuc1 lda #0 sta quotient lda #0 sta quotient+1 - //SEG437 [199] phi (word) divr16u::dividend#2 = (word) divr16u::dividend#1 [phi:divr16u->divr16u::@1#2] -- register_copy - //SEG438 [199] phi (word) divr16u::rem#4 = (byte) 0 [phi:divr16u->divr16u::@1#3] -- vwuz1=vbuc1 + //SEG436 [198] phi (word) divr16u::dividend#2 = (word) divr16u::dividend#1 [phi:divr16u->divr16u::@1#2] -- register_copy + //SEG437 [198] phi (word) divr16u::rem#4 = (byte) 0 [phi:divr16u->divr16u::@1#3] -- vwuz1=vbuc1 lda #0 sta rem lda #0 sta rem+1 jmp b1 - //SEG439 [199] phi from divr16u::@3 to divr16u::@1 [phi:divr16u::@3->divr16u::@1] + //SEG438 [198] phi from divr16u::@3 to divr16u::@1 [phi:divr16u::@3->divr16u::@1] b1_from_b3: - //SEG440 [199] phi (byte) divr16u::i#2 = (byte) divr16u::i#1 [phi:divr16u::@3->divr16u::@1#0] -- register_copy - //SEG441 [199] phi (word) divr16u::quotient#3 = (word) divr16u::return#0 [phi:divr16u::@3->divr16u::@1#1] -- register_copy - //SEG442 [199] phi (word) divr16u::dividend#2 = (word) divr16u::dividend#0 [phi:divr16u::@3->divr16u::@1#2] -- register_copy - //SEG443 [199] phi (word) divr16u::rem#4 = (word) divr16u::rem#9 [phi:divr16u::@3->divr16u::@1#3] -- register_copy + //SEG439 [198] phi (byte) divr16u::i#2 = (byte) divr16u::i#1 [phi:divr16u::@3->divr16u::@1#0] -- register_copy + //SEG440 [198] phi (word) divr16u::quotient#3 = (word) divr16u::return#0 [phi:divr16u::@3->divr16u::@1#1] -- register_copy + //SEG441 [198] phi (word) divr16u::dividend#2 = (word) divr16u::dividend#0 [phi:divr16u::@3->divr16u::@1#2] -- register_copy + //SEG442 [198] phi (word) divr16u::rem#4 = (word) divr16u::rem#9 [phi:divr16u::@3->divr16u::@1#3] -- register_copy jmp b1 - //SEG444 divr16u::@1 + //SEG443 divr16u::@1 b1: - //SEG445 [200] (word) divr16u::rem#0 ← (word) divr16u::rem#4 << (byte) 1 -- vwuz1=vwuz1_rol_1 + //SEG444 [199] (word) divr16u::rem#0 ← (word) divr16u::rem#4 << (byte) 1 -- vwuz1=vwuz1_rol_1 asl rem rol rem+1 - //SEG446 [201] (byte~) divr16u::$1 ← > (word) divr16u::dividend#2 -- vbuz1=_hi_vwuz2 + //SEG445 [200] (byte~) divr16u::$1 ← > (word) divr16u::dividend#2 -- vbuz1=_hi_vwuz2 lda dividend+1 sta _1 - //SEG447 [202] (byte~) divr16u::$2 ← (byte~) divr16u::$1 & (byte) $80 -- vbuz1=vbuz2_band_vbuc1 + //SEG446 [201] (byte~) divr16u::$2 ← (byte~) divr16u::$1 & (byte) $80 -- vbuz1=vbuz2_band_vbuc1 lda #$80 and _1 sta _2 - //SEG448 [203] if((byte~) divr16u::$2==(byte) 0) goto divr16u::@2 -- vbuz1_eq_0_then_la1 + //SEG447 [202] if((byte~) divr16u::$2==(byte) 0) goto divr16u::@2 -- vbuz1_eq_0_then_la1 lda _2 cmp #0 beq b2_from_b1 jmp b4 - //SEG449 divr16u::@4 + //SEG448 divr16u::@4 b4: - //SEG450 [204] (word) divr16u::rem#1 ← (word) divr16u::rem#0 | (byte) 1 -- vwuz1=vwuz1_bor_vbuc1 + //SEG449 [203] (word) divr16u::rem#1 ← (word) divr16u::rem#0 | (byte) 1 -- vwuz1=vwuz1_bor_vbuc1 lda #1 ora rem sta rem - //SEG451 [205] phi from divr16u::@1 divr16u::@4 to divr16u::@2 [phi:divr16u::@1/divr16u::@4->divr16u::@2] + //SEG450 [204] phi from divr16u::@1 divr16u::@4 to divr16u::@2 [phi:divr16u::@1/divr16u::@4->divr16u::@2] b2_from_b1: b2_from_b4: - //SEG452 [205] phi (word) divr16u::rem#5 = (word) divr16u::rem#0 [phi:divr16u::@1/divr16u::@4->divr16u::@2#0] -- register_copy + //SEG451 [204] phi (word) divr16u::rem#5 = (word) divr16u::rem#0 [phi:divr16u::@1/divr16u::@4->divr16u::@2#0] -- register_copy jmp b2 - //SEG453 divr16u::@2 + //SEG452 divr16u::@2 b2: - //SEG454 [206] (word) divr16u::dividend#0 ← (word) divr16u::dividend#2 << (byte) 1 -- vwuz1=vwuz1_rol_1 + //SEG453 [205] (word) divr16u::dividend#0 ← (word) divr16u::dividend#2 << (byte) 1 -- vwuz1=vwuz1_rol_1 asl dividend rol dividend+1 - //SEG455 [207] (word) divr16u::quotient#1 ← (word) divr16u::quotient#3 << (byte) 1 -- vwuz1=vwuz1_rol_1 + //SEG454 [206] (word) divr16u::quotient#1 ← (word) divr16u::quotient#3 << (byte) 1 -- vwuz1=vwuz1_rol_1 asl quotient rol quotient+1 - //SEG456 [208] if((word) divr16u::rem#5<(const word) div16u::divisor#0) goto divr16u::@3 -- vwuz1_lt_vwuc1_then_la1 + //SEG455 [207] if((word) divr16u::rem#5<(const word) div16u::divisor#0) goto divr16u::@3 -- vwuz1_lt_vwuc1_then_la1 lda rem+1 cmp #>div16u.divisor bcc b3_from_b2 @@ -5857,14 +5838,14 @@ divr16u: { bcc b3_from_b2 !: jmp b5 - //SEG457 divr16u::@5 + //SEG456 divr16u::@5 b5: - //SEG458 [209] (word) divr16u::quotient#2 ← ++ (word) divr16u::quotient#1 -- vwuz1=_inc_vwuz1 + //SEG457 [208] (word) divr16u::quotient#2 ← ++ (word) divr16u::quotient#1 -- vwuz1=_inc_vwuz1 inc quotient bne !+ inc quotient+1 !: - //SEG459 [210] (word) divr16u::rem#2 ← (word) divr16u::rem#5 - (const word) div16u::divisor#0 -- vwuz1=vwuz1_minus_vwuc1 + //SEG458 [209] (word) divr16u::rem#2 ← (word) divr16u::rem#5 - (const word) div16u::divisor#0 -- vwuz1=vwuz1_minus_vwuc1 lda rem sec sbc #div16u.divisor sta rem+1 - //SEG460 [211] phi from divr16u::@2 divr16u::@5 to divr16u::@3 [phi:divr16u::@2/divr16u::@5->divr16u::@3] + //SEG459 [210] phi from divr16u::@2 divr16u::@5 to divr16u::@3 [phi:divr16u::@2/divr16u::@5->divr16u::@3] b3_from_b2: b3_from_b5: - //SEG461 [211] phi (word) divr16u::return#0 = (word) divr16u::quotient#1 [phi:divr16u::@2/divr16u::@5->divr16u::@3#0] -- register_copy - //SEG462 [211] phi (word) divr16u::rem#9 = (word) divr16u::rem#5 [phi:divr16u::@2/divr16u::@5->divr16u::@3#1] -- register_copy + //SEG460 [210] phi (word) divr16u::return#0 = (word) divr16u::quotient#1 [phi:divr16u::@2/divr16u::@5->divr16u::@3#0] -- register_copy + //SEG461 [210] phi (word) divr16u::rem#9 = (word) divr16u::rem#5 [phi:divr16u::@2/divr16u::@5->divr16u::@3#1] -- register_copy jmp b3 - //SEG463 divr16u::@3 + //SEG462 divr16u::@3 b3: - //SEG464 [212] (byte) divr16u::i#1 ← ++ (byte) divr16u::i#2 -- vbuz1=_inc_vbuz1 + //SEG463 [211] (byte) divr16u::i#1 ← ++ (byte) divr16u::i#2 -- vbuz1=_inc_vbuz1 inc i - //SEG465 [213] if((byte) divr16u::i#1!=(byte) $10) goto divr16u::@1 -- vbuz1_neq_vbuc1_then_la1 + //SEG464 [212] if((byte) divr16u::i#1!=(byte) $10) goto divr16u::@1 -- vbuz1_neq_vbuc1_then_la1 lda #$10 cmp i bne b1_from_b3 jmp breturn - //SEG466 divr16u::@return + //SEG465 divr16u::@return breturn: - //SEG467 [214] return + //SEG466 [213] return rts } // "char buf16[16]" is the normal way -- not supported -- https://gitlab.com/camelot/kickc/issues/162 @@ -5996,18 +5977,17 @@ Statement [184] (word~) div10::$2 ← (word) div10::val#0 << (byte) 1 [ div10::v Statement [185] (word) div10::val#1 ← (word) div10::val#0 + (word~) div10::$2 [ div10::val#1 ] ( main:2::div10:34 [ main::u#15 div10::val#1 ] ) always clobbers reg byte a Statement [186] (word~) div10::$3 ← (word) div10::val#1 >> (byte) 4 [ div10::val#1 div10::$3 ] ( main:2::div10:34 [ main::u#15 div10::val#1 div10::$3 ] ) always clobbers reg byte a reg byte y Statement [187] (word) div10::val#2 ← (word) div10::val#1 + (word~) div10::$3 [ div10::val#2 ] ( main:2::div10:34 [ main::u#15 div10::val#2 ] ) always clobbers reg byte a -Statement [188] (word~) div10::$4 ← (word) div10::val#2 >> (byte) 4 [ div10::val#2 div10::$4 ] ( main:2::div10:34 [ main::u#15 div10::val#2 div10::$4 ] ) always clobbers reg byte a reg byte y -Statement [189] (word~) div10::$5 ← (word~) div10::$4 >> (byte) 4 [ div10::val#2 div10::$5 ] ( main:2::div10:34 [ main::u#15 div10::val#2 div10::$5 ] ) always clobbers reg byte a reg byte y -Statement [190] (word) div10::val#3 ← (word) div10::val#2 + (word~) div10::$5 [ div10::val#3 ] ( main:2::div10:34 [ main::u#15 div10::val#3 ] ) always clobbers reg byte a -Statement [191] (word) div10::return#0 ← (word) div10::val#3 >> (byte) 4 [ div10::return#0 ] ( main:2::div10:34 [ main::u#15 div10::return#0 ] ) always clobbers reg byte a reg byte y -Statement [193] (word) divr16u::dividend#1 ← (word) div16u::dividend#0 [ divr16u::dividend#1 ] ( main:2::div16u:11 [ main::u#11 divr16u::dividend#1 ] ) always clobbers reg byte a -Statement [195] (word) divr16u::return#2 ← (word) divr16u::return#0 [ divr16u::return#2 ] ( main:2::div16u:11 [ main::u#11 divr16u::return#2 ] ) always clobbers reg byte a -Statement [196] (word) div16u::return#0 ← (word) divr16u::return#2 [ div16u::return#0 ] ( main:2::div16u:11 [ main::u#11 div16u::return#0 ] ) always clobbers reg byte a -Statement [201] (byte~) divr16u::$1 ← > (word) divr16u::dividend#2 [ divr16u::dividend#2 divr16u::quotient#3 divr16u::i#2 divr16u::rem#0 divr16u::$1 ] ( main:2::div16u:11::divr16u:194 [ main::u#11 divr16u::dividend#2 divr16u::quotient#3 divr16u::i#2 divr16u::rem#0 divr16u::$1 ] ) always clobbers reg byte a +Statement [188] (word~) div10::$4 ← (word) div10::val#2 >> (byte) 8 [ div10::val#2 div10::$4 ] ( main:2::div10:34 [ main::u#15 div10::val#2 div10::$4 ] ) always clobbers reg byte a reg byte y +Statement [189] (word) div10::val#3 ← (word) div10::val#2 + (word~) div10::$4 [ div10::val#3 ] ( main:2::div10:34 [ main::u#15 div10::val#3 ] ) always clobbers reg byte a +Statement [190] (word) div10::return#0 ← (word) div10::val#3 >> (byte) 4 [ div10::return#0 ] ( main:2::div10:34 [ main::u#15 div10::return#0 ] ) always clobbers reg byte a reg byte y +Statement [192] (word) divr16u::dividend#1 ← (word) div16u::dividend#0 [ divr16u::dividend#1 ] ( main:2::div16u:11 [ main::u#11 divr16u::dividend#1 ] ) always clobbers reg byte a +Statement [194] (word) divr16u::return#2 ← (word) divr16u::return#0 [ divr16u::return#2 ] ( main:2::div16u:11 [ main::u#11 divr16u::return#2 ] ) always clobbers reg byte a +Statement [195] (word) div16u::return#0 ← (word) divr16u::return#2 [ div16u::return#0 ] ( main:2::div16u:11 [ main::u#11 div16u::return#0 ] ) always clobbers reg byte a +Statement [200] (byte~) divr16u::$1 ← > (word) divr16u::dividend#2 [ divr16u::dividend#2 divr16u::quotient#3 divr16u::i#2 divr16u::rem#0 divr16u::$1 ] ( main:2::div16u:11::divr16u:193 [ main::u#11 divr16u::dividend#2 divr16u::quotient#3 divr16u::i#2 divr16u::rem#0 divr16u::$1 ] ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp ZP_BYTE:45 [ divr16u::i#2 divr16u::i#1 ] -Statement [204] (word) divr16u::rem#1 ← (word) divr16u::rem#0 | (byte) 1 [ divr16u::dividend#2 divr16u::quotient#3 divr16u::i#2 divr16u::rem#1 ] ( main:2::div16u:11::divr16u:194 [ main::u#11 divr16u::dividend#2 divr16u::quotient#3 divr16u::i#2 divr16u::rem#1 ] ) always clobbers reg byte a -Statement [208] if((word) divr16u::rem#5<(const word) div16u::divisor#0) goto divr16u::@3 [ divr16u::i#2 divr16u::dividend#0 divr16u::rem#5 divr16u::quotient#1 ] ( main:2::div16u:11::divr16u:194 [ main::u#11 divr16u::i#2 divr16u::dividend#0 divr16u::rem#5 divr16u::quotient#1 ] ) always clobbers reg byte a -Statement [210] (word) divr16u::rem#2 ← (word) divr16u::rem#5 - (const word) div16u::divisor#0 [ divr16u::i#2 divr16u::dividend#0 divr16u::quotient#2 divr16u::rem#2 ] ( main:2::div16u:11::divr16u:194 [ main::u#11 divr16u::i#2 divr16u::dividend#0 divr16u::quotient#2 divr16u::rem#2 ] ) always clobbers reg byte a +Statement [203] (word) divr16u::rem#1 ← (word) divr16u::rem#0 | (byte) 1 [ divr16u::dividend#2 divr16u::quotient#3 divr16u::i#2 divr16u::rem#1 ] ( main:2::div16u:11::divr16u:193 [ main::u#11 divr16u::dividend#2 divr16u::quotient#3 divr16u::i#2 divr16u::rem#1 ] ) always clobbers reg byte a +Statement [207] if((word) divr16u::rem#5<(const word) div16u::divisor#0) goto divr16u::@3 [ divr16u::i#2 divr16u::dividend#0 divr16u::rem#5 divr16u::quotient#1 ] ( main:2::div16u:11::divr16u:193 [ main::u#11 divr16u::i#2 divr16u::dividend#0 divr16u::rem#5 divr16u::quotient#1 ] ) always clobbers reg byte a +Statement [209] (word) divr16u::rem#2 ← (word) divr16u::rem#5 - (const word) div16u::divisor#0 [ divr16u::i#2 divr16u::dividend#0 divr16u::quotient#2 divr16u::rem#2 ] ( main:2::div16u:11::divr16u:193 [ main::u#11 divr16u::i#2 divr16u::dividend#0 divr16u::quotient#2 divr16u::rem#2 ] ) always clobbers reg byte a Statement [4] *((const byte*) VICBANK#0) ← (byte) $17 [ ] ( main:2 [ ] ) always clobbers reg byte a Statement [5] *((const byte*) zp1#0) ← (byte) 0 [ ] ( main:2 [ ] ) always clobbers reg byte a Statement [7] *((const byte*) TIMEHI#0) ← (byte) 0 [ main::u#11 ] ( main:2 [ main::u#11 ] ) always clobbers reg byte a @@ -6092,17 +6072,16 @@ Statement [184] (word~) div10::$2 ← (word) div10::val#0 << (byte) 1 [ div10::v Statement [185] (word) div10::val#1 ← (word) div10::val#0 + (word~) div10::$2 [ div10::val#1 ] ( main:2::div10:34 [ main::u#15 div10::val#1 ] ) always clobbers reg byte a Statement [186] (word~) div10::$3 ← (word) div10::val#1 >> (byte) 4 [ div10::val#1 div10::$3 ] ( main:2::div10:34 [ main::u#15 div10::val#1 div10::$3 ] ) always clobbers reg byte a reg byte y Statement [187] (word) div10::val#2 ← (word) div10::val#1 + (word~) div10::$3 [ div10::val#2 ] ( main:2::div10:34 [ main::u#15 div10::val#2 ] ) always clobbers reg byte a -Statement [188] (word~) div10::$4 ← (word) div10::val#2 >> (byte) 4 [ div10::val#2 div10::$4 ] ( main:2::div10:34 [ main::u#15 div10::val#2 div10::$4 ] ) always clobbers reg byte a reg byte y -Statement [189] (word~) div10::$5 ← (word~) div10::$4 >> (byte) 4 [ div10::val#2 div10::$5 ] ( main:2::div10:34 [ main::u#15 div10::val#2 div10::$5 ] ) always clobbers reg byte a reg byte y -Statement [190] (word) div10::val#3 ← (word) div10::val#2 + (word~) div10::$5 [ div10::val#3 ] ( main:2::div10:34 [ main::u#15 div10::val#3 ] ) always clobbers reg byte a -Statement [191] (word) div10::return#0 ← (word) div10::val#3 >> (byte) 4 [ div10::return#0 ] ( main:2::div10:34 [ main::u#15 div10::return#0 ] ) always clobbers reg byte a reg byte y -Statement [193] (word) divr16u::dividend#1 ← (word) div16u::dividend#0 [ divr16u::dividend#1 ] ( main:2::div16u:11 [ main::u#11 divr16u::dividend#1 ] ) always clobbers reg byte a -Statement [195] (word) divr16u::return#2 ← (word) divr16u::return#0 [ divr16u::return#2 ] ( main:2::div16u:11 [ main::u#11 divr16u::return#2 ] ) always clobbers reg byte a -Statement [196] (word) div16u::return#0 ← (word) divr16u::return#2 [ div16u::return#0 ] ( main:2::div16u:11 [ main::u#11 div16u::return#0 ] ) always clobbers reg byte a -Statement [201] (byte~) divr16u::$1 ← > (word) divr16u::dividend#2 [ divr16u::dividend#2 divr16u::quotient#3 divr16u::i#2 divr16u::rem#0 divr16u::$1 ] ( main:2::div16u:11::divr16u:194 [ main::u#11 divr16u::dividend#2 divr16u::quotient#3 divr16u::i#2 divr16u::rem#0 divr16u::$1 ] ) always clobbers reg byte a -Statement [204] (word) divr16u::rem#1 ← (word) divr16u::rem#0 | (byte) 1 [ divr16u::dividend#2 divr16u::quotient#3 divr16u::i#2 divr16u::rem#1 ] ( main:2::div16u:11::divr16u:194 [ main::u#11 divr16u::dividend#2 divr16u::quotient#3 divr16u::i#2 divr16u::rem#1 ] ) always clobbers reg byte a -Statement [208] if((word) divr16u::rem#5<(const word) div16u::divisor#0) goto divr16u::@3 [ divr16u::i#2 divr16u::dividend#0 divr16u::rem#5 divr16u::quotient#1 ] ( main:2::div16u:11::divr16u:194 [ main::u#11 divr16u::i#2 divr16u::dividend#0 divr16u::rem#5 divr16u::quotient#1 ] ) always clobbers reg byte a -Statement [210] (word) divr16u::rem#2 ← (word) divr16u::rem#5 - (const word) div16u::divisor#0 [ divr16u::i#2 divr16u::dividend#0 divr16u::quotient#2 divr16u::rem#2 ] ( main:2::div16u:11::divr16u:194 [ main::u#11 divr16u::i#2 divr16u::dividend#0 divr16u::quotient#2 divr16u::rem#2 ] ) always clobbers reg byte a +Statement [188] (word~) div10::$4 ← (word) div10::val#2 >> (byte) 8 [ div10::val#2 div10::$4 ] ( main:2::div10:34 [ main::u#15 div10::val#2 div10::$4 ] ) always clobbers reg byte a reg byte y +Statement [189] (word) div10::val#3 ← (word) div10::val#2 + (word~) div10::$4 [ div10::val#3 ] ( main:2::div10:34 [ main::u#15 div10::val#3 ] ) always clobbers reg byte a +Statement [190] (word) div10::return#0 ← (word) div10::val#3 >> (byte) 4 [ div10::return#0 ] ( main:2::div10:34 [ main::u#15 div10::return#0 ] ) always clobbers reg byte a reg byte y +Statement [192] (word) divr16u::dividend#1 ← (word) div16u::dividend#0 [ divr16u::dividend#1 ] ( main:2::div16u:11 [ main::u#11 divr16u::dividend#1 ] ) always clobbers reg byte a +Statement [194] (word) divr16u::return#2 ← (word) divr16u::return#0 [ divr16u::return#2 ] ( main:2::div16u:11 [ main::u#11 divr16u::return#2 ] ) always clobbers reg byte a +Statement [195] (word) div16u::return#0 ← (word) divr16u::return#2 [ div16u::return#0 ] ( main:2::div16u:11 [ main::u#11 div16u::return#0 ] ) always clobbers reg byte a +Statement [200] (byte~) divr16u::$1 ← > (word) divr16u::dividend#2 [ divr16u::dividend#2 divr16u::quotient#3 divr16u::i#2 divr16u::rem#0 divr16u::$1 ] ( main:2::div16u:11::divr16u:193 [ main::u#11 divr16u::dividend#2 divr16u::quotient#3 divr16u::i#2 divr16u::rem#0 divr16u::$1 ] ) always clobbers reg byte a +Statement [203] (word) divr16u::rem#1 ← (word) divr16u::rem#0 | (byte) 1 [ divr16u::dividend#2 divr16u::quotient#3 divr16u::i#2 divr16u::rem#1 ] ( main:2::div16u:11::divr16u:193 [ main::u#11 divr16u::dividend#2 divr16u::quotient#3 divr16u::i#2 divr16u::rem#1 ] ) always clobbers reg byte a +Statement [207] if((word) divr16u::rem#5<(const word) div16u::divisor#0) goto divr16u::@3 [ divr16u::i#2 divr16u::dividend#0 divr16u::rem#5 divr16u::quotient#1 ] ( main:2::div16u:11::divr16u:193 [ main::u#11 divr16u::i#2 divr16u::dividend#0 divr16u::rem#5 divr16u::quotient#1 ] ) always clobbers reg byte a +Statement [209] (word) divr16u::rem#2 ← (word) divr16u::rem#5 - (const word) div16u::divisor#0 [ divr16u::i#2 divr16u::dividend#0 divr16u::quotient#2 divr16u::rem#2 ] ( main:2::div16u:11::divr16u:193 [ main::u#11 divr16u::i#2 divr16u::dividend#0 divr16u::quotient#2 divr16u::rem#2 ] ) always clobbers reg byte a Potential registers zp ZP_WORD:2 [ main::u#11 main::u#2 ] : zp ZP_WORD:2 , Potential registers zp ZP_WORD:4 [ main::u#15 main::u#4 ] : zp ZP_WORD:4 , Potential registers zp ZP_WORD:6 [ myprintf::w1#6 myprintf::w1#0 myprintf::w1#1 ] : zp ZP_WORD:6 , @@ -6167,75 +6146,74 @@ Potential registers zp ZP_WORD:97 [ div10::val#1 ] : zp ZP_WORD:97 , Potential registers zp ZP_WORD:99 [ div10::$3 ] : zp ZP_WORD:99 , Potential registers zp ZP_WORD:101 [ div10::val#2 ] : zp ZP_WORD:101 , Potential registers zp ZP_WORD:103 [ div10::$4 ] : zp ZP_WORD:103 , -Potential registers zp ZP_WORD:105 [ div10::$5 ] : zp ZP_WORD:105 , -Potential registers zp ZP_WORD:107 [ div10::val#3 ] : zp ZP_WORD:107 , -Potential registers zp ZP_WORD:109 [ div10::return#0 ] : zp ZP_WORD:109 , -Potential registers zp ZP_WORD:111 [ divr16u::return#2 ] : zp ZP_WORD:111 , -Potential registers zp ZP_WORD:113 [ div16u::return#0 ] : zp ZP_WORD:113 , -Potential registers zp ZP_BYTE:115 [ divr16u::$1 ] : zp ZP_BYTE:115 , reg byte a , reg byte x , reg byte y , -Potential registers zp ZP_BYTE:116 [ divr16u::$2 ] : zp ZP_BYTE:116 , reg byte a , reg byte x , reg byte y , +Potential registers zp ZP_WORD:105 [ div10::val#3 ] : zp ZP_WORD:105 , +Potential registers zp ZP_WORD:107 [ div10::return#0 ] : zp ZP_WORD:107 , +Potential registers zp ZP_WORD:109 [ divr16u::return#2 ] : zp ZP_WORD:109 , +Potential registers zp ZP_WORD:111 [ div16u::return#0 ] : zp ZP_WORD:111 , +Potential registers zp ZP_BYTE:113 [ divr16u::$1 ] : zp ZP_BYTE:113 , reg byte a , reg byte x , reg byte y , +Potential registers zp ZP_BYTE:114 [ divr16u::$2 ] : zp ZP_BYTE:114 , reg byte a , reg byte x , reg byte y , REGISTER UPLIFT SCOPES Uplift Scope [myprintf] 9,752.6: zp ZP_BYTE:24 [ myprintf::bLen#11 myprintf::bLen#13 myprintf::bLen#12 myprintf::bLen#23 myprintf::bLen#14 myprintf::return#0 myprintf::bLen#28 myprintf::bLen#7 myprintf::bLen#3 myprintf::bLen#24 myprintf::bLen#6 myprintf::bLen#1 myprintf::bLen#4 ] 7,163.57: zp ZP_BYTE:25 [ myprintf::bDigits#10 myprintf::bDigits#8 myprintf::bDigits#14 myprintf::bDigits#24 myprintf::bDigits#25 myprintf::bDigits#1 myprintf::bDigits#16 myprintf::bDigits#3 myprintf::bDigits#2 ] 2,502.5: zp ZP_BYTE:23 [ myprintf::digit#3 myprintf::digit#2 ] 2,250.32: zp ZP_BYTE:22 [ myprintf::b#17 myprintf::b#5 ] 1,054.06: zp ZP_WORD:16 [ myprintf::w#10 myprintf::w#17 myprintf::w#21 myprintf::w#49 myprintf::w#50 myprintf::w#51 ] 1,001: zp ZP_BYTE:26 [ myprintf::$41 ] 631.25: zp ZP_BYTE:27 [ myprintf::b#25 myprintf::b#1 myprintf::b#6 ] 449.95: zp ZP_BYTE:15 [ myprintf::bArg#12 myprintf::bArg#10 myprintf::bArg#1 ] 208.73: zp ZP_BYTE:14 [ myprintf::bFormat#10 myprintf::bFormat#4 ] 202: zp ZP_BYTE:70 [ myprintf::$17 ] 202: zp ZP_BYTE:71 [ myprintf::$18 ] 202: zp ZP_BYTE:73 [ myprintf::$24 ] 202: zp ZP_BYTE:75 [ myprintf::$25 ] 202: zp ZP_BYTE:77 [ myprintf::$31 ] 202: zp ZP_BYTE:78 [ myprintf::$49 ] 190.48: zp ZP_BYTE:19 [ myprintf::bLeadZero#10 myprintf::bLeadZero#18 ] 178.73: zp ZP_BYTE:18 [ myprintf::bTrailing#10 myprintf::bTrailing#21 ] 157.51: zp ZP_WORD:12 [ myprintf::str#10 myprintf::str#5 myprintf::str#0 ] 101: zp ZP_BYTE:20 [ myprintf::$23 ] 101: zp ZP_BYTE:21 [ myprintf::$30 ] 75.75: zp ZP_BYTE:72 [ myprintf::b#15 ] 75.75: zp ZP_BYTE:76 [ myprintf::b#16 ] 45.56: zp ZP_WORD:8 [ myprintf::w2#7 myprintf::w2#0 myprintf::w2#1 ] 37.88: zp ZP_BYTE:74 [ myprintf::bLen#10 ] 23.56: zp ZP_WORD:6 [ myprintf::w1#6 myprintf::w1#0 myprintf::w1#1 ] 16.22: zp ZP_WORD:10 [ myprintf::w3#7 myprintf::w3#0 myprintf::w3#1 ] -Uplift Scope [divr16u] 8,758.75: zp ZP_WORD:39 [ divr16u::rem#4 divr16u::rem#9 divr16u::rem#5 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 ] 3,353.75: zp ZP_WORD:43 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 ] 2,002: zp ZP_BYTE:115 [ divr16u::$1 ] 2,002: zp ZP_BYTE:116 [ divr16u::$2 ] 1,655.5: zp ZP_BYTE:45 [ divr16u::i#2 divr16u::i#1 ] 681.54: zp ZP_WORD:41 [ divr16u::dividend#2 divr16u::dividend#1 divr16u::dividend#0 ] 4: zp ZP_WORD:111 [ divr16u::return#2 ] +Uplift Scope [divr16u] 8,758.75: zp ZP_WORD:39 [ divr16u::rem#4 divr16u::rem#9 divr16u::rem#5 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 ] 3,353.75: zp ZP_WORD:43 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 ] 2,002: zp ZP_BYTE:113 [ divr16u::$1 ] 2,002: zp ZP_BYTE:114 [ divr16u::$2 ] 1,655.5: zp ZP_BYTE:45 [ divr16u::i#2 divr16u::i#1 ] 681.54: zp ZP_WORD:41 [ divr16u::dividend#2 divr16u::dividend#1 divr16u::dividend#0 ] 4: zp ZP_WORD:109 [ divr16u::return#2 ] Uplift Scope [append] 2,399.62: zp ZP_WORD:37 [ append::value#5 append::value#8 append::value#1 append::value#2 append::value#3 append::value#4 append::value#0 ] 341: zp ZP_WORD:33 [ append::dst#4 append::dst#1 append::dst#2 append::dst#3 ] 333.67: zp ZP_WORD:35 [ append::sub#6 ] 4: zp ZP_WORD:83 [ append::return#10 ] 4: zp ZP_WORD:85 [ append::return#4 ] 4: zp ZP_WORD:87 [ append::return#3 ] 4: zp ZP_WORD:89 [ append::return#2 ] -Uplift Scope [div10] 202: zp ZP_WORD:60 [ div10::return#2 ] 103: zp ZP_WORD:58 [ div10::val#4 ] 34.33: zp ZP_WORD:109 [ div10::return#0 ] 4: zp ZP_WORD:91 [ div10::$0 ] 4: zp ZP_WORD:95 [ div10::$2 ] 4: zp ZP_WORD:99 [ div10::$3 ] 4: zp ZP_WORD:103 [ div10::$4 ] 4: zp ZP_WORD:105 [ div10::$5 ] 4: zp ZP_WORD:107 [ div10::val#3 ] 3: zp ZP_WORD:93 [ div10::val#0 ] 3: zp ZP_WORD:97 [ div10::val#1 ] 2: zp ZP_WORD:101 [ div10::val#2 ] -Uplift Scope [div16u] 202: zp ZP_WORD:48 [ div16u::return#2 ] 103: zp ZP_WORD:46 [ div16u::dividend#0 ] 34.33: zp ZP_WORD:113 [ div16u::return#0 ] +Uplift Scope [div10] 202: zp ZP_WORD:60 [ div10::return#2 ] 103: zp ZP_WORD:58 [ div10::val#4 ] 34.33: zp ZP_WORD:107 [ div10::return#0 ] 4: zp ZP_WORD:91 [ div10::$0 ] 4: zp ZP_WORD:95 [ div10::$2 ] 4: zp ZP_WORD:99 [ div10::$3 ] 4: zp ZP_WORD:103 [ div10::$4 ] 4: zp ZP_WORD:105 [ div10::val#3 ] 3: zp ZP_WORD:93 [ div10::val#0 ] 3: zp ZP_WORD:97 [ div10::val#1 ] 3: zp ZP_WORD:101 [ div10::val#2 ] +Uplift Scope [div16u] 202: zp ZP_WORD:48 [ div16u::return#2 ] 103: zp ZP_WORD:46 [ div16u::dividend#0 ] 34.33: zp ZP_WORD:111 [ div16u::return#0 ] Uplift Scope [main] 22: zp ZP_WORD:52 [ main::$2 ] 22: zp ZP_WORD:56 [ main::$4 ] 22: zp ZP_WORD:64 [ main::$11 ] 22: zp ZP_WORD:68 [ main::$13 ] 14.39: zp ZP_WORD:2 [ main::u#11 main::u#2 ] 14.39: zp ZP_WORD:4 [ main::u#15 main::u#4 ] 14: zp ZP_WORD:50 [ main::v#1 ] 14: zp ZP_WORD:62 [ main::v#2 ] 11: zp ZP_WORD:54 [ main::$3 ] 11: zp ZP_WORD:66 [ main::$12 ] Uplift Scope [utoa] 57.17: zp ZP_WORD:29 [ utoa::value#12 utoa::value#3 utoa::value#10 utoa::value#2 utoa::value#11 utoa::value#6 utoa::value#4 utoa::value#0 utoa::value#1 ] 17.25: zp ZP_WORD:31 [ utoa::dst#12 utoa::dst#4 utoa::dst#13 utoa::dst#2 utoa::dst#10 utoa::dst#16 utoa::dst#1 ] 7.33: zp ZP_BYTE:28 [ utoa::bStarted#7 utoa::bStarted#6 utoa::bStarted#5 ] 4: zp ZP_BYTE:79 [ utoa::$16 ] 4: zp ZP_BYTE:80 [ utoa::$17 ] 4: zp ZP_WORD:81 [ utoa::dst#3 ] Uplift Scope [Print] Uplift Scope [] -Uplifting [divr16u] best 466495 combination zp ZP_WORD:39 [ divr16u::rem#4 divr16u::rem#9 divr16u::rem#5 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 ] zp ZP_WORD:43 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 ] reg byte a [ divr16u::$1 ] reg byte a [ divr16u::$2 ] reg byte x [ divr16u::i#2 divr16u::i#1 ] zp ZP_WORD:41 [ divr16u::dividend#2 divr16u::dividend#1 divr16u::dividend#0 ] zp ZP_WORD:111 [ divr16u::return#2 ] -Uplifting [append] best 466495 combination zp ZP_WORD:37 [ append::value#5 append::value#8 append::value#1 append::value#2 append::value#3 append::value#4 append::value#0 ] zp ZP_WORD:33 [ append::dst#4 append::dst#1 append::dst#2 append::dst#3 ] zp ZP_WORD:35 [ append::sub#6 ] zp ZP_WORD:83 [ append::return#10 ] zp ZP_WORD:85 [ append::return#4 ] zp ZP_WORD:87 [ append::return#3 ] zp ZP_WORD:89 [ append::return#2 ] -Uplifting [div10] best 466495 combination zp ZP_WORD:60 [ div10::return#2 ] zp ZP_WORD:58 [ div10::val#4 ] zp ZP_WORD:109 [ div10::return#0 ] zp ZP_WORD:91 [ div10::$0 ] zp ZP_WORD:95 [ div10::$2 ] zp ZP_WORD:99 [ div10::$3 ] zp ZP_WORD:103 [ div10::$4 ] zp ZP_WORD:105 [ div10::$5 ] zp ZP_WORD:107 [ div10::val#3 ] zp ZP_WORD:93 [ div10::val#0 ] zp ZP_WORD:97 [ div10::val#1 ] zp ZP_WORD:101 [ div10::val#2 ] -Uplifting [div16u] best 466495 combination zp ZP_WORD:48 [ div16u::return#2 ] zp ZP_WORD:46 [ div16u::dividend#0 ] zp ZP_WORD:113 [ div16u::return#0 ] -Uplifting [main] best 466495 combination zp ZP_WORD:52 [ main::$2 ] zp ZP_WORD:56 [ main::$4 ] zp ZP_WORD:64 [ main::$11 ] zp ZP_WORD:68 [ main::$13 ] zp ZP_WORD:2 [ main::u#11 main::u#2 ] zp ZP_WORD:4 [ main::u#15 main::u#4 ] zp ZP_WORD:50 [ main::v#1 ] zp ZP_WORD:62 [ main::v#2 ] zp ZP_WORD:54 [ main::$3 ] zp ZP_WORD:66 [ main::$12 ] -Uplifting [utoa] best 466464 combination zp ZP_WORD:29 [ utoa::value#12 utoa::value#3 utoa::value#10 utoa::value#2 utoa::value#11 utoa::value#6 utoa::value#4 utoa::value#0 utoa::value#1 ] zp ZP_WORD:31 [ utoa::dst#12 utoa::dst#4 utoa::dst#13 utoa::dst#2 utoa::dst#10 utoa::dst#16 utoa::dst#1 ] reg byte x [ utoa::bStarted#7 utoa::bStarted#6 utoa::bStarted#5 ] reg byte a [ utoa::$16 ] reg byte a [ utoa::$17 ] zp ZP_WORD:81 [ utoa::dst#3 ] -Uplifting [Print] best 466464 combination -Uplifting [] best 466464 combination +Uplifting [divr16u] best 466472 combination zp ZP_WORD:39 [ divr16u::rem#4 divr16u::rem#9 divr16u::rem#5 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 ] zp ZP_WORD:43 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 ] reg byte a [ divr16u::$1 ] reg byte a [ divr16u::$2 ] reg byte x [ divr16u::i#2 divr16u::i#1 ] zp ZP_WORD:41 [ divr16u::dividend#2 divr16u::dividend#1 divr16u::dividend#0 ] zp ZP_WORD:109 [ divr16u::return#2 ] +Uplifting [append] best 466472 combination zp ZP_WORD:37 [ append::value#5 append::value#8 append::value#1 append::value#2 append::value#3 append::value#4 append::value#0 ] zp ZP_WORD:33 [ append::dst#4 append::dst#1 append::dst#2 append::dst#3 ] zp ZP_WORD:35 [ append::sub#6 ] zp ZP_WORD:83 [ append::return#10 ] zp ZP_WORD:85 [ append::return#4 ] zp ZP_WORD:87 [ append::return#3 ] zp ZP_WORD:89 [ append::return#2 ] +Uplifting [div10] best 466472 combination zp ZP_WORD:60 [ div10::return#2 ] zp ZP_WORD:58 [ div10::val#4 ] zp ZP_WORD:107 [ div10::return#0 ] zp ZP_WORD:91 [ div10::$0 ] zp ZP_WORD:95 [ div10::$2 ] zp ZP_WORD:99 [ div10::$3 ] zp ZP_WORD:103 [ div10::$4 ] zp ZP_WORD:105 [ div10::val#3 ] zp ZP_WORD:93 [ div10::val#0 ] zp ZP_WORD:97 [ div10::val#1 ] zp ZP_WORD:101 [ div10::val#2 ] +Uplifting [div16u] best 466472 combination zp ZP_WORD:48 [ div16u::return#2 ] zp ZP_WORD:46 [ div16u::dividend#0 ] zp ZP_WORD:111 [ div16u::return#0 ] +Uplifting [main] best 466472 combination zp ZP_WORD:52 [ main::$2 ] zp ZP_WORD:56 [ main::$4 ] zp ZP_WORD:64 [ main::$11 ] zp ZP_WORD:68 [ main::$13 ] zp ZP_WORD:2 [ main::u#11 main::u#2 ] zp ZP_WORD:4 [ main::u#15 main::u#4 ] zp ZP_WORD:50 [ main::v#1 ] zp ZP_WORD:62 [ main::v#2 ] zp ZP_WORD:54 [ main::$3 ] zp ZP_WORD:66 [ main::$12 ] +Uplifting [utoa] best 466441 combination zp ZP_WORD:29 [ utoa::value#12 utoa::value#3 utoa::value#10 utoa::value#2 utoa::value#11 utoa::value#6 utoa::value#4 utoa::value#0 utoa::value#1 ] zp ZP_WORD:31 [ utoa::dst#12 utoa::dst#4 utoa::dst#13 utoa::dst#2 utoa::dst#10 utoa::dst#16 utoa::dst#1 ] reg byte x [ utoa::bStarted#7 utoa::bStarted#6 utoa::bStarted#5 ] reg byte a [ utoa::$16 ] reg byte a [ utoa::$17 ] zp ZP_WORD:81 [ utoa::dst#3 ] +Uplifting [Print] best 466441 combination +Uplifting [] best 466441 combination Attempting to uplift remaining variables inzp ZP_BYTE:24 [ myprintf::bLen#11 myprintf::bLen#13 myprintf::bLen#12 myprintf::bLen#23 myprintf::bLen#14 myprintf::return#0 myprintf::bLen#28 myprintf::bLen#7 myprintf::bLen#3 myprintf::bLen#24 myprintf::bLen#6 myprintf::bLen#1 myprintf::bLen#4 ] -Uplifting [myprintf] best 466464 combination zp ZP_BYTE:24 [ myprintf::bLen#11 myprintf::bLen#13 myprintf::bLen#12 myprintf::bLen#23 myprintf::bLen#14 myprintf::return#0 myprintf::bLen#28 myprintf::bLen#7 myprintf::bLen#3 myprintf::bLen#24 myprintf::bLen#6 myprintf::bLen#1 myprintf::bLen#4 ] +Uplifting [myprintf] best 466441 combination zp ZP_BYTE:24 [ myprintf::bLen#11 myprintf::bLen#13 myprintf::bLen#12 myprintf::bLen#23 myprintf::bLen#14 myprintf::return#0 myprintf::bLen#28 myprintf::bLen#7 myprintf::bLen#3 myprintf::bLen#24 myprintf::bLen#6 myprintf::bLen#1 myprintf::bLen#4 ] Attempting to uplift remaining variables inzp ZP_BYTE:25 [ myprintf::bDigits#10 myprintf::bDigits#8 myprintf::bDigits#14 myprintf::bDigits#24 myprintf::bDigits#25 myprintf::bDigits#1 myprintf::bDigits#16 myprintf::bDigits#3 myprintf::bDigits#2 ] -Uplifting [myprintf] best 466464 combination zp ZP_BYTE:25 [ myprintf::bDigits#10 myprintf::bDigits#8 myprintf::bDigits#14 myprintf::bDigits#24 myprintf::bDigits#25 myprintf::bDigits#1 myprintf::bDigits#16 myprintf::bDigits#3 myprintf::bDigits#2 ] +Uplifting [myprintf] best 466441 combination zp ZP_BYTE:25 [ myprintf::bDigits#10 myprintf::bDigits#8 myprintf::bDigits#14 myprintf::bDigits#24 myprintf::bDigits#25 myprintf::bDigits#1 myprintf::bDigits#16 myprintf::bDigits#3 myprintf::bDigits#2 ] Attempting to uplift remaining variables inzp ZP_BYTE:23 [ myprintf::digit#3 myprintf::digit#2 ] -Uplifting [myprintf] best 454464 combination reg byte x [ myprintf::digit#3 myprintf::digit#2 ] +Uplifting [myprintf] best 454441 combination reg byte x [ myprintf::digit#3 myprintf::digit#2 ] Attempting to uplift remaining variables inzp ZP_BYTE:22 [ myprintf::b#17 myprintf::b#5 ] -Uplifting [myprintf] best 454464 combination zp ZP_BYTE:22 [ myprintf::b#17 myprintf::b#5 ] +Uplifting [myprintf] best 454441 combination zp ZP_BYTE:22 [ myprintf::b#17 myprintf::b#5 ] Attempting to uplift remaining variables inzp ZP_BYTE:26 [ myprintf::$41 ] -Uplifting [myprintf] best 445464 combination reg byte a [ myprintf::$41 ] +Uplifting [myprintf] best 445441 combination reg byte a [ myprintf::$41 ] Attempting to uplift remaining variables inzp ZP_BYTE:27 [ myprintf::b#25 myprintf::b#1 myprintf::b#6 ] -Uplifting [myprintf] best 441714 combination reg byte x [ myprintf::b#25 myprintf::b#1 myprintf::b#6 ] +Uplifting [myprintf] best 441691 combination reg byte x [ myprintf::b#25 myprintf::b#1 myprintf::b#6 ] Attempting to uplift remaining variables inzp ZP_BYTE:15 [ myprintf::bArg#12 myprintf::bArg#10 myprintf::bArg#1 ] -Uplifting [myprintf] best 441714 combination zp ZP_BYTE:15 [ myprintf::bArg#12 myprintf::bArg#10 myprintf::bArg#1 ] +Uplifting [myprintf] best 441691 combination zp ZP_BYTE:15 [ myprintf::bArg#12 myprintf::bArg#10 myprintf::bArg#1 ] Attempting to uplift remaining variables inzp ZP_BYTE:14 [ myprintf::bFormat#10 myprintf::bFormat#4 ] -Uplifting [myprintf] best 441714 combination zp ZP_BYTE:14 [ myprintf::bFormat#10 myprintf::bFormat#4 ] +Uplifting [myprintf] best 441691 combination zp ZP_BYTE:14 [ myprintf::bFormat#10 myprintf::bFormat#4 ] Attempting to uplift remaining variables inzp ZP_BYTE:70 [ myprintf::$17 ] -Uplifting [myprintf] best 441114 combination reg byte a [ myprintf::$17 ] +Uplifting [myprintf] best 441091 combination reg byte a [ myprintf::$17 ] Attempting to uplift remaining variables inzp ZP_BYTE:71 [ myprintf::$18 ] -Uplifting [myprintf] best 440514 combination reg byte a [ myprintf::$18 ] +Uplifting [myprintf] best 440491 combination reg byte a [ myprintf::$18 ] Attempting to uplift remaining variables inzp ZP_BYTE:73 [ myprintf::$24 ] -Uplifting [myprintf] best 439914 combination reg byte a [ myprintf::$24 ] +Uplifting [myprintf] best 439891 combination reg byte a [ myprintf::$24 ] Attempting to uplift remaining variables inzp ZP_BYTE:75 [ myprintf::$25 ] -Uplifting [myprintf] best 439314 combination reg byte a [ myprintf::$25 ] +Uplifting [myprintf] best 439291 combination reg byte a [ myprintf::$25 ] Attempting to uplift remaining variables inzp ZP_BYTE:77 [ myprintf::$31 ] -Uplifting [myprintf] best 438714 combination reg byte a [ myprintf::$31 ] +Uplifting [myprintf] best 438691 combination reg byte a [ myprintf::$31 ] Attempting to uplift remaining variables inzp ZP_BYTE:78 [ myprintf::$49 ] -Uplifting [myprintf] best 438114 combination reg byte a [ myprintf::$49 ] +Uplifting [myprintf] best 438091 combination reg byte a [ myprintf::$49 ] Attempting to uplift remaining variables inzp ZP_BYTE:19 [ myprintf::bLeadZero#10 myprintf::bLeadZero#18 ] -Uplifting [myprintf] best 438114 combination zp ZP_BYTE:19 [ myprintf::bLeadZero#10 myprintf::bLeadZero#18 ] +Uplifting [myprintf] best 438091 combination zp ZP_BYTE:19 [ myprintf::bLeadZero#10 myprintf::bLeadZero#18 ] Attempting to uplift remaining variables inzp ZP_BYTE:18 [ myprintf::bTrailing#10 myprintf::bTrailing#21 ] -Uplifting [myprintf] best 438114 combination zp ZP_BYTE:18 [ myprintf::bTrailing#10 myprintf::bTrailing#21 ] +Uplifting [myprintf] best 438091 combination zp ZP_BYTE:18 [ myprintf::bTrailing#10 myprintf::bTrailing#21 ] Attempting to uplift remaining variables inzp ZP_BYTE:20 [ myprintf::$23 ] -Uplifting [myprintf] best 437214 combination reg byte a [ myprintf::$23 ] +Uplifting [myprintf] best 437191 combination reg byte a [ myprintf::$23 ] Attempting to uplift remaining variables inzp ZP_BYTE:21 [ myprintf::$30 ] -Uplifting [myprintf] best 436314 combination reg byte a [ myprintf::$30 ] +Uplifting [myprintf] best 436291 combination reg byte a [ myprintf::$30 ] Attempting to uplift remaining variables inzp ZP_BYTE:72 [ myprintf::b#15 ] -Uplifting [myprintf] best 436214 combination reg byte x [ myprintf::b#15 ] +Uplifting [myprintf] best 436191 combination reg byte x [ myprintf::b#15 ] Attempting to uplift remaining variables inzp ZP_BYTE:76 [ myprintf::b#16 ] -Uplifting [myprintf] best 436114 combination reg byte x [ myprintf::b#16 ] +Uplifting [myprintf] best 436091 combination reg byte x [ myprintf::b#16 ] Attempting to uplift remaining variables inzp ZP_BYTE:74 [ myprintf::bLen#10 ] -Uplifting [myprintf] best 435214 combination reg byte y [ myprintf::bLen#10 ] +Uplifting [myprintf] best 435191 combination reg byte y [ myprintf::bLen#10 ] Coalescing zero page register with common assignment [ zp ZP_WORD:29 [ utoa::value#12 utoa::value#3 utoa::value#10 utoa::value#2 utoa::value#11 utoa::value#6 utoa::value#4 utoa::value#0 utoa::value#1 ] ] with [ zp ZP_WORD:37 [ append::value#5 append::value#8 append::value#1 append::value#2 append::value#3 append::value#4 append::value#0 ] ] - score: 4 Coalescing zero page register with common assignment [ zp ZP_WORD:31 [ utoa::dst#12 utoa::dst#4 utoa::dst#13 utoa::dst#2 utoa::dst#10 utoa::dst#16 utoa::dst#1 ] ] with [ zp ZP_WORD:33 [ append::dst#4 append::dst#1 append::dst#2 append::dst#3 ] ] - score: 3 Coalescing zero page register with common assignment [ zp ZP_WORD:2 [ main::u#11 main::u#2 ] ] with [ zp ZP_WORD:6 [ myprintf::w1#6 myprintf::w1#0 myprintf::w1#1 ] ] - score: 1 @@ -6250,22 +6228,21 @@ Coalescing zero page register with common assignment [ zp ZP_WORD:29 [ utoa::val Coalescing zero page register with common assignment [ zp ZP_WORD:29 [ utoa::value#12 utoa::value#3 utoa::value#10 utoa::value#2 utoa::value#11 utoa::value#6 utoa::value#4 utoa::value#0 utoa::value#1 append::value#5 append::value#8 append::value#1 append::value#2 append::value#3 append::value#4 append::value#0 append::return#10 append::return#4 ] ] with [ zp ZP_WORD:87 [ append::return#3 ] ] - score: 1 Coalescing zero page register with common assignment [ zp ZP_WORD:29 [ utoa::value#12 utoa::value#3 utoa::value#10 utoa::value#2 utoa::value#11 utoa::value#6 utoa::value#4 utoa::value#0 utoa::value#1 append::value#5 append::value#8 append::value#1 append::value#2 append::value#3 append::value#4 append::value#0 append::return#10 append::return#4 append::return#3 ] ] with [ zp ZP_WORD:89 [ append::return#2 ] ] - score: 1 Coalescing zero page register with common assignment [ zp ZP_WORD:31 [ utoa::dst#12 utoa::dst#4 utoa::dst#13 utoa::dst#2 utoa::dst#10 utoa::dst#16 utoa::dst#1 append::dst#4 append::dst#1 append::dst#2 append::dst#3 ] ] with [ zp ZP_WORD:81 [ utoa::dst#3 ] ] - score: 1 -Coalescing zero page register with common assignment [ zp ZP_WORD:43 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 ] ] with [ zp ZP_WORD:111 [ divr16u::return#2 ] ] - score: 1 -Coalescing zero page register with common assignment [ zp ZP_WORD:48 [ div16u::return#2 ] ] with [ zp ZP_WORD:113 [ div16u::return#0 ] ] - score: 1 -Coalescing zero page register with common assignment [ zp ZP_WORD:60 [ div10::return#2 ] ] with [ zp ZP_WORD:109 [ div10::return#0 ] ] - score: 1 +Coalescing zero page register with common assignment [ zp ZP_WORD:43 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 ] ] with [ zp ZP_WORD:109 [ divr16u::return#2 ] ] - score: 1 +Coalescing zero page register with common assignment [ zp ZP_WORD:48 [ div16u::return#2 ] ] with [ zp ZP_WORD:111 [ div16u::return#0 ] ] - score: 1 +Coalescing zero page register with common assignment [ zp ZP_WORD:60 [ div10::return#2 ] ] with [ zp ZP_WORD:107 [ div10::return#0 ] ] - score: 1 Coalescing zero page register with common assignment [ zp ZP_WORD:91 [ div10::$0 ] ] with [ zp ZP_WORD:93 [ div10::val#0 ] ] - score: 1 Coalescing zero page register with common assignment [ zp ZP_WORD:95 [ div10::$2 ] ] with [ zp ZP_WORD:97 [ div10::val#1 ] ] - score: 1 Coalescing zero page register with common assignment [ zp ZP_WORD:99 [ div10::$3 ] ] with [ zp ZP_WORD:101 [ div10::val#2 ] ] - score: 1 -Coalescing zero page register with common assignment [ zp ZP_WORD:103 [ div10::$4 ] ] with [ zp ZP_WORD:105 [ div10::$5 ] ] - score: 1 +Coalescing zero page register with common assignment [ zp ZP_WORD:103 [ div10::$4 ] ] with [ zp ZP_WORD:105 [ div10::val#3 ] ] - score: 1 Coalescing zero page register with common assignment [ zp ZP_WORD:2 [ main::u#11 main::u#2 myprintf::w1#6 myprintf::w1#0 myprintf::w1#1 div16u::dividend#0 ] ] with [ zp ZP_WORD:4 [ main::u#15 main::u#4 div10::val#4 ] ] - score: 1 Coalescing zero page register with common assignment [ zp ZP_WORD:8 [ myprintf::w2#7 myprintf::w2#0 myprintf::w2#1 main::v#1 main::v#2 ] ] with [ zp ZP_WORD:48 [ div16u::return#2 div16u::return#0 ] ] - score: 1 Coalescing zero page register with common assignment [ zp ZP_WORD:8 [ myprintf::w2#7 myprintf::w2#0 myprintf::w2#1 main::v#1 main::v#2 div16u::return#2 div16u::return#0 ] ] with [ zp ZP_WORD:60 [ div10::return#2 div10::return#0 ] ] - score: 1 Coalescing zero page register with common assignment [ zp ZP_WORD:10 [ myprintf::w3#7 myprintf::w3#0 myprintf::w3#1 main::$3 main::$12 ] ] with [ zp ZP_WORD:52 [ main::$2 ] ] - score: 1 Coalescing zero page register with common assignment [ zp ZP_WORD:10 [ myprintf::w3#7 myprintf::w3#0 myprintf::w3#1 main::$3 main::$12 main::$2 ] ] with [ zp ZP_WORD:64 [ main::$11 ] ] - score: 1 -Coalescing zero page register with common assignment [ zp ZP_WORD:99 [ div10::$3 div10::val#2 ] ] with [ zp ZP_WORD:107 [ div10::val#3 ] ] - score: 1 Coalescing zero page register with common assignment [ zp ZP_WORD:8 [ myprintf::w2#7 myprintf::w2#0 myprintf::w2#1 main::v#1 main::v#2 div16u::return#2 div16u::return#0 div10::return#2 div10::return#0 ] ] with [ zp ZP_WORD:43 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 ] ] - score: 1 -Coalescing zero page register with common assignment [ zp ZP_WORD:8 [ myprintf::w2#7 myprintf::w2#0 myprintf::w2#1 main::v#1 main::v#2 div16u::return#2 div16u::return#0 div10::return#2 div10::return#0 divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 ] ] with [ zp ZP_WORD:99 [ div10::$3 div10::val#2 div10::val#3 ] ] - score: 1 -Allocated (was zp ZP_WORD:8) zp ZP_WORD:4 [ myprintf::w2#7 myprintf::w2#0 myprintf::w2#1 main::v#1 main::v#2 div16u::return#2 div16u::return#0 div10::return#2 div10::return#0 divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 div10::$3 div10::val#2 div10::val#3 ] +Coalescing zero page register with common assignment [ zp ZP_WORD:8 [ myprintf::w2#7 myprintf::w2#0 myprintf::w2#1 main::v#1 main::v#2 div16u::return#2 div16u::return#0 div10::return#2 div10::return#0 divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 ] ] with [ zp ZP_WORD:103 [ div10::$4 div10::val#3 ] ] - score: 1 +Allocated (was zp ZP_WORD:8) zp ZP_WORD:4 [ myprintf::w2#7 myprintf::w2#0 myprintf::w2#1 main::v#1 main::v#2 div16u::return#2 div16u::return#0 div10::return#2 div10::return#0 divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 div10::$4 div10::val#3 ] Allocated (was zp ZP_WORD:10) zp ZP_WORD:6 [ myprintf::w3#7 myprintf::w3#0 myprintf::w3#1 main::$3 main::$12 main::$2 main::$11 ] Allocated (was zp ZP_WORD:12) zp ZP_WORD:8 [ myprintf::str#10 myprintf::str#5 myprintf::str#0 ] Allocated (was zp ZP_BYTE:14) zp ZP_BYTE:10 [ myprintf::bFormat#10 myprintf::bFormat#4 ] @@ -6285,7 +6262,7 @@ Allocated (was zp ZP_WORD:56) zp ZP_WORD:29 [ main::$4 ] Allocated (was zp ZP_WORD:68) zp ZP_WORD:31 [ main::$13 ] Allocated (was zp ZP_WORD:91) zp ZP_WORD:33 [ div10::$0 div10::val#0 ] Allocated (was zp ZP_WORD:95) zp ZP_WORD:35 [ div10::$2 div10::val#1 ] -Allocated (was zp ZP_WORD:103) zp ZP_WORD:37 [ div10::$4 div10::$5 ] +Allocated (was zp ZP_WORD:99) zp ZP_WORD:37 [ div10::$3 div10::val#2 ] ASSEMBLER BEFORE OPTIMIZATION //SEG0 File Comments @@ -7440,12 +7417,11 @@ append: { div10: { .label _0 = $21 .label _2 = $23 - .label _3 = 4 - .label _4 = $25 - .label _5 = $25 + .label _3 = $25 + .label _4 = 4 .label val = $21 .label val_1 = $23 - .label val_2 = 4 + .label val_2 = $25 .label val_3 = 4 .label return = 4 .label val_4 = 2 @@ -7495,33 +7471,29 @@ div10: { lda val_2+1 adc val_1+1 sta val_2+1 - //SEG418 [188] (word~) div10::$4 ← (word) div10::val#2 >> (byte) 4 -- vwuz1=vwuz2_ror_4 - lda val_2+1 - sta _4+1 + //SEG418 [188] (word~) div10::$4 ← (word) div10::val#2 >> (byte) 8 -- vwuz1=vwuz2_ror_vbuc1 + ldy #8 lda val_2 sta _4 - ldy #4 + lda val_2+1 + sta _4+1 + cpy #0 + beq !e+ !: lsr _4+1 ror _4 dey bne !- - //SEG419 [189] (word~) div10::$5 ← (word~) div10::$4 >> (byte) 4 -- vwuz1=vwuz1_ror_4 - ldy #4 - !: - lsr _5+1 - ror _5 - dey - bne !- - //SEG420 [190] (word) div10::val#3 ← (word) div10::val#2 + (word~) div10::$5 -- vwuz1=vwuz1_plus_vwuz2 + !e: + //SEG419 [189] (word) div10::val#3 ← (word) div10::val#2 + (word~) div10::$4 -- vwuz1=vwuz2_plus_vwuz1 lda val_3 clc - adc _5 + adc val_2 sta val_3 lda val_3+1 - adc _5+1 + adc val_2+1 sta val_3+1 - //SEG421 [191] (word) div10::return#0 ← (word) div10::val#3 >> (byte) 4 -- vwuz1=vwuz1_ror_4 + //SEG420 [190] (word) div10::return#0 ← (word) div10::val#3 >> (byte) 4 -- vwuz1=vwuz1_ror_4 ldy #4 !: lsr return+1 @@ -7529,12 +7501,12 @@ div10: { dey bne !- jmp breturn - //SEG422 div10::@return + //SEG421 div10::@return breturn: - //SEG423 [192] return + //SEG422 [191] return rts } -//SEG424 div16u +//SEG423 div16u // Performs division on two 16 bit unsigned words // Returns the quotient dividend/divisor. // The remainder will be set into the global variable rem16u @@ -7544,27 +7516,27 @@ div16u: { .label divisor = $a .label return = 4 .label dividend = 2 - //SEG425 [193] (word) divr16u::dividend#1 ← (word) div16u::dividend#0 -- vwuz1=vwuz2 + //SEG424 [192] (word) divr16u::dividend#1 ← (word) div16u::dividend#0 -- vwuz1=vwuz2 lda dividend sta divr16u.dividend lda dividend+1 sta divr16u.dividend+1 - //SEG426 [194] call divr16u - //SEG427 [198] phi from div16u to divr16u [phi:div16u->divr16u] + //SEG425 [193] call divr16u + //SEG426 [197] phi from div16u to divr16u [phi:div16u->divr16u] divr16u_from_div16u: jsr divr16u - //SEG428 [195] (word) divr16u::return#2 ← (word) divr16u::return#0 + //SEG427 [194] (word) divr16u::return#2 ← (word) divr16u::return#0 jmp b1 - //SEG429 div16u::@1 + //SEG428 div16u::@1 b1: - //SEG430 [196] (word) div16u::return#0 ← (word) divr16u::return#2 + //SEG429 [195] (word) div16u::return#0 ← (word) divr16u::return#2 jmp breturn - //SEG431 div16u::@return + //SEG430 div16u::@return breturn: - //SEG432 [197] return + //SEG431 [196] return rts } -//SEG433 divr16u +//SEG432 divr16u // Performs division on two 16 bit unsigned words and an initial remainder // Returns the quotient dividend/divisor. // The final remainder will be set into the global variable rem16u @@ -7575,62 +7547,62 @@ divr16u: { .label dividend = $1b .label quotient = 4 .label return = 4 - //SEG434 [199] phi from divr16u to divr16u::@1 [phi:divr16u->divr16u::@1] + //SEG433 [198] phi from divr16u to divr16u::@1 [phi:divr16u->divr16u::@1] b1_from_divr16u: - //SEG435 [199] phi (byte) divr16u::i#2 = (byte) 0 [phi:divr16u->divr16u::@1#0] -- vbuxx=vbuc1 + //SEG434 [198] phi (byte) divr16u::i#2 = (byte) 0 [phi:divr16u->divr16u::@1#0] -- vbuxx=vbuc1 ldx #0 - //SEG436 [199] phi (word) divr16u::quotient#3 = (byte) 0 [phi:divr16u->divr16u::@1#1] -- vwuz1=vbuc1 + //SEG435 [198] phi (word) divr16u::quotient#3 = (byte) 0 [phi:divr16u->divr16u::@1#1] -- vwuz1=vbuc1 lda #0 sta quotient lda #0 sta quotient+1 - //SEG437 [199] phi (word) divr16u::dividend#2 = (word) divr16u::dividend#1 [phi:divr16u->divr16u::@1#2] -- register_copy - //SEG438 [199] phi (word) divr16u::rem#4 = (byte) 0 [phi:divr16u->divr16u::@1#3] -- vwuz1=vbuc1 + //SEG436 [198] phi (word) divr16u::dividend#2 = (word) divr16u::dividend#1 [phi:divr16u->divr16u::@1#2] -- register_copy + //SEG437 [198] phi (word) divr16u::rem#4 = (byte) 0 [phi:divr16u->divr16u::@1#3] -- vwuz1=vbuc1 lda #0 sta rem lda #0 sta rem+1 jmp b1 - //SEG439 [199] phi from divr16u::@3 to divr16u::@1 [phi:divr16u::@3->divr16u::@1] + //SEG438 [198] phi from divr16u::@3 to divr16u::@1 [phi:divr16u::@3->divr16u::@1] b1_from_b3: - //SEG440 [199] phi (byte) divr16u::i#2 = (byte) divr16u::i#1 [phi:divr16u::@3->divr16u::@1#0] -- register_copy - //SEG441 [199] phi (word) divr16u::quotient#3 = (word) divr16u::return#0 [phi:divr16u::@3->divr16u::@1#1] -- register_copy - //SEG442 [199] phi (word) divr16u::dividend#2 = (word) divr16u::dividend#0 [phi:divr16u::@3->divr16u::@1#2] -- register_copy - //SEG443 [199] phi (word) divr16u::rem#4 = (word) divr16u::rem#9 [phi:divr16u::@3->divr16u::@1#3] -- register_copy + //SEG439 [198] phi (byte) divr16u::i#2 = (byte) divr16u::i#1 [phi:divr16u::@3->divr16u::@1#0] -- register_copy + //SEG440 [198] phi (word) divr16u::quotient#3 = (word) divr16u::return#0 [phi:divr16u::@3->divr16u::@1#1] -- register_copy + //SEG441 [198] phi (word) divr16u::dividend#2 = (word) divr16u::dividend#0 [phi:divr16u::@3->divr16u::@1#2] -- register_copy + //SEG442 [198] phi (word) divr16u::rem#4 = (word) divr16u::rem#9 [phi:divr16u::@3->divr16u::@1#3] -- register_copy jmp b1 - //SEG444 divr16u::@1 + //SEG443 divr16u::@1 b1: - //SEG445 [200] (word) divr16u::rem#0 ← (word) divr16u::rem#4 << (byte) 1 -- vwuz1=vwuz1_rol_1 + //SEG444 [199] (word) divr16u::rem#0 ← (word) divr16u::rem#4 << (byte) 1 -- vwuz1=vwuz1_rol_1 asl rem rol rem+1 - //SEG446 [201] (byte~) divr16u::$1 ← > (word) divr16u::dividend#2 -- vbuaa=_hi_vwuz1 + //SEG445 [200] (byte~) divr16u::$1 ← > (word) divr16u::dividend#2 -- vbuaa=_hi_vwuz1 lda dividend+1 - //SEG447 [202] (byte~) divr16u::$2 ← (byte~) divr16u::$1 & (byte) $80 -- vbuaa=vbuaa_band_vbuc1 + //SEG446 [201] (byte~) divr16u::$2 ← (byte~) divr16u::$1 & (byte) $80 -- vbuaa=vbuaa_band_vbuc1 and #$80 - //SEG448 [203] if((byte~) divr16u::$2==(byte) 0) goto divr16u::@2 -- vbuaa_eq_0_then_la1 + //SEG447 [202] if((byte~) divr16u::$2==(byte) 0) goto divr16u::@2 -- vbuaa_eq_0_then_la1 cmp #0 beq b2_from_b1 jmp b4 - //SEG449 divr16u::@4 + //SEG448 divr16u::@4 b4: - //SEG450 [204] (word) divr16u::rem#1 ← (word) divr16u::rem#0 | (byte) 1 -- vwuz1=vwuz1_bor_vbuc1 + //SEG449 [203] (word) divr16u::rem#1 ← (word) divr16u::rem#0 | (byte) 1 -- vwuz1=vwuz1_bor_vbuc1 lda #1 ora rem sta rem - //SEG451 [205] phi from divr16u::@1 divr16u::@4 to divr16u::@2 [phi:divr16u::@1/divr16u::@4->divr16u::@2] + //SEG450 [204] phi from divr16u::@1 divr16u::@4 to divr16u::@2 [phi:divr16u::@1/divr16u::@4->divr16u::@2] b2_from_b1: b2_from_b4: - //SEG452 [205] phi (word) divr16u::rem#5 = (word) divr16u::rem#0 [phi:divr16u::@1/divr16u::@4->divr16u::@2#0] -- register_copy + //SEG451 [204] phi (word) divr16u::rem#5 = (word) divr16u::rem#0 [phi:divr16u::@1/divr16u::@4->divr16u::@2#0] -- register_copy jmp b2 - //SEG453 divr16u::@2 + //SEG452 divr16u::@2 b2: - //SEG454 [206] (word) divr16u::dividend#0 ← (word) divr16u::dividend#2 << (byte) 1 -- vwuz1=vwuz1_rol_1 + //SEG453 [205] (word) divr16u::dividend#0 ← (word) divr16u::dividend#2 << (byte) 1 -- vwuz1=vwuz1_rol_1 asl dividend rol dividend+1 - //SEG455 [207] (word) divr16u::quotient#1 ← (word) divr16u::quotient#3 << (byte) 1 -- vwuz1=vwuz1_rol_1 + //SEG454 [206] (word) divr16u::quotient#1 ← (word) divr16u::quotient#3 << (byte) 1 -- vwuz1=vwuz1_rol_1 asl quotient rol quotient+1 - //SEG456 [208] if((word) divr16u::rem#5<(const word) div16u::divisor#0) goto divr16u::@3 -- vwuz1_lt_vwuc1_then_la1 + //SEG455 [207] if((word) divr16u::rem#5<(const word) div16u::divisor#0) goto divr16u::@3 -- vwuz1_lt_vwuc1_then_la1 lda rem+1 cmp #>div16u.divisor bcc b3_from_b2 @@ -7640,14 +7612,14 @@ divr16u: { bcc b3_from_b2 !: jmp b5 - //SEG457 divr16u::@5 + //SEG456 divr16u::@5 b5: - //SEG458 [209] (word) divr16u::quotient#2 ← ++ (word) divr16u::quotient#1 -- vwuz1=_inc_vwuz1 + //SEG457 [208] (word) divr16u::quotient#2 ← ++ (word) divr16u::quotient#1 -- vwuz1=_inc_vwuz1 inc quotient bne !+ inc quotient+1 !: - //SEG459 [210] (word) divr16u::rem#2 ← (word) divr16u::rem#5 - (const word) div16u::divisor#0 -- vwuz1=vwuz1_minus_vwuc1 + //SEG458 [209] (word) divr16u::rem#2 ← (word) divr16u::rem#5 - (const word) div16u::divisor#0 -- vwuz1=vwuz1_minus_vwuc1 lda rem sec sbc #div16u.divisor sta rem+1 - //SEG460 [211] phi from divr16u::@2 divr16u::@5 to divr16u::@3 [phi:divr16u::@2/divr16u::@5->divr16u::@3] + //SEG459 [210] phi from divr16u::@2 divr16u::@5 to divr16u::@3 [phi:divr16u::@2/divr16u::@5->divr16u::@3] b3_from_b2: b3_from_b5: - //SEG461 [211] phi (word) divr16u::return#0 = (word) divr16u::quotient#1 [phi:divr16u::@2/divr16u::@5->divr16u::@3#0] -- register_copy - //SEG462 [211] phi (word) divr16u::rem#9 = (word) divr16u::rem#5 [phi:divr16u::@2/divr16u::@5->divr16u::@3#1] -- register_copy + //SEG460 [210] phi (word) divr16u::return#0 = (word) divr16u::quotient#1 [phi:divr16u::@2/divr16u::@5->divr16u::@3#0] -- register_copy + //SEG461 [210] phi (word) divr16u::rem#9 = (word) divr16u::rem#5 [phi:divr16u::@2/divr16u::@5->divr16u::@3#1] -- register_copy jmp b3 - //SEG463 divr16u::@3 + //SEG462 divr16u::@3 b3: - //SEG464 [212] (byte) divr16u::i#1 ← ++ (byte) divr16u::i#2 -- vbuxx=_inc_vbuxx + //SEG463 [211] (byte) divr16u::i#1 ← ++ (byte) divr16u::i#2 -- vbuxx=_inc_vbuxx inx - //SEG465 [213] if((byte) divr16u::i#1!=(byte) $10) goto divr16u::@1 -- vbuxx_neq_vbuc1_then_la1 + //SEG464 [212] if((byte) divr16u::i#1!=(byte) $10) goto divr16u::@1 -- vbuxx_neq_vbuc1_then_la1 cpx #$10 bne b1_from_b3 jmp breturn - //SEG466 divr16u::@return + //SEG465 divr16u::@return breturn: - //SEG467 [214] return + //SEG466 [213] return rts } // "char buf16[16]" is the normal way -- not supported -- https://gitlab.com/camelot/kickc/issues/162 @@ -7768,7 +7740,6 @@ Removing instruction ldy bLen Replacing instruction ldy #0 with TAY Removing instruction ldy #0 Removing instruction lda val_1+1 -Removing instruction lda val_2+1 Replacing instruction lda #0 with TXA Removing instruction lda #0 Removing instruction lda #0 @@ -7995,9 +7966,8 @@ FINAL SYMBOL TABLE (word()) div10((word) div10::val) (word~) div10::$0 $0 zp ZP_WORD:33 4.0 (word~) div10::$2 $2 zp ZP_WORD:35 4.0 -(word~) div10::$3 $3 zp ZP_WORD:4 4.0 -(word~) div10::$4 $4 zp ZP_WORD:37 4.0 -(word~) div10::$5 $5 zp ZP_WORD:37 4.0 +(word~) div10::$3 $3 zp ZP_WORD:37 4.0 +(word~) div10::$4 $4 zp ZP_WORD:4 4.0 (label) div10::@return (word) div10::return (word) div10::return#0 return zp ZP_WORD:4 34.33333333333333 @@ -8005,7 +7975,7 @@ FINAL SYMBOL TABLE (word) div10::val (word) div10::val#0 val zp ZP_WORD:33 3.0 (word) div10::val#1 val#1 zp ZP_WORD:35 3.0 -(word) div10::val#2 val#2 zp ZP_WORD:4 2.0 +(word) div10::val#2 val#2 zp ZP_WORD:37 3.0 (word) div10::val#3 val#3 zp ZP_WORD:4 4.0 (word) div10::val#4 val#4 zp ZP_WORD:2 103.0 (word()) div16u((word) div16u::dividend , (word) div16u::divisor) @@ -8262,7 +8232,7 @@ FINAL SYMBOL TABLE (const byte*) zp2#0 zp2 = (byte*) 98 zp ZP_WORD:2 [ main::u#11 main::u#2 myprintf::w1#6 myprintf::w1#0 myprintf::w1#1 div16u::dividend#0 main::u#15 main::u#4 div10::val#4 ] -zp ZP_WORD:4 [ myprintf::w2#7 myprintf::w2#0 myprintf::w2#1 main::v#1 main::v#2 div16u::return#2 div16u::return#0 div10::return#2 div10::return#0 divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 div10::$3 div10::val#2 div10::val#3 ] +zp ZP_WORD:4 [ myprintf::w2#7 myprintf::w2#0 myprintf::w2#1 main::v#1 main::v#2 div16u::return#2 div16u::return#0 div10::return#2 div10::return#0 divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 div10::$4 div10::val#3 ] zp ZP_WORD:6 [ myprintf::w3#7 myprintf::w3#0 myprintf::w3#1 main::$3 main::$12 main::$2 main::$11 ] zp ZP_WORD:8 [ myprintf::str#10 myprintf::str#5 myprintf::str#0 ] zp ZP_BYTE:10 [ myprintf::bFormat#10 myprintf::bFormat#4 ] @@ -8300,13 +8270,13 @@ reg byte a [ utoa::$16 ] reg byte a [ utoa::$17 ] zp ZP_WORD:33 [ div10::$0 div10::val#0 ] zp ZP_WORD:35 [ div10::$2 div10::val#1 ] -zp ZP_WORD:37 [ div10::$4 div10::$5 ] +zp ZP_WORD:37 [ div10::$3 div10::val#2 ] reg byte a [ divr16u::$1 ] reg byte a [ divr16u::$2 ] FINAL ASSEMBLER -Score: 354921 +Score: 354913 //SEG0 File Comments //SEG1 Basic Upstart @@ -9285,12 +9255,11 @@ append: { div10: { .label _0 = $21 .label _2 = $23 - .label _3 = 4 - .label _4 = $25 - .label _5 = $25 + .label _3 = $25 + .label _4 = 4 .label val = $21 .label val_1 = $23 - .label val_2 = 4 + .label val_2 = $25 .label val_3 = 4 .label return = 4 .label val_4 = 2 @@ -9339,43 +9308,40 @@ div10: { lda val_2+1 adc val_1+1 sta val_2+1 - //SEG418 [188] (word~) div10::$4 ← (word) div10::val#2 >> (byte) 4 -- vwuz1=vwuz2_ror_4 - sta _4+1 + //SEG418 [188] (word~) div10::$4 ← (word) div10::val#2 >> (byte) 8 -- vwuz1=vwuz2_ror_vbuc1 + ldy #8 lda val_2 sta _4 - ldy #4 + lda val_2+1 + sta _4+1 + cpy #0 + beq !e+ !: lsr _4+1 ror _4 dey bne !- - //SEG419 [189] (word~) div10::$5 ← (word~) div10::$4 >> (byte) 4 -- vwuz1=vwuz1_ror_4 - ldy #4 - !: - lsr _5+1 - ror _5 - dey - bne !- - //SEG420 [190] (word) div10::val#3 ← (word) div10::val#2 + (word~) div10::$5 -- vwuz1=vwuz1_plus_vwuz2 + !e: + //SEG419 [189] (word) div10::val#3 ← (word) div10::val#2 + (word~) div10::$4 -- vwuz1=vwuz2_plus_vwuz1 lda val_3 clc - adc _5 + adc val_2 sta val_3 lda val_3+1 - adc _5+1 + adc val_2+1 sta val_3+1 - //SEG421 [191] (word) div10::return#0 ← (word) div10::val#3 >> (byte) 4 -- vwuz1=vwuz1_ror_4 + //SEG420 [190] (word) div10::return#0 ← (word) div10::val#3 >> (byte) 4 -- vwuz1=vwuz1_ror_4 ldy #4 !: lsr return+1 ror return dey bne !- - //SEG422 div10::@return - //SEG423 [192] return + //SEG421 div10::@return + //SEG422 [191] return rts } -//SEG424 div16u +//SEG423 div16u // Performs division on two 16 bit unsigned words // Returns the quotient dividend/divisor. // The remainder will be set into the global variable rem16u @@ -9385,22 +9351,22 @@ div16u: { .label divisor = $a .label return = 4 .label dividend = 2 - //SEG425 [193] (word) divr16u::dividend#1 ← (word) div16u::dividend#0 -- vwuz1=vwuz2 + //SEG424 [192] (word) divr16u::dividend#1 ← (word) div16u::dividend#0 -- vwuz1=vwuz2 lda dividend sta divr16u.dividend lda dividend+1 sta divr16u.dividend+1 - //SEG426 [194] call divr16u - //SEG427 [198] phi from div16u to divr16u [phi:div16u->divr16u] + //SEG425 [193] call divr16u + //SEG426 [197] phi from div16u to divr16u [phi:div16u->divr16u] jsr divr16u - //SEG428 [195] (word) divr16u::return#2 ← (word) divr16u::return#0 - //SEG429 div16u::@1 - //SEG430 [196] (word) div16u::return#0 ← (word) divr16u::return#2 - //SEG431 div16u::@return - //SEG432 [197] return + //SEG427 [194] (word) divr16u::return#2 ← (word) divr16u::return#0 + //SEG428 div16u::@1 + //SEG429 [195] (word) div16u::return#0 ← (word) divr16u::return#2 + //SEG430 div16u::@return + //SEG431 [196] return rts } -//SEG433 divr16u +//SEG432 divr16u // Performs division on two 16 bit unsigned words and an initial remainder // Returns the quotient dividend/divisor. // The final remainder will be set into the global variable rem16u @@ -9411,50 +9377,50 @@ divr16u: { .label dividend = $1b .label quotient = 4 .label return = 4 - //SEG434 [199] phi from divr16u to divr16u::@1 [phi:divr16u->divr16u::@1] - //SEG435 [199] phi (byte) divr16u::i#2 = (byte) 0 [phi:divr16u->divr16u::@1#0] -- vbuxx=vbuc1 + //SEG433 [198] phi from divr16u to divr16u::@1 [phi:divr16u->divr16u::@1] + //SEG434 [198] phi (byte) divr16u::i#2 = (byte) 0 [phi:divr16u->divr16u::@1#0] -- vbuxx=vbuc1 ldx #0 - //SEG436 [199] phi (word) divr16u::quotient#3 = (byte) 0 [phi:divr16u->divr16u::@1#1] -- vwuz1=vbuc1 + //SEG435 [198] phi (word) divr16u::quotient#3 = (byte) 0 [phi:divr16u->divr16u::@1#1] -- vwuz1=vbuc1 txa sta quotient sta quotient+1 - //SEG437 [199] phi (word) divr16u::dividend#2 = (word) divr16u::dividend#1 [phi:divr16u->divr16u::@1#2] -- register_copy - //SEG438 [199] phi (word) divr16u::rem#4 = (byte) 0 [phi:divr16u->divr16u::@1#3] -- vwuz1=vbuc1 + //SEG436 [198] phi (word) divr16u::dividend#2 = (word) divr16u::dividend#1 [phi:divr16u->divr16u::@1#2] -- register_copy + //SEG437 [198] phi (word) divr16u::rem#4 = (byte) 0 [phi:divr16u->divr16u::@1#3] -- vwuz1=vbuc1 sta rem sta rem+1 - //SEG439 [199] phi from divr16u::@3 to divr16u::@1 [phi:divr16u::@3->divr16u::@1] - //SEG440 [199] phi (byte) divr16u::i#2 = (byte) divr16u::i#1 [phi:divr16u::@3->divr16u::@1#0] -- register_copy - //SEG441 [199] phi (word) divr16u::quotient#3 = (word) divr16u::return#0 [phi:divr16u::@3->divr16u::@1#1] -- register_copy - //SEG442 [199] phi (word) divr16u::dividend#2 = (word) divr16u::dividend#0 [phi:divr16u::@3->divr16u::@1#2] -- register_copy - //SEG443 [199] phi (word) divr16u::rem#4 = (word) divr16u::rem#9 [phi:divr16u::@3->divr16u::@1#3] -- register_copy - //SEG444 divr16u::@1 + //SEG438 [198] phi from divr16u::@3 to divr16u::@1 [phi:divr16u::@3->divr16u::@1] + //SEG439 [198] phi (byte) divr16u::i#2 = (byte) divr16u::i#1 [phi:divr16u::@3->divr16u::@1#0] -- register_copy + //SEG440 [198] phi (word) divr16u::quotient#3 = (word) divr16u::return#0 [phi:divr16u::@3->divr16u::@1#1] -- register_copy + //SEG441 [198] phi (word) divr16u::dividend#2 = (word) divr16u::dividend#0 [phi:divr16u::@3->divr16u::@1#2] -- register_copy + //SEG442 [198] phi (word) divr16u::rem#4 = (word) divr16u::rem#9 [phi:divr16u::@3->divr16u::@1#3] -- register_copy + //SEG443 divr16u::@1 b1: - //SEG445 [200] (word) divr16u::rem#0 ← (word) divr16u::rem#4 << (byte) 1 -- vwuz1=vwuz1_rol_1 + //SEG444 [199] (word) divr16u::rem#0 ← (word) divr16u::rem#4 << (byte) 1 -- vwuz1=vwuz1_rol_1 asl rem rol rem+1 - //SEG446 [201] (byte~) divr16u::$1 ← > (word) divr16u::dividend#2 -- vbuaa=_hi_vwuz1 + //SEG445 [200] (byte~) divr16u::$1 ← > (word) divr16u::dividend#2 -- vbuaa=_hi_vwuz1 lda dividend+1 - //SEG447 [202] (byte~) divr16u::$2 ← (byte~) divr16u::$1 & (byte) $80 -- vbuaa=vbuaa_band_vbuc1 + //SEG446 [201] (byte~) divr16u::$2 ← (byte~) divr16u::$1 & (byte) $80 -- vbuaa=vbuaa_band_vbuc1 and #$80 - //SEG448 [203] if((byte~) divr16u::$2==(byte) 0) goto divr16u::@2 -- vbuaa_eq_0_then_la1 + //SEG447 [202] if((byte~) divr16u::$2==(byte) 0) goto divr16u::@2 -- vbuaa_eq_0_then_la1 cmp #0 beq b2 - //SEG449 divr16u::@4 - //SEG450 [204] (word) divr16u::rem#1 ← (word) divr16u::rem#0 | (byte) 1 -- vwuz1=vwuz1_bor_vbuc1 + //SEG448 divr16u::@4 + //SEG449 [203] (word) divr16u::rem#1 ← (word) divr16u::rem#0 | (byte) 1 -- vwuz1=vwuz1_bor_vbuc1 lda #1 ora rem sta rem - //SEG451 [205] phi from divr16u::@1 divr16u::@4 to divr16u::@2 [phi:divr16u::@1/divr16u::@4->divr16u::@2] - //SEG452 [205] phi (word) divr16u::rem#5 = (word) divr16u::rem#0 [phi:divr16u::@1/divr16u::@4->divr16u::@2#0] -- register_copy - //SEG453 divr16u::@2 + //SEG450 [204] phi from divr16u::@1 divr16u::@4 to divr16u::@2 [phi:divr16u::@1/divr16u::@4->divr16u::@2] + //SEG451 [204] phi (word) divr16u::rem#5 = (word) divr16u::rem#0 [phi:divr16u::@1/divr16u::@4->divr16u::@2#0] -- register_copy + //SEG452 divr16u::@2 b2: - //SEG454 [206] (word) divr16u::dividend#0 ← (word) divr16u::dividend#2 << (byte) 1 -- vwuz1=vwuz1_rol_1 + //SEG453 [205] (word) divr16u::dividend#0 ← (word) divr16u::dividend#2 << (byte) 1 -- vwuz1=vwuz1_rol_1 asl dividend rol dividend+1 - //SEG455 [207] (word) divr16u::quotient#1 ← (word) divr16u::quotient#3 << (byte) 1 -- vwuz1=vwuz1_rol_1 + //SEG454 [206] (word) divr16u::quotient#1 ← (word) divr16u::quotient#3 << (byte) 1 -- vwuz1=vwuz1_rol_1 asl quotient rol quotient+1 - //SEG456 [208] if((word) divr16u::rem#5<(const word) div16u::divisor#0) goto divr16u::@3 -- vwuz1_lt_vwuc1_then_la1 + //SEG455 [207] if((word) divr16u::rem#5<(const word) div16u::divisor#0) goto divr16u::@3 -- vwuz1_lt_vwuc1_then_la1 lda rem+1 cmp #>div16u.divisor bcc b3 @@ -9463,13 +9429,13 @@ divr16u: { cmp #div16u.divisor sta rem+1 - //SEG460 [211] phi from divr16u::@2 divr16u::@5 to divr16u::@3 [phi:divr16u::@2/divr16u::@5->divr16u::@3] - //SEG461 [211] phi (word) divr16u::return#0 = (word) divr16u::quotient#1 [phi:divr16u::@2/divr16u::@5->divr16u::@3#0] -- register_copy - //SEG462 [211] phi (word) divr16u::rem#9 = (word) divr16u::rem#5 [phi:divr16u::@2/divr16u::@5->divr16u::@3#1] -- register_copy - //SEG463 divr16u::@3 + //SEG459 [210] phi from divr16u::@2 divr16u::@5 to divr16u::@3 [phi:divr16u::@2/divr16u::@5->divr16u::@3] + //SEG460 [210] phi (word) divr16u::return#0 = (word) divr16u::quotient#1 [phi:divr16u::@2/divr16u::@5->divr16u::@3#0] -- register_copy + //SEG461 [210] phi (word) divr16u::rem#9 = (word) divr16u::rem#5 [phi:divr16u::@2/divr16u::@5->divr16u::@3#1] -- register_copy + //SEG462 divr16u::@3 b3: - //SEG464 [212] (byte) divr16u::i#1 ← ++ (byte) divr16u::i#2 -- vbuxx=_inc_vbuxx + //SEG463 [211] (byte) divr16u::i#1 ← ++ (byte) divr16u::i#2 -- vbuxx=_inc_vbuxx inx - //SEG465 [213] if((byte) divr16u::i#1!=(byte) $10) goto divr16u::@1 -- vbuxx_neq_vbuc1_then_la1 + //SEG464 [212] if((byte) divr16u::i#1!=(byte) $10) goto divr16u::@1 -- vbuxx_neq_vbuc1_then_la1 cpx #$10 bne b1 - //SEG466 divr16u::@return - //SEG467 [214] return + //SEG465 divr16u::@return + //SEG466 [213] return rts } // "char buf16[16]" is the normal way -- not supported -- https://gitlab.com/camelot/kickc/issues/162 diff --git a/src/test/ref/sandbox.sym b/src/test/ref/sandbox.sym index 0772f695e..8ecfdd6f2 100644 --- a/src/test/ref/sandbox.sym +++ b/src/test/ref/sandbox.sym @@ -36,9 +36,8 @@ (word()) div10((word) div10::val) (word~) div10::$0 $0 zp ZP_WORD:33 4.0 (word~) div10::$2 $2 zp ZP_WORD:35 4.0 -(word~) div10::$3 $3 zp ZP_WORD:4 4.0 -(word~) div10::$4 $4 zp ZP_WORD:37 4.0 -(word~) div10::$5 $5 zp ZP_WORD:37 4.0 +(word~) div10::$3 $3 zp ZP_WORD:37 4.0 +(word~) div10::$4 $4 zp ZP_WORD:4 4.0 (label) div10::@return (word) div10::return (word) div10::return#0 return zp ZP_WORD:4 34.33333333333333 @@ -46,7 +45,7 @@ (word) div10::val (word) div10::val#0 val zp ZP_WORD:33 3.0 (word) div10::val#1 val#1 zp ZP_WORD:35 3.0 -(word) div10::val#2 val#2 zp ZP_WORD:4 2.0 +(word) div10::val#2 val#2 zp ZP_WORD:37 3.0 (word) div10::val#3 val#3 zp ZP_WORD:4 4.0 (word) div10::val#4 val#4 zp ZP_WORD:2 103.0 (word()) div16u((word) div16u::dividend , (word) div16u::divisor) @@ -303,7 +302,7 @@ (const byte*) zp2#0 zp2 = (byte*) 98 zp ZP_WORD:2 [ main::u#11 main::u#2 myprintf::w1#6 myprintf::w1#0 myprintf::w1#1 div16u::dividend#0 main::u#15 main::u#4 div10::val#4 ] -zp ZP_WORD:4 [ myprintf::w2#7 myprintf::w2#0 myprintf::w2#1 main::v#1 main::v#2 div16u::return#2 div16u::return#0 div10::return#2 div10::return#0 divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 div10::$3 div10::val#2 div10::val#3 ] +zp ZP_WORD:4 [ myprintf::w2#7 myprintf::w2#0 myprintf::w2#1 main::v#1 main::v#2 div16u::return#2 div16u::return#0 div10::return#2 div10::return#0 divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 div10::$4 div10::val#3 ] zp ZP_WORD:6 [ myprintf::w3#7 myprintf::w3#0 myprintf::w3#1 main::$3 main::$12 main::$2 main::$11 ] zp ZP_WORD:8 [ myprintf::str#10 myprintf::str#5 myprintf::str#0 ] zp ZP_BYTE:10 [ myprintf::bFormat#10 myprintf::bFormat#4 ] @@ -341,6 +340,6 @@ reg byte a [ utoa::$16 ] reg byte a [ utoa::$17 ] zp ZP_WORD:33 [ div10::$0 div10::val#0 ] zp ZP_WORD:35 [ div10::$2 div10::val#1 ] -zp ZP_WORD:37 [ div10::$4 div10::$5 ] +zp ZP_WORD:37 [ div10::$3 div10::val#2 ] reg byte a [ divr16u::$1 ] reg byte a [ divr16u::$2 ]