diff --git a/src/test/ref/bitmap-plot-1.log b/src/test/ref/bitmap-plot-1.log
index a4d233a6b..69ff12fc4 100644
--- a/src/test/ref/bitmap-plot-1.log
+++ b/src/test/ref/bitmap-plot-1.log
@@ -3530,9 +3530,6 @@ Allocated zp[2]:220 [ main::x#0 ]
 Allocated zp[1]:222 [ frame_cnt ]
 Allocated zp[2]:223 [ memset::str#3 ]
 REGISTER UPLIFT POTENTIAL REGISTERS
-Equivalence Class zp[2]:186 [ main::$7 ] has ALU potential.
-Equivalence Class zp[2]:206 [ main::$11 ] has ALU potential.
-Equivalence Class zp[1]:123 [ bitmap_init::$4 ] has ALU potential.
 Statement [1] frame_cnt = 1 [ frame_cnt ] (  [ frame_cnt ] { }  ) always clobbers reg byte a 
 Statement [5] *BG_COLOR = WHITE [ frame_cnt ] (  [ frame_cnt ] { }  ) always clobbers reg byte a 
 Statement [6] if(0==frame_cnt) goto irq::@1 [ frame_cnt ] (  [ frame_cnt ] { }  ) always clobbers reg byte a 
@@ -3821,7 +3818,7 @@ Potential registers zp[2]:172 [ main::cos_x#0 ] : zp[2]:172 ,
 Potential registers zp[4]:174 [ mul16s::return#3 ] : zp[4]:174 , 
 Potential registers zp[4]:178 [ main::xpos#0 ] : zp[4]:178 , 
 Potential registers zp[4]:182 [ main::$6 ] : zp[4]:182 , 
-Potential registers zp[2]:186 [ main::$7 ] : zp[2]:186 , reg byte alu , 
+Potential registers zp[2]:186 [ main::$7 ] : zp[2]:186 , 
 Potential registers zp[2]:220 [ main::x#0 ] : zp[2]:220 , 
 Potential registers zp[2]:188 [ main::$20 ] : zp[2]:188 , 
 Potential registers zp[2]:190 [ main::$22 ] : zp[2]:190 , 
@@ -3829,7 +3826,7 @@ Potential registers zp[2]:192 [ main::sin_y#0 ] : zp[2]:192 ,
 Potential registers zp[4]:194 [ mul16s::return#4 ] : zp[4]:194 , 
 Potential registers zp[4]:198 [ main::ypos#0 ] : zp[4]:198 , 
 Potential registers zp[4]:202 [ main::$10 ] : zp[4]:202 , 
-Potential registers zp[2]:206 [ main::$11 ] : zp[2]:206 , reg byte alu , 
+Potential registers zp[2]:206 [ main::$11 ] : zp[2]:206 , 
 Potential registers zp[2]:218 [ main::y#0 ] : zp[2]:218 , 
 Potential registers zp[2]:157 [ bitmap_plot::x#0 ] : zp[2]:157 , 
 Potential registers zp[1]:110 [ bitmap_plot::y#0 ] : zp[1]:110 , reg byte a , reg byte x , reg byte y , 
@@ -3840,7 +3837,7 @@ Potential registers zp[4]:115 [ mul16s::return#0 ] : zp[4]:115 ,
 Potential registers zp[4]:119 [ sin16s_gen2::$6 ] : zp[4]:119 , 
 Potential registers zp[2]:150 [ sin16s_gen2::$8 ] : zp[2]:150 , 
 Potential registers zp[1]:154 [ bitmap_init::$7 ] : zp[1]:154 , reg byte a , reg byte x , reg byte y , 
-Potential registers zp[1]:123 [ bitmap_init::$4 ] : zp[1]:123 , reg byte a , reg byte x , reg byte y , reg byte alu , 
+Potential registers zp[1]:123 [ bitmap_init::$4 ] : zp[1]:123 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:124 [ bitmap_init::$5 ] : zp[1]:124 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:125 [ bitmap_init::$6 ] : zp[1]:125 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[4]:54 [ mul16u::return#3 ] : zp[4]:54 , 
@@ -3911,7 +3908,7 @@ Uplifting [sin16s] best 27204 combination zp[4]:38 [ sin16s::x#6 sin16s::x#4 sin
 Uplifting [mul16s] best 27204 combination zp[4]:42 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 ] zp[2]:58 [ mul16s::$6 ] zp[2]:60 [ mul16s::$11 ] zp[2]:62 [ mul16s::$9 ] zp[2]:64 [ mul16s::$12 ] zp[2]:100 [ mul16s::a#3 mul16s::a#0 ] zp[4]:102 [ mul16s::return#1 ] zp[4]:115 [ mul16s::return#0 ] zp[2]:141 [ mul16s::b#3 mul16s::b#2 mul16s::b#1 ] zp[4]:174 [ mul16s::return#3 ] zp[4]:194 [ mul16s::return#4 ] 
 Uplifting [memset] best 27188 combination zp[2]:50 [ memset::dst#2 memset::dst#4 memset::dst#1 ] zp[2]:135 [ memset::end#0 ] reg byte x [ memset::c#4 ] zp[2]:148 [ memset::num#2 ] zp[2]:223 [ memset::str#3 ] 
 Uplifting [bitmap_init] best 26738 combination zp[2]:95 [ bitmap_init::yoffs#2 bitmap_init::yoffs#4 bitmap_init::yoffs#1 ] reg byte a [ bitmap_init::bits#3 bitmap_init::bits#4 bitmap_init::bits#1 ] reg byte x [ bitmap_init::x#2 bitmap_init::x#1 ] reg byte x [ bitmap_init::y#2 bitmap_init::y#1 ] reg byte a [ bitmap_init::$4 ] zp[1]:124 [ bitmap_init::$5 ] zp[1]:125 [ bitmap_init::$6 ] zp[1]:154 [ bitmap_init::$7 ] 
-Limited combination testing to 100 combinations of 15360 possible.
+Limited combination testing to 100 combinations of 12288 possible.
 Uplifting [bitmap_plot] best 26699 combination reg byte x [ bitmap_plot::y#0 ] zp[2]:126 [ bitmap_plot::$1 ] reg byte x [ bitmap_plot::$2 ] zp[2]:139 [ bitmap_plot::plotter#1 ] zp[2]:155 [ bitmap_plot::plotter#0 ] zp[2]:157 [ bitmap_plot::x#0 ] 
 Uplifting [sin16s_gen2] best 26699 combination zp[2]:106 [ sin16s_gen2::i#2 sin16s_gen2::i#1 ] zp[4]:119 [ sin16s_gen2::$6 ] zp[4]:143 [ sin16s_gen2::x#2 sin16s_gen2::x#1 ] zp[2]:150 [ sin16s_gen2::$8 ] zp[2]:152 [ sin16s_gen2::sintab#2 sin16s_gen2::sintab#0 ] zp[4]:214 [ sin16s_gen2::step#0 ] 
 Uplifting [div32u16u] best 26699 combination zp[2]:133 [ div32u16u::quotient_lo#0 ] zp[2]:159 [ div32u16u::quotient_hi#0 ] zp[4]:161 [ div32u16u::return#1 ] zp[4]:208 [ div32u16u::return#0 ] 
diff --git a/src/test/ref/bitmap-plot-2.log b/src/test/ref/bitmap-plot-2.log
index 7e975922e..5765e2a26 100644
--- a/src/test/ref/bitmap-plot-2.log
+++ b/src/test/ref/bitmap-plot-2.log
@@ -3735,7 +3735,6 @@ Allocated zp[2]:219 [ main::x#0 ]
 Allocated zp[1]:221 [ frame_cnt ]
 Allocated zp[2]:222 [ memset::str#3 ]
 REGISTER UPLIFT POTENTIAL REGISTERS
-Equivalence Class zp[1]:123 [ bitmap_init::$4 ] has ALU potential.
 Statement [1] frame_cnt = 1 [ frame_cnt ] (  [ frame_cnt ] { }  ) always clobbers reg byte a 
 Statement [5] *BG_COLOR = WHITE [ frame_cnt ] (  [ frame_cnt ] { }  ) always clobbers reg byte a 
 Statement [6] if(0==frame_cnt) goto irq::@1 [ frame_cnt ] (  [ frame_cnt ] { }  ) always clobbers reg byte a 
@@ -4064,7 +4063,7 @@ Potential registers zp[4]:115 [ mul16s::return#0 ] : zp[4]:115 ,
 Potential registers zp[4]:119 [ sin16s_gen2::$6 ] : zp[4]:119 , 
 Potential registers zp[2]:150 [ sin16s_gen2::$8 ] : zp[2]:150 , 
 Potential registers zp[1]:154 [ bitmap_init::$7 ] : zp[1]:154 , reg byte a , reg byte x , reg byte y , 
-Potential registers zp[1]:123 [ bitmap_init::$4 ] : zp[1]:123 , reg byte a , reg byte x , reg byte y , reg byte alu , 
+Potential registers zp[1]:123 [ bitmap_init::$4 ] : zp[1]:123 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:124 [ bitmap_init::$5 ] : zp[1]:124 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:125 [ bitmap_init::$6 ] : zp[1]:125 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[4]:54 [ mul16u::return#3 ] : zp[4]:54 , 
@@ -4135,7 +4134,7 @@ Uplifting [sin16s] best 27104 combination zp[4]:38 [ sin16s::x#6 sin16s::x#4 sin
 Uplifting [mul16s] best 27104 combination zp[4]:42 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 ] zp[2]:58 [ mul16s::$6 ] zp[2]:60 [ mul16s::$11 ] zp[2]:62 [ mul16s::$9 ] zp[2]:64 [ mul16s::$12 ] zp[2]:100 [ mul16s::a#3 mul16s::a#2 mul16s::a#1 mul16s::a#0 ] zp[4]:102 [ mul16s::return#1 ] zp[4]:115 [ mul16s::return#0 ] zp[2]:141 [ mul16s::b#3 mul16s::b#2 mul16s::b#1 ] zp[4]:171 [ mul16s::return#3 ] zp[4]:185 [ mul16s::return#4 ] 
 Uplifting [memset] best 27088 combination zp[2]:50 [ memset::dst#2 memset::dst#4 memset::dst#1 ] zp[2]:135 [ memset::end#0 ] reg byte x [ memset::c#4 ] zp[2]:148 [ memset::num#2 ] zp[2]:222 [ memset::str#3 ] 
 Uplifting [bitmap_init] best 26638 combination zp[2]:95 [ bitmap_init::yoffs#2 bitmap_init::yoffs#4 bitmap_init::yoffs#1 ] reg byte a [ bitmap_init::bits#3 bitmap_init::bits#4 bitmap_init::bits#1 ] reg byte x [ bitmap_init::x#2 bitmap_init::x#1 ] reg byte x [ bitmap_init::y#2 bitmap_init::y#1 ] reg byte a [ bitmap_init::$4 ] zp[1]:124 [ bitmap_init::$5 ] zp[1]:125 [ bitmap_init::$6 ] zp[1]:154 [ bitmap_init::$7 ] 
-Limited combination testing to 100 combinations of 15360 possible.
+Limited combination testing to 100 combinations of 12288 possible.
 Uplifting [bitmap_plot] best 26599 combination reg byte x [ bitmap_plot::y#0 ] zp[2]:126 [ bitmap_plot::$1 ] reg byte x [ bitmap_plot::$2 ] zp[2]:139 [ bitmap_plot::plotter#1 ] zp[2]:155 [ bitmap_plot::plotter#0 ] zp[2]:157 [ bitmap_plot::x#0 ] 
 Uplifting [sin16s_gen2] best 26599 combination zp[2]:106 [ sin16s_gen2::i#2 sin16s_gen2::i#1 ] zp[4]:119 [ sin16s_gen2::$6 ] zp[4]:143 [ sin16s_gen2::x#2 sin16s_gen2::x#1 ] zp[2]:150 [ sin16s_gen2::$8 ] zp[2]:152 [ sin16s_gen2::sintab#2 sin16s_gen2::sintab#0 ] zp[4]:211 [ sin16s_gen2::step#0 ] 
 Uplifting [div32u16u] best 26599 combination zp[2]:133 [ div32u16u::quotient_lo#0 ] zp[2]:159 [ div32u16u::quotient_hi#0 ] zp[4]:162 [ div32u16u::return#1 ] zp[4]:195 [ div32u16u::return#0 ] 
diff --git a/src/test/ref/c64dtv-gfxexplorer.log b/src/test/ref/c64dtv-gfxexplorer.log
index 245fcf34d..9438beef8 100644
--- a/src/test/ref/c64dtv-gfxexplorer.log
+++ b/src/test/ref/c64dtv-gfxexplorer.log
@@ -12054,7 +12054,6 @@ Allocated mem[2] [ get_VICII_charset::return#2 ]
 Zero-page exhausted. Moving allocation to main memory gfx_mode::$42
 Allocated mem[2] [ gfx_mode::$42 ]
 REGISTER UPLIFT POTENTIAL REGISTERS
-Equivalence Class zp[1]:177 [ bitmap_init::$4 ] has ALU potential.
 Statement [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] (  [ ] { }  ) always clobbers reg byte a 
 Statement [2] *PROCPORT = PROCPORT_RAM_IO [ ] (  [ ] { }  ) always clobbers reg byte a 
 Statement [3] *DTV_FEATURE = DTV_FEATURE_ENABLE [ ] (  [ ] { }  ) always clobbers reg byte a 
@@ -12783,7 +12782,7 @@ Potential registers zp[1]:4 [ keyboard_event_scan::$16 ] : zp[1]:4 , reg byte a
 Potential registers zp[1]:5 [ keyboard_event_scan::event_type#0 ] : zp[1]:5 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:6 [ keyboard_event_scan::$23 ] : zp[1]:6 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:223 [ bitmap_init::$7 ] : zp[1]:223 , reg byte a , reg byte x , reg byte y , 
-Potential registers zp[1]:177 [ bitmap_init::$4 ] : zp[1]:177 , reg byte a , reg byte x , reg byte y , reg byte alu , 
+Potential registers zp[1]:177 [ bitmap_init::$4 ] : zp[1]:177 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:178 [ bitmap_init::$5 ] : zp[1]:178 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:179 [ bitmap_init::$6 ] : zp[1]:179 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[2]:180 [ abs_u16::return#0 ] : zp[2]:180 , 
@@ -12905,7 +12904,7 @@ Uplifting [form_mode] best 15097870 combination reg byte a [ form_mode::$11 ] zp
 Limited combination testing to 20 combinations of 24 possible.
 Uplifting [render_preset_name] best 15097536 combination reg byte a [ render_preset_name::idx#10 render_preset_name::idx#0 render_preset_name::idx#1 ] zp[2]:118 [ render_preset_name::name#13 ] 
 Uplifting [bitmap_init] best 15097306 combination zp[2]:134 [ bitmap_init::yoffs#2 bitmap_init::yoffs#4 bitmap_init::yoffs#1 ] reg byte a [ bitmap_init::bits#3 bitmap_init::bits#4 bitmap_init::bits#1 ] reg byte x [ bitmap_init::x#2 bitmap_init::x#1 ] zp[1]:159 [ bitmap_init::y#2 bitmap_init::y#1 ] zp[1]:177 [ bitmap_init::$4 ] zp[1]:178 [ bitmap_init::$5 ] zp[1]:179 [ bitmap_init::$6 ] zp[1]:223 [ bitmap_init::$7 ] 
-Limited combination testing to 20 combinations of 15360 possible.
+Limited combination testing to 20 combinations of 12288 possible.
 Uplifting [dtvSetCpuBankSegment1] best 15096967 combination reg byte a [ dtvSetCpuBankSegment1::cpuBankIdx#13 dtvSetCpuBankSegment1::cpuBankIdx#1 dtvSetCpuBankSegment1::cpuBankIdx#11 ] 
 Uplifting [gfx_init_screen2] best 15095767 combination reg byte a [ gfx_init_screen2::$0 ] reg byte a [ gfx_init_screen2::$3 ] zp[1]:169 [ gfx_init_screen2::$4 ] zp[1]:193 [ gfx_init_screen2::cx#2 gfx_init_screen2::cx#1 ] zp[1]:202 [ gfx_init_screen2::col#0 ] zp[2]:211 [ gfx_init_screen2::ch#2 gfx_init_screen2::ch#3 gfx_init_screen2::ch#1 ] zp[1]:216 [ gfx_init_screen2::col2#0 ] zp[1]:229 [ gfx_init_screen2::cy#4 gfx_init_screen2::cy#1 ] 
 Limited combination testing to 20 combinations of 2304 possible.
diff --git a/src/test/ref/c64dtv-gfxmodes.log b/src/test/ref/c64dtv-gfxmodes.log
index 672fbcf4b..0945ac309 100644
--- a/src/test/ref/c64dtv-gfxmodes.log
+++ b/src/test/ref/c64dtv-gfxmodes.log
@@ -11375,7 +11375,6 @@ Allocated mem[2] [ bitmap_screen#14 bitmap_screen#15 ]
 Zero-page exhausted. Moving allocation to main memory memset::str#4
 Allocated mem[2] [ memset::str#4 ]
 REGISTER UPLIFT POTENTIAL REGISTERS
-Equivalence Class zp[1]:141 [ bitmap_init::$4 ] has ALU potential.
 Statement [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] (  [ ] { }  ) always clobbers reg byte a 
 Statement [2] *PROCPORT = PROCPORT_RAM_IO [ ] (  [ ] { }  ) always clobbers reg byte a 
 Statement [3] *DTV_FEATURE = DTV_FEATURE_ENABLE [ ] (  [ ] { }  ) always clobbers reg byte a 
@@ -12342,7 +12341,7 @@ Potential registers zp[1]:63 [ mode_ctrl::$24 ] : zp[1]:63 , reg byte a , reg by
 Potential registers zp[1]:64 [ keyboard_key_pressed::return#21 ] : zp[1]:64 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:65 [ mode_ctrl::$28 ] : zp[1]:65 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:233 [ bitmap_init::$7 ] : zp[1]:233 , reg byte a , reg byte x , reg byte y , 
-Potential registers zp[1]:141 [ bitmap_init::$4 ] : zp[1]:141 , reg byte a , reg byte x , reg byte y , reg byte alu , 
+Potential registers zp[1]:141 [ bitmap_init::$4 ] : zp[1]:141 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:142 [ bitmap_init::$5 ] : zp[1]:142 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:143 [ bitmap_init::$6 ] : zp[1]:143 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[2]:144 [ abs_u16::return#0 ] : zp[2]:144 , 
@@ -12417,7 +12416,7 @@ Limited combination testing to 20 combinations of 786432 possible.
 Uplifting [mode_sixsfred] best 3439990 combination zp[2]:92 [ mode_sixsfred::gfxb#2 mode_sixsfred::gfxb#3 mode_sixsfred::gfxb#1 ] reg byte x [ mode_sixsfred::bx#2 mode_sixsfred::bx#1 ] reg byte x [ mode_sixsfred::cx#2 mode_sixsfred::cx#1 ] reg byte a [ mode_sixsfred::$2 ] zp[1]:134 [ mode_sixsfred::$3 ] zp[1]:135 [ mode_sixsfred::$6 ] zp[1]:136 [ mode_sixsfred::row#0 ] zp[1]:158 [ mode_sixsfred::ax#2 mode_sixsfred::ax#1 ] zp[2]:178 [ mode_sixsfred::col#2 mode_sixsfred::col#3 mode_sixsfred::col#1 ] zp[2]:180 [ mode_sixsfred::gfxa#2 mode_sixsfred::gfxa#3 mode_sixsfred::gfxa#1 ] zp[1]:243 [ mode_sixsfred::i#2 mode_sixsfred::i#1 ] zp[1]:251 [ mode_sixsfred::cy#4 mode_sixsfred::cy#1 ] mem[1] [ mode_sixsfred::ay#4 mode_sixsfred::ay#1 ] mem[1] [ mode_sixsfred::by#4 mode_sixsfred::by#1 ] 
 Limited combination testing to 20 combinations of 65536 possible.
 Uplifting [bitmap_init] best 3437690 combination zp[2]:82 [ bitmap_init::yoffs#2 bitmap_init::yoffs#4 bitmap_init::yoffs#1 ] reg byte a [ bitmap_init::bits#3 bitmap_init::bits#4 bitmap_init::bits#1 ] reg byte x [ bitmap_init::x#2 bitmap_init::x#1 ] zp[1]:99 [ bitmap_init::y#2 bitmap_init::y#1 ] zp[1]:141 [ bitmap_init::$4 ] zp[1]:142 [ bitmap_init::$5 ] zp[1]:143 [ bitmap_init::$6 ] zp[1]:233 [ bitmap_init::$7 ] 
-Limited combination testing to 20 combinations of 15360 possible.
+Limited combination testing to 20 combinations of 12288 possible.
 Uplifting [mode_stdchar] best 3425690 combination reg byte a [ mode_stdchar::$2 ] reg byte a [ mode_stdchar::$3 ] zp[1]:102 [ mode_stdchar::$4 ] zp[1]:103 [ mode_stdchar::$6 ] zp[1]:104 [ mode_stdchar::$7 ] zp[1]:162 [ mode_stdchar::cx#2 mode_stdchar::cx#1 ] zp[2]:183 [ mode_stdchar::col#2 mode_stdchar::col#3 mode_stdchar::col#1 ] zp[1]:209 [ mode_stdchar::$5 ] zp[2]:224 [ mode_stdchar::ch#2 mode_stdchar::ch#3 mode_stdchar::ch#1 ] zp[1]:234 [ mode_stdchar::i#2 mode_stdchar::i#1 ] zp[1]:246 [ mode_stdchar::cy#4 mode_stdchar::cy#1 ] 
 Limited combination testing to 20 combinations of 36864 possible.
 Uplifting [mode_ecmchar] best 3413690 combination reg byte a [ mode_ecmchar::$2 ] reg byte a [ mode_ecmchar::$3 ] zp[1]:107 [ mode_ecmchar::$4 ] zp[1]:108 [ mode_ecmchar::$6 ] zp[1]:109 [ mode_ecmchar::$7 ] zp[1]:163 [ mode_ecmchar::cx#2 mode_ecmchar::cx#1 ] zp[2]:185 [ mode_ecmchar::col#2 mode_ecmchar::col#3 mode_ecmchar::col#1 ] zp[1]:210 [ mode_ecmchar::$5 ] zp[2]:226 [ mode_ecmchar::ch#2 mode_ecmchar::ch#3 mode_ecmchar::ch#1 ] zp[1]:235 [ mode_ecmchar::i#2 mode_ecmchar::i#1 ] zp[1]:247 [ mode_ecmchar::cy#4 mode_ecmchar::cy#1 ] 
diff --git a/src/test/ref/examples/c64/rotate/rotate.log b/src/test/ref/examples/c64/rotate/rotate.log
index a1bffd1d9..4d2ecadc5 100644
--- a/src/test/ref/examples/c64/rotate/rotate.log
+++ b/src/test/ref/examples/c64/rotate/rotate.log
@@ -2143,7 +2143,6 @@ Allocated zp[2]:94 [ anim::yr#0 ]
 Allocated zp[1]:96 [ anim::x#0 ]
 Allocated zp[1]:97 [ anim::angle#9 anim::angle#1 ]
 REGISTER UPLIFT POTENTIAL REGISTERS
-Equivalence Class zp[1]:48 [ anim::$21 ] has ALU potential.
 Statement [7] *((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_SPRITES_ENABLE) = $ff [ ] ( init:1 [ ] { }  ) always clobbers reg byte a 
 Statement [9] init::sprites_ptr#0[init::i#2] = (char)SPRITE/$40 [ init::i#2 ] ( init:1 [ init::i#2 ] { }  ) always clobbers reg byte a 
 Removing always clobbered register reg byte a as potential for zp[1]:72 [ init::i#2 init::i#1 ]
@@ -2399,7 +2398,7 @@ Potential registers zp[2]:77 [ anim::yr#1 ] : zp[2]:77 ,
 Potential registers zp[1]:59 [ anim::$14 ] : zp[1]:59 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[2]:70 [ anim::xpos#0 ] : zp[2]:70 , 
 Potential registers zp[1]:47 [ anim::$17 ] : zp[1]:47 , reg byte a , reg byte x , reg byte y , 
-Potential registers zp[1]:48 [ anim::$21 ] : zp[1]:48 , reg byte a , reg byte x , reg byte y , reg byte alu , 
+Potential registers zp[1]:48 [ anim::$21 ] : zp[1]:48 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:67 [ anim::ypos#0 ] : zp[1]:67 , reg byte x , reg byte y , 
 Potential registers zp[1]:60 [ anim::i2#0 ] : zp[1]:60 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:49 [ anim::$24 ] : zp[1]:49 , reg byte a , reg byte x , reg byte y , 
@@ -2446,38 +2445,36 @@ Uplifting [print_uchar_at] best 44175 combination reg byte a [ print_uchar_at::$
 Uplifting [mulf8u_prepared] best 44169 combination reg byte a [ mulf8u_prepared::b#0 ] zp[2]:13 [ mulf8u_prepared::return#0 ] zp[2]:15 [ mulf8u_prepared::return#2 ] 
 Uplifting [mulf8s_prepared] best 44145 combination zp[2]:10 [ mulf8s_prepared::m#4 mulf8s_prepared::m#5 mulf8s_prepared::m#1 mulf8s_prepared::m#0 mulf8s_prepared::m#2 ] reg byte a [ mulf8s_prepared::$6 ] reg byte a [ mulf8s_prepared::$11 ] reg byte a [ mulf8s_prepared::$9 ] reg byte a [ mulf8s_prepared::$12 ] zp[1]:24 [ mulf8s_prepared::b#4 mulf8s_prepared::b#1 mulf8s_prepared::b#3 mulf8s_prepared::b#0 mulf8s_prepared::b#2 ] 
 Limited combination testing to 100 combinations of 512 possible.
-Uplifting [anim] best 42745 combination zp[1]:29 [ anim::sprite_msb#10 anim::sprite_msb#5 anim::sprite_msb#1 anim::sprite_msb#2 ] zp[2]:35 [ anim::$4 ] zp[2]:37 [ anim::$6 ] zp[2]:39 [ anim::$9 ] zp[2]:41 [ anim::$10 ] zp[2]:43 [ anim::$11 ] zp[2]:45 [ anim::$12 ] reg byte a [ anim::$17 ] reg byte a [ anim::$21 ] reg byte a [ anim::$24 ] zp[1]:53 [ anim::i#10 anim::i#1 ] zp[1]:59 [ anim::$14 ] zp[1]:60 [ anim::i2#0 ] zp[1]:67 [ anim::ypos#0 ] zp[2]:68 [ anim::xr#1 ] zp[2]:70 [ anim::xpos#0 ] zp[2]:77 [ anim::yr#1 ] zp[1]:79 [ anim::y#0 ] zp[4]:84 [ anim::$26 ] zp[4]:88 [ anim::cyclecount#0 ] zp[2]:92 [ anim::xr#0 ] zp[2]:94 [ anim::yr#0 ] zp[1]:96 [ anim::x#0 ] zp[1]:97 [ anim::angle#9 anim::angle#1 ] 
-Limited combination testing to 100 combinations of 3840 possible.
-Uplifting [mulf_init] best 42515 combination zp[2]:25 [ mulf_init::sqr#3 mulf_init::sqr#4 mulf_init::sqr#1 mulf_init::sqr#2 ] zp[2]:30 [ mulf_init::sqr2_lo#2 mulf_init::sqr2_lo#1 ] zp[2]:32 [ mulf_init::sqr1_lo#2 mulf_init::sqr1_lo#1 ] reg byte x [ mulf_init::x_2#3 mulf_init::x_2#2 mulf_init::x_2#1 ] reg byte a [ mulf_init::$1 ] reg byte a [ mulf_init::$4 ] reg byte a [ mulf_init::$5 ] zp[1]:54 [ mulf_init::x_255#2 mulf_init::x_255#1 ] zp[1]:55 [ mulf_init::dir#2 mulf_init::dir#4 ] zp[1]:56 [ mulf_init::c#2 mulf_init::c#1 ] zp[2]:57 [ mulf_init::sqr2_hi#2 mulf_init::sqr2_hi#1 ] zp[2]:61 [ mulf_init::sqr1_hi#2 mulf_init::sqr1_hi#1 ] 
+Uplifting [anim] best 42145 combination zp[1]:29 [ anim::sprite_msb#10 anim::sprite_msb#5 anim::sprite_msb#1 anim::sprite_msb#2 ] zp[2]:35 [ anim::$4 ] zp[2]:37 [ anim::$6 ] zp[2]:39 [ anim::$9 ] zp[2]:41 [ anim::$10 ] zp[2]:43 [ anim::$11 ] zp[2]:45 [ anim::$12 ] reg byte a [ anim::$17 ] reg byte a [ anim::$21 ] reg byte a [ anim::$24 ] zp[1]:53 [ anim::i#10 anim::i#1 ] reg byte a [ anim::$14 ] zp[1]:60 [ anim::i2#0 ] zp[1]:67 [ anim::ypos#0 ] zp[2]:68 [ anim::xr#1 ] zp[2]:70 [ anim::xpos#0 ] zp[2]:77 [ anim::yr#1 ] zp[1]:79 [ anim::y#0 ] zp[4]:84 [ anim::$26 ] zp[4]:88 [ anim::cyclecount#0 ] zp[2]:92 [ anim::xr#0 ] zp[2]:94 [ anim::yr#0 ] zp[1]:96 [ anim::x#0 ] zp[1]:97 [ anim::angle#9 anim::angle#1 ] 
+Limited combination testing to 100 combinations of 3072 possible.
+Uplifting [mulf_init] best 41915 combination zp[2]:25 [ mulf_init::sqr#3 mulf_init::sqr#4 mulf_init::sqr#1 mulf_init::sqr#2 ] zp[2]:30 [ mulf_init::sqr2_lo#2 mulf_init::sqr2_lo#1 ] zp[2]:32 [ mulf_init::sqr1_lo#2 mulf_init::sqr1_lo#1 ] reg byte x [ mulf_init::x_2#3 mulf_init::x_2#2 mulf_init::x_2#1 ] reg byte a [ mulf_init::$1 ] reg byte a [ mulf_init::$4 ] reg byte a [ mulf_init::$5 ] zp[1]:54 [ mulf_init::x_255#2 mulf_init::x_255#1 ] zp[1]:55 [ mulf_init::dir#2 mulf_init::dir#4 ] zp[1]:56 [ mulf_init::c#2 mulf_init::c#1 ] zp[2]:57 [ mulf_init::sqr2_hi#2 mulf_init::sqr2_hi#1 ] zp[2]:61 [ mulf_init::sqr1_hi#2 mulf_init::sqr1_hi#1 ] 
 Limited combination testing to 100 combinations of 1024 possible.
-Uplifting [mulf8u_prepare] best 41912 combination reg byte a [ mulf8u_prepare::a#2 mulf8u_prepare::a#3 mulf8u_prepare::a#4 ] 
-Uplifting [print_uint_at] best 41912 combination zp[2]:22 [ print_uint_at::w#2 print_uint_at::w#0 print_uint_at::w#1 ] zp[2]:27 [ print_uint_at::at#2 ] 
-Uplifting [print_ulong_at] best 41912 combination zp[4]:63 [ print_ulong_at::dw#0 ] 
-Uplifting [clock] best 41912 combination zp[4]:73 [ clock::return#0 ] zp[4]:80 [ clock::return#2 ] 
-Uplifting [init] best 41762 combination reg byte x [ init::i#2 init::i#1 ] 
-Uplifting [MOS6526_CIA] best 41762 combination 
-Uplifting [MOS6569_VICII] best 41762 combination 
-Uplifting [MOS6581_SID] best 41762 combination 
-Uplifting [clock_start] best 41762 combination 
-Uplifting [RADIX] best 41762 combination 
-Uplifting [main] best 41762 combination 
-Uplifting [] best 41762 combination 
+Uplifting [mulf8u_prepare] best 41312 combination reg byte a [ mulf8u_prepare::a#2 mulf8u_prepare::a#3 mulf8u_prepare::a#4 ] 
+Uplifting [print_uint_at] best 41312 combination zp[2]:22 [ print_uint_at::w#2 print_uint_at::w#0 print_uint_at::w#1 ] zp[2]:27 [ print_uint_at::at#2 ] 
+Uplifting [print_ulong_at] best 41312 combination zp[4]:63 [ print_ulong_at::dw#0 ] 
+Uplifting [clock] best 41312 combination zp[4]:73 [ clock::return#0 ] zp[4]:80 [ clock::return#2 ] 
+Uplifting [init] best 41162 combination reg byte x [ init::i#2 init::i#1 ] 
+Uplifting [MOS6526_CIA] best 41162 combination 
+Uplifting [MOS6569_VICII] best 41162 combination 
+Uplifting [MOS6581_SID] best 41162 combination 
+Uplifting [clock_start] best 41162 combination 
+Uplifting [RADIX] best 41162 combination 
+Uplifting [main] best 41162 combination 
+Uplifting [] best 41162 combination 
 Attempting to uplift remaining variables inzp[1]:12 [ print_uchar_at::b#2 print_uchar_at::b#0 print_uchar_at::b#1 ]
-Uplifting [print_uchar_at] best 41762 combination zp[1]:12 [ print_uchar_at::b#2 print_uchar_at::b#0 print_uchar_at::b#1 ] 
+Uplifting [print_uchar_at] best 41162 combination zp[1]:12 [ print_uchar_at::b#2 print_uchar_at::b#0 print_uchar_at::b#1 ] 
 Attempting to uplift remaining variables inzp[1]:24 [ mulf8s_prepared::b#4 mulf8s_prepared::b#1 mulf8s_prepared::b#3 mulf8s_prepared::b#0 mulf8s_prepared::b#2 ]
-Uplifting [mulf8s_prepared] best 40561 combination reg byte y [ mulf8s_prepared::b#4 mulf8s_prepared::b#1 mulf8s_prepared::b#3 mulf8s_prepared::b#0 mulf8s_prepared::b#2 ] 
+Uplifting [mulf8s_prepared] best 39961 combination reg byte y [ mulf8s_prepared::b#4 mulf8s_prepared::b#1 mulf8s_prepared::b#3 mulf8s_prepared::b#0 mulf8s_prepared::b#2 ] 
 Attempting to uplift remaining variables inzp[1]:29 [ anim::sprite_msb#10 anim::sprite_msb#5 anim::sprite_msb#1 anim::sprite_msb#2 ]
-Uplifting [anim] best 40561 combination zp[1]:29 [ anim::sprite_msb#10 anim::sprite_msb#5 anim::sprite_msb#1 anim::sprite_msb#2 ] 
+Uplifting [anim] best 39961 combination zp[1]:29 [ anim::sprite_msb#10 anim::sprite_msb#5 anim::sprite_msb#1 anim::sprite_msb#2 ] 
 Attempting to uplift remaining variables inzp[1]:53 [ anim::i#10 anim::i#1 ]
-Uplifting [anim] best 40561 combination zp[1]:53 [ anim::i#10 anim::i#1 ] 
+Uplifting [anim] best 39961 combination zp[1]:53 [ anim::i#10 anim::i#1 ] 
 Attempting to uplift remaining variables inzp[1]:54 [ mulf_init::x_255#2 mulf_init::x_255#1 ]
-Uplifting [mulf_init] best 40441 combination reg byte x [ mulf_init::x_255#2 mulf_init::x_255#1 ] 
+Uplifting [mulf_init] best 39841 combination reg byte x [ mulf_init::x_255#2 mulf_init::x_255#1 ] 
 Attempting to uplift remaining variables inzp[1]:55 [ mulf_init::dir#2 mulf_init::dir#4 ]
-Uplifting [mulf_init] best 40441 combination zp[1]:55 [ mulf_init::dir#2 mulf_init::dir#4 ] 
+Uplifting [mulf_init] best 39841 combination zp[1]:55 [ mulf_init::dir#2 mulf_init::dir#4 ] 
 Attempting to uplift remaining variables inzp[1]:56 [ mulf_init::c#2 mulf_init::c#1 ]
-Uplifting [mulf_init] best 40441 combination zp[1]:56 [ mulf_init::c#2 mulf_init::c#1 ] 
-Attempting to uplift remaining variables inzp[1]:59 [ anim::$14 ]
-Uplifting [anim] best 39841 combination reg byte a [ anim::$14 ] 
+Uplifting [mulf_init] best 39841 combination zp[1]:56 [ mulf_init::c#2 mulf_init::c#1 ] 
 Attempting to uplift remaining variables inzp[1]:60 [ anim::i2#0 ]
 Uplifting [anim] best 39141 combination reg byte x [ anim::i2#0 ] 
 Attempting to uplift remaining variables inzp[1]:67 [ anim::ypos#0 ]
diff --git a/src/test/ref/examples/c64/sinplotter/sine-plotter.log b/src/test/ref/examples/c64/sinplotter/sine-plotter.log
index 3ba2164d0..c931d9bed 100644
--- a/src/test/ref/examples/c64/sinplotter/sine-plotter.log
+++ b/src/test/ref/examples/c64/sinplotter/sine-plotter.log
@@ -3526,7 +3526,6 @@ Allocated zp[4]:181 [ div32u16u::return#0 ]
 Allocated zp[4]:185 [ sin16s_gen2::step#0 ]
 Allocated zp[2]:189 [ memset::str#3 ]
 REGISTER UPLIFT POTENTIAL REGISTERS
-Equivalence Class zp[1]:125 [ bitmap_init::$4 ] has ALU potential.
 Statement [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] (  [ ] { }  ) always clobbers reg byte a 
 Statement [2] *PROCPORT = PROCPORT_RAM_IO [ ] (  [ ] { }  ) always clobbers reg byte a 
 Statement [3] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] (  [ ] { }  ) always clobbers reg byte a 
@@ -3774,7 +3773,7 @@ Potential registers zp[2]:11 [ mul16u::a#3 mul16u::a#6 mul16u::a#2 mul16u::a#0 m
 Potential registers zp[4]:2 [ mul16u::res#2 mul16u::res#6 mul16u::res#1 ] : zp[4]:2 , 
 Potential registers zp[4]:6 [ mul16u::mb#2 mul16u::mb#0 mul16u::mb#1 ] : zp[4]:6 , 
 Potential registers zp[1]:171 [ bitmap_init::$7 ] : zp[1]:171 , reg byte a , reg byte x , reg byte y , 
-Potential registers zp[1]:125 [ bitmap_init::$4 ] : zp[1]:125 , reg byte a , reg byte x , reg byte y , reg byte alu , 
+Potential registers zp[1]:125 [ bitmap_init::$4 ] : zp[1]:125 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:126 [ bitmap_init::$5 ] : zp[1]:126 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:127 [ bitmap_init::$6 ] : zp[1]:127 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[4]:181 [ div32u16u::return#0 ] : zp[4]:181 , 
@@ -3861,7 +3860,7 @@ Uplifting [mul16s] best 30499 combination zp[4]:46 [ mul16s::m#4 mul16s::m#1 mul
 Uplifting [bitmap_plot] best 30430 combination reg byte x [ bitmap_plot::y#2 bitmap_plot::y#0 bitmap_plot::y#1 ] zp[2]:89 [ bitmap_plot::$1 ] reg byte x [ bitmap_plot::$2 ] zp[2]:93 [ bitmap_plot::plotter#1 ] zp[2]:95 [ bitmap_plot::x#2 bitmap_plot::x#0 bitmap_plot::x#1 ] zp[2]:101 [ bitmap_plot::plotter#0 ] 
 Uplifting [memset] best 30414 combination zp[2]:52 [ memset::dst#2 memset::dst#4 memset::dst#1 ] zp[2]:154 [ memset::end#0 ] reg byte x [ memset::c#4 ] zp[2]:163 [ memset::num#2 ] zp[2]:189 [ memset::str#3 ] 
 Uplifting [bitmap_init] best 29964 combination zp[2]:107 [ bitmap_init::yoffs#2 bitmap_init::yoffs#4 bitmap_init::yoffs#1 ] reg byte a [ bitmap_init::bits#3 bitmap_init::bits#4 bitmap_init::bits#1 ] reg byte x [ bitmap_init::x#2 bitmap_init::x#1 ] reg byte x [ bitmap_init::y#2 bitmap_init::y#1 ] reg byte a [ bitmap_init::$4 ] zp[1]:126 [ bitmap_init::$5 ] zp[1]:127 [ bitmap_init::$6 ] zp[1]:171 [ bitmap_init::$7 ] 
-Limited combination testing to 100 combinations of 15360 possible.
+Limited combination testing to 100 combinations of 12288 possible.
 Uplifting [render_sine] best 29884 combination zp[2]:115 [ render_sine::xpos#3 render_sine::xpos#9 render_sine::xpos#1 ] zp[2]:121 [ render_sine::sin_idx#2 render_sine::sin_idx#1 ] zp[2]:138 [ render_sine::$1 ] zp[2]:140 [ render_sine::sin_val#0 ] zp[2]:143 [ render_sine::$4 ] zp[2]:145 [ render_sine::sin2_val#0 ] reg byte x [ render_sine::ypos#0 ] reg byte x [ render_sine::ypos2#0 ] zp[2]:179 [ render_sine::$11 ] 
 Uplifting [sin16s_gen2] best 29884 combination zp[2]:113 [ sin16s_gen2::i#2 sin16s_gen2::i#1 ] zp[4]:134 [ sin16s_gen2::$6 ] zp[4]:158 [ sin16s_gen2::x#2 sin16s_gen2::x#1 ] zp[2]:165 [ sin16s_gen2::$8 ] zp[2]:169 [ sin16s_gen2::sintab#2 sin16s_gen2::sintab#0 ] zp[4]:185 [ sin16s_gen2::step#0 ] 
 Uplifting [div32u16u] best 29884 combination zp[2]:152 [ div32u16u::quotient_lo#0 ] zp[2]:172 [ div32u16u::quotient_hi#0 ] zp[4]:174 [ div32u16u::return#1 ] zp[4]:181 [ div32u16u::return#0 ] 
diff --git a/src/test/ref/examples/c64/sinsprites/sinus-sprites.log b/src/test/ref/examples/c64/sinsprites/sinus-sprites.log
index a7f635f4a..33fbb981f 100644
--- a/src/test/ref/examples/c64/sinsprites/sinus-sprites.log
+++ b/src/test/ref/examples/c64/sinsprites/sinus-sprites.log
@@ -3231,7 +3231,6 @@ Allocated zp[2]:75 [ setMEMtoFAC::mem#5 ]
 Allocated zp[2]:77 [ divMEMbyFAC::mem#2 ]
 Allocated zp[2]:79 [ mulFACbyMEM::mem#2 ]
 REGISTER UPLIFT POTENTIAL REGISTERS
-Equivalence Class zp[1]:23 [ anim::$8 ] has ALU potential.
 Statement [3] if(*((char *)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER)!=$ff) goto main::@1 [ sin_idx_x#15 sin_idx_y#15 ] (  [ sin_idx_x#15 sin_idx_y#15 ] { }  ) always clobbers reg byte a 
 Removing always clobbered register reg byte a as potential for zp[1]:67 [ sin_idx_x#15 sin_idx_x#12 sin_idx_x#2 ]
 Removing always clobbered register reg byte a as potential for zp[1]:66 [ sin_idx_y#15 sin_idx_y#12 sin_idx_y#2 ]
@@ -3484,7 +3483,7 @@ Potential registers zp[2]:77 [ divMEMbyFAC::mem#2 ] : zp[2]:77 ,
 Potential registers zp[2]:79 [ mulFACbyMEM::mem#2 ] : zp[2]:79 , 
 Potential registers zp[2]:44 [ anim::x#0 ] : zp[2]:44 , 
 Potential registers zp[1]:42 [ anim::$7 ] : zp[1]:42 , reg byte a , reg byte x , reg byte y , 
-Potential registers zp[1]:23 [ anim::$8 ] : zp[1]:23 , reg byte a , reg byte x , reg byte y , reg byte alu , 
+Potential registers zp[1]:23 [ anim::$8 ] : zp[1]:23 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:24 [ anim::$10 ] : zp[1]:24 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:52 [ place_sprites::j2#1 ] : zp[1]:52 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:64 [ gen_chargen_sprite::ch#0 ] : zp[1]:64 , reg byte x , reg byte y , 
@@ -3534,7 +3533,7 @@ Uplift Scope [progress_inc]
 Uplifting [gen_chargen_sprite] best 1064070 combination zp[1]:2 [ gen_chargen_sprite::s_gen#3 gen_chargen_sprite::s_gen#5 gen_chargen_sprite::s_gen#6 gen_chargen_sprite::s_gen#1 ] zp[2]:3 [ gen_chargen_sprite::sprite#3 gen_chargen_sprite::sprite#10 gen_chargen_sprite::sprite#11 gen_chargen_sprite::sprite#0 gen_chargen_sprite::sprite#2 gen_chargen_sprite::sprite#4 gen_chargen_sprite::sprite#1 ] reg byte y [ gen_chargen_sprite::s_gen_cnt#3 gen_chargen_sprite::s_gen_cnt#4 gen_chargen_sprite::s_gen_cnt#5 gen_chargen_sprite::s_gen_cnt#1 ] reg byte a [ gen_chargen_sprite::$5 ] reg byte x [ gen_chargen_sprite::b#2 gen_chargen_sprite::b#1 ] reg byte a [ gen_chargen_sprite::$2 ] zp[1]:10 [ gen_chargen_sprite::x#6 gen_chargen_sprite::x#1 ] zp[1]:11 [ gen_chargen_sprite::bits#2 gen_chargen_sprite::bits#0 gen_chargen_sprite::bits#1 ] zp[1]:12 [ gen_chargen_sprite::c#3 ] zp[1]:15 [ gen_chargen_sprite::y#2 gen_chargen_sprite::y#1 ] zp[2]:19 [ gen_chargen_sprite::chargen#0 ] zp[2]:25 [ gen_chargen_sprite::$14 ] zp[2]:27 [ gen_chargen_sprite::$0 ] zp[1]:64 [ gen_chargen_sprite::ch#0 ] 
 Limited combination testing to 100 combinations of 9216 possible.
 Uplifting [anim] best 1062870 combination zp[1]:16 [ anim::yidx#3 anim::yidx#0 anim::yidx#6 anim::yidx#1 anim::yidx#2 ] zp[1]:17 [ anim::xidx#3 anim::xidx#0 anim::xidx#5 anim::xidx#1 anim::xidx#2 ] reg byte a [ anim::$8 ] reg byte a [ anim::$10 ] zp[1]:38 [ anim::j#2 anim::j#1 ] zp[1]:41 [ anim::x_msb#2 anim::x_msb#1 ] zp[1]:42 [ anim::$7 ] zp[1]:43 [ anim::j2#2 anim::j2#1 ] zp[2]:44 [ anim::x#0 ] 
-Limited combination testing to 100 combinations of 19440 possible.
+Limited combination testing to 100 combinations of 15552 possible.
 Uplifting [setFAC] best 1062858 combination reg byte a [ setFAC::prepareMEM1_$0 ] reg byte a [ setFAC::prepareMEM1_$1 ] zp[2]:39 [ setFAC::prepareMEM1_mem#0 setFAC::w#0 setFAC::w#4 setFAC::w#3 setFAC::w#1 ] 
 Uplifting [] best 1062858 combination zp[2]:21 [ progress_cursor#12 progress_cursor#23 progress_cursor#10 progress_cursor#9 ] zp[1]:37 [ progress_idx#13 progress_idx#11 progress_idx#9 ] zp[1]:66 [ sin_idx_y#15 sin_idx_y#12 sin_idx_y#2 ] zp[1]:67 [ sin_idx_x#15 sin_idx_x#12 sin_idx_x#2 ] 
 Uplifting [setMEMtoFAC] best 1062846 combination reg byte a [ setMEMtoFAC::prepareMEM1_$0 ] reg byte a [ setMEMtoFAC::prepareMEM1_$1 ] zp[2]:75 [ setMEMtoFAC::mem#5 ] 
diff --git a/src/test/ref/examples/cx16/veralib/tilemap_8bpp_16_x_16.log b/src/test/ref/examples/cx16/veralib/tilemap_8bpp_16_x_16.log
index 20fdbf0da..a3823e284 100644
--- a/src/test/ref/examples/cx16/veralib/tilemap_8bpp_16_x_16.log
+++ b/src/test/ref/examples/cx16/veralib/tilemap_8bpp_16_x_16.log
@@ -7813,8 +7813,6 @@ Allocated mem[1] [ CONIO_SCREEN_BANK#15 ]
 Zero-page exhausted. Moving allocation to main memory CONIO_SCREEN_TEXT#17
 Allocated mem[2] [ CONIO_SCREEN_TEXT#17 ]
 REGISTER UPLIFT POTENTIAL REGISTERS
-Equivalence Class zp[1]:95 [ vera_tile_area::index_h#0 ] has ALU potential.
-Equivalence Class zp[1]:54 [ vera_tile_area::vera_vram_address01_$2 ] has ALU potential.
 Statement [1] conio_screen_width = 0 [ conio_screen_width ] (  [ conio_screen_width ] { }  ) always clobbers reg byte a 
 Statement [2] conio_screen_height = 0 [ conio_screen_width conio_screen_height ] (  [ conio_screen_width conio_screen_height ] { }  ) always clobbers reg byte a 
 Statement [3] conio_screen_layer = 1 [ conio_screen_width conio_screen_height ] (  [ conio_screen_width conio_screen_height ] { }  ) always clobbers reg byte a 
@@ -8423,7 +8421,7 @@ Potential registers zp[2]:70 [ vera_tile_area::rowskip#0 ] : zp[2]:70 ,
 Potential registers zp[1]:124 [ vera_tile_area::hflip#0 ] : zp[1]:124 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:125 [ vera_tile_area::vflip#0 ] : zp[1]:125 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:67 [ vera_tile_area::index_l#0 ] : zp[1]:67 , reg byte x , reg byte y , 
-Potential registers zp[1]:95 [ vera_tile_area::index_h#0 ] : zp[1]:95 , reg byte a , reg byte x , reg byte y , reg byte alu , 
+Potential registers zp[1]:95 [ vera_tile_area::index_h#0 ] : zp[1]:95 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:96 [ vera_tile_area::index_h#1 ] : zp[1]:96 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:66 [ vera_tile_area::index_h#2 ] : zp[1]:66 , reg byte x , reg byte y , 
 Potential registers zp[2]:97 [ vera_tile_area::$10 ] : zp[2]:97 , 
@@ -8432,7 +8430,7 @@ Potential registers zp[4]:112 [ vera_tile_area::mapbase#1 ] : zp[4]:112 ,
 Potential registers zp[1]:101 [ vera_tile_area::$5 ] : zp[1]:101 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:52 [ vera_tile_area::vera_vram_address01_$0 ] : zp[1]:52 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:53 [ vera_tile_area::vera_vram_address01_$1 ] : zp[1]:53 , reg byte a , reg byte x , reg byte y , 
-Potential registers zp[1]:54 [ vera_tile_area::vera_vram_address01_$2 ] : zp[1]:54 , reg byte a , reg byte x , reg byte y , reg byte alu , 
+Potential registers zp[1]:54 [ vera_tile_area::vera_vram_address01_$2 ] : zp[1]:54 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:55 [ vera_tile_area::vera_vram_address01_$3 ] : zp[1]:55 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:192 [ printf_str::c#1 ] : zp[1]:192 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:193 [ kbhit::ch ] : zp[1]:193 , 
diff --git a/src/test/ref/examples/cx16/veralib/tilemap_8bpp_8_x_8.log b/src/test/ref/examples/cx16/veralib/tilemap_8bpp_8_x_8.log
index 897985779..eea0dfd48 100644
--- a/src/test/ref/examples/cx16/veralib/tilemap_8bpp_8_x_8.log
+++ b/src/test/ref/examples/cx16/veralib/tilemap_8bpp_8_x_8.log
@@ -6770,8 +6770,6 @@ Allocated mem[1] [ CONIO_SCREEN_BANK#11 ]
 Zero-page exhausted. Moving allocation to main memory CONIO_SCREEN_TEXT#13
 Allocated mem[2] [ CONIO_SCREEN_TEXT#13 ]
 REGISTER UPLIFT POTENTIAL REGISTERS
-Equivalence Class zp[1]:89 [ vera_tile_area::index_h#0 ] has ALU potential.
-Equivalence Class zp[1]:48 [ vera_tile_area::vera_vram_address01_$2 ] has ALU potential.
 Statement [1] conio_screen_width = 0 [ conio_screen_width ] (  [ conio_screen_width ] { }  ) always clobbers reg byte a 
 Statement [2] conio_screen_height = 0 [ conio_screen_width conio_screen_height ] (  [ conio_screen_width conio_screen_height ] { }  ) always clobbers reg byte a 
 Statement [3] conio_screen_layer = 1 [ conio_screen_width conio_screen_height ] (  [ conio_screen_width conio_screen_height ] { }  ) always clobbers reg byte a 
@@ -7546,7 +7544,7 @@ Potential registers zp[2]:64 [ vera_tile_area::rowskip#0 ] : zp[2]:64 ,
 Potential registers zp[1]:118 [ vera_tile_area::hflip#0 ] : zp[1]:118 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:119 [ vera_tile_area::vflip#0 ] : zp[1]:119 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:61 [ vera_tile_area::index_l#0 ] : zp[1]:61 , reg byte x , reg byte y , 
-Potential registers zp[1]:89 [ vera_tile_area::index_h#0 ] : zp[1]:89 , reg byte a , reg byte x , reg byte y , reg byte alu , 
+Potential registers zp[1]:89 [ vera_tile_area::index_h#0 ] : zp[1]:89 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:90 [ vera_tile_area::index_h#1 ] : zp[1]:90 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:60 [ vera_tile_area::index_h#2 ] : zp[1]:60 , reg byte x , reg byte y , 
 Potential registers zp[2]:91 [ vera_tile_area::$10 ] : zp[2]:91 , 
@@ -7555,7 +7553,7 @@ Potential registers zp[4]:106 [ vera_tile_area::mapbase#1 ] : zp[4]:106 ,
 Potential registers zp[1]:95 [ vera_tile_area::$5 ] : zp[1]:95 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:46 [ vera_tile_area::vera_vram_address01_$0 ] : zp[1]:46 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:47 [ vera_tile_area::vera_vram_address01_$1 ] : zp[1]:47 , reg byte a , reg byte x , reg byte y , 
-Potential registers zp[1]:48 [ vera_tile_area::vera_vram_address01_$2 ] : zp[1]:48 , reg byte a , reg byte x , reg byte y , reg byte alu , 
+Potential registers zp[1]:48 [ vera_tile_area::vera_vram_address01_$2 ] : zp[1]:48 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:49 [ vera_tile_area::vera_vram_address01_$3 ] : zp[1]:49 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:186 [ printf_str::c#1 ] : zp[1]:186 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:187 [ kbhit::ch ] : zp[1]:187 , 
diff --git a/src/test/ref/line-anim.log b/src/test/ref/line-anim.log
index 10510ce6b..12097b05e 100644
--- a/src/test/ref/line-anim.log
+++ b/src/test/ref/line-anim.log
@@ -2289,7 +2289,6 @@ Allocated zp[1]:89 [ point_init::point_idx#0 ]
 Allocated zp[1]:90 [ point_init::$13 ]
 Allocated zp[2]:91 [ bitmap_clear::bitmap#0 ]
 REGISTER UPLIFT POTENTIAL REGISTERS
-Equivalence Class zp[1]:48 [ bitmap_init::$4 ] has ALU potential.
 Statement [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] (  [ ] { }  ) always clobbers reg byte a 
 Statement [2] *PROCPORT = PROCPORT_RAM_IO [ ] (  [ ] { }  ) always clobbers reg byte a 
 Statement [3] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] (  [ ] { }  ) always clobbers reg byte a 
@@ -2460,7 +2459,7 @@ Potential registers zp[1]:88 [ main::$10 ] : zp[1]:88 , reg byte a , reg byte x
 Potential registers zp[2]:81 [ bitmap_plot::x#0 ] : zp[2]:81 , 
 Potential registers zp[1]:45 [ bitmap_plot::y#0 ] : zp[1]:45 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:78 [ bitmap_init::$7 ] : zp[1]:78 , reg byte a , reg byte x , reg byte y , 
-Potential registers zp[1]:48 [ bitmap_init::$4 ] : zp[1]:48 , reg byte a , reg byte x , reg byte y , reg byte alu , 
+Potential registers zp[1]:48 [ bitmap_init::$4 ] : zp[1]:48 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:49 [ bitmap_init::$5 ] : zp[1]:49 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:50 [ bitmap_init::$6 ] : zp[1]:50 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[2]:91 [ bitmap_clear::bitmap#0 ] : zp[2]:91 , 
@@ -2513,7 +2512,7 @@ Uplifting [screen_fill] best 28536 combination zp[2]:21 [ screen_fill::screen#2
 Uplifting [point_init] best 28524 combination zp[2]:30 [ point_init::abs16s2_return#2 point_init::abs16s2_return#5 point_init::abs16s2_return#6 ] zp[2]:38 [ point_init::abs16s1_return#2 point_init::abs16s1_return#5 point_init::abs16s1_return#6 ] zp[2]:51 [ point_init::$18 ] zp[2]:53 [ point_init::$5 ] zp[2]:55 [ point_init::$19 ] zp[2]:57 [ point_init::$6 ] zp[2]:61 [ point_init::x_stepf#0 ] reg byte a [ point_init::$9 ] zp[2]:71 [ point_init::$17 ] reg byte a [ point_init::$10 ] zp[2]:74 [ point_init::abs16s2_return#0 ] zp[2]:76 [ point_init::abs16s1_return#0 ] zp[2]:83 [ point_init::x_diff#1 ] zp[2]:85 [ point_init::y_diff#0 ] zp[1]:89 [ point_init::point_idx#0 ] zp[1]:90 [ point_init::$13 ] 
 Limited combination testing to 100 combinations of 144 possible.
 Uplifting [bitmap_init] best 28074 combination zp[2]:40 [ bitmap_init::yoffs#2 bitmap_init::yoffs#4 bitmap_init::yoffs#1 ] reg byte a [ bitmap_init::bits#3 bitmap_init::bits#4 bitmap_init::bits#1 ] reg byte x [ bitmap_init::x#2 bitmap_init::x#1 ] reg byte x [ bitmap_init::y#2 bitmap_init::y#1 ] reg byte a [ bitmap_init::$4 ] zp[1]:49 [ bitmap_init::$5 ] zp[1]:50 [ bitmap_init::$6 ] zp[1]:78 [ bitmap_init::$7 ] 
-Limited combination testing to 100 combinations of 15360 possible.
+Limited combination testing to 100 combinations of 12288 possible.
 Uplifting [bitmap_plot] best 28035 combination reg byte x [ bitmap_plot::y#0 ] zp[2]:64 [ bitmap_plot::$1 ] reg byte x [ bitmap_plot::$2 ] zp[2]:69 [ bitmap_plot::plotter#1 ] zp[2]:79 [ bitmap_plot::plotter#0 ] zp[2]:81 [ bitmap_plot::x#0 ] 
 Uplifting [main] best 27995 combination zp[1]:87 [ main::i#2 main::i#1 ] reg byte a [ main::$10 ] 
 Uplifting [MOS6526_CIA] best 27995 combination 
diff --git a/src/test/ref/sinusgenscale8.log b/src/test/ref/sinusgenscale8.log
index a5eb75071..0cb6d4cc2 100644
--- a/src/test/ref/sinusgenscale8.log
+++ b/src/test/ref/sinusgenscale8.log
@@ -3543,7 +3543,6 @@ Allocated zp[2]:87 [ sin8u_table::sinx_sc#0 ]
 Allocated zp[1]:89 [ sin8u_table::sinx_tr#0 ]
 Allocated zp[2]:90 [ sin8u_table::step#0 ]
 REGISTER UPLIFT POTENTIAL REGISTERS
-Equivalence Class zp[1]:73 [ sin8u_table::$20 ] has ALU potential.
 Statement [10] div16u::return#2 = div16u::return#0 [ div16u::return#2 ] ( sin8u_table:3 [ div16u::return#2 ] { { div16u::return#0 = div16u::return#2 } }  ) always clobbers reg byte a 
 Statement [11] sin8u_table::step#0 = div16u::return#2 [ sin8u_table::step#0 ] ( sin8u_table:3 [ sin8u_table::step#0 ] { }  ) always clobbers reg byte a 
 Statement [13] print_uint::w#1 = sin8u_table::step#0 [ sin8u_table::step#0 print_uint::w#1 print_char_cursor#1 ] ( sin8u_table:3 [ sin8u_table::step#0 print_uint::w#1 print_char_cursor#1 ] { { print_uint::w#1 = print_uint::w#3 sin8u_table::step#0 } { print_char_cursor#1 = print_char_cursor#105 } }  ) always clobbers reg byte a 
@@ -3685,7 +3684,7 @@ Potential registers zp[1]:72 [ sin8s::return#2 ] : zp[1]:72 , reg byte a , reg b
 Potential registers zp[1]:86 [ sin8u_table::sinx#0 ] : zp[1]:86 , reg byte x , 
 Potential registers zp[1]:69 [ mul8su::a#0 ] : zp[1]:69 , reg byte x , reg byte y , 
 Potential registers zp[2]:87 [ sin8u_table::sinx_sc#0 ] : zp[2]:87 , 
-Potential registers zp[1]:73 [ sin8u_table::$20 ] : zp[1]:73 , reg byte a , reg byte x , reg byte y , reg byte alu , 
+Potential registers zp[1]:73 [ sin8u_table::$20 ] : zp[1]:73 , reg byte a , reg byte x , reg byte y , 
 Potential registers zp[1]:89 [ sin8u_table::sinx_tr#0 ] : zp[1]:89 , reg byte x , 
 Potential registers zp[2]:74 [ divr16u::return#2 ] : zp[2]:74 , 
 Potential registers zp[2]:79 [ div16u::return#0 ] : zp[2]:79 ,