mirror of
https://gitlab.com/camelot/kickc.git
synced 2024-11-23 23:32:55 +00:00
Improved a few fragments. Moved to use the SymVar.isStorageXxx() methods.
This commit is contained in:
Jesper Gravgaard
parent
358f6d0047
commit
9877da213d
@ -1,4 +1,3 @@
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ldy #{c1}
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lda ({z1}),y
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pha
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iny
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@ -1,7 +1,8 @@
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ldy #0
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lda ({z1}),y
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tax
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pha
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iny
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lda ({z1}),y
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stx {z1}
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sta {z1}+1
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pla
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sta {z1}
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@ -1,7 +1,8 @@
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ldy #0
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lda ({z1}),y
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tax
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pha
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iny
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lda ({z1}),y
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sta {z1}+1
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stx {z1}
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pla
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sta {z1}
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@ -1,5 +0,0 @@
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ldy #0
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lda {z1}
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sta !+ +1
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lda {c1},x
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!: sta ($ff),y
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@ -0,0 +1 @@
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sax {m1}
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@ -1,2 +1,2 @@
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lax {z1}
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lax {m1}
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axs #{c1}
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@ -1,2 +1,2 @@
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lax {z1}
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lax {m1}
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axs #-[{c1}]
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@ -1 +0,0 @@
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sax {z1}
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@ -347,7 +347,7 @@ public abstract class Scope implements Symbol, Serializable {
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if(asmName != null) {
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res.append(" " + asmName);
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}
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if(SymbolVariable.StorageStrategy.MEMORY.equals(symVar.getStorageStrategy())) {
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if(symVar.isStorageMemory()) {
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res.append(" memory");
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}
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Registers.Register declRegister = symVar.getDeclaredRegister();
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@ -202,7 +202,7 @@ public abstract class SymbolVariable implements Symbol {
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}
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public boolean isVolatile() {
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return declaredVolatile || inferedVolatile || StorageStrategy.MEMORY.equals(getStorageStrategy());
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return declaredVolatile || inferedVolatile || isStorageMemory();
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}
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public boolean isDeclaredExport() {
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@ -27,7 +27,7 @@ public class Variable extends SymbolVariable {
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public Variable(String name, Scope scope, SymbolType type, String dataSegment, StorageStrategy storageStrategy) {
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super(name, scope, type, storageStrategy, dataSegment);
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if(StorageStrategy.PHI_MASTER.equals(storageStrategy))
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if(isStoragePhiMaster())
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this.nextPhiVersionNumber = 0;
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}
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@ -220,10 +220,8 @@ public class Pass1UnwindStructValues extends Pass1Base {
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memberVariable.setInferedVolatile(variable.isInferedVolatile());
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memberVariable.setDeclaredConstant(variable.isDeclaredConstant());
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memberVariable.setDeclaredExport(variable.isDeclaredExport());
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if(variable.getStorageStrategy().equals(SymbolVariable.StorageStrategy.MEMORY)) {
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if(member.getStorageStrategy().equals(SymbolVariable.StorageStrategy.PHI_MASTER))
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if(variable.isStorageMemory() && member.isStoragePhiMaster())
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memberVariable.setStorageStrategy(SymbolVariable.StorageStrategy.MEMORY);
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}
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variableUnwinding.setMemberUnwinding(member.getLocalName(), memberVariable.getRef());
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getLog().append("Created struct value member variable " + memberVariable.toString(getProgram()));
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}
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@ -31,7 +31,7 @@ public class Pass2AssertRValues extends Pass2SsaAssertion {
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if(rValue instanceof VariableRef) {
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VariableRef variableRef = (VariableRef) rValue;
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Variable variable = getScope().getVariable(variableRef);
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if(variable.getStorageStrategy().equals(SymbolVariable.StorageStrategy.PHI_MASTER)) {
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if(variable.isStoragePhiMaster()) {
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throw new CompileError("No unversioned variable references allowed "+currentStmt.toString(getProgram(), false), currentStmt.getSource());
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}
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}
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@ -465,7 +465,7 @@ public class Pass4CodeGeneration {
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// Add all memory variables
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Collection<Variable> scopeVariables = scope.getAllVariables(false);
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for(Variable variable : scopeVariables) {
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if(variable.getStorageStrategy().equals(SymbolVariable.StorageStrategy.MEMORY)) {
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if(variable.isStorageMemory()) {
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// Skip if already added
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String asmName = variable.getAsmName() == null ? variable.getLocalName() : variable.getAsmName();
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if(added.contains(asmName)) {
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@ -98,11 +98,12 @@ main: {
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sta.z __27+1
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ldy #0
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lda (cos_x),y
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tax
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pha
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iny
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lda (cos_x),y
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stx.z cos_x
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sta.z cos_x+1
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pla
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sta.z cos_x
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lda #<$a0
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sta.z mul16s.a
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lda #>$a0
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@ -146,11 +147,12 @@ main: {
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sta.z __28+1
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ldy #0
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lda (sin_y),y
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tax
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pha
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iny
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lda (sin_y),y
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stx.z sin_y
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sta.z sin_y+1
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pla
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sta.z sin_y
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lda #<$64
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sta.z mul16s.a
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lda #>$64
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@ -6574,11 +6574,12 @@ main: {
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// [18] (signed word) main::cos_x#0 ← *((signed word*~) main::$27) -- vwsz1=_deref_pwsz1
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ldy #0
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lda (cos_x),y
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tax
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pha
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iny
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lda (cos_x),y
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stx.z cos_x
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sta.z cos_x+1
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pla
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sta.z cos_x
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// [19] (signed word) mul16s::b#1 ← (signed word) main::cos_x#0
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// [20] call mul16s
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// [54] phi from main::@2 to mul16s [phi:main::@2->mul16s]
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@ -6639,11 +6640,12 @@ main: {
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// [28] (signed word) main::sin_y#0 ← *((signed word*~) main::$28) -- vwsz1=_deref_pwsz1
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ldy #0
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lda (sin_y),y
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tax
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pha
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iny
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lda (sin_y),y
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stx.z sin_y
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sta.z sin_y+1
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pla
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sta.z sin_y
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// [29] (signed word) mul16s::b#2 ← (signed word) main::sin_y#0
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// [30] call mul16s
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// [54] phi from main::@9 to mul16s [phi:main::@9->mul16s]
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@ -8621,7 +8623,7 @@ reg byte a [ divr16u::$2 ]
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FINAL ASSEMBLER
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Score: 20291
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Score: 20391
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// File Comments
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// Tests the simple bitmap plotter - and counts plots per frame in an IRQ
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@ -8769,11 +8771,12 @@ main: {
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// [18] (signed word) main::cos_x#0 ← *((signed word*~) main::$27) -- vwsz1=_deref_pwsz1
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ldy #0
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lda (cos_x),y
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tax
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pha
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iny
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lda (cos_x),y
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stx.z cos_x
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sta.z cos_x+1
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pla
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sta.z cos_x
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// mul16s(160, cos_x)
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// [19] (signed word) mul16s::b#1 ← (signed word) main::cos_x#0
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// [20] call mul16s
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@ -8838,11 +8841,12 @@ main: {
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// [28] (signed word) main::sin_y#0 ← *((signed word*~) main::$28) -- vwsz1=_deref_pwsz1
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ldy #0
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lda (sin_y),y
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tax
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pha
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iny
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lda (sin_y),y
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stx.z sin_y
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sta.z sin_y+1
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pla
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sta.z sin_y
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// mul16s(100, sin_y)
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// [29] (signed word) mul16s::b#2 ← (signed word) main::sin_y#0
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// [30] call mul16s
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@ -107,11 +107,12 @@ main: {
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sta.z __36+1
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ldy #0
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lda (cos_x),y
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tax
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pha
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iny
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lda (cos_x),y
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stx.z cos_x
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sta.z cos_x+1
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pla
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sta.z cos_x
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jsr mul16s
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lda.z xpos+2
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sta.z __10
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@ -147,11 +148,12 @@ main: {
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sta.z __37+1
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ldy #0
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lda (sin_y),y
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tax
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pha
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iny
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lda (sin_y),y
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stx.z sin_y
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sta.z sin_y+1
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pla
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sta.z sin_y
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jsr mul16s
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lda.z ypos+2
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sta.z __16
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@ -6897,11 +6897,12 @@ main: {
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// [18] (signed word) main::cos_x#0 ← *((signed word*~) main::$36) -- vwsz1=_deref_pwsz1
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ldy #0
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lda (cos_x),y
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tax
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pha
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iny
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lda (cos_x),y
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stx.z cos_x
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sta.z cos_x+1
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pla
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sta.z cos_x
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// [19] (signed word) mul16s::a#1 ← (signed word) main::r#10
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// [20] (signed word) mul16s::b#1 ← (signed word) main::cos_x#0
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// [21] call mul16s
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@ -6955,11 +6956,12 @@ main: {
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// [29] (signed word) main::sin_y#0 ← *((signed word*~) main::$37) -- vwsz1=_deref_pwsz1
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ldy #0
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lda (sin_y),y
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tax
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pha
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iny
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lda (sin_y),y
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stx.z sin_y
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sta.z sin_y+1
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pla
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sta.z sin_y
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// [30] (signed word) mul16s::a#2 ← (signed word) main::r#10
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// [31] (signed word) mul16s::b#2 ← (signed word) main::sin_y#0
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// [32] call mul16s
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@ -9024,7 +9026,7 @@ reg byte a [ divr16u::$2 ]
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FINAL ASSEMBLER
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Score: 20476
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Score: 20576
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// File Comments
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// Tests the simple bitmap plotter - and counts plots per frame in an IRQ
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@ -9183,11 +9185,12 @@ main: {
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// [18] (signed word) main::cos_x#0 ← *((signed word*~) main::$36) -- vwsz1=_deref_pwsz1
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ldy #0
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lda (cos_x),y
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tax
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pha
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iny
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lda (cos_x),y
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stx.z cos_x
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sta.z cos_x+1
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pla
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sta.z cos_x
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// mul16s(r, cos_x)
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// [19] (signed word) mul16s::a#1 ← (signed word) main::r#10
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// [20] (signed word) mul16s::b#1 ← (signed word) main::cos_x#0
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@ -9245,11 +9248,12 @@ main: {
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// [29] (signed word) main::sin_y#0 ← *((signed word*~) main::$37) -- vwsz1=_deref_pwsz1
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ldy #0
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lda (sin_y),y
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tax
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pha
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iny
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lda (sin_y),y
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stx.z sin_y
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sta.z sin_y+1
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pla
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sta.z sin_y
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// mul16s(r, sin_y)
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// [30] (signed word) mul16s::a#2 ← (signed word) main::r#10
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// [31] (signed word) mul16s::b#2 ← (signed word) main::sin_y#0
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@ -93,11 +93,12 @@ loop: {
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sta.z __2+1
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ldy #0
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lda (xpos),y
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tax
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pha
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iny
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lda (xpos),y
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stx.z xpos
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sta.z xpos+1
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pla
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sta.z xpos
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jsr render_logo
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inc.z xsin_idx
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bne !+
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@ -6629,11 +6629,12 @@ loop: {
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// [31] (signed word) loop::xpos#0 ← *((signed word*~) loop::$2) -- vwsz1=_deref_pwsz1
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ldy #0
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lda (xpos),y
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tax
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pha
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iny
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lda (xpos),y
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stx.z xpos
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sta.z xpos+1
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pla
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sta.z xpos
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// [32] (signed word) render_logo::xpos#0 ← (signed word) loop::xpos#0
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// [33] call render_logo
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jsr render_logo
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@ -8508,7 +8509,7 @@ zp ZP_WORD:35 [ memset::end#0 sin16s_gen2::i#2 sin16s_gen2::i#1 xsin_idx#11 xsin
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FINAL ASSEMBLER
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Score: 46394
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Score: 46444
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// File Comments
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// Upstart
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@ -8685,11 +8686,12 @@ loop: {
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// [31] (signed word) loop::xpos#0 ← *((signed word*~) loop::$2) -- vwsz1=_deref_pwsz1
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ldy #0
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lda (xpos),y
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tax
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pha
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iny
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lda (xpos),y
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stx.z xpos
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sta.z xpos+1
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pla
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sta.z xpos
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// render_logo(xpos)
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// [32] (signed word) render_logo::xpos#0 ← (signed word) loop::xpos#0
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// [33] call render_logo
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@ -102,11 +102,12 @@ render_sine: {
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sta.z __1+1
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ldy #0
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lda (sin_val),y
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tax
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pha
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iny
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lda (sin_val),y
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stx.z sin_val
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sta.z sin_val+1
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pla
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sta.z sin_val
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jsr wrap_y
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tax
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jsr bitmap_plot
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@ -125,11 +126,12 @@ render_sine: {
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sta.z __4+1
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ldy #0
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lda (sin2_val),y
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tax
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pha
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iny
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lda (sin2_val),y
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stx.z sin2_val
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sta.z sin2_val+1
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pla
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sta.z sin2_val
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lda.z wrap_y.y
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clc
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adc #<$a
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@ -6334,11 +6334,12 @@ render_sine: {
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// [28] (signed word) render_sine::sin_val#0 ← *((signed word*~) render_sine::$1) -- vwsz1=_deref_pwsz1
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ldy #0
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lda (sin_val),y
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tax
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pha
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iny
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lda (sin_val),y
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stx.z sin_val
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sta.z sin_val+1
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pla
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sta.z sin_val
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// [29] (signed word) wrap_y::y#0 ← (signed word) render_sine::sin_val#0
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// [30] call wrap_y
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// [58] phi from render_sine::@2 to wrap_y [phi:render_sine::@2->wrap_y]
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@ -6380,11 +6381,12 @@ render_sine: {
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// [38] (signed word) render_sine::sin2_val#0 ← *((signed word*~) render_sine::$4) -- vwsz1=_deref_pwsz1
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ldy #0
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lda (sin2_val),y
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tax
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pha
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iny
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lda (sin2_val),y
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stx.z sin2_val
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sta.z sin2_val+1
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pla
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sta.z sin2_val
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// [39] (signed word) wrap_y::y#1 ← (signed word) render_sine::sin2_val#0 + (signed byte) $a -- vwsz1=vwsz1_plus_vbsc1
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lda.z wrap_y.y
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clc
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@ -8256,7 +8258,7 @@ reg byte a [ bitmap_init::$6 ]
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FINAL ASSEMBLER
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Score: 24649
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Score: 24749
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// File Comments
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// Generate a big sinus and plot it on a bitmap
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@ -8433,11 +8435,12 @@ render_sine: {
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// [28] (signed word) render_sine::sin_val#0 ← *((signed word*~) render_sine::$1) -- vwsz1=_deref_pwsz1
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ldy #0
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lda (sin_val),y
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tax
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pha
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iny
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lda (sin_val),y
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stx.z sin_val
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sta.z sin_val+1
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pla
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sta.z sin_val
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// wrap_y(sin_val)
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// [29] (signed word) wrap_y::y#0 ← (signed word) render_sine::sin_val#0
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// [30] call wrap_y
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@ -8479,11 +8482,12 @@ render_sine: {
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// [38] (signed word) render_sine::sin2_val#0 ← *((signed word*~) render_sine::$4) -- vwsz1=_deref_pwsz1
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ldy #0
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lda (sin2_val),y
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tax
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pha
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iny
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lda (sin2_val),y
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stx.z sin2_val
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sta.z sin2_val+1
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pla
|
||||
sta.z sin2_val
|
||||
// wrap_y(sin2_val+10)
|
||||
// [39] (signed word) wrap_y::y#1 ← (signed word) render_sine::sin2_val#0 + (signed byte) $a -- vwsz1=vwsz1_plus_vbsc1
|
||||
lda.z wrap_y.y
|
||||
|
||||
@ -23,7 +23,7 @@ main: {
|
||||
.label __4 = $18
|
||||
.label __11 = $18
|
||||
.label sb = $17
|
||||
.label sw = $20
|
||||
.label sw = $18
|
||||
jsr sin8s_gen
|
||||
jsr sin16s_gen
|
||||
jsr print_cls
|
||||
@ -49,11 +49,14 @@ main: {
|
||||
adc #>sintabw
|
||||
sta.z __4+1
|
||||
ldy #0
|
||||
lda (__4),y
|
||||
sta.z sw
|
||||
lda (sw),y
|
||||
pha
|
||||
iny
|
||||
lda (__4),y
|
||||
lda (sw),y
|
||||
sta.z sw+1
|
||||
pla
|
||||
sta.z sw
|
||||
lda.z sw+1
|
||||
eor #$ff
|
||||
sec
|
||||
adc.z sb
|
||||
@ -265,14 +268,14 @@ sin16s: {
|
||||
.label __4 = 6
|
||||
.label x = 6
|
||||
.label return = $18
|
||||
.label x1 = $20
|
||||
.label x1 = $1e
|
||||
.label x2 = $10
|
||||
.label x3 = $10
|
||||
.label x3_6 = $1e
|
||||
.label x3_6 = $20
|
||||
.label usinx = $18
|
||||
.label x4 = $10
|
||||
.label x5 = $1e
|
||||
.label x5_128 = $1e
|
||||
.label x5 = $20
|
||||
.label x5_128 = $20
|
||||
.label sinx = $18
|
||||
.label isUpper = $14
|
||||
lda.z x+3
|
||||
@ -442,7 +445,7 @@ mulu16_sel: {
|
||||
.label __1 = 6
|
||||
.label v1 = $10
|
||||
.label v2 = $12
|
||||
.label return = $1e
|
||||
.label return = $20
|
||||
.label return_1 = $10
|
||||
.label return_10 = $10
|
||||
lda.z v1
|
||||
@ -467,9 +470,9 @@ mulu16_sel: {
|
||||
rts
|
||||
}
|
||||
// Perform binary multiplication of two unsigned 16-bit words into a 32-bit unsigned double word
|
||||
// mul16u(word zeropage($1e) a, word zeropage($12) b)
|
||||
// mul16u(word zeropage($20) a, word zeropage($12) b)
|
||||
mul16u: {
|
||||
.label a = $1e
|
||||
.label a = $20
|
||||
.label mb = $a
|
||||
.label res = 6
|
||||
.label b = $12
|
||||
@ -612,7 +615,7 @@ divr16u: {
|
||||
sin8s_gen: {
|
||||
.label step = $10
|
||||
.label sintab = $18
|
||||
.label x = $1e
|
||||
.label x = $20
|
||||
.label i = $12
|
||||
jsr div16u
|
||||
lda #<main.sintabb
|
||||
@ -795,7 +798,7 @@ mulu8_sel: {
|
||||
// Perform binary multiplication of two unsigned 8-bit bytes into a 16-bit unsigned word
|
||||
// mul8u(byte register(X) a, byte register(A) b)
|
||||
mul8u: {
|
||||
.label mb = $20
|
||||
.label mb = $1e
|
||||
.label res = $15
|
||||
.label return = $15
|
||||
sta.z mb
|
||||
|
||||
@ -6257,6 +6257,7 @@ Coalescing zero page register [ zp ZP_WORD:47 [ divr16u::quotient#3 divr16u::ret
|
||||
Coalescing zero page register [ zp ZP_WORD:57 [ sin8s::x#6 sin8s::x#4 sin8s::x#0 sin8s::x#1 sin8s::x#2 ] ] with [ zp ZP_WORD:165 [ sin8s::$4 ] ] - score: 1
|
||||
Coalescing zero page register [ zp ZP_WORD:65 [ mul8u::res#2 mul8u::res#6 mul8u::res#1 ] ] with [ zp ZP_WORD:180 [ mul8u::return#2 ] ] - score: 1
|
||||
Coalescing zero page register [ zp ZP_WORD:71 [ main::$3 ] ] with [ zp ZP_WORD:73 [ main::$11 ] ] - score: 1
|
||||
Coalescing zero page register [ zp ZP_WORD:75 [ main::$4 ] ] with [ zp ZP_WORD:77 [ main::sw#0 ] ] - score: 1
|
||||
Coalescing zero page register [ zp ZP_DWORD:84 [ div32u16u::return#2 ] ] with [ zp ZP_DWORD:88 [ sin16s_gen::step#0 ] ] - score: 1
|
||||
Coalescing zero page register [ zp ZP_DWORD:84 [ div32u16u::return#2 sin16s_gen::step#0 ] ] with [ zp ZP_DWORD:151 [ div32u16u::return#0 ] ] - score: 1
|
||||
Coalescing zero page register [ zp ZP_WORD:102 [ mulu16_sel::return#0 ] ] with [ zp ZP_WORD:140 [ mulu16_sel::return#12 ] ] - score: 1
|
||||
@ -6274,7 +6275,7 @@ Coalescing zero page register [ zp ZP_DWORD:33 [ mul16u::res#2 mul16u::res#6 mul
|
||||
Coalescing zero page register [ zp ZP_WORD:47 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#3 divr16u::return#4 divr16u::return#2 ] ] with [ zp ZP_WORD:149 [ div32u16u::quotient_lo#0 ] ] - score: 1
|
||||
Coalescing zero page register [ zp ZP_WORD:47 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#3 divr16u::return#4 divr16u::return#2 div32u16u::quotient_lo#0 ] ] with [ zp ZP_WORD:159 [ div16u::return#2 sin8s_gen::step#0 div16u::return#0 ] ] - score: 1
|
||||
Coalescing zero page register [ zp ZP_WORD:65 [ mul8u::res#2 mul8u::res#6 mul8u::res#1 mul8u::return#2 ] ] with [ zp ZP_WORD:182 [ mulu8_sel::$0 mulu8_sel::$1 ] ] - score: 1
|
||||
Coalescing zero page register [ zp ZP_WORD:71 [ main::$3 main::$11 ] ] with [ zp ZP_WORD:75 [ main::$4 ] ] - score: 1
|
||||
Coalescing zero page register [ zp ZP_WORD:71 [ main::$3 main::$11 ] ] with [ zp ZP_WORD:75 [ main::$4 main::sw#0 ] ] - score: 1
|
||||
Coalescing zero page register [ zp ZP_WORD:102 [ mulu16_sel::return#0 mulu16_sel::return#12 ] ] with [ zp ZP_WORD:110 [ mulu16_sel::return#2 sin16s::x3_6#0 ] ] - score: 1
|
||||
Coalescing zero page register [ zp ZP_WORD:102 [ mulu16_sel::return#0 mulu16_sel::return#12 mulu16_sel::return#2 sin16s::x3_6#0 ] ] with [ zp ZP_WORD:120 [ mulu16_sel::return#11 sin16s::x5#0 ] ] - score: 1
|
||||
Coalescing zero page register [ zp ZP_WORD:102 [ mulu16_sel::return#0 mulu16_sel::return#12 mulu16_sel::return#2 sin16s::x3_6#0 mulu16_sel::return#11 sin16s::x5#0 ] ] with [ zp ZP_WORD:124 [ sin16s::x5_128#0 ] ] - score: 1
|
||||
@ -6289,15 +6290,14 @@ Coalescing zero page register [ zp ZP_WORD:50 [ sin8s_gen::i#2 sin8s_gen::i#1 ]
|
||||
Coalescing zero page register [ zp ZP_WORD:52 [ sin8s_gen::x#2 sin8s_gen::x#1 ] ] with [ zp ZP_WORD:31 [ mul16u::a#2 mul16u::a#1 mul16u::a#0 ] ]
|
||||
Coalescing zero page register [ zp ZP_WORD:65 [ mul8u::res#2 mul8u::res#6 mul8u::res#1 mul8u::return#2 mulu8_sel::$0 mulu8_sel::$1 ] ] with [ zp ZP_WORD:57 [ sin8s::x#6 sin8s::x#4 sin8s::x#0 sin8s::x#1 sin8s::x#2 sin8s::$4 ] ]
|
||||
Coalescing zero page register [ zp ZP_BYTE:70 [ main::sb#0 ] ] with [ zp ZP_BYTE:56 [ sin8s::isUpper#10 ] ]
|
||||
Coalescing zero page register [ zp ZP_WORD:71 [ main::$3 main::$11 main::$4 ] ] with [ zp ZP_WORD:54 [ sin8s_gen::sintab#2 sin8s_gen::sintab#0 ] ]
|
||||
Coalescing zero page register [ zp ZP_WORD:77 [ main::sw#0 ] ] with [ zp ZP_WORD:67 [ mul8u::mb#2 mul8u::mb#1 ] ]
|
||||
Coalescing zero page register [ zp ZP_WORD:145 [ div32u16u::quotient_hi#0 ] ] with [ zp ZP_WORD:100 [ sin16s::x1#0 ] ]
|
||||
Coalescing zero page register [ zp ZP_WORD:71 [ main::$3 main::$11 main::$4 main::sw#0 ] ] with [ zp ZP_WORD:54 [ sin8s_gen::sintab#2 sin8s_gen::sintab#0 ] ]
|
||||
Coalescing zero page register [ zp ZP_WORD:100 [ sin16s::x1#0 ] ] with [ zp ZP_WORD:67 [ mul8u::mb#2 mul8u::mb#1 ] ]
|
||||
Coalescing zero page register [ zp ZP_WORD:145 [ div32u16u::quotient_hi#0 ] ] with [ zp ZP_WORD:102 [ mulu16_sel::return#0 mulu16_sel::return#12 mulu16_sel::return#2 sin16s::x3_6#0 mulu16_sel::return#11 sin16s::x5#0 sin16s::x5_128#0 ] ]
|
||||
Coalescing zero page register [ zp ZP_WORD:43 [ divr16u::rem#6 divr16u::rem#11 divr16u::rem#5 divr16u::rem#10 divr16u::rem#7 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 rem16u#1 sin16s_gen::sintab#2 sin16s_gen::sintab#0 ] ] with [ zp ZP_WORD:9 [ memset::dst#2 memset::dst#1 print_str::str#2 print_str::str#0 ] ]
|
||||
Coalescing zero page register [ zp ZP_BYTE:63 [ mulu8_sel::select#5 ] ] with [ zp ZP_BYTE:19 [ sin16s::isUpper#2 print_sbyte::b#4 print_sbyte::b#0 print_sbyte::b#1 print_byte::b#0 ] ]
|
||||
Coalescing zero page register [ zp ZP_WORD:65 [ mul8u::res#2 mul8u::res#6 mul8u::res#1 mul8u::return#2 mulu8_sel::$0 mulu8_sel::$1 sin8s::x#6 sin8s::x#4 sin8s::x#0 sin8s::x#1 sin8s::x#2 sin8s::$4 ] ] with [ zp ZP_WORD:11 [ sin16s_gen::i#2 sin16s_gen::i#1 print_char_cursor#28 print_char_cursor#42 print_char_cursor#19 print_char_cursor#10 print_char_cursor#1 ] ]
|
||||
Coalescing zero page register [ zp ZP_WORD:71 [ main::$3 main::$11 main::$4 sin8s_gen::sintab#2 sin8s_gen::sintab#0 ] ] with [ zp ZP_WORD:45 [ divr16u::dividend#4 divr16u::dividend#6 divr16u::dividend#0 sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$2 sin16s::usinx#0 ] ]
|
||||
Coalescing zero page register [ zp ZP_WORD:102 [ mulu16_sel::return#0 mulu16_sel::return#12 mulu16_sel::return#2 sin16s::x3_6#0 mulu16_sel::return#11 sin16s::x5#0 sin16s::x5_128#0 ] ] with [ zp ZP_WORD:52 [ sin8s_gen::x#2 sin8s_gen::x#1 mul16u::a#2 mul16u::a#1 mul16u::a#0 ] ]
|
||||
Coalescing zero page register [ zp ZP_WORD:145 [ div32u16u::quotient_hi#0 sin16s::x1#0 ] ] with [ zp ZP_WORD:77 [ main::sw#0 mul8u::mb#2 mul8u::mb#1 ] ]
|
||||
Coalescing zero page register [ zp ZP_WORD:71 [ main::$3 main::$11 main::$4 main::sw#0 sin8s_gen::sintab#2 sin8s_gen::sintab#0 ] ] with [ zp ZP_WORD:45 [ divr16u::dividend#4 divr16u::dividend#6 divr16u::dividend#0 sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$2 sin16s::usinx#0 ] ]
|
||||
Coalescing zero page register [ zp ZP_WORD:145 [ div32u16u::quotient_hi#0 mulu16_sel::return#0 mulu16_sel::return#12 mulu16_sel::return#2 sin16s::x3_6#0 mulu16_sel::return#11 sin16s::x5#0 sin16s::x5_128#0 ] ] with [ zp ZP_WORD:52 [ sin8s_gen::x#2 sin8s_gen::x#1 mul16u::a#2 mul16u::a#1 mul16u::a#0 ] ]
|
||||
Allocated (was zp ZP_DWORD:13) zp ZP_DWORD:2 [ sin16s_gen::x#2 sin16s_gen::x#1 ]
|
||||
Allocated (was zp ZP_DWORD:33) zp ZP_DWORD:6 [ mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#2 mulu16_sel::$0 mulu16_sel::$1 sin16s::x#6 sin16s::x#4 sin16s::x#0 sin16s::x#1 sin16s::x#2 sin16s::$4 ]
|
||||
Allocated (was zp ZP_DWORD:37) zp ZP_DWORD:10 [ mul16u::mb#2 mul16u::mb#1 ]
|
||||
@ -6307,10 +6307,10 @@ Allocated (was zp ZP_WORD:50) zp ZP_WORD:18 [ sin8s_gen::i#2 sin8s_gen::i#1 mulu
|
||||
Allocated (was zp ZP_BYTE:63) zp ZP_BYTE:20 [ mulu8_sel::select#5 sin16s::isUpper#2 print_sbyte::b#4 print_sbyte::b#0 print_sbyte::b#1 print_byte::b#0 ]
|
||||
Allocated (was zp ZP_WORD:65) zp ZP_WORD:21 [ mul8u::res#2 mul8u::res#6 mul8u::res#1 mul8u::return#2 mulu8_sel::$0 mulu8_sel::$1 sin8s::x#6 sin8s::x#4 sin8s::x#0 sin8s::x#1 sin8s::x#2 sin8s::$4 sin16s_gen::i#2 sin16s_gen::i#1 print_char_cursor#28 print_char_cursor#42 print_char_cursor#19 print_char_cursor#10 print_char_cursor#1 ]
|
||||
Allocated (was zp ZP_BYTE:70) zp ZP_BYTE:23 [ main::sb#0 sin8s::isUpper#10 ]
|
||||
Allocated (was zp ZP_WORD:71) zp ZP_WORD:24 [ main::$3 main::$11 main::$4 sin8s_gen::sintab#2 sin8s_gen::sintab#0 divr16u::dividend#4 divr16u::dividend#6 divr16u::dividend#0 sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$2 sin16s::usinx#0 ]
|
||||
Allocated (was zp ZP_WORD:71) zp ZP_WORD:24 [ main::$3 main::$11 main::$4 main::sw#0 sin8s_gen::sintab#2 sin8s_gen::sintab#0 divr16u::dividend#4 divr16u::dividend#6 divr16u::dividend#0 sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$2 sin16s::usinx#0 ]
|
||||
Allocated (was zp ZP_DWORD:84) zp ZP_DWORD:26 [ div32u16u::return#2 sin16s_gen::step#0 div32u16u::return#0 ]
|
||||
Allocated (was zp ZP_WORD:102) zp ZP_WORD:30 [ mulu16_sel::return#0 mulu16_sel::return#12 mulu16_sel::return#2 sin16s::x3_6#0 mulu16_sel::return#11 sin16s::x5#0 sin16s::x5_128#0 sin8s_gen::x#2 sin8s_gen::x#1 mul16u::a#2 mul16u::a#1 mul16u::a#0 ]
|
||||
Allocated (was zp ZP_WORD:145) zp ZP_WORD:32 [ div32u16u::quotient_hi#0 sin16s::x1#0 main::sw#0 mul8u::mb#2 mul8u::mb#1 ]
|
||||
Allocated (was zp ZP_WORD:100) zp ZP_WORD:30 [ sin16s::x1#0 mul8u::mb#2 mul8u::mb#1 ]
|
||||
Allocated (was zp ZP_WORD:145) zp ZP_WORD:32 [ div32u16u::quotient_hi#0 mulu16_sel::return#0 mulu16_sel::return#12 mulu16_sel::return#2 sin16s::x3_6#0 mulu16_sel::return#11 sin16s::x5#0 sin16s::x5_128#0 sin8s_gen::x#2 sin8s_gen::x#1 mul16u::a#2 mul16u::a#1 mul16u::a#0 ]
|
||||
Allocated (was zp ZP_BYTE:167) zp ZP_BYTE:34 [ sin8s::x1#0 ]
|
||||
Allocated (was zp ZP_BYTE:171) zp ZP_BYTE:35 [ sin8s::x3#0 ]
|
||||
Allocated (was zp ZP_BYTE:174) zp ZP_BYTE:36 [ sin8s::usinx#0 ]
|
||||
@ -6361,7 +6361,7 @@ main: {
|
||||
.label __4 = $18
|
||||
.label __11 = $18
|
||||
.label sb = $17
|
||||
.label sw = $20
|
||||
.label sw = $18
|
||||
// [5] call sin8s_gen
|
||||
// [164] phi from main to sin8s_gen [phi:main->sin8s_gen]
|
||||
sin8s_gen_from_main:
|
||||
@ -6420,13 +6420,15 @@ main: {
|
||||
lda.z __4+1
|
||||
adc #>sintabw
|
||||
sta.z __4+1
|
||||
// [15] (signed word) main::sw#0 ← *((signed word*~) main::$4) -- vwsz1=_deref_pwsz2
|
||||
// [15] (signed word) main::sw#0 ← *((signed word*~) main::$4) -- vwsz1=_deref_pwsz1
|
||||
ldy #0
|
||||
lda (__4),y
|
||||
sta.z sw
|
||||
lda (sw),y
|
||||
pha
|
||||
iny
|
||||
lda (__4),y
|
||||
lda (sw),y
|
||||
sta.z sw+1
|
||||
pla
|
||||
sta.z sw
|
||||
// [16] (byte~) main::$6 ← > (signed word) main::sw#0 -- vbuaa=_hi_vwsz1
|
||||
lda.z sw+1
|
||||
// [17] (signed byte) main::sd#0 ← (signed byte) main::sb#0 - (signed byte)(byte~) main::$6 -- vbsaa=vbsz1_minus_vbsaa
|
||||
@ -6814,14 +6816,14 @@ sin16s: {
|
||||
.label __4 = 6
|
||||
.label x = 6
|
||||
.label return = $18
|
||||
.label x1 = $20
|
||||
.label x1 = $1e
|
||||
.label x2 = $10
|
||||
.label x3 = $10
|
||||
.label x3_6 = $1e
|
||||
.label x3_6 = $20
|
||||
.label usinx = $18
|
||||
.label x4 = $10
|
||||
.label x5 = $1e
|
||||
.label x5_128 = $1e
|
||||
.label x5 = $20
|
||||
.label x5_128 = $20
|
||||
.label sinx = $18
|
||||
.label isUpper = $14
|
||||
// [77] if((dword) sin16s::x#0<(const dword) PI_u4f28) goto sin16s::@1 -- vduz1_lt_vduc1_then_la1
|
||||
@ -7105,7 +7107,7 @@ mulu16_sel: {
|
||||
.label __1 = 6
|
||||
.label v1 = $10
|
||||
.label v2 = $12
|
||||
.label return = $1e
|
||||
.label return = $20
|
||||
.label return_1 = $10
|
||||
.label return_10 = $10
|
||||
// [118] (word) mul16u::a#1 ← (word) mulu16_sel::v1#5 -- vwuz1=vwuz2
|
||||
@ -7147,9 +7149,9 @@ mulu16_sel: {
|
||||
}
|
||||
// mul16u
|
||||
// Perform binary multiplication of two unsigned 16-bit words into a 32-bit unsigned double word
|
||||
// mul16u(word zeropage($1e) a, word zeropage($12) b)
|
||||
// mul16u(word zeropage($20) a, word zeropage($12) b)
|
||||
mul16u: {
|
||||
.label a = $1e
|
||||
.label a = $20
|
||||
.label mb = $a
|
||||
.label res = 6
|
||||
.label b = $12
|
||||
@ -7411,7 +7413,7 @@ divr16u: {
|
||||
sin8s_gen: {
|
||||
.label step = $10
|
||||
.label sintab = $18
|
||||
.label x = $1e
|
||||
.label x = $20
|
||||
.label i = $12
|
||||
// [165] call div16u
|
||||
// [241] phi from sin8s_gen to div16u [phi:sin8s_gen->div16u]
|
||||
@ -7776,7 +7778,7 @@ mulu8_sel: {
|
||||
// Perform binary multiplication of two unsigned 8-bit bytes into a 16-bit unsigned word
|
||||
// mul8u(byte register(X) a, byte register(A) b)
|
||||
mul8u: {
|
||||
.label mb = $20
|
||||
.label mb = $1e
|
||||
.label res = $15
|
||||
.label return = $15
|
||||
// [232] phi from mul8u to mul8u::@1 [phi:mul8u->mul8u::@1]
|
||||
@ -7958,7 +7960,6 @@ Removing instruction jmp __b3
|
||||
Removing instruction jmp __b1
|
||||
Removing instruction jmp __breturn
|
||||
Succesful ASM optimization Pass5NextJumpElimination
|
||||
Removing instruction lda.z sw+1
|
||||
Removing instruction ldy #0
|
||||
Removing instruction lda #0
|
||||
Removing instruction lda #<0
|
||||
@ -8244,7 +8245,7 @@ FINAL SYMBOL TABLE
|
||||
(const signed word[$c0]) main::sintabw sintabw = { fill( $c0, 0) }
|
||||
(const string) main::str str = (string) " "
|
||||
(signed word) main::sw
|
||||
(signed word) main::sw#0 sw zp ZP_WORD:32 22.0
|
||||
(signed word) main::sw#0 sw zp ZP_WORD:24 22.0
|
||||
(const word) main::wavelength wavelength = (byte) $c0
|
||||
(void*()) memset((void*) memset::str , (byte) memset::c , (word) memset::num)
|
||||
(label) memset::@1
|
||||
@ -8270,9 +8271,9 @@ FINAL SYMBOL TABLE
|
||||
(label) mul16u::@4
|
||||
(label) mul16u::@return
|
||||
(word) mul16u::a
|
||||
(word) mul16u::a#0 a zp ZP_WORD:30 101.0
|
||||
(word) mul16u::a#1 a zp ZP_WORD:30 1.3333333333333333
|
||||
(word) mul16u::a#2 a zp ZP_WORD:30 67.66666666666666
|
||||
(word) mul16u::a#0 a zp ZP_WORD:32 101.0
|
||||
(word) mul16u::a#1 a zp ZP_WORD:32 1.3333333333333333
|
||||
(word) mul16u::a#2 a zp ZP_WORD:32 67.66666666666666
|
||||
(word) mul16u::b
|
||||
(word) mul16u::b#0 b zp ZP_WORD:18 2.0
|
||||
(dword) mul16u::mb
|
||||
@ -8298,8 +8299,8 @@ FINAL SYMBOL TABLE
|
||||
(byte) mul8u::b
|
||||
(byte) mul8u::b#0 reg byte a 2.0
|
||||
(word) mul8u::mb
|
||||
(word) mul8u::mb#1 mb zp ZP_WORD:32 202.0
|
||||
(word) mul8u::mb#2 mb zp ZP_WORD:32 43.57142857142858
|
||||
(word) mul8u::mb#1 mb zp ZP_WORD:30 202.0
|
||||
(word) mul8u::mb#2 mb zp ZP_WORD:30 43.57142857142858
|
||||
(word) mul8u::res
|
||||
(word) mul8u::res#1 res zp ZP_WORD:21 202.0
|
||||
(word) mul8u::res#2 res zp ZP_WORD:21 50.83333333333333
|
||||
@ -8312,12 +8313,12 @@ FINAL SYMBOL TABLE
|
||||
(label) mulu16_sel::@1
|
||||
(label) mulu16_sel::@return
|
||||
(word) mulu16_sel::return
|
||||
(word) mulu16_sel::return#0 return zp ZP_WORD:30 4.0
|
||||
(word) mulu16_sel::return#0 return zp ZP_WORD:32 4.0
|
||||
(word) mulu16_sel::return#1 return#1 zp ZP_WORD:16 4.0
|
||||
(word) mulu16_sel::return#10 return#10 zp ZP_WORD:16 4.0
|
||||
(word) mulu16_sel::return#11 return zp ZP_WORD:30 4.0
|
||||
(word) mulu16_sel::return#12 return zp ZP_WORD:30 1.714285714285714
|
||||
(word) mulu16_sel::return#2 return zp ZP_WORD:30 4.0
|
||||
(word) mulu16_sel::return#11 return zp ZP_WORD:32 4.0
|
||||
(word) mulu16_sel::return#12 return zp ZP_WORD:32 1.714285714285714
|
||||
(word) mulu16_sel::return#2 return zp ZP_WORD:32 4.0
|
||||
(byte) mulu16_sel::select
|
||||
(byte) mulu16_sel::select#5 reg byte x 0.3333333333333333
|
||||
(word) mulu16_sel::v1
|
||||
@ -8437,19 +8438,19 @@ FINAL SYMBOL TABLE
|
||||
(dword) sin16s::x#4 x zp ZP_DWORD:6 5.0
|
||||
(dword) sin16s::x#6 x zp ZP_DWORD:6 6.0
|
||||
(word) sin16s::x1
|
||||
(word) sin16s::x1#0 x1 zp ZP_WORD:32 0.6363636363636365
|
||||
(word) sin16s::x1#0 x1 zp ZP_WORD:30 0.6363636363636365
|
||||
(word) sin16s::x2
|
||||
(word) sin16s::x2#0 x2 zp ZP_WORD:16 4.0
|
||||
(word) sin16s::x3
|
||||
(word) sin16s::x3#0 x3 zp ZP_WORD:16 1.0
|
||||
(word) sin16s::x3_6
|
||||
(word) sin16s::x3_6#0 x3_6 zp ZP_WORD:30 4.0
|
||||
(word) sin16s::x3_6#0 x3_6 zp ZP_WORD:32 4.0
|
||||
(word) sin16s::x4
|
||||
(word) sin16s::x4#0 x4 zp ZP_WORD:16 4.0
|
||||
(word) sin16s::x5
|
||||
(word) sin16s::x5#0 x5 zp ZP_WORD:30 4.0
|
||||
(word) sin16s::x5#0 x5 zp ZP_WORD:32 4.0
|
||||
(word) sin16s::x5_128
|
||||
(word) sin16s::x5_128#0 x5_128 zp ZP_WORD:30 4.0
|
||||
(word) sin16s::x5_128#0 x5_128 zp ZP_WORD:32 4.0
|
||||
(void()) sin16s_gen((signed word*) sin16s_gen::sintab , (word) sin16s_gen::wavelength)
|
||||
(signed word~) sin16s_gen::$2 $2 zp ZP_WORD:24 22.0
|
||||
(label) sin16s_gen::@1
|
||||
@ -8537,8 +8538,8 @@ FINAL SYMBOL TABLE
|
||||
(word) sin8s_gen::step#0 step zp ZP_WORD:16 1.1818181818181819
|
||||
(word) sin8s_gen::wavelength
|
||||
(word) sin8s_gen::x
|
||||
(word) sin8s_gen::x#1 x zp ZP_WORD:30 11.0
|
||||
(word) sin8s_gen::x#2 x zp ZP_WORD:30 4.125
|
||||
(word) sin8s_gen::x#1 x zp ZP_WORD:32 11.0
|
||||
(word) sin8s_gen::x#2 x zp ZP_WORD:32 4.125
|
||||
|
||||
reg byte x [ main::i#2 main::i#1 ]
|
||||
reg byte a [ print_char::ch#4 print_char::ch#2 print_char::ch#3 ]
|
||||
@ -8559,15 +8560,15 @@ reg byte x [ mul8u::a#2 mul8u::a#1 mul8u::a#0 ]
|
||||
zp ZP_WORD:21 [ mul8u::res#2 mul8u::res#6 mul8u::res#1 mul8u::return#2 mulu8_sel::$0 mulu8_sel::$1 sin8s::x#6 sin8s::x#4 sin8s::x#0 sin8s::x#1 sin8s::x#2 sin8s::$4 sin16s_gen::i#2 sin16s_gen::i#1 print_char_cursor#28 print_char_cursor#42 print_char_cursor#19 print_char_cursor#10 print_char_cursor#1 ]
|
||||
reg byte a [ mul8u::b#0 ]
|
||||
zp ZP_BYTE:23 [ main::sb#0 sin8s::isUpper#10 ]
|
||||
zp ZP_WORD:24 [ main::$3 main::$11 main::$4 sin8s_gen::sintab#2 sin8s_gen::sintab#0 divr16u::dividend#4 divr16u::dividend#6 divr16u::dividend#0 sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$2 sin16s::usinx#0 ]
|
||||
zp ZP_WORD:24 [ main::$3 main::$11 main::$4 main::sw#0 sin8s_gen::sintab#2 sin8s_gen::sintab#0 divr16u::dividend#4 divr16u::dividend#6 divr16u::dividend#0 sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$2 sin16s::usinx#0 ]
|
||||
reg byte a [ main::$6 ]
|
||||
reg byte a [ main::sd#0 ]
|
||||
reg byte a [ print_byte::$0 ]
|
||||
reg byte a [ print_byte::$2 ]
|
||||
zp ZP_DWORD:26 [ div32u16u::return#2 sin16s_gen::step#0 div32u16u::return#0 ]
|
||||
zp ZP_WORD:30 [ mulu16_sel::return#0 mulu16_sel::return#12 mulu16_sel::return#2 sin16s::x3_6#0 mulu16_sel::return#11 sin16s::x5#0 sin16s::x5_128#0 sin8s_gen::x#2 sin8s_gen::x#1 mul16u::a#2 mul16u::a#1 mul16u::a#0 ]
|
||||
zp ZP_WORD:30 [ sin16s::x1#0 mul8u::mb#2 mul8u::mb#1 ]
|
||||
reg byte a [ mul16u::$1 ]
|
||||
zp ZP_WORD:32 [ div32u16u::quotient_hi#0 sin16s::x1#0 main::sw#0 mul8u::mb#2 mul8u::mb#1 ]
|
||||
zp ZP_WORD:32 [ div32u16u::quotient_hi#0 mulu16_sel::return#0 mulu16_sel::return#12 mulu16_sel::return#2 sin16s::x3_6#0 mulu16_sel::return#11 sin16s::x5#0 sin16s::x5_128#0 sin8s_gen::x#2 sin8s_gen::x#1 mul16u::a#2 mul16u::a#1 mul16u::a#0 ]
|
||||
reg byte a [ divr16u::$1 ]
|
||||
reg byte a [ divr16u::$2 ]
|
||||
reg byte a [ sin8s::return#0 ]
|
||||
@ -8590,7 +8591,7 @@ reg byte a [ mul8u::$1 ]
|
||||
|
||||
|
||||
FINAL ASSEMBLER
|
||||
Score: 31936
|
||||
Score: 32036
|
||||
|
||||
// File Comments
|
||||
// Upstart
|
||||
@ -8628,7 +8629,7 @@ main: {
|
||||
.label __4 = $18
|
||||
.label __11 = $18
|
||||
.label sb = $17
|
||||
.label sw = $20
|
||||
.label sw = $18
|
||||
// sin8s_gen(sintabb, wavelength)
|
||||
// [5] call sin8s_gen
|
||||
// [164] phi from main to sin8s_gen [phi:main->sin8s_gen]
|
||||
@ -8681,15 +8682,18 @@ main: {
|
||||
adc #>sintabw
|
||||
sta.z __4+1
|
||||
// sw = *(sintabw+(word)i)
|
||||
// [15] (signed word) main::sw#0 ← *((signed word*~) main::$4) -- vwsz1=_deref_pwsz2
|
||||
// [15] (signed word) main::sw#0 ← *((signed word*~) main::$4) -- vwsz1=_deref_pwsz1
|
||||
ldy #0
|
||||
lda (__4),y
|
||||
sta.z sw
|
||||
lda (sw),y
|
||||
pha
|
||||
iny
|
||||
lda (__4),y
|
||||
lda (sw),y
|
||||
sta.z sw+1
|
||||
pla
|
||||
sta.z sw
|
||||
// >sw
|
||||
// [16] (byte~) main::$6 ← > (signed word) main::sw#0 -- vbuaa=_hi_vwsz1
|
||||
lda.z sw+1
|
||||
// sd = sb-(signed byte)>sw
|
||||
// [17] (signed byte) main::sd#0 ← (signed byte) main::sb#0 - (signed byte)(byte~) main::$6 -- vbsaa=vbsz1_minus_vbsaa
|
||||
eor #$ff
|
||||
@ -9057,14 +9061,14 @@ sin16s: {
|
||||
.label __4 = 6
|
||||
.label x = 6
|
||||
.label return = $18
|
||||
.label x1 = $20
|
||||
.label x1 = $1e
|
||||
.label x2 = $10
|
||||
.label x3 = $10
|
||||
.label x3_6 = $1e
|
||||
.label x3_6 = $20
|
||||
.label usinx = $18
|
||||
.label x4 = $10
|
||||
.label x5 = $1e
|
||||
.label x5_128 = $1e
|
||||
.label x5 = $20
|
||||
.label x5_128 = $20
|
||||
.label sinx = $18
|
||||
.label isUpper = $14
|
||||
// if(x >= PI_u4f28 )
|
||||
@ -9342,7 +9346,7 @@ mulu16_sel: {
|
||||
.label __1 = 6
|
||||
.label v1 = $10
|
||||
.label v2 = $12
|
||||
.label return = $1e
|
||||
.label return = $20
|
||||
.label return_1 = $10
|
||||
.label return_10 = $10
|
||||
// mul16u(v1, v2)
|
||||
@ -9384,9 +9388,9 @@ mulu16_sel: {
|
||||
}
|
||||
// mul16u
|
||||
// Perform binary multiplication of two unsigned 16-bit words into a 32-bit unsigned double word
|
||||
// mul16u(word zeropage($1e) a, word zeropage($12) b)
|
||||
// mul16u(word zeropage($20) a, word zeropage($12) b)
|
||||
mul16u: {
|
||||
.label a = $1e
|
||||
.label a = $20
|
||||
.label mb = $a
|
||||
.label res = 6
|
||||
.label b = $12
|
||||
@ -9636,7 +9640,7 @@ divr16u: {
|
||||
sin8s_gen: {
|
||||
.label step = $10
|
||||
.label sintab = $18
|
||||
.label x = $1e
|
||||
.label x = $20
|
||||
.label i = $12
|
||||
// div16u(PI2_u4f12, wavelength)
|
||||
// [165] call div16u
|
||||
@ -9990,7 +9994,7 @@ mulu8_sel: {
|
||||
// Perform binary multiplication of two unsigned 8-bit bytes into a 16-bit unsigned word
|
||||
// mul8u(byte register(X) a, byte register(A) b)
|
||||
mul8u: {
|
||||
.label mb = $20
|
||||
.label mb = $1e
|
||||
.label res = $15
|
||||
.label return = $15
|
||||
// [232] phi from mul8u to mul8u::@1 [phi:mul8u->mul8u::@1]
|
||||
|
||||
@ -92,7 +92,7 @@
|
||||
(const signed word[$c0]) main::sintabw sintabw = { fill( $c0, 0) }
|
||||
(const string) main::str str = (string) " "
|
||||
(signed word) main::sw
|
||||
(signed word) main::sw#0 sw zp ZP_WORD:32 22.0
|
||||
(signed word) main::sw#0 sw zp ZP_WORD:24 22.0
|
||||
(const word) main::wavelength wavelength = (byte) $c0
|
||||
(void*()) memset((void*) memset::str , (byte) memset::c , (word) memset::num)
|
||||
(label) memset::@1
|
||||
@ -118,9 +118,9 @@
|
||||
(label) mul16u::@4
|
||||
(label) mul16u::@return
|
||||
(word) mul16u::a
|
||||
(word) mul16u::a#0 a zp ZP_WORD:30 101.0
|
||||
(word) mul16u::a#1 a zp ZP_WORD:30 1.3333333333333333
|
||||
(word) mul16u::a#2 a zp ZP_WORD:30 67.66666666666666
|
||||
(word) mul16u::a#0 a zp ZP_WORD:32 101.0
|
||||
(word) mul16u::a#1 a zp ZP_WORD:32 1.3333333333333333
|
||||
(word) mul16u::a#2 a zp ZP_WORD:32 67.66666666666666
|
||||
(word) mul16u::b
|
||||
(word) mul16u::b#0 b zp ZP_WORD:18 2.0
|
||||
(dword) mul16u::mb
|
||||
@ -146,8 +146,8 @@
|
||||
(byte) mul8u::b
|
||||
(byte) mul8u::b#0 reg byte a 2.0
|
||||
(word) mul8u::mb
|
||||
(word) mul8u::mb#1 mb zp ZP_WORD:32 202.0
|
||||
(word) mul8u::mb#2 mb zp ZP_WORD:32 43.57142857142858
|
||||
(word) mul8u::mb#1 mb zp ZP_WORD:30 202.0
|
||||
(word) mul8u::mb#2 mb zp ZP_WORD:30 43.57142857142858
|
||||
(word) mul8u::res
|
||||
(word) mul8u::res#1 res zp ZP_WORD:21 202.0
|
||||
(word) mul8u::res#2 res zp ZP_WORD:21 50.83333333333333
|
||||
@ -160,12 +160,12 @@
|
||||
(label) mulu16_sel::@1
|
||||
(label) mulu16_sel::@return
|
||||
(word) mulu16_sel::return
|
||||
(word) mulu16_sel::return#0 return zp ZP_WORD:30 4.0
|
||||
(word) mulu16_sel::return#0 return zp ZP_WORD:32 4.0
|
||||
(word) mulu16_sel::return#1 return#1 zp ZP_WORD:16 4.0
|
||||
(word) mulu16_sel::return#10 return#10 zp ZP_WORD:16 4.0
|
||||
(word) mulu16_sel::return#11 return zp ZP_WORD:30 4.0
|
||||
(word) mulu16_sel::return#12 return zp ZP_WORD:30 1.714285714285714
|
||||
(word) mulu16_sel::return#2 return zp ZP_WORD:30 4.0
|
||||
(word) mulu16_sel::return#11 return zp ZP_WORD:32 4.0
|
||||
(word) mulu16_sel::return#12 return zp ZP_WORD:32 1.714285714285714
|
||||
(word) mulu16_sel::return#2 return zp ZP_WORD:32 4.0
|
||||
(byte) mulu16_sel::select
|
||||
(byte) mulu16_sel::select#5 reg byte x 0.3333333333333333
|
||||
(word) mulu16_sel::v1
|
||||
@ -285,19 +285,19 @@
|
||||
(dword) sin16s::x#4 x zp ZP_DWORD:6 5.0
|
||||
(dword) sin16s::x#6 x zp ZP_DWORD:6 6.0
|
||||
(word) sin16s::x1
|
||||
(word) sin16s::x1#0 x1 zp ZP_WORD:32 0.6363636363636365
|
||||
(word) sin16s::x1#0 x1 zp ZP_WORD:30 0.6363636363636365
|
||||
(word) sin16s::x2
|
||||
(word) sin16s::x2#0 x2 zp ZP_WORD:16 4.0
|
||||
(word) sin16s::x3
|
||||
(word) sin16s::x3#0 x3 zp ZP_WORD:16 1.0
|
||||
(word) sin16s::x3_6
|
||||
(word) sin16s::x3_6#0 x3_6 zp ZP_WORD:30 4.0
|
||||
(word) sin16s::x3_6#0 x3_6 zp ZP_WORD:32 4.0
|
||||
(word) sin16s::x4
|
||||
(word) sin16s::x4#0 x4 zp ZP_WORD:16 4.0
|
||||
(word) sin16s::x5
|
||||
(word) sin16s::x5#0 x5 zp ZP_WORD:30 4.0
|
||||
(word) sin16s::x5#0 x5 zp ZP_WORD:32 4.0
|
||||
(word) sin16s::x5_128
|
||||
(word) sin16s::x5_128#0 x5_128 zp ZP_WORD:30 4.0
|
||||
(word) sin16s::x5_128#0 x5_128 zp ZP_WORD:32 4.0
|
||||
(void()) sin16s_gen((signed word*) sin16s_gen::sintab , (word) sin16s_gen::wavelength)
|
||||
(signed word~) sin16s_gen::$2 $2 zp ZP_WORD:24 22.0
|
||||
(label) sin16s_gen::@1
|
||||
@ -385,8 +385,8 @@
|
||||
(word) sin8s_gen::step#0 step zp ZP_WORD:16 1.1818181818181819
|
||||
(word) sin8s_gen::wavelength
|
||||
(word) sin8s_gen::x
|
||||
(word) sin8s_gen::x#1 x zp ZP_WORD:30 11.0
|
||||
(word) sin8s_gen::x#2 x zp ZP_WORD:30 4.125
|
||||
(word) sin8s_gen::x#1 x zp ZP_WORD:32 11.0
|
||||
(word) sin8s_gen::x#2 x zp ZP_WORD:32 4.125
|
||||
|
||||
reg byte x [ main::i#2 main::i#1 ]
|
||||
reg byte a [ print_char::ch#4 print_char::ch#2 print_char::ch#3 ]
|
||||
@ -407,15 +407,15 @@ reg byte x [ mul8u::a#2 mul8u::a#1 mul8u::a#0 ]
|
||||
zp ZP_WORD:21 [ mul8u::res#2 mul8u::res#6 mul8u::res#1 mul8u::return#2 mulu8_sel::$0 mulu8_sel::$1 sin8s::x#6 sin8s::x#4 sin8s::x#0 sin8s::x#1 sin8s::x#2 sin8s::$4 sin16s_gen::i#2 sin16s_gen::i#1 print_char_cursor#28 print_char_cursor#42 print_char_cursor#19 print_char_cursor#10 print_char_cursor#1 ]
|
||||
reg byte a [ mul8u::b#0 ]
|
||||
zp ZP_BYTE:23 [ main::sb#0 sin8s::isUpper#10 ]
|
||||
zp ZP_WORD:24 [ main::$3 main::$11 main::$4 sin8s_gen::sintab#2 sin8s_gen::sintab#0 divr16u::dividend#4 divr16u::dividend#6 divr16u::dividend#0 sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$2 sin16s::usinx#0 ]
|
||||
zp ZP_WORD:24 [ main::$3 main::$11 main::$4 main::sw#0 sin8s_gen::sintab#2 sin8s_gen::sintab#0 divr16u::dividend#4 divr16u::dividend#6 divr16u::dividend#0 sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$2 sin16s::usinx#0 ]
|
||||
reg byte a [ main::$6 ]
|
||||
reg byte a [ main::sd#0 ]
|
||||
reg byte a [ print_byte::$0 ]
|
||||
reg byte a [ print_byte::$2 ]
|
||||
zp ZP_DWORD:26 [ div32u16u::return#2 sin16s_gen::step#0 div32u16u::return#0 ]
|
||||
zp ZP_WORD:30 [ mulu16_sel::return#0 mulu16_sel::return#12 mulu16_sel::return#2 sin16s::x3_6#0 mulu16_sel::return#11 sin16s::x5#0 sin16s::x5_128#0 sin8s_gen::x#2 sin8s_gen::x#1 mul16u::a#2 mul16u::a#1 mul16u::a#0 ]
|
||||
zp ZP_WORD:30 [ sin16s::x1#0 mul8u::mb#2 mul8u::mb#1 ]
|
||||
reg byte a [ mul16u::$1 ]
|
||||
zp ZP_WORD:32 [ div32u16u::quotient_hi#0 sin16s::x1#0 main::sw#0 mul8u::mb#2 mul8u::mb#1 ]
|
||||
zp ZP_WORD:32 [ div32u16u::quotient_hi#0 mulu16_sel::return#0 mulu16_sel::return#12 mulu16_sel::return#2 sin16s::x3_6#0 mulu16_sel::return#11 sin16s::x5#0 sin16s::x5_128#0 sin8s_gen::x#2 sin8s_gen::x#1 mul16u::a#2 mul16u::a#1 mul16u::a#0 ]
|
||||
reg byte a [ divr16u::$1 ]
|
||||
reg byte a [ divr16u::$2 ]
|
||||
reg byte a [ sin8s::return#0 ]
|
||||
|
||||
Loading…
Reference in New Issue
Block a user