From e66705c103c7ec3a633da8704ee213fbb0f7278b Mon Sep 17 00:00:00 2001 From: jespergravgaard Date: Thu, 30 Jul 2020 00:25:06 +0200 Subject: [PATCH] Syntax for clobber aligned. --- .../cpufamily6502/cpus/Cpu45GS02.java | 2 +- .../cpufamily6502/cpus/Cpu6502Illegal.java | 114 ++++----- .../cpufamily6502/cpus/Cpu6502Official.java | 228 +++++++++--------- .../cpufamily6502/cpus/Cpu65C02.java | 2 +- .../cpufamily6502/cpus/Cpu65CE02.java | 24 +- 5 files changed, 185 insertions(+), 185 deletions(-) diff --git a/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu45GS02.java b/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu45GS02.java index dd0a634c8..4eb343c91 100644 --- a/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu45GS02.java +++ b/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu45GS02.java @@ -11,7 +11,7 @@ public class Cpu45GS02 extends Cpu65xx { /** The 45GS02 CPU name. */ public final static String NAME = "45gs02"; - /** The 45GS02 with illegal CPU. */ + /** The 45GS02 CPU. */ public final static Cpu45GS02 INSTANCE = new Cpu45GS02(); public Cpu45GS02() { diff --git a/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu6502Illegal.java b/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu6502Illegal.java index 13a7d6420..60f5c3da0 100644 --- a/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu6502Illegal.java +++ b/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu6502Illegal.java @@ -17,41 +17,41 @@ public class Cpu6502Illegal extends Cpu65xx { public Cpu6502Illegal() { super(NAME, Cpu6502Official.INSTANCE); - addOpcode(0x03, "slo", CpuAddressingMode.IZX, 8.0, "Aczn"); - addOpcode(0x07, "slo", CpuAddressingMode.ZP, 5.0, "Aczn"); - addOpcode(0x0b, "anc", CpuAddressingMode.IMM, 2.0, "Aczn"); - addOpcode(0x0f, "slo", CpuAddressingMode.ABS, 6.0, "Aczn"); - addOpcode(0x13, "slo", CpuAddressingMode.IZY, 8.0, "Aczn"); - addOpcode(0x17, "slo", CpuAddressingMode.ZPX, 6.0, "Aczn"); - addOpcode(0x1b, "slo", CpuAddressingMode.ABY, 7.0, "Aczn"); - addOpcode(0x1f, "slo", CpuAddressingMode.ABX, 7.0, "Aczn"); - addOpcode(0x23, "rla", CpuAddressingMode.IZX, 8.0, "Aczn"); - addOpcode(0x27, "rla", CpuAddressingMode.ZP, 5.0, "Aczn"); - addOpcode(0x2b, "anc", CpuAddressingMode.IMM, 2.0, "Aczn"); - addOpcode(0x2f, "rla", CpuAddressingMode.ABS, 6.0, "Aczn"); - addOpcode(0x33, "rla", CpuAddressingMode.IZY, 8.0, "Aczn"); - addOpcode(0x37, "rla", CpuAddressingMode.ZPX, 6.0, "Aczn"); - addOpcode(0x3b, "rla", CpuAddressingMode.ABY, 7.0, "Aczn"); - addOpcode(0x3f, "rla", CpuAddressingMode.ABX, 7.0, "Aczn"); - addOpcode(0x43, "sre", CpuAddressingMode.IZX, 8.0, "Aczn"); - addOpcode(0x47, "sre", CpuAddressingMode.ZP, 5.0, "Aczn"); - addOpcode(0x4b, "alr", CpuAddressingMode.IMM, 2.0, "Aczn"); - addOpcode(0x4f, "sre", CpuAddressingMode.ABS, 6.0, "Aczn"); - addOpcode(0x53, "sre", CpuAddressingMode.IZY, 8.0, "Aczn"); - addOpcode(0x57, "sre", CpuAddressingMode.ZPX, 6.0, "Aczn"); - addOpcode(0x5b, "sre", CpuAddressingMode.ABY, 7.0, "Aczn"); - addOpcode(0x5f, "sre", CpuAddressingMode.ABX, 7.0, "Aczn"); - addOpcode(0x63, "rra", CpuAddressingMode.IZX, 8.0, "Acvzn"); - addOpcode(0x67, "rra", CpuAddressingMode.ZP, 5.0, "Acvzn"); - addOpcode(0x6b, "arr", CpuAddressingMode.IMM, 2.0, "Acvzn"); - addOpcode(0x6f, "rra", CpuAddressingMode.ABS, 6.0, "Acvzn"); - addOpcode(0x73, "rra", CpuAddressingMode.IZY, 8.0, "Acvzn"); - addOpcode(0x77, "rra", CpuAddressingMode.ZPX, 6.0, "Acvzn"); - addOpcode(0x7b, "rra", CpuAddressingMode.ABY, 7.0, "Acvzn"); - addOpcode(0x7f, "rra", CpuAddressingMode.ABX, 7.0, "Acvzn"); + addOpcode(0x03, "slo", CpuAddressingMode.IZX, 8.0, "Acnz"); + addOpcode(0x07, "slo", CpuAddressingMode.ZP, 5.0, "Acnz"); + addOpcode(0x0b, "anc", CpuAddressingMode.IMM, 2.0, "Acnz"); + addOpcode(0x0f, "slo", CpuAddressingMode.ABS, 6.0, "Acnz"); + addOpcode(0x13, "slo", CpuAddressingMode.IZY, 8.0, "Acnz"); + addOpcode(0x17, "slo", CpuAddressingMode.ZPX, 6.0, "Acnz"); + addOpcode(0x1b, "slo", CpuAddressingMode.ABY, 7.0, "Acnz"); + addOpcode(0x1f, "slo", CpuAddressingMode.ABX, 7.0, "Acnz"); + addOpcode(0x23, "rla", CpuAddressingMode.IZX, 8.0, "Acnz"); + addOpcode(0x27, "rla", CpuAddressingMode.ZP, 5.0, "Acnz"); + addOpcode(0x2b, "anc", CpuAddressingMode.IMM, 2.0, "Acnz"); + addOpcode(0x2f, "rla", CpuAddressingMode.ABS, 6.0, "Acnz"); + addOpcode(0x33, "rla", CpuAddressingMode.IZY, 8.0, "Acnz"); + addOpcode(0x37, "rla", CpuAddressingMode.ZPX, 6.0, "Acnz"); + addOpcode(0x3b, "rla", CpuAddressingMode.ABY, 7.0, "Acnz"); + addOpcode(0x3f, "rla", CpuAddressingMode.ABX, 7.0, "Acnz"); + addOpcode(0x43, "sre", CpuAddressingMode.IZX, 8.0, "Acnz"); + addOpcode(0x47, "sre", CpuAddressingMode.ZP, 5.0, "Acnz"); + addOpcode(0x4b, "alr", CpuAddressingMode.IMM, 2.0, "Acnz"); + addOpcode(0x4f, "sre", CpuAddressingMode.ABS, 6.0, "Acnz"); + addOpcode(0x53, "sre", CpuAddressingMode.IZY, 8.0, "Acnz"); + addOpcode(0x57, "sre", CpuAddressingMode.ZPX, 6.0, "Acnz"); + addOpcode(0x5b, "sre", CpuAddressingMode.ABY, 7.0, "Acnz"); + addOpcode(0x5f, "sre", CpuAddressingMode.ABX, 7.0, "Acnz"); + addOpcode(0x63, "rra", CpuAddressingMode.IZX, 8.0, "Acvnz"); + addOpcode(0x67, "rra", CpuAddressingMode.ZP, 5.0, "Acvnz"); + addOpcode(0x6b, "arr", CpuAddressingMode.IMM, 2.0, "Acvnz"); + addOpcode(0x6f, "rra", CpuAddressingMode.ABS, 6.0, "Acvnz"); + addOpcode(0x73, "rra", CpuAddressingMode.IZY, 8.0, "Acvnz"); + addOpcode(0x77, "rra", CpuAddressingMode.ZPX, 6.0, "Acvnz"); + addOpcode(0x7b, "rra", CpuAddressingMode.ABY, 7.0, "Acvnz"); + addOpcode(0x7f, "rra", CpuAddressingMode.ABX, 7.0, "Acvnz"); addOpcode(0x83, "sax", CpuAddressingMode.IZX, 6.0, ""); addOpcode(0x87, "sax", CpuAddressingMode.ZP, 3.0, ""); - addOpcode(0x8b, "xaa", CpuAddressingMode.IMM, 2.0, "Azn"); + addOpcode(0x8b, "xaa", CpuAddressingMode.IMM, 2.0, "Anz"); addOpcode(0x8f, "sax", CpuAddressingMode.ABS, 4.0, ""); addOpcode(0x93, "ahx", CpuAddressingMode.IZY, 6.0, ""); addOpcode(0x97, "sax", CpuAddressingMode.ZPY, 4.0, ""); @@ -59,30 +59,30 @@ public class Cpu6502Illegal extends Cpu65xx { addOpcode(0x9c, "shy", CpuAddressingMode.ABX, 5.0, ""); addOpcode(0x9e, "shx", CpuAddressingMode.ABY, 5.0, ""); addOpcode(0x9f, "ahx", CpuAddressingMode.ABY, 5.0, ""); - addOpcode(0xa3, "lax", CpuAddressingMode.IZX, 6.0, "AXzn"); - addOpcode(0xa7, "lax", CpuAddressingMode.ZP, 3.0, "AXzn"); - addOpcode(0xab, "lax", CpuAddressingMode.IMM, 2.0, "AXzn"); - addOpcode(0xaf, "lax", CpuAddressingMode.ABS, 4.0, "AXzn"); - addOpcode(0xb3, "lax", CpuAddressingMode.IZY, 5.5, "AXzn"); - addOpcode(0xb7, "lax", CpuAddressingMode.ZPY, 4.0, "AXzn"); - addOpcode(0xbb, "las", CpuAddressingMode.ABY, 4.5, "AXzn"); - addOpcode(0xbf, "lax", CpuAddressingMode.ABY, 4.5, "AXzn"); - addOpcode(0xc3, "dcp", CpuAddressingMode.IZX, 8.0, "czn"); - addOpcode(0xc7, "dcp", CpuAddressingMode.ZP, 5.0, "czn"); - addOpcode(0xcb, "axs", CpuAddressingMode.IMM, 2.0, "Xczn"); - addOpcode(0xcf, "dcp", CpuAddressingMode.ABS, 6.0, "czn"); - addOpcode(0xd3, "dcp", CpuAddressingMode.IZY, 8.0, "czn"); - addOpcode(0xd7, "dcp", CpuAddressingMode.ZPX, 6.0, "czn"); - addOpcode(0xdb, "dcp", CpuAddressingMode.ABY, 7.0, "czn"); - addOpcode(0xe2, "isc", CpuAddressingMode.IZX, 8.0, "Acvzn"); - addOpcode(0xe6, "isc", CpuAddressingMode.ZP, 5.0, "Acvzn"); - addOpcode(0xea, "sbc", CpuAddressingMode.IMM, 2.0, "Acvzn"); - addOpcode(0xee, "isc", CpuAddressingMode.ABS, 6.0, "Acvzn"); - addOpcode(0xef, "dcp", CpuAddressingMode.ABX, 7.0, "czn"); - addOpcode(0xf3, "isc", CpuAddressingMode.IZY, 8.0, "Acvzn"); - addOpcode(0xf7, "isc", CpuAddressingMode.ZPX, 6.0, "Acvzn"); - addOpcode(0xfb, "isc", CpuAddressingMode.ABY, 7.0, "Acvzn"); - addOpcode(0xff, "isc", CpuAddressingMode.ABX, 7.0, "Acvzn"); + addOpcode(0xa3, "lax", CpuAddressingMode.IZX, 6.0, "AXnz"); + addOpcode(0xa7, "lax", CpuAddressingMode.ZP, 3.0, "AXnz"); + addOpcode(0xab, "lax", CpuAddressingMode.IMM, 2.0, "AXnz"); + addOpcode(0xaf, "lax", CpuAddressingMode.ABS, 4.0, "AXnz"); + addOpcode(0xb3, "lax", CpuAddressingMode.IZY, 5.5, "AXnz"); + addOpcode(0xb7, "lax", CpuAddressingMode.ZPY, 4.0, "AXnz"); + addOpcode(0xbb, "las", CpuAddressingMode.ABY, 4.5, "AXnz"); + addOpcode(0xbf, "lax", CpuAddressingMode.ABY, 4.5, "AXnz"); + addOpcode(0xc3, "dcp", CpuAddressingMode.IZX, 8.0, "cnz"); + addOpcode(0xc7, "dcp", CpuAddressingMode.ZP, 5.0, "cnz"); + addOpcode(0xcb, "axs", CpuAddressingMode.IMM, 2.0, "Xcnz"); + addOpcode(0xcf, "dcp", CpuAddressingMode.ABS, 6.0, "cnz"); + addOpcode(0xd3, "dcp", CpuAddressingMode.IZY, 8.0, "cnz"); + addOpcode(0xd7, "dcp", CpuAddressingMode.ZPX, 6.0, "cnz"); + addOpcode(0xdb, "dcp", CpuAddressingMode.ABY, 7.0, "cnz"); + addOpcode(0xe2, "isc", CpuAddressingMode.IZX, 8.0, "Acvnz"); + addOpcode(0xe6, "isc", CpuAddressingMode.ZP, 5.0, "Acvnz"); + addOpcode(0xea, "sbc", CpuAddressingMode.IMM, 2.0, "Acvnz"); + addOpcode(0xee, "isc", CpuAddressingMode.ABS, 6.0, "Acvnz"); + addOpcode(0xef, "dcp", CpuAddressingMode.ABX, 7.0, "cnz"); + addOpcode(0xf3, "isc", CpuAddressingMode.IZY, 8.0, "Acvnz"); + addOpcode(0xf7, "isc", CpuAddressingMode.ZPX, 6.0, "Acvnz"); + addOpcode(0xfb, "isc", CpuAddressingMode.ABY, 7.0, "Acvnz"); + addOpcode(0xff, "isc", CpuAddressingMode.ABX, 7.0, "Acvnz"); } } diff --git a/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu6502Official.java b/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu6502Official.java index 9ea5be590..72ba034e2 100644 --- a/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu6502Official.java +++ b/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu6502Official.java @@ -19,83 +19,83 @@ public class Cpu6502Official extends Cpu65xx { public Cpu6502Official() { super(NAME); addOpcode(0x00, "brk", CpuAddressingMode.NON, 7.0, ""); - addOpcode(0x01, "ora", CpuAddressingMode.IZX, 6.0, "Azn"); - addOpcode(0x05, "ora", CpuAddressingMode.ZP, 3.0, "Azn"); - addOpcode(0x06, "asl", CpuAddressingMode.ZP, 5.0, "czn"); + addOpcode(0x01, "ora", CpuAddressingMode.IZX, 6.0, "Anz"); + addOpcode(0x05, "ora", CpuAddressingMode.ZP, 3.0, "Anz"); + addOpcode(0x06, "asl", CpuAddressingMode.ZP, 5.0, "cnz"); addOpcode(0x08, "php", CpuAddressingMode.NON, 3.0, "S"); - addOpcode(0x09, "ora", CpuAddressingMode.IMM, 2.0, "Azn"); - addOpcode(0x0a, "asl", CpuAddressingMode.NON, 2.0, "Aczn"); - addOpcode(0x0d, "ora", CpuAddressingMode.ABS, 4.0, "Azn"); - addOpcode(0x0e, "asl", CpuAddressingMode.ABS, 6.0, "czn"); + addOpcode(0x09, "ora", CpuAddressingMode.IMM, 2.0, "Anz"); + addOpcode(0x0a, "asl", CpuAddressingMode.NON, 2.0, "Acnz"); + addOpcode(0x0d, "ora", CpuAddressingMode.ABS, 4.0, "Anz"); + addOpcode(0x0e, "asl", CpuAddressingMode.ABS, 6.0, "cnz"); addOpcode(0x10, "bpl", CpuAddressingMode.REL, 2.5, "P"); - addOpcode(0x11, "ora", CpuAddressingMode.IZY, 5.5, "Azn"); - addOpcode(0x15, "ora", CpuAddressingMode.ZPX, 4.0, "Azn"); - addOpcode(0x16, "asl", CpuAddressingMode.ZPX, 6.0, "czn"); + addOpcode(0x11, "ora", CpuAddressingMode.IZY, 5.5, "Anz"); + addOpcode(0x15, "ora", CpuAddressingMode.ZPX, 4.0, "Anz"); + addOpcode(0x16, "asl", CpuAddressingMode.ZPX, 6.0, "cnz"); addOpcode(0x18, "clc", CpuAddressingMode.NON, 2.0, "c"); - addOpcode(0x19, "ora", CpuAddressingMode.ABY, 4.5, "Azn"); - addOpcode(0x1d, "ora", CpuAddressingMode.ABX, 4.5, "Azn"); - addOpcode(0x1e, "asl", CpuAddressingMode.ABX, 7.0, "czn"); + addOpcode(0x19, "ora", CpuAddressingMode.ABY, 4.5, "Anz"); + addOpcode(0x1d, "ora", CpuAddressingMode.ABX, 4.5, "Anz"); + addOpcode(0x1e, "asl", CpuAddressingMode.ABX, 7.0, "cnz"); addOpcode(0x20, "jsr", CpuAddressingMode.ABS, 6.0, "PS"); - addOpcode(0x21, "and", CpuAddressingMode.IZX, 6.0, "Azn"); - addOpcode(0x24, "bit", CpuAddressingMode.ZP, 3.0, "vzn"); - addOpcode(0x25, "and", CpuAddressingMode.ZP, 3.0, "Azn"); - addOpcode(0x26, "rol", CpuAddressingMode.ZP, 5.0, "czn"); - addOpcode(0x28, "plp", CpuAddressingMode.NON, 4.0, "cvznS"); - addOpcode(0x29, "and", CpuAddressingMode.IMM, 2.0, "Azn"); - addOpcode(0x2a, "rol", CpuAddressingMode.NON, 2.0, "Aczn"); - addOpcode(0x2c, "bit", CpuAddressingMode.ABS, 4.0, "vzn"); - addOpcode(0x2d, "and", CpuAddressingMode.ABS, 4.0, "Azn"); - addOpcode(0x2e, "rol", CpuAddressingMode.ABS, 6.0, "czn"); + addOpcode(0x21, "and", CpuAddressingMode.IZX, 6.0, "Anz"); + addOpcode(0x24, "bit", CpuAddressingMode.ZP, 3.0, "vnz"); + addOpcode(0x25, "and", CpuAddressingMode.ZP, 3.0, "Anz"); + addOpcode(0x26, "rol", CpuAddressingMode.ZP, 5.0, "cnz"); + addOpcode(0x28, "plp", CpuAddressingMode.NON, 4.0, "cvnzS"); + addOpcode(0x29, "and", CpuAddressingMode.IMM, 2.0, "Anz"); + addOpcode(0x2a, "rol", CpuAddressingMode.NON, 2.0, "Acnz"); + addOpcode(0x2c, "bit", CpuAddressingMode.ABS, 4.0, "vnz"); + addOpcode(0x2d, "and", CpuAddressingMode.ABS, 4.0, "Anz"); + addOpcode(0x2e, "rol", CpuAddressingMode.ABS, 6.0, "cnz"); addOpcode(0x30, "bmi", CpuAddressingMode.REL, 2.5, "P"); - addOpcode(0x31, "and", CpuAddressingMode.IZY, 5.5, "Azn"); - addOpcode(0x35, "and", CpuAddressingMode.ZPX, 4.0, "Azn"); - addOpcode(0x36, "rol", CpuAddressingMode.ZPX, 6.0, "czn"); + addOpcode(0x31, "and", CpuAddressingMode.IZY, 5.5, "Anz"); + addOpcode(0x35, "and", CpuAddressingMode.ZPX, 4.0, "Anz"); + addOpcode(0x36, "rol", CpuAddressingMode.ZPX, 6.0, "cnz"); addOpcode(0x38, "sec", CpuAddressingMode.NON, 2.0, "c"); - addOpcode(0x39, "and", CpuAddressingMode.ABY, 4.5, "Azn"); - addOpcode(0x3d, "and", CpuAddressingMode.ABX, 4.5, "Azn"); - addOpcode(0x3e, "rol", CpuAddressingMode.ABX, 7.0, "czn"); - addOpcode(0x40, "rti", CpuAddressingMode.NON, 6.0, "cvznPS"); - addOpcode(0x41, "eor", CpuAddressingMode.IZX, 6.0, "Azn"); - addOpcode(0x45, "eor", CpuAddressingMode.ZP, 3.0, "Azn"); - addOpcode(0x46, "lsr", CpuAddressingMode.ZP, 5.0, "czn"); + addOpcode(0x39, "and", CpuAddressingMode.ABY, 4.5, "Anz"); + addOpcode(0x3d, "and", CpuAddressingMode.ABX, 4.5, "Anz"); + addOpcode(0x3e, "rol", CpuAddressingMode.ABX, 7.0, "cnz"); + addOpcode(0x40, "rti", CpuAddressingMode.NON, 6.0, "cvnzPS"); + addOpcode(0x41, "eor", CpuAddressingMode.IZX, 6.0, "Anz"); + addOpcode(0x45, "eor", CpuAddressingMode.ZP, 3.0, "Anz"); + addOpcode(0x46, "lsr", CpuAddressingMode.ZP, 5.0, "cnz"); addOpcode(0x48, "pha", CpuAddressingMode.NON, 3.0, "S"); - addOpcode(0x49, "eor", CpuAddressingMode.IMM, 2.0, "Azn"); - addOpcode(0x4a, "lsr", CpuAddressingMode.NON, 2.0, "Aczn"); + addOpcode(0x49, "eor", CpuAddressingMode.IMM, 2.0, "Anz"); + addOpcode(0x4a, "lsr", CpuAddressingMode.NON, 2.0, "Acnz"); addOpcode(0x4c, "jmp", CpuAddressingMode.ABS, 3.0, "P"); - addOpcode(0x4d, "eor", CpuAddressingMode.ABS, 4.0, "Azn"); - addOpcode(0x4e, "lsr", CpuAddressingMode.ABS, 6.0, "czn"); + addOpcode(0x4d, "eor", CpuAddressingMode.ABS, 4.0, "Anz"); + addOpcode(0x4e, "lsr", CpuAddressingMode.ABS, 6.0, "cnz"); addOpcode(0x50, "bvc", CpuAddressingMode.REL, 2.5, "P"); - addOpcode(0x51, "eor", CpuAddressingMode.IZY, 5.5, "Azn"); - addOpcode(0x55, "eor", CpuAddressingMode.ZPX, 4.0, "Azn"); - addOpcode(0x56, "lsr", CpuAddressingMode.ZPX, 6.0, "czn"); + addOpcode(0x51, "eor", CpuAddressingMode.IZY, 5.5, "Anz"); + addOpcode(0x55, "eor", CpuAddressingMode.ZPX, 4.0, "Anz"); + addOpcode(0x56, "lsr", CpuAddressingMode.ZPX, 6.0, "cnz"); addOpcode(0x58, "cli", CpuAddressingMode.NON, 2.0, "i"); - addOpcode(0x59, "eor", CpuAddressingMode.ABY, 4.5, "Azn"); - addOpcode(0x5d, "eor", CpuAddressingMode.ABX, 4.5, "Azn"); - addOpcode(0x5e, "lsr", CpuAddressingMode.ABX, 7.0, "czn"); + addOpcode(0x59, "eor", CpuAddressingMode.ABY, 4.5, "Anz"); + addOpcode(0x5d, "eor", CpuAddressingMode.ABX, 4.5, "Anz"); + addOpcode(0x5e, "lsr", CpuAddressingMode.ABX, 7.0, "cnz"); addOpcode(0x60, "rts", CpuAddressingMode.NON, 6.0, "PS"); - addOpcode(0x61, "adc", CpuAddressingMode.IZX, 6.0, "Acvzn"); - addOpcode(0x65, "adc", CpuAddressingMode.ZP, 3.0, "Acvzn"); - addOpcode(0x66, "ror", CpuAddressingMode.ZP, 5.0, "czn"); - addOpcode(0x68, "pla", CpuAddressingMode.NON, 4.0, "AznS"); - addOpcode(0x69, "adc", CpuAddressingMode.IMM, 2.0, "Acvzn"); - addOpcode(0x6a, "ror", CpuAddressingMode.NON, 2.0, "Aczn"); + addOpcode(0x61, "adc", CpuAddressingMode.IZX, 6.0, "Acvnz"); + addOpcode(0x65, "adc", CpuAddressingMode.ZP, 3.0, "Acvnz"); + addOpcode(0x66, "ror", CpuAddressingMode.ZP, 5.0, "cnz"); + addOpcode(0x68, "pla", CpuAddressingMode.NON, 4.0, "AnzS"); + addOpcode(0x69, "adc", CpuAddressingMode.IMM, 2.0, "Acvnz"); + addOpcode(0x6a, "ror", CpuAddressingMode.NON, 2.0, "Acnz"); addOpcode(0x6c, "jmp", CpuAddressingMode.IND, 5.0, "P"); - addOpcode(0x6d, "adc", CpuAddressingMode.ABS, 4.0, "Acvzn"); - addOpcode(0x6e, "ror", CpuAddressingMode.ABS, 6.0, "czn"); + addOpcode(0x6d, "adc", CpuAddressingMode.ABS, 4.0, "Acvnz"); + addOpcode(0x6e, "ror", CpuAddressingMode.ABS, 6.0, "cnz"); addOpcode(0x70, "bvs", CpuAddressingMode.REL, 2.5, "P"); - addOpcode(0x71, "adc", CpuAddressingMode.IZY, 5.5, "Acvzn"); - addOpcode(0x75, "adc", CpuAddressingMode.ZPX, 4.0, "Acvzn"); - addOpcode(0x76, "ror", CpuAddressingMode.ZPX, 6.0, "czn"); + addOpcode(0x71, "adc", CpuAddressingMode.IZY, 5.5, "Acvnz"); + addOpcode(0x75, "adc", CpuAddressingMode.ZPX, 4.0, "Acvnz"); + addOpcode(0x76, "ror", CpuAddressingMode.ZPX, 6.0, "cnz"); addOpcode(0x78, "sei", CpuAddressingMode.NON, 2.0, "i"); - addOpcode(0x79, "adc", CpuAddressingMode.ABY, 4.5, "Acvzn"); - addOpcode(0x7d, "adc", CpuAddressingMode.ABX, 4.5, "Acvzn"); - addOpcode(0x7e, "ror", CpuAddressingMode.ABX, 7.0, "czn"); + addOpcode(0x79, "adc", CpuAddressingMode.ABY, 4.5, "Acvnz"); + addOpcode(0x7d, "adc", CpuAddressingMode.ABX, 4.5, "Acvnz"); + addOpcode(0x7e, "ror", CpuAddressingMode.ABX, 7.0, "cnz"); addOpcode(0x81, "sta", CpuAddressingMode.IZX, 6.0, ""); addOpcode(0x84, "sty", CpuAddressingMode.ZP, 3.0, ""); addOpcode(0x85, "sta", CpuAddressingMode.ZP, 3.0, ""); addOpcode(0x86, "stx", CpuAddressingMode.ZP, 3.0, ""); - addOpcode(0x88, "dey", CpuAddressingMode.NON, 2.0, "Yzn"); - addOpcode(0x8a, "txa", CpuAddressingMode.NON, 2.0, "Azn"); + addOpcode(0x88, "dey", CpuAddressingMode.NON, 2.0, "Ynz"); + addOpcode(0x8a, "txa", CpuAddressingMode.NON, 2.0, "Anz"); addOpcode(0x8c, "sty", CpuAddressingMode.ABS, 4.0, ""); addOpcode(0x8d, "sta", CpuAddressingMode.ABS, 4.0, ""); addOpcode(0x8e, "stx", CpuAddressingMode.ABS, 4.0, ""); @@ -104,71 +104,71 @@ public class Cpu6502Official extends Cpu65xx { addOpcode(0x94, "sty", CpuAddressingMode.ZPX, 4.0, ""); addOpcode(0x95, "sta", CpuAddressingMode.ZPX, 4.0, ""); addOpcode(0x96, "stx", CpuAddressingMode.ZPY, 4.0, ""); - addOpcode(0x98, "tya", CpuAddressingMode.NON, 2.0, "Azn"); + addOpcode(0x98, "tya", CpuAddressingMode.NON, 2.0, "Anz"); addOpcode(0x99, "sta", CpuAddressingMode.ABY, 5.0, ""); addOpcode(0x9a, "txs", CpuAddressingMode.NON, 2.0, "S"); addOpcode(0x9d, "sta", CpuAddressingMode.ABX, 5.0, ""); - addOpcode(0xa0, "ldy", CpuAddressingMode.IMM, 2.0, "Yzn"); - addOpcode(0xa1, "lda", CpuAddressingMode.IZX, 6.0, "Azn"); - addOpcode(0xa2, "ldx", CpuAddressingMode.IMM, 2.0, "Xzn"); - addOpcode(0xa4, "ldy", CpuAddressingMode.ZP, 3.0, "Yzn"); - addOpcode(0xa5, "lda", CpuAddressingMode.ZP, 3.0, "Azn"); - addOpcode(0xa6, "ldx", CpuAddressingMode.ZP, 3.0, "Xzn"); - addOpcode(0xa8, "tay", CpuAddressingMode.NON, 2.0, "Yzn"); - addOpcode(0xa9, "lda", CpuAddressingMode.IMM, 2.0, "Azn"); - addOpcode(0xaa, "tax", CpuAddressingMode.NON, 2.0, "Xzn"); - addOpcode(0xac, "ldy", CpuAddressingMode.ABS, 4.0, "Yzn"); - addOpcode(0xad, "lda", CpuAddressingMode.ABS, 4.0, "Azn"); - addOpcode(0xae, "ldx", CpuAddressingMode.ABS, 4.0, "Xzn"); + addOpcode(0xa0, "ldy", CpuAddressingMode.IMM, 2.0, "Ynz"); + addOpcode(0xa1, "lda", CpuAddressingMode.IZX, 6.0, "Anz"); + addOpcode(0xa2, "ldx", CpuAddressingMode.IMM, 2.0, "Xnz"); + addOpcode(0xa4, "ldy", CpuAddressingMode.ZP, 3.0, "Ynz"); + addOpcode(0xa5, "lda", CpuAddressingMode.ZP, 3.0, "Anz"); + addOpcode(0xa6, "ldx", CpuAddressingMode.ZP, 3.0, "Xnz"); + addOpcode(0xa8, "tay", CpuAddressingMode.NON, 2.0, "Ynz"); + addOpcode(0xa9, "lda", CpuAddressingMode.IMM, 2.0, "Anz"); + addOpcode(0xaa, "tax", CpuAddressingMode.NON, 2.0, "Xnz"); + addOpcode(0xac, "ldy", CpuAddressingMode.ABS, 4.0, "Ynz"); + addOpcode(0xad, "lda", CpuAddressingMode.ABS, 4.0, "Anz"); + addOpcode(0xae, "ldx", CpuAddressingMode.ABS, 4.0, "Xnz"); addOpcode(0xb0, "bcs", CpuAddressingMode.REL, 2.5, "P"); - addOpcode(0xb1, "lda", CpuAddressingMode.IZY, 5.5, "Azn"); - addOpcode(0xb4, "ldy", CpuAddressingMode.ZPX, 4.0, "Yzn"); - addOpcode(0xb5, "lda", CpuAddressingMode.ZPX, 4.0, "Azn"); - addOpcode(0xb6, "ldx", CpuAddressingMode.ZPY, 4.0, "Xzn"); + addOpcode(0xb1, "lda", CpuAddressingMode.IZY, 5.5, "Anz"); + addOpcode(0xb4, "ldy", CpuAddressingMode.ZPX, 4.0, "Ynz"); + addOpcode(0xb5, "lda", CpuAddressingMode.ZPX, 4.0, "Anz"); + addOpcode(0xb6, "ldx", CpuAddressingMode.ZPY, 4.0, "Xnz"); addOpcode(0xb8, "clv", CpuAddressingMode.NON, 2.0, "v"); - addOpcode(0xb9, "lda", CpuAddressingMode.ABY, 4.5, "Azn"); - addOpcode(0xba, "tsx", CpuAddressingMode.NON, 2.0, "Xzn"); - addOpcode(0xbc, "ldy", CpuAddressingMode.ABX, 4.5, "Yzn"); - addOpcode(0xbd, "lda", CpuAddressingMode.ABX, 4.5, "Azn"); - addOpcode(0xbe, "ldx", CpuAddressingMode.ABY, 4.5, "Xzn"); - addOpcode(0xc0, "cpy", CpuAddressingMode.IMM, 2.0, "czn"); - addOpcode(0xc1, "cmp", CpuAddressingMode.IZX, 6.0, "czn"); - addOpcode(0xc4, "cpy", CpuAddressingMode.ZP, 3.0, "czn"); - addOpcode(0xc5, "cmp", CpuAddressingMode.ZP, 3.0, "czn"); - addOpcode(0xc6, "dec", CpuAddressingMode.ZP, 5.0, "zn"); - addOpcode(0xc8, "iny", CpuAddressingMode.NON, 2.0, "Yzn"); - addOpcode(0xc9, "cmp", CpuAddressingMode.IMM, 2.0, "czn"); - addOpcode(0xca, "dex", CpuAddressingMode.NON, 2.0, "Xzn"); - addOpcode(0xcc, "cpy", CpuAddressingMode.ABS, 4.0, "czn"); - addOpcode(0xcd, "cmp", CpuAddressingMode.ABS, 4.0, "czn"); - addOpcode(0xce, "dec", CpuAddressingMode.ABS, 6.0, "zn"); + addOpcode(0xb9, "lda", CpuAddressingMode.ABY, 4.5, "Anz"); + addOpcode(0xba, "tsx", CpuAddressingMode.NON, 2.0, "Xnz"); + addOpcode(0xbc, "ldy", CpuAddressingMode.ABX, 4.5, "Ynz"); + addOpcode(0xbd, "lda", CpuAddressingMode.ABX, 4.5, "Anz"); + addOpcode(0xbe, "ldx", CpuAddressingMode.ABY, 4.5, "Xnz"); + addOpcode(0xc0, "cpy", CpuAddressingMode.IMM, 2.0, "cnz"); + addOpcode(0xc1, "cmp", CpuAddressingMode.IZX, 6.0, "cnz"); + addOpcode(0xc4, "cpy", CpuAddressingMode.ZP, 3.0, "cnz"); + addOpcode(0xc5, "cmp", CpuAddressingMode.ZP, 3.0, "cnz"); + addOpcode(0xc6, "dec", CpuAddressingMode.ZP, 5.0, "nz"); + addOpcode(0xc8, "iny", CpuAddressingMode.NON, 2.0, "Ynz"); + addOpcode(0xc9, "cmp", CpuAddressingMode.IMM, 2.0, "cnz"); + addOpcode(0xca, "dex", CpuAddressingMode.NON, 2.0, "Xnz"); + addOpcode(0xcc, "cpy", CpuAddressingMode.ABS, 4.0, "cnz"); + addOpcode(0xcd, "cmp", CpuAddressingMode.ABS, 4.0, "cnz"); + addOpcode(0xce, "dec", CpuAddressingMode.ABS, 6.0, "nz"); addOpcode(0xd0, "bne", CpuAddressingMode.REL, 2.5, "P"); - addOpcode(0xd1, "cmp", CpuAddressingMode.IZY, 5.5, "czn"); - addOpcode(0xd5, "cmp", CpuAddressingMode.ZPX, 4.0, "czn"); - addOpcode(0xd6, "dec", CpuAddressingMode.ZPX, 6.0, "zn"); + addOpcode(0xd1, "cmp", CpuAddressingMode.IZY, 5.5, "cnz"); + addOpcode(0xd5, "cmp", CpuAddressingMode.ZPX, 4.0, "cnz"); + addOpcode(0xd6, "dec", CpuAddressingMode.ZPX, 6.0, "nz"); addOpcode(0xd8, "cld", CpuAddressingMode.NON, 2.0, "d"); - addOpcode(0xd9, "cmp", CpuAddressingMode.ABY, 4.5, "czn"); - addOpcode(0xdd, "cmp", CpuAddressingMode.ABX, 4.5, "czn"); - addOpcode(0xde, "dec", CpuAddressingMode.ABX, 7.0, "zn"); - addOpcode(0xe0, "cpx", CpuAddressingMode.IMM, 2.0, "czn"); - addOpcode(0xe1, "sbc", CpuAddressingMode.IZX, 6.0, "Acvzn"); - addOpcode(0xe4, "cpx", CpuAddressingMode.ZP, 3.0, "czn"); - addOpcode(0xe5, "sbc", CpuAddressingMode.ZP, 3.0, "Acvzn"); - addOpcode(0xe6, "inc", CpuAddressingMode.ZP, 5.0, "zn"); - addOpcode(0xe8, "inx", CpuAddressingMode.NON, 2.0, "Xzn"); - addOpcode(0xe9, "sbc", CpuAddressingMode.IMM, 2.0, "Acvzn"); + addOpcode(0xd9, "cmp", CpuAddressingMode.ABY, 4.5, "cnz"); + addOpcode(0xdd, "cmp", CpuAddressingMode.ABX, 4.5, "cnz"); + addOpcode(0xde, "dec", CpuAddressingMode.ABX, 7.0, "nz"); + addOpcode(0xe0, "cpx", CpuAddressingMode.IMM, 2.0, "cnz"); + addOpcode(0xe1, "sbc", CpuAddressingMode.IZX, 6.0, "Acvnz"); + addOpcode(0xe4, "cpx", CpuAddressingMode.ZP, 3.0, "cnz"); + addOpcode(0xe5, "sbc", CpuAddressingMode.ZP, 3.0, "Acvnz"); + addOpcode(0xe6, "inc", CpuAddressingMode.ZP, 5.0, "nz"); + addOpcode(0xe8, "inx", CpuAddressingMode.NON, 2.0, "Xnz"); + addOpcode(0xe9, "sbc", CpuAddressingMode.IMM, 2.0, "Acvnz"); addOpcode(0xea, "nop", CpuAddressingMode.NON, 2.0, ""); - addOpcode(0xec, "cpx", CpuAddressingMode.ABS, 4.0, "czn"); - addOpcode(0xed, "sbc", CpuAddressingMode.ABS, 4.0, "Acvzn"); - addOpcode(0xee, "inc", CpuAddressingMode.ABS, 6.0, "zn"); + addOpcode(0xec, "cpx", CpuAddressingMode.ABS, 4.0, "cnz"); + addOpcode(0xed, "sbc", CpuAddressingMode.ABS, 4.0, "Acvnz"); + addOpcode(0xee, "inc", CpuAddressingMode.ABS, 6.0, "nz"); addOpcode(0xf0, "beq", CpuAddressingMode.REL, 2.5, "P"); - addOpcode(0xf1, "sbc", CpuAddressingMode.IZY, 5.5, "Acvzn"); - addOpcode(0xf5, "sbc", CpuAddressingMode.ZPX, 4.0, "Acvzn"); - addOpcode(0xf6, "inc", CpuAddressingMode.ZPX, 6.0, "zn"); + addOpcode(0xf1, "sbc", CpuAddressingMode.IZY, 5.5, "Acvnz"); + addOpcode(0xf5, "sbc", CpuAddressingMode.ZPX, 4.0, "Acvnz"); + addOpcode(0xf6, "inc", CpuAddressingMode.ZPX, 6.0, "nz"); addOpcode(0xf8, "sed", CpuAddressingMode.NON, 2.0, "d"); - addOpcode(0xf9, "sbc", CpuAddressingMode.ABY, 4.5, "Acvzn"); - addOpcode(0xfd, "sbc", CpuAddressingMode.ABX, 4.5, "Acvzn"); - addOpcode(0xfe, "inc", CpuAddressingMode.ABX, 7.0, "zn"); + addOpcode(0xf9, "sbc", CpuAddressingMode.ABY, 4.5, "Acvnz"); + addOpcode(0xfd, "sbc", CpuAddressingMode.ABX, 4.5, "Acvnz"); + addOpcode(0xfe, "inc", CpuAddressingMode.ABX, 7.0, "nz"); } } diff --git a/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu65C02.java b/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu65C02.java index 0b17b4249..d7a424197 100644 --- a/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu65C02.java +++ b/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu65C02.java @@ -12,7 +12,7 @@ public class Cpu65C02 extends Cpu65xx { /** The 65C02 CPU name. */ public final static String NAME = "65c02"; - /** The 65C02 with illegal CPU. */ + /** The 65C02 CPU. */ public final static Cpu65C02 INSTANCE = new Cpu65C02(); public Cpu65C02() { diff --git a/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu65CE02.java b/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu65CE02.java index c1a7502e6..404830a6b 100644 --- a/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu65CE02.java +++ b/src/main/java/dk/camelot64/cpufamily6502/cpus/Cpu65CE02.java @@ -12,7 +12,7 @@ public class Cpu65CE02 extends Cpu65xx { /** The 65CE02 CPU name. */ public final static String NAME = "65ce02"; - /** The 65CE02 with illegal CPU. */ + /** The 65CE02 CPU. */ public final static Cpu65CE02 INSTANCE = new Cpu65CE02(); public Cpu65CE02() { @@ -30,18 +30,18 @@ public class Cpu65CE02 extends Cpu65xx { addOpcode(0x33, "lbmi", CpuAddressingMode.REL, 3, "P"); addOpcode(0x3B, "dez", CpuAddressingMode.NON, 1, "Znz"); addOpcode(0x42, "neg", CpuAddressingMode.NON, 2, "Anz"); - addOpcode(0x43, "asr", CpuAddressingMode.NON, 2, "Anzc"); - addOpcode(0x44, "asr", CpuAddressingMode.ZP, 4, "nzc"); + addOpcode(0x43, "asr", CpuAddressingMode.NON, 2, "Acnz"); + addOpcode(0x44, "asr", CpuAddressingMode.ZP, 4, "cnz"); addOpcode(0x4B, "taz", CpuAddressingMode.NON, 1, "Znz"); addOpcode(0x52, "eor", CpuAddressingMode.IZZ, 5, "Anz"); addOpcode(0x53, "lbvc", CpuAddressingMode.REL, 3, "P"); - addOpcode(0x54, "asr", CpuAddressingMode.ZPX, 4, "nzc"); + addOpcode(0x54, "asr", CpuAddressingMode.ZPX, 4, "cnz"); addOpcode(0x5B, "tab", CpuAddressingMode.NON, 1, "B"); addOpcode(0x5C, "map", CpuAddressingMode.NON, 2, ""); addOpcode(0x62, "rtn", CpuAddressingMode.IMM, 7, "P"); addOpcode(0x63, "lbsr", CpuAddressingMode.REL, 3, "P"); addOpcode(0x6B, "tza", CpuAddressingMode.NON, 1, "Anz"); - addOpcode(0x72, "adc", CpuAddressingMode.IZZ, 5, "Anzvc"); + addOpcode(0x72, "adc", CpuAddressingMode.IZZ, 5, "Acvnz"); addOpcode(0x73, "lbvs", CpuAddressingMode.REL, 3, "P"); addOpcode(0x7B, "tba", CpuAddressingMode.NON, 1, "Anz"); addOpcode(0x82, "sta", CpuAddressingMode.ISY, 6, ""); @@ -55,19 +55,19 @@ public class Cpu65CE02 extends Cpu65xx { addOpcode(0xB2, "lda", CpuAddressingMode.IZZ, 5, "Anz"); addOpcode(0xB3, "lbcs", CpuAddressingMode.REL, 3, "P"); addOpcode(0xBB, "ldz", CpuAddressingMode.ABS, 4, "Znz"); - addOpcode(0xC2, "cpz", CpuAddressingMode.IMM, 2, "nzc"); + addOpcode(0xC2, "cpz", CpuAddressingMode.IMM, 2, "cnz"); addOpcode(0xC3, "dew", CpuAddressingMode.ABS, 5, "nz"); - addOpcode(0xCB, "asw", CpuAddressingMode.ABS, 7, "nzc"); - addOpcode(0xD2, "cmp", CpuAddressingMode.IZZ, 5, "nzc"); + addOpcode(0xCB, "asw", CpuAddressingMode.ABS, 7, "cnz"); + addOpcode(0xD2, "cmp", CpuAddressingMode.IZZ, 5, "cnz"); addOpcode(0xD3, "lbne", CpuAddressingMode.REL, 3, "P"); - addOpcode(0xD4, "cpz", CpuAddressingMode.ZP, 3, "nzc"); + addOpcode(0xD4, "cpz", CpuAddressingMode.ZP, 3, "cnz"); addOpcode(0xDB, "phz", CpuAddressingMode.NON, 3, "S"); - addOpcode(0xDC, "cpz", CpuAddressingMode.ABS, 4, "nzc"); + addOpcode(0xDC, "cpz", CpuAddressingMode.ABS, 4, "cnz"); addOpcode(0xE2, "lda", CpuAddressingMode.ISY, 6, "Anz"); addOpcode(0xE3, "inw", CpuAddressingMode.ABS, 5, "nz"); addOpcode(0xEA, "eom", CpuAddressingMode.NON, 1, ""); - addOpcode(0xEB, "row", CpuAddressingMode.ABS, 6, "nzc"); - addOpcode(0xF2, "sbc", CpuAddressingMode.IZZ, 5, "Anzcv"); + addOpcode(0xEB, "row", CpuAddressingMode.ABS, 6, "cnz"); + addOpcode(0xF2, "sbc", CpuAddressingMode.IZZ, 5, "Acvnz"); addOpcode(0xF3, "lbeq", CpuAddressingMode.REL, 3, "P"); addOpcode(0xF4, "phw", CpuAddressingMode.IMM, 5, "S"); addOpcode(0xFB, "plz", CpuAddressingMode.NON, 3, "ZnzS");