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Improved readability.
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@ -17,15 +17,15 @@ char * const MATH_BUSY = 0xd70f;
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// $D768-$D76F DIVOUT 64-bit output of MULTINA ÷ MULTINB
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// $D768-$D76B DIVOUT FRAC 32-bit output of MULTINA ÷ MULTINB
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signed char * const MATH_DIVOUT_FRAC_CHAR0 = 0xd768;
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signed int * const MATH_DIVOUT_FRAC_INT0 = 0xd768;
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signed int * const MATH_DIVOUT_FRAC_INT1 = 0xd76a;
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signed long * const MATH_DIVOUT_FRAC_LONG0 = 0xd768;
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signed char volatile * const MATH_DIVOUT_FRAC_CHAR0 = 0xd768;
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signed int volatile * const MATH_DIVOUT_FRAC_INT0 = 0xd768;
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signed int volatile * const MATH_DIVOUT_FRAC_INT1 = 0xd76a;
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signed long volatile * const MATH_DIVOUT_FRAC_LONG0 = 0xd768;
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// $D768-$D76F DIVOUT 64-bit output of MULTINA ÷ MULTINB
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signed char * const MATH_DIVOUT_WHOLE_CHAR0 = 0xd76c;
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signed int * const MATH_DIVOUT_WHOLE_INT0 = 0xd76c;
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signed int * const MATH_DIVOUT_WHOLE_INT1 = 0xd76e;
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signed long * const MATH_DIVOUT_WHOLE_LONG = 0xd76c;
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signed char volatile * const MATH_DIVOUT_WHOLE_CHAR0 = 0xd76c;
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signed int volatile * const MATH_DIVOUT_WHOLE_INT0 = 0xd76c;
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signed int volatile * const MATH_DIVOUT_WHOLE_INT1 = 0xd76e;
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signed long volatile * const MATH_DIVOUT_WHOLE_LONG = 0xd76c;
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// $D770-$D773 MULTINA Multiplier input A / Divider numerator (32 bit)
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signed char * const MATH_MULTINA_CHAR0 = 0xd770;
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@ -46,7 +46,7 @@ signed int * const MATH_MULTINB_INT1 = 0xd776;
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signed long * const MATH_MULTINB_LONG = 0xd774;
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// $D778-$D77F MULTOUT 64-bit output of MULTINA × MULTINB
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signed char * const MATH_MULTOUT_CHAR0 = 0xd778;
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signed int * const MATH_MULTOUT_INT0 = 0xd778;
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signed long * const MATH_MULTOUT_LONG0 = 0xd778;
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signed long * const MATH_MULTOUT_LONG1 = 0xd77c;
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signed char volatile * const MATH_MULTOUT_CHAR0 = 0xd778;
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signed int volatile * const MATH_MULTOUT_INT0 = 0xd778;
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signed long volatile * const MATH_MULTOUT_LONG0 = 0xd778;
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signed long volatile * const MATH_MULTOUT_LONG1 = 0xd77c;
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@ -306,3 +306,54 @@ struct MEGA65_VICIV {
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char DEBUGXY;
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};
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// $D030 VIC-III Control Register A (ROM banks)
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// Bit 20-bit Address 16-bit Address Read-Write
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// 0 CRAM2K $1F800 – $1FFFF, $D800 – $DFFF Y
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// $FF80000 – $FF807FF
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const char VICIII_CRAM2K = 0x01;
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// 3 ROM8 $38000 – $39FFF $8000 – $9FFF N
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const char VICIII_ROM8 = 0x08;
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// 4 ROMA $3A000 – $3BFFF $A000 – $BFFF N
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const char VICIII_ROMA = 0x10;
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// 5 ROMC $2C000 – $2CFFF $C000 – $CFFF N
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const char VICIII_ROMC = 0x20;
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// 6 CROM9 $29000 – $29FFF $D000 – $DFFF N
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const char VICIII_CROM9 = 0x40;
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// 7 ROME $3E000 – $3FFFF $E000 – $FFFF N
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const char VICIII_ROME = 0x80;
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// $D031 VIC-III Control Register B
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// 0 INT Enable VIC-III interlaced mode
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const char VICIII_INT = 0x01;
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// 1 MONO Enable VIC-III MONO video output (not implemented)
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const char VICIII_MONO = 0x02;
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// 2 H1280 Enable 1280 horizontal pixels (not implemented)
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const char VICIII_H1280 = 0x04;
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// 3 V400 Enable 400 vertical pixels
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const char VICIII_V400 = 0x08;
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// 4 BPM Bit-Plane Mode
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const char VICIII_BPM = 0x10;
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// 5 ATTR Enable extended attributes and 8 bit colour entries
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const char VICIII_ATTR = 0x20;
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// 6 FAST Enable C65 FAST mode (3 .5MHz)
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const char VICIII_FAST = 0x40;
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// 7 H640 Enable C64 640 horizontal pixels / 80 column mode
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const char VICIII_H640 = 0x80;
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// $D054 VIC-IV Control register C
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// 0 CHR16 enable 16-bit character numbers (two screen bytes per character)
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const char VICIV_CHR16 = 0x01;
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// 1 FCLRLO enable full-colour mode for character numbers <=\$FF
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const char VICIV_FCLRLO = 0x02;
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// 2 FCLRHI enable full-colour mode for character numbers >\$FF
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const char VICIV_FCLRHI = 0x04;
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// 3 SMTH video output horizontal smoothing enable
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const char VICIV_CSMTH = 0x08;
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// 4 VIC-IV:SPR640 Sprite H640 enable;
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const char VICIV_SPR640 = 0x10;
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// 5 VIC-IV:PALEMU video output pal simulation
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const char VICIV_PALEMU = 0x20;
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// 6 VIC-IV:VFAST C65GS FAST mode (48MHz)
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const char VICIV_VFAST = 0x40;
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// 7 VIC-IV:ALPHEN Alpha compositor enable
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const char VICIV_ALPHEN = 0x80;
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@ -1,7 +1,7 @@
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// Test hardware line drawing
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// Based on https://github.com/MEGA65/mega65-tools/blob/master/src/tests/test_290.c
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#pragma target(mega65)
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#pragma target(mega65_remote)
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#include <mega65.h>
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#include <mega65-dma.h>
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#include <6502.h>
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@ -30,7 +30,7 @@ char line_dma_command[] = {
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DMA_OPTION_LINE_MODE, 0, // Line Mode
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DMA_OPTION_FORMAT_F018A, // F018A list format
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DMA_OPTION_END, // end of options
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0, // DMA command
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DMA_COMMAND_FILL, // DMA command
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0, 0, // Count of bytes to copy/fill
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0, 0, // Source address
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0, // Source bank
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@ -43,8 +43,6 @@ char line_dma_command[] = {
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const char LINE_DMA_COMMAND_SLOPE_OFFSET = 5;
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// Offset of the DMA line MODE
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const char LINE_DMA_COMMAND_MODE_OFFSET = 9;
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// Offset of the DMA command
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const char LINE_DMA_COMMAND_COMMAND_OFFSET = 12;
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// Offset of the DMA count
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const char LINE_DMA_COMMAND_COUNT_OFFSET = 13;
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// Offset of the DMA source
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@ -56,20 +54,18 @@ void main() {
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// Avoid interrupts
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SEI();
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// Map memory to BANK 0 : 0x00XXXX - giving access to I/O
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memoryRemap(0x00,0,0);
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// Fast CPU, M65 IO
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POKE(0, 65);
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// Enable MEGA65 features
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VICIII->KEY = 0x47;
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VICIII->KEY = 0x47;
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VICIII->KEY = 0x53;
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// No C65 ROMs are mapped
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VICIV->CONTROLA = 0;
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// Enable 48MHz fast mode
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VICIV->CONTROLB |= 0x40;
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VICIV->CONTROLC |= 0x40;
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VICIV->CONTROLB |= VICIII_FAST;
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VICIV->CONTROLC |= VICIV_VFAST;
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graphics_mode();
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draw_line(160, 100, 0, 199, 1);
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@ -88,9 +84,9 @@ const long GRAPHICS = 0x40000;
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void graphics_mode(void) {
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// 16-bit text mode, full-colour text for high chars
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VICIV->CONTROLC = 5;
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VICIV->CONTROLC = VICIV_FCLRHI | VICIV_CHR16;
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// H320, fast CPU
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VICIV->CONTROLB = 0x40;
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VICIV->CONTROLB = VICIII_FAST;
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// 320x200 per char, 16 pixels wide per char
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// = 320/8 x 16 bits = 80 bytes per row
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VICIV->CHARSTEP_LO = 80;
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@ -177,7 +173,7 @@ void draw_line(int x1, int y1, int x2, int y2, unsigned char colour) {
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line_dma_command[LINE_DMA_COMMAND_SLOPE_OFFSET + 2] = >(slope);
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// Load DMA dest address with the address of the first pixel
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long addr = GRAPHICS + (y1 << 3) + (x1 & 7) + (x1 >> 3) * 64 * 25l;
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long addr = GRAPHICS + (x1/8) * 64 * 25 + (y1*8) + (x1&7);
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line_dma_command[LINE_DMA_COMMAND_DEST_OFFSET + 0] = <(<(addr));
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line_dma_command[LINE_DMA_COMMAND_DEST_OFFSET + 1] = >(<(addr));
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line_dma_command[LINE_DMA_COMMAND_DEST_OFFSET + 2] = <(>(addr));
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@ -189,20 +185,15 @@ void draw_line(int x1, int y1, int x2, int y2, unsigned char colour) {
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line_dma_command[LINE_DMA_COMMAND_COUNT_OFFSET] = <(dy);
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line_dma_command[LINE_DMA_COMMAND_COUNT_OFFSET + 1] = >(dy);
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// Command is FILL
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line_dma_command[LINE_DMA_COMMAND_COMMAND_OFFSET] = DMA_COMMAND_FILL;
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// Line mode active, major axis is Y
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line_dma_command[LINE_DMA_COMMAND_MODE_OFFSET] = DMA_OPTION_LINE_MODE_ENABLE + DMA_OPTION_LINE_MODE_DIRECTION_Y + (((x2 - x1) < 0) ? DMA_OPTION_LINE_MODE_SLOPE_NEGATIVE : 0x00);
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VICIV->BORDER_COLOR = 1;
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// Set address of DMA list
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DMA->ADDRMB = 0;
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DMA->ADDRBANK = 0;
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DMA-> ADDRMSB = >line_dma_command;
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// Trigger the DMA (with option lists)
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DMA-> ETRIG = <line_dma_command;
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VICIV->BORDER_COLOR = 0;
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}
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else {
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// X is major axis
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@ -236,7 +227,7 @@ void draw_line(int x1, int y1, int x2, int y2, unsigned char colour) {
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line_dma_command[LINE_DMA_COMMAND_SLOPE_OFFSET + 2] = >(slope);
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// Load DMA dest address with the address of the first pixel
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long addr = GRAPHICS + (y1 << 3) + (x1 & 7) + (x1 >> 3) * 64 * 25;
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long addr = GRAPHICS + (x1/8) * 64 * 25 + (y1*8) + (x1&7);
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line_dma_command[LINE_DMA_COMMAND_DEST_OFFSET + 0] = <(<(addr));
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line_dma_command[LINE_DMA_COMMAND_DEST_OFFSET + 1] = >(<(addr));
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line_dma_command[LINE_DMA_COMMAND_DEST_OFFSET + 2] = <(>(addr));
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@ -248,20 +239,15 @@ void draw_line(int x1, int y1, int x2, int y2, unsigned char colour) {
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line_dma_command[LINE_DMA_COMMAND_COUNT_OFFSET] = <(dx);
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line_dma_command[LINE_DMA_COMMAND_COUNT_OFFSET + 1] = >(dx);
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// Command is FILL
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line_dma_command[LINE_DMA_COMMAND_COMMAND_OFFSET] = DMA_COMMAND_FILL;
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// Line mode active, major axis is X
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line_dma_command[LINE_DMA_COMMAND_MODE_OFFSET] = DMA_OPTION_LINE_MODE_ENABLE + (((y2 - y1) < 0) ? DMA_OPTION_LINE_MODE_SLOPE_NEGATIVE : 0x00);
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VICIV->BORDER_COLOR = 1;
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// Set address of DMA list
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DMA->ADDRMB = 0;
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DMA->ADDRBANK = 0;
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DMA-> ADDRMSB = >line_dma_command;
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// Trigger the DMA (with option lists)
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DMA-> ETRIG = <line_dma_command;
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VICIV->BORDER_COLOR = 0;
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}
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}
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