mirror of
https://gitlab.com/camelot/kickc.git
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Optimized ZP coalesce vastly.
This commit is contained in:
parent
1ec9060962
commit
f0917c7bed
@ -318,7 +318,8 @@ public class Compiler {
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new Pass4RegisterUpliftRemains(program).performUplift(10_000);
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new Pass4RegisterUpliftRemains(program).performUplift(10_000);
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// Final register coalesce and finalization
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// Final register coalesce and finalization
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new Pass4ZeroPageCoalesce(program).allocate();
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new Pass4ZeroPageCoalesceAssignment(program).coalesce();
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new Pass4ZeroPageCoalesce(program).coalesce();
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new Pass4RegistersFinalize(program).allocate(true);
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new Pass4RegistersFinalize(program).allocate(true);
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}
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}
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@ -2,9 +2,7 @@ package dk.camelot64.kickc.passes;
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import dk.camelot64.kickc.model.*;
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import dk.camelot64.kickc.model.*;
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import java.util.Collection;
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import java.util.LinkedHashSet;
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import java.util.LinkedHashSet;
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import java.util.List;
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import java.util.Set;
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import java.util.Set;
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/**
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/**
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@ -13,12 +11,11 @@ import java.util.Set;
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*/
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*/
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public class Pass4ZeroPageCoalesce extends Pass2Base {
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public class Pass4ZeroPageCoalesce extends Pass2Base {
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public Pass4ZeroPageCoalesce(Program program) {
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public Pass4ZeroPageCoalesce(Program program) {
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super(program);
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super(program);
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}
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}
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public void allocate() {
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public void coalesce() {
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LinkedHashSet<String> unknownFragments = new LinkedHashSet<>();
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LinkedHashSet<String> unknownFragments = new LinkedHashSet<>();
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LiveRangeEquivalenceClassSet liveRangeEquivalenceClassSet = getProgram().getLiveRangeEquivalenceClassSet();
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LiveRangeEquivalenceClassSet liveRangeEquivalenceClassSet = getProgram().getLiveRangeEquivalenceClassSet();
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boolean change;
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boolean change;
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@ -39,92 +36,45 @@ public class Pass4ZeroPageCoalesce extends Pass2Base {
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* Find two equivalence classes that can be coalesced into one - and perform the coalescence.
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* Find two equivalence classes that can be coalesced into one - and perform the coalescence.
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*
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*
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* @param liveRangeEquivalenceClassSet The set of live range equivalence classes
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* @param liveRangeEquivalenceClassSet The set of live range equivalence classes
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* @param unknownFragments
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* @param unknownFragments Receives information about any unknown fragments encountered during ASM generation
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* @return true if any classes were coalesced. False otherwise.
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* @return true if any classes were coalesced. False otherwise.
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*/
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*/
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private boolean coalesce(LiveRangeEquivalenceClassSet liveRangeEquivalenceClassSet, Set<String> unknownFragments) {
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private boolean coalesce(LiveRangeEquivalenceClassSet liveRangeEquivalenceClassSet, Set<String> unknownFragments) {
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double maxScore = -1.0;
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LiveRangeEquivalenceClass maxThis = null;
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LiveRangeEquivalenceClass maxOther = null;
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for(LiveRangeEquivalenceClass thisEquivalenceClass : liveRangeEquivalenceClassSet.getEquivalenceClasses()) {
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for(LiveRangeEquivalenceClass thisEquivalenceClass : liveRangeEquivalenceClassSet.getEquivalenceClasses()) {
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for(LiveRangeEquivalenceClass otherEquivalenceClass : liveRangeEquivalenceClassSet.getEquivalenceClasses()) {
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for(LiveRangeEquivalenceClass otherEquivalenceClass : liveRangeEquivalenceClassSet.getEquivalenceClasses()) {
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if(!thisEquivalenceClass.equals(otherEquivalenceClass)) {
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if(!thisEquivalenceClass.equals(otherEquivalenceClass)) {
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if(canCoalesce(thisEquivalenceClass, otherEquivalenceClass, unknownFragments)) {
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if(canCoalesce(thisEquivalenceClass, otherEquivalenceClass, unknownFragments, getProgram())) {
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double coalesceScore = getCoalesceScore(thisEquivalenceClass, otherEquivalenceClass);
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getLog().append("Coalescing zero page register [ " + thisEquivalenceClass + " ] with [ " + otherEquivalenceClass + " ]");
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if(coalesceScore>maxScore) {
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liveRangeEquivalenceClassSet.consolidate(thisEquivalenceClass, otherEquivalenceClass);
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if(otherEquivalenceClass==null) {
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throw new RuntimeException("EQC is null!"+otherEquivalenceClass);
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}
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maxScore = coalesceScore;
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maxThis = thisEquivalenceClass;
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maxOther = otherEquivalenceClass;
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}
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}
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}
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}
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}
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if(maxOther!=null) {
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getLog().append("Coalescing zero page register [ " + maxThis+ " ] with [ " + maxOther + " ]");
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liveRangeEquivalenceClassSet.consolidate(maxThis, maxOther);
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// Reset the program register allocation
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// Reset the program register allocation
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getProgram().getLiveRangeEquivalenceClassSet().storeRegisterAllocation();
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getProgram().getLiveRangeEquivalenceClassSet().storeRegisterAllocation();
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return true;
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return true;
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}
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}
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}
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}
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}
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return false;
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return false;
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}
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}
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private double getCoalesceScore(LiveRangeEquivalenceClass thisEquivalenceClass, LiveRangeEquivalenceClass otherEquivalenceClass) {
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/**
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double score = 0.0;
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* Determines if two live range equivalence classes can be coalesced.
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List<VariableRef> thisClassVars = thisEquivalenceClass.getVariables();
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* This is possible if they are both allocated to zero page, have the same size and the resulting ASM has no live range overlaps or clobber issues.
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List<VariableRef> otherClassVars = otherEquivalenceClass.getVariables();
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*
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VariableReferenceInfos variableReferenceInfos = getProgram().getVariableReferenceInfos();
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* @param ec1 One equivalence class
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for(ControlFlowBlock block : getProgram().getGraph().getAllBlocks()) {
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* @param ec2 Another equivalence class
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for(Statement statement : block.getStatements()) {
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* @param unknownFragments Receives information about any unknown fragments encountered during ASM generation
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Collection<VariableRef> definedVars = variableReferenceInfos.getDefinedVars(statement);
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* @param program The program
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Collection<VariableRef> usedVars = variableReferenceInfos.getUsedVars(statement);
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* @return True if the two equivalence classes can be coalesced into one without problems.
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if(definedVars!=null && definedVars.size()>0) {
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*/
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for(VariableRef definedVar : definedVars) {
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public static boolean canCoalesce(LiveRangeEquivalenceClass ec1, LiveRangeEquivalenceClass ec2, Set<String> unknownFragments, Program program) {
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if(thisClassVars.contains(definedVar)) {
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Registers.Register register1 = ec1.getRegister();
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for(VariableRef usedVar : usedVars) {
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Registers.Register register2 = ec2.getRegister();
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if(otherClassVars.contains(usedVar)) {
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if(register1.isZp() && register2.isZp() && register1.getType().equals(register2.getType())) {
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score += 1.0;
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// Both registers are on Zero Page & have the same zero page size
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}
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}
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} else if(otherClassVars.contains(definedVar)) {
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for(VariableRef usedVar : usedVars) {
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if(thisClassVars.contains(usedVar)) {
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score += 1.0;
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}
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}
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}
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}
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}
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}
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}
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return score;
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}
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private boolean canCoalesce(LiveRangeEquivalenceClass myEquivalenceClass, LiveRangeEquivalenceClass otherEquivalenceClass, Set<String> unknownFragments) {
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VariableRef myVariableRef = myEquivalenceClass.getVariables().get(0);
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Variable myVariable = getProgram().getSymbolInfos().getVariable(myVariableRef);
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VariableRef otherVariableRef = otherEquivalenceClass.getVariables().get(0);
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Variable otherVariable = getProgram().getSymbolInfos().getVariable(otherVariableRef);
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// Types match
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Registers.Register myRegister = myEquivalenceClass.getRegister();
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Registers.Register otherRegister = otherEquivalenceClass.getRegister();
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if(myRegister.isZp() && otherRegister.isZp()) {
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// Both registers are on Zero Page
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if(myRegister.getType().equals(otherRegister.getType())) {
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// Both registers have the same Zero Page size
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// Try out the coalesce to test if it works
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// Try out the coalesce to test if it works
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RegisterCombination combination = new RegisterCombination();
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RegisterCombination combination = new RegisterCombination();
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combination.setRegister(otherEquivalenceClass, myRegister);
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combination.setRegister(ec2, register1);
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return Pass4RegisterUpliftCombinations.generateCombinationAsm(combination, getProgram(), unknownFragments, ScopeRef.ROOT);
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return Pass4RegisterUpliftCombinations.generateCombinationAsm(combination, program, unknownFragments, ScopeRef.ROOT);
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}
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}
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}
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return false;
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return false;
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}
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}
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@ -0,0 +1,223 @@
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package dk.camelot64.kickc.passes;
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import dk.camelot64.kickc.model.*;
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import java.util.*;
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/**
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* Coalesces zero page registers where their live ranges do not overlap.
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* This step tries to coalesce lvalues with rvalues for all assignments - saving code cycles & bytes code if successful.
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*/
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public class Pass4ZeroPageCoalesceAssignment extends Pass2Base {
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public Pass4ZeroPageCoalesceAssignment(Program program) {
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super(program);
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}
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public void coalesce() {
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CoalesceVarScores coalesceVarScores = new CoalesceVarScores(getProgram());
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LinkedHashSet<String> unknownFragments = new LinkedHashSet<>();
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boolean change;
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do {
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change = false;
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CoalesceLiveRangeEquivalenceClassScores equivalenceClassScores =
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new CoalesceLiveRangeEquivalenceClassScores(getProgram(), coalesceVarScores);
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List<LiveRangeEquivalenceClassCoalesceCandidate> coalesceCandidates =
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equivalenceClassScores.getCoalesceCandidates();
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for(LiveRangeEquivalenceClassCoalesceCandidate candidate : coalesceCandidates) {
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change |= attemptCoalesce(candidate, unknownFragments);
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}
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} while(change);
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if(unknownFragments.size() > 0) {
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getLog().append("MISSING FRAGMENTS");
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for(String unknownFragment : unknownFragments) {
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getLog().append(" " + unknownFragment);
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}
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}
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}
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private boolean attemptCoalesce(LiveRangeEquivalenceClassCoalesceCandidate candidate, LinkedHashSet<String> unknownFragments) {
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LiveRangeEquivalenceClassSet liveRangeEquivalenceClassSet = getProgram().getLiveRangeEquivalenceClassSet();
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List<LiveRangeEquivalenceClass> equivalenceClasses = liveRangeEquivalenceClassSet.getEquivalenceClasses();
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if(equivalenceClasses.contains(candidate.getEc1()) && equivalenceClasses.contains(candidate.getEc2())) {
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// Both equivalence classes still exist
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if(Pass4ZeroPageCoalesce.canCoalesce(candidate.getEc1(), candidate.getEc2(), unknownFragments, getProgram())) {
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getLog().append("Coalescing zero page register with common assignment [ " + candidate.getEc1() + " ] with [ " + candidate.getEc2()+ " ] - score: "+candidate.getScore());
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liveRangeEquivalenceClassSet.consolidate(candidate.getEc1(), candidate.getEc2());
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// Reset the program register allocation
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getProgram().getLiveRangeEquivalenceClassSet().storeRegisterAllocation();
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return true;
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}
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}
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return false;
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}
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/**
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* Scores for coalescing any pair of variables.
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* Scores are increased when one variable is an lvalue and the other an rvalue in an assignment.
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*/
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private static class CoalesceVarScores {
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/** Maps var to scores for coalescing with other variables */
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private Map<VariableRef, Map<VariableRef, Integer>> scores;
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public CoalesceVarScores(Program program) {
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this.scores = new LinkedHashMap<>();
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VariableReferenceInfos variableReferenceInfos = program.getVariableReferenceInfos();
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for(ControlFlowBlock block : program.getGraph().getAllBlocks()) {
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for(Statement statement : block.getStatements()) {
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Collection<VariableRef> definedVars = variableReferenceInfos.getDefinedVars(statement);
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Collection<VariableRef> usedVars = variableReferenceInfos.getUsedVars(statement);
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if(definedVars != null && definedVars.size() > 0) {
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for(VariableRef definedVar : definedVars) {
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for(VariableRef usedVar : usedVars) {
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incScore(definedVar, usedVar);
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}
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}
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}
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}
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}
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}
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private void incScore(VariableRef definedVar, VariableRef usedVar) {
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setScore(definedVar, usedVar, getScore(definedVar, usedVar) + 1);
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setScore(usedVar, definedVar, getScore(usedVar, definedVar) + 1);
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}
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private void setScore(VariableRef var1, VariableRef var2, Integer score) {
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scores.computeIfAbsent(var1, k -> new LinkedHashMap<>()).put(var2, score);
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}
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public Integer getScore(VariableRef var1, VariableRef var2) {
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Map<VariableRef, Integer> varScores = scores.get(var1);
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if(varScores == null) {
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return 0;
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}
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Integer score = varScores.get(var2);
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if(score == null) {
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return 0;
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}
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return score;
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}
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}
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/**
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* Scores for coalescing any pair of live range equivalence classes.
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* Scores are higher when a variable in one class is an lvalue and a variable in the other an rvalue in an assignment.
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*/
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private static class CoalesceLiveRangeEquivalenceClassScores {
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/** Maps var to scores for coalescing with other LiveRangeEquivalenceClass */
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private Map<LiveRangeEquivalenceClass, Map<LiveRangeEquivalenceClass, Integer>> scores;
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public CoalesceLiveRangeEquivalenceClassScores(Program program, CoalesceVarScores varScores) {
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this.scores = new LinkedHashMap<>();
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LiveRangeEquivalenceClassSet liveRangeEquivalenceClassSet = program.getLiveRangeEquivalenceClassSet();
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for(LiveRangeEquivalenceClass thisEquivalenceClass : liveRangeEquivalenceClassSet.getEquivalenceClasses()) {
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for(LiveRangeEquivalenceClass otherEquivalenceClass : liveRangeEquivalenceClassSet.getEquivalenceClasses()) {
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if(!thisEquivalenceClass.equals(otherEquivalenceClass)) {
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incScore(thisEquivalenceClass, otherEquivalenceClass, varScores);
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}
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}
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}
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}
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private void incScore(LiveRangeEquivalenceClass ec1, LiveRangeEquivalenceClass ec2, CoalesceVarScores varScores) {
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for(VariableRef var1 : ec1.getVariables()) {
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for(VariableRef var2 : ec2.getVariables()) {
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Integer varScore = varScores.getScore(var1, var2);
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if(varScore > 0) {
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setScore(ec1, ec2, getScore(ec1, ec2) + varScore);
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}
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}
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}
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}
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private void setScore(LiveRangeEquivalenceClass ec1, LiveRangeEquivalenceClass ec2, Integer score) {
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scores.computeIfAbsent(ec1, k -> new LinkedHashMap<>()).put(ec2, score);
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}
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public Integer getScore(LiveRangeEquivalenceClass ec1, LiveRangeEquivalenceClass ec2) {
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Map<LiveRangeEquivalenceClass, Integer> varScores = scores.get(ec1);
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if(varScores == null) {
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return 0;
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}
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Integer score = varScores.get(ec2);
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if(score == null) {
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return 0;
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}
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return score;
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}
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/**
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* Get all candidate pairs of live range equivalence classes for coalescing with a positive score.
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* The returned list is sorted so the candidates with the highest score are first.
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*
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* @return candidate pairs of live range equivalence classes for coalescing with a positive score
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*/
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public List<LiveRangeEquivalenceClassCoalesceCandidate> getCoalesceCandidates() {
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ArrayList<LiveRangeEquivalenceClassCoalesceCandidate> candidates = new ArrayList<>();
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for(LiveRangeEquivalenceClass ec1 : scores.keySet()) {
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Map<LiveRangeEquivalenceClass, Integer> ec1Scores = scores.get(ec1);
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for(LiveRangeEquivalenceClass ec2 : ec1Scores.keySet()) {
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Integer score = ec1Scores.get(ec2);
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LiveRangeEquivalenceClassCoalesceCandidate candidate =
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new LiveRangeEquivalenceClassCoalesceCandidate(ec1, ec2, score);
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if(!candidates.contains(candidate)) {
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candidates.add(candidate);
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}
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}
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}
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candidates.sort((o1, o2) -> (o2.getScore() - o1.getScore()));
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return candidates;
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}
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}
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/**
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* A pair of live range equivalence classes that are candidates for coalescing.
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* The pair is unordered - meaning it is equal to the pair with the same classes in opposite order.
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*/
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private static class LiveRangeEquivalenceClassCoalesceCandidate {
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private LiveRangeEquivalenceClass ec1;
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private LiveRangeEquivalenceClass ec2;
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private Integer score;
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public LiveRangeEquivalenceClassCoalesceCandidate(LiveRangeEquivalenceClass ec1, LiveRangeEquivalenceClass ec2, Integer score) {
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this.ec1 = ec1;
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this.ec2 = ec2;
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this.score = score;
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}
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@Override
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public boolean equals(Object o) {
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if(this == o) return true;
|
||||||
|
if(o == null || getClass() != o.getClass()) return false;
|
||||||
|
LiveRangeEquivalenceClassCoalesceCandidate that = (LiveRangeEquivalenceClassCoalesceCandidate) o;
|
||||||
|
if(ec1.equals(that.ec1) && ec2.equals(that.ec2)) return true;
|
||||||
|
if(ec1.equals(that.ec2) && ec2.equals(that.ec1)) return true;
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
@Override
|
||||||
|
public int hashCode() {
|
||||||
|
return ec1.hashCode() + ec2.hashCode();
|
||||||
|
}
|
||||||
|
|
||||||
|
public Integer getScore() {
|
||||||
|
return score;
|
||||||
|
}
|
||||||
|
|
||||||
|
public LiveRangeEquivalenceClass getEc1() {
|
||||||
|
return ec1;
|
||||||
|
}
|
||||||
|
|
||||||
|
public LiveRangeEquivalenceClass getEc2() {
|
||||||
|
return ec2;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
@ -49,7 +49,7 @@ lines: {
|
|||||||
}
|
}
|
||||||
line: {
|
line: {
|
||||||
.label x0 = 7
|
.label x0 = 7
|
||||||
.label x1 = $a
|
.label x1 = 8
|
||||||
.label y0 = 5
|
.label y0 = 5
|
||||||
.label xd = 3
|
.label xd = 3
|
||||||
.label yd = 4
|
.label yd = 4
|
||||||
@ -92,8 +92,6 @@ line: {
|
|||||||
cmp xd
|
cmp xd
|
||||||
bcs b6
|
bcs b6
|
||||||
ldx x0
|
ldx x0
|
||||||
lda x1
|
|
||||||
sta line_xdyd.x1
|
|
||||||
jsr line_xdyd
|
jsr line_xdyd
|
||||||
jmp breturn
|
jmp breturn
|
||||||
b6:
|
b6:
|
||||||
@ -118,6 +116,8 @@ line: {
|
|||||||
bcs b10
|
bcs b10
|
||||||
ldx x1
|
ldx x1
|
||||||
sty line_xdyd.y
|
sty line_xdyd.y
|
||||||
|
lda x0
|
||||||
|
sta line_xdyd.x1
|
||||||
jsr line_xdyd
|
jsr line_xdyd
|
||||||
jmp breturn
|
jmp breturn
|
||||||
b10:
|
b10:
|
||||||
@ -178,8 +178,8 @@ line_ydxi: {
|
|||||||
rts
|
rts
|
||||||
}
|
}
|
||||||
plot: {
|
plot: {
|
||||||
.label _0 = 8
|
.label _0 = 9
|
||||||
.label plotter_x = 8
|
.label plotter_x = 9
|
||||||
.label plotter_y = $b
|
.label plotter_y = $b
|
||||||
lda plot_xhi,x
|
lda plot_xhi,x
|
||||||
sta plotter_x+1
|
sta plotter_x+1
|
||||||
@ -203,7 +203,7 @@ plot: {
|
|||||||
rts
|
rts
|
||||||
}
|
}
|
||||||
line_xdyi: {
|
line_xdyi: {
|
||||||
.label _6 = $a
|
.label _6 = 8
|
||||||
.label y = 5
|
.label y = 5
|
||||||
.label x1 = 7
|
.label x1 = 7
|
||||||
.label xd = 3
|
.label xd = 3
|
||||||
@ -269,9 +269,9 @@ line_ydxd: {
|
|||||||
rts
|
rts
|
||||||
}
|
}
|
||||||
line_xdyd: {
|
line_xdyd: {
|
||||||
.label _6 = $a
|
.label _6 = 7
|
||||||
.label y = 5
|
.label y = 5
|
||||||
.label x1 = 7
|
.label x1 = 8
|
||||||
.label xd = 3
|
.label xd = 3
|
||||||
.label yd = 4
|
.label yd = 4
|
||||||
.label e = 6
|
.label e = 6
|
||||||
@ -304,7 +304,7 @@ line_xdyd: {
|
|||||||
}
|
}
|
||||||
init_plot_tables: {
|
init_plot_tables: {
|
||||||
.label _6 = 2
|
.label _6 = 2
|
||||||
.label yoffs = 8
|
.label yoffs = 9
|
||||||
ldy #$80
|
ldy #$80
|
||||||
ldx #0
|
ldx #0
|
||||||
b1:
|
b1:
|
||||||
@ -356,8 +356,8 @@ init_plot_tables: {
|
|||||||
rts
|
rts
|
||||||
}
|
}
|
||||||
init_screen: {
|
init_screen: {
|
||||||
.label b = 8
|
.label b = 9
|
||||||
.label c = 8
|
.label c = 9
|
||||||
lda #<BITMAP
|
lda #<BITMAP
|
||||||
sta b
|
sta b
|
||||||
lda #>BITMAP
|
lda #>BITMAP
|
||||||
|
@ -5561,40 +5561,40 @@ Attempting to uplift remaining variables inzp ZP_BYTE:42 [ line::xd#1 ]
|
|||||||
Uplifting [line] best 268790 combination zp ZP_BYTE:42 [ line::xd#1 ]
|
Uplifting [line] best 268790 combination zp ZP_BYTE:42 [ line::xd#1 ]
|
||||||
Attempting to uplift remaining variables inzp ZP_BYTE:45 [ line::xd#0 ]
|
Attempting to uplift remaining variables inzp ZP_BYTE:45 [ line::xd#0 ]
|
||||||
Uplifting [line] best 268790 combination zp ZP_BYTE:45 [ line::xd#0 ]
|
Uplifting [line] best 268790 combination zp ZP_BYTE:45 [ line::xd#0 ]
|
||||||
Coalescing zero page register [ zp ZP_BYTE:3 [ line_ydxi::xd#2 line_ydxi::xd#1 line_ydxi::xd#0 ] ] with [ zp ZP_BYTE:42 [ line::xd#1 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:3 [ line_ydxi::xd#2 line_ydxi::xd#1 line_ydxi::xd#0 ] ] with [ zp ZP_BYTE:42 [ line::xd#1 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:3 [ line_ydxi::xd#2 line_ydxi::xd#1 line_ydxi::xd#0 line::xd#1 ] ] with [ zp ZP_BYTE:12 [ line_xdyi::xd#5 line_xdyi::xd#0 line_xdyi::xd#1 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:3 [ line_ydxi::xd#2 line_ydxi::xd#1 line_ydxi::xd#0 line::xd#1 ] ] with [ zp ZP_BYTE:45 [ line::xd#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:3 [ line_ydxi::xd#2 line_ydxi::xd#1 line_ydxi::xd#0 line::xd#1 line_xdyi::xd#5 line_xdyi::xd#0 line_xdyi::xd#1 ] ] with [ zp ZP_BYTE:45 [ line::xd#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:4 [ line_ydxi::yd#5 line_ydxi::yd#1 line_ydxi::yd#0 ] ] with [ zp ZP_BYTE:43 [ line::yd#1 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:3 [ line_ydxi::xd#2 line_ydxi::xd#1 line_ydxi::xd#0 line::xd#1 line_xdyi::xd#5 line_xdyi::xd#0 line_xdyi::xd#1 line::xd#0 ] ] with [ zp ZP_BYTE:17 [ line_ydxd::xd#2 line_ydxd::xd#1 line_ydxd::xd#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:4 [ line_ydxi::yd#5 line_ydxi::yd#1 line_ydxi::yd#0 line::yd#1 ] ] with [ zp ZP_BYTE:47 [ line::yd#10 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:3 [ line_ydxi::xd#2 line_ydxi::xd#1 line_ydxi::xd#0 line::xd#1 line_xdyi::xd#5 line_xdyi::xd#0 line_xdyi::xd#1 line::xd#0 line_ydxd::xd#2 line_ydxd::xd#1 line_ydxd::xd#0 ] ] with [ zp ZP_BYTE:24 [ line_xdyd::xd#5 line_xdyd::xd#0 line_xdyd::xd#1 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:5 [ line_ydxi::y1#6 line_ydxi::y1#1 line_ydxi::y1#0 ] ] with [ zp ZP_BYTE:40 [ line::y0#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:4 [ line_ydxi::yd#5 line_ydxi::yd#1 line_ydxi::yd#0 ] ] with [ zp ZP_BYTE:43 [ line::yd#1 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:13 [ line_xdyi::x1#6 line_xdyi::x1#0 line_xdyi::x1#1 ] ] with [ zp ZP_BYTE:38 [ line::x0#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:4 [ line_ydxi::yd#5 line_ydxi::yd#1 line_ydxi::yd#0 line::yd#1 ] ] with [ zp ZP_BYTE:11 [ line_xdyi::yd#2 line_xdyi::yd#0 line_xdyi::yd#1 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:18 [ line_ydxd::yd#5 line_ydxd::yd#1 line_ydxd::yd#0 ] ] with [ zp ZP_BYTE:44 [ line::yd#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:4 [ line_ydxi::yd#5 line_ydxi::yd#1 line_ydxi::yd#0 line::yd#1 line_xdyi::yd#2 line_xdyi::yd#0 line_xdyi::yd#1 ] ] with [ zp ZP_BYTE:47 [ line::yd#10 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:18 [ line_ydxd::yd#5 line_ydxd::yd#1 line_ydxd::yd#0 line::yd#0 ] ] with [ zp ZP_BYTE:46 [ line::yd#3 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:5 [ line_ydxi::y1#6 line_ydxi::y1#1 line_ydxi::y1#0 ] ] with [ zp ZP_BYTE:40 [ line::y0#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:25 [ line_xdyd::x1#6 line_xdyd::x1#0 line_xdyd::x1#1 ] ] with [ zp ZP_BYTE:39 [ line::x1#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:5 [ line_ydxi::y1#6 line_ydxi::y1#1 line_ydxi::y1#0 line::y0#0 ] ] with [ zp ZP_BYTE:15 [ line_xdyi::y#3 line_xdyi::y#5 line_xdyi::y#0 line_xdyi::y#1 line_xdyi::y#6 line_xdyi::y#2 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:49 [ plot::plotter_x#0 ] ] with [ zp ZP_WORD:53 [ plot::$0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:5 [ line_ydxi::y1#6 line_ydxi::y1#1 line_ydxi::y1#0 line::y0#0 line_xdyi::y#3 line_xdyi::y#5 line_xdyi::y#0 line_xdyi::y#1 line_xdyi::y#6 line_xdyi::y#2 ] ] with [ zp ZP_BYTE:19 [ line_ydxd::y1#6 line_ydxd::y1#1 line_ydxd::y1#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:3 [ line_ydxi::xd#2 line_ydxi::xd#1 line_ydxi::xd#0 line::xd#1 line::xd#0 ] ] with [ zp ZP_BYTE:12 [ line_xdyi::xd#5 line_xdyi::xd#0 line_xdyi::xd#1 ] ] - score: 2
|
||||||
Coalescing zero page register [ zp ZP_BYTE:5 [ line_ydxi::y1#6 line_ydxi::y1#1 line_ydxi::y1#0 line::y0#0 line_xdyi::y#3 line_xdyi::y#5 line_xdyi::y#0 line_xdyi::y#1 line_xdyi::y#6 line_xdyi::y#2 line_ydxd::y1#6 line_ydxd::y1#1 line_ydxd::y1#0 ] ] with [ zp ZP_BYTE:27 [ line_xdyd::y#3 line_xdyd::y#5 line_xdyd::y#0 line_xdyd::y#1 line_xdyd::y#6 line_xdyd::y#2 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:3 [ line_ydxi::xd#2 line_ydxi::xd#1 line_ydxi::xd#0 line::xd#1 line::xd#0 line_xdyi::xd#5 line_xdyi::xd#0 line_xdyi::xd#1 ] ] with [ zp ZP_BYTE:17 [ line_ydxd::xd#2 line_ydxd::xd#1 line_ydxd::xd#0 ] ] - score: 2
|
||||||
Coalescing zero page register [ zp ZP_BYTE:13 [ line_xdyi::x1#6 line_xdyi::x1#0 line_xdyi::x1#1 ] ] with [ zp ZP_BYTE:38 [ line::x0#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:3 [ line_ydxi::xd#2 line_ydxi::xd#1 line_ydxi::xd#0 line::xd#1 line::xd#0 line_xdyi::xd#5 line_xdyi::xd#0 line_xdyi::xd#1 line_ydxd::xd#2 line_ydxd::xd#1 line_ydxd::xd#0 ] ] with [ zp ZP_BYTE:24 [ line_xdyd::xd#5 line_xdyd::xd#0 line_xdyd::xd#1 ] ] - score: 2
|
||||||
Coalescing zero page register [ zp ZP_BYTE:13 [ line_xdyi::x1#6 line_xdyi::x1#0 line_xdyi::x1#1 line::x0#0 ] ] with [ zp ZP_BYTE:25 [ line_xdyd::x1#6 line_xdyd::x1#0 line_xdyd::x1#1 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:4 [ line_ydxi::yd#5 line_ydxi::yd#1 line_ydxi::yd#0 line::yd#1 line::yd#10 ] ] with [ zp ZP_BYTE:11 [ line_xdyi::yd#2 line_xdyi::yd#0 line_xdyi::yd#1 ] ] - score: 2
|
||||||
Coalescing zero page register [ zp ZP_BYTE:18 [ line_ydxd::yd#5 line_ydxd::yd#1 line_ydxd::yd#0 ] ] with [ zp ZP_BYTE:44 [ line::yd#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:18 [ line_ydxd::yd#5 line_ydxd::yd#1 line_ydxd::yd#0 line::yd#0 line::yd#3 ] ] with [ zp ZP_BYTE:23 [ line_xdyd::yd#2 line_xdyd::yd#0 line_xdyd::yd#1 ] ] - score: 2
|
||||||
Coalescing zero page register [ zp ZP_BYTE:18 [ line_ydxd::yd#5 line_ydxd::yd#1 line_ydxd::yd#0 line::yd#0 ] ] with [ zp ZP_BYTE:23 [ line_xdyd::yd#2 line_xdyd::yd#0 line_xdyd::yd#1 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:5 [ line_ydxi::y1#6 line_ydxi::y1#1 line_ydxi::y1#0 line::y0#0 ] ] with [ zp ZP_BYTE:15 [ line_xdyi::y#3 line_xdyi::y#5 line_xdyi::y#0 line_xdyi::y#1 line_xdyi::y#6 line_xdyi::y#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:18 [ line_ydxd::yd#5 line_ydxd::yd#1 line_ydxd::yd#0 line::yd#0 line_xdyd::yd#2 line_xdyd::yd#0 line_xdyd::yd#1 ] ] with [ zp ZP_BYTE:46 [ line::yd#3 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:5 [ line_ydxi::y1#6 line_ydxi::y1#1 line_ydxi::y1#0 line::y0#0 line_xdyi::y#3 line_xdyi::y#5 line_xdyi::y#0 line_xdyi::y#1 line_xdyi::y#6 line_xdyi::y#2 ] ] with [ zp ZP_BYTE:19 [ line_ydxd::y1#6 line_ydxd::y1#1 line_ydxd::y1#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:49 [ plot::plotter_x#0 ] ] with [ zp ZP_WORD:53 [ plot::$0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:5 [ line_ydxi::y1#6 line_ydxi::y1#1 line_ydxi::y1#0 line::y0#0 line_xdyi::y#3 line_xdyi::y#5 line_xdyi::y#0 line_xdyi::y#1 line_xdyi::y#6 line_xdyi::y#2 line_ydxd::y1#6 line_ydxd::y1#1 line_ydxd::y1#0 ] ] with [ zp ZP_BYTE:27 [ line_xdyd::y#3 line_xdyd::y#5 line_xdyd::y#0 line_xdyd::y#1 line_xdyd::y#6 line_xdyd::y#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:2 [ lines::l#2 lines::l#1 ] ] with [ zp ZP_BYTE:60 [ init_plot_tables::$6 ] ]
|
Coalescing zero page register [ zp ZP_BYTE:2 [ lines::l#2 lines::l#1 ] ] with [ zp ZP_BYTE:60 [ init_plot_tables::$6 ] ]
|
||||||
Coalescing zero page register [ zp ZP_BYTE:4 [ line_ydxi::yd#5 line_ydxi::yd#1 line_ydxi::yd#0 line::yd#1 line_xdyi::yd#2 line_xdyi::yd#0 line_xdyi::yd#1 line::yd#10 ] ] with [ zp ZP_BYTE:18 [ line_ydxd::yd#5 line_ydxd::yd#1 line_ydxd::yd#0 line::yd#0 line_xdyd::yd#2 line_xdyd::yd#0 line_xdyd::yd#1 line::yd#3 ] ]
|
Coalescing zero page register [ zp ZP_BYTE:4 [ line_ydxi::yd#5 line_ydxi::yd#1 line_ydxi::yd#0 line::yd#1 line::yd#10 line_xdyi::yd#2 line_xdyi::yd#0 line_xdyi::yd#1 ] ] with [ zp ZP_BYTE:18 [ line_ydxd::yd#5 line_ydxd::yd#1 line_ydxd::yd#0 line::yd#0 line::yd#3 line_xdyd::yd#2 line_xdyd::yd#0 line_xdyd::yd#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_BYTE:7 [ line_ydxi::y#3 line_ydxi::y#6 line_ydxi::y#1 line_ydxi::y#0 line_ydxi::y#2 ] ] with [ zp ZP_BYTE:16 [ line_xdyi::e#3 line_xdyi::e#0 line_xdyi::e#6 line_xdyi::e#2 line_xdyi::e#1 ] ]
|
Coalescing zero page register [ zp ZP_BYTE:7 [ line_ydxi::y#3 line_ydxi::y#6 line_ydxi::y#1 line_ydxi::y#0 line_ydxi::y#2 ] ] with [ zp ZP_BYTE:16 [ line_xdyi::e#3 line_xdyi::e#0 line_xdyi::e#6 line_xdyi::e#2 line_xdyi::e#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_BYTE:7 [ line_ydxi::y#3 line_ydxi::y#6 line_ydxi::y#1 line_ydxi::y#0 line_ydxi::y#2 line_xdyi::e#3 line_xdyi::e#0 line_xdyi::e#6 line_xdyi::e#2 line_xdyi::e#1 ] ] with [ zp ZP_BYTE:21 [ line_ydxd::y#2 line_ydxd::y#7 line_ydxd::y#1 line_ydxd::y#0 line_ydxd::y#3 ] ]
|
Coalescing zero page register [ zp ZP_BYTE:7 [ line_ydxi::y#3 line_ydxi::y#6 line_ydxi::y#1 line_ydxi::y#0 line_ydxi::y#2 line_xdyi::e#3 line_xdyi::e#0 line_xdyi::e#6 line_xdyi::e#2 line_xdyi::e#1 ] ] with [ zp ZP_BYTE:21 [ line_ydxd::y#2 line_ydxd::y#7 line_ydxd::y#1 line_ydxd::y#0 line_ydxd::y#3 ] ]
|
||||||
Coalescing zero page register [ zp ZP_BYTE:7 [ line_ydxi::y#3 line_ydxi::y#6 line_ydxi::y#1 line_ydxi::y#0 line_ydxi::y#2 line_xdyi::e#3 line_xdyi::e#0 line_xdyi::e#6 line_xdyi::e#2 line_xdyi::e#1 line_ydxd::y#2 line_ydxd::y#7 line_ydxd::y#1 line_ydxd::y#0 line_ydxd::y#3 ] ] with [ zp ZP_BYTE:28 [ line_xdyd::e#3 line_xdyd::e#0 line_xdyd::e#6 line_xdyd::e#2 line_xdyd::e#1 ] ]
|
Coalescing zero page register [ zp ZP_BYTE:7 [ line_ydxi::y#3 line_ydxi::y#6 line_ydxi::y#1 line_ydxi::y#0 line_ydxi::y#2 line_xdyi::e#3 line_xdyi::e#0 line_xdyi::e#6 line_xdyi::e#2 line_xdyi::e#1 line_ydxd::y#2 line_ydxd::y#7 line_ydxd::y#1 line_ydxd::y#0 line_ydxd::y#3 ] ] with [ zp ZP_BYTE:28 [ line_xdyd::e#3 line_xdyd::e#0 line_xdyd::e#6 line_xdyd::e#2 line_xdyd::e#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_BYTE:8 [ line_ydxi::e#3 line_ydxi::e#0 line_ydxi::e#6 line_ydxi::e#2 line_ydxi::e#1 ] ] with [ zp ZP_BYTE:13 [ line_xdyi::x1#6 line_xdyi::x1#0 line_xdyi::x1#1 line::x0#0 line_xdyd::x1#6 line_xdyd::x1#0 line_xdyd::x1#1 ] ]
|
Coalescing zero page register [ zp ZP_BYTE:8 [ line_ydxi::e#3 line_ydxi::e#0 line_ydxi::e#6 line_ydxi::e#2 line_ydxi::e#1 ] ] with [ zp ZP_BYTE:13 [ line_xdyi::x1#6 line_xdyi::x1#0 line_xdyi::x1#1 line::x0#0 ] ]
|
||||||
Coalescing zero page register [ zp ZP_BYTE:8 [ line_ydxi::e#3 line_ydxi::e#0 line_ydxi::e#6 line_ydxi::e#2 line_ydxi::e#1 line_xdyi::x1#6 line_xdyi::x1#0 line_xdyi::x1#1 line::x0#0 line_xdyd::x1#6 line_xdyd::x1#0 line_xdyd::x1#1 ] ] with [ zp ZP_BYTE:22 [ line_ydxd::e#3 line_ydxd::e#0 line_ydxd::e#6 line_ydxd::e#2 line_ydxd::e#1 ] ]
|
Coalescing zero page register [ zp ZP_BYTE:8 [ line_ydxi::e#3 line_ydxi::e#0 line_ydxi::e#6 line_ydxi::e#2 line_ydxi::e#1 line_xdyi::x1#6 line_xdyi::x1#0 line_xdyi::x1#1 line::x0#0 ] ] with [ zp ZP_BYTE:22 [ line_ydxd::e#3 line_ydxd::e#0 line_ydxd::e#6 line_ydxd::e#2 line_ydxd::e#1 ] ]
|
||||||
|
Coalescing zero page register [ zp ZP_BYTE:8 [ line_ydxi::e#3 line_ydxi::e#0 line_ydxi::e#6 line_ydxi::e#2 line_ydxi::e#1 line_xdyi::x1#6 line_xdyi::x1#0 line_xdyi::x1#1 line::x0#0 line_ydxd::e#3 line_ydxd::e#0 line_ydxd::e#6 line_ydxd::e#2 line_ydxd::e#1 ] ] with [ zp ZP_BYTE:58 [ line_xdyd::$6 ] ]
|
||||||
|
Coalescing zero page register [ zp ZP_BYTE:25 [ line_xdyd::x1#6 line_xdyd::x1#0 line_xdyd::x1#1 line::x1#0 ] ] with [ zp ZP_BYTE:56 [ line_xdyi::$6 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:32 [ init_plot_tables::yoffs#2 init_plot_tables::yoffs#4 init_plot_tables::yoffs#1 ] ] with [ zp ZP_WORD:34 [ init_screen::b#2 init_screen::b#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:32 [ init_plot_tables::yoffs#2 init_plot_tables::yoffs#4 init_plot_tables::yoffs#1 ] ] with [ zp ZP_WORD:34 [ init_screen::b#2 init_screen::b#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:32 [ init_plot_tables::yoffs#2 init_plot_tables::yoffs#4 init_plot_tables::yoffs#1 init_screen::b#2 init_screen::b#1 ] ] with [ zp ZP_WORD:36 [ init_screen::c#2 init_screen::c#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:32 [ init_plot_tables::yoffs#2 init_plot_tables::yoffs#4 init_plot_tables::yoffs#1 init_screen::b#2 init_screen::b#1 ] ] with [ zp ZP_WORD:36 [ init_screen::c#2 init_screen::c#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:32 [ init_plot_tables::yoffs#2 init_plot_tables::yoffs#4 init_plot_tables::yoffs#1 init_screen::b#2 init_screen::b#1 init_screen::c#2 init_screen::c#1 ] ] with [ zp ZP_WORD:49 [ plot::plotter_x#0 plot::$0 ] ]
|
Coalescing zero page register [ zp ZP_WORD:32 [ init_plot_tables::yoffs#2 init_plot_tables::yoffs#4 init_plot_tables::yoffs#1 init_screen::b#2 init_screen::b#1 init_screen::c#2 init_screen::c#1 ] ] with [ zp ZP_WORD:49 [ plot::plotter_x#0 plot::$0 ] ]
|
||||||
Coalescing zero page register [ zp ZP_BYTE:39 [ line::x1#0 ] ] with [ zp ZP_BYTE:56 [ line_xdyi::$6 ] ]
|
|
||||||
Coalescing zero page register [ zp ZP_BYTE:39 [ line::x1#0 line_xdyi::$6 ] ] with [ zp ZP_BYTE:58 [ line_xdyd::$6 ] ]
|
|
||||||
Allocated (was zp ZP_BYTE:7) zp ZP_BYTE:6 [ line_ydxi::y#3 line_ydxi::y#6 line_ydxi::y#1 line_ydxi::y#0 line_ydxi::y#2 line_xdyi::e#3 line_xdyi::e#0 line_xdyi::e#6 line_xdyi::e#2 line_xdyi::e#1 line_ydxd::y#2 line_ydxd::y#7 line_ydxd::y#1 line_ydxd::y#0 line_ydxd::y#3 line_xdyd::e#3 line_xdyd::e#0 line_xdyd::e#6 line_xdyd::e#2 line_xdyd::e#1 ]
|
Allocated (was zp ZP_BYTE:7) zp ZP_BYTE:6 [ line_ydxi::y#3 line_ydxi::y#6 line_ydxi::y#1 line_ydxi::y#0 line_ydxi::y#2 line_xdyi::e#3 line_xdyi::e#0 line_xdyi::e#6 line_xdyi::e#2 line_xdyi::e#1 line_ydxd::y#2 line_ydxd::y#7 line_ydxd::y#1 line_ydxd::y#0 line_ydxd::y#3 line_xdyd::e#3 line_xdyd::e#0 line_xdyd::e#6 line_xdyd::e#2 line_xdyd::e#1 ]
|
||||||
Allocated (was zp ZP_BYTE:8) zp ZP_BYTE:7 [ line_ydxi::e#3 line_ydxi::e#0 line_ydxi::e#6 line_ydxi::e#2 line_ydxi::e#1 line_xdyi::x1#6 line_xdyi::x1#0 line_xdyi::x1#1 line::x0#0 line_xdyd::x1#6 line_xdyd::x1#0 line_xdyd::x1#1 line_ydxd::e#3 line_ydxd::e#0 line_ydxd::e#6 line_ydxd::e#2 line_ydxd::e#1 ]
|
Allocated (was zp ZP_BYTE:8) zp ZP_BYTE:7 [ line_ydxi::e#3 line_ydxi::e#0 line_ydxi::e#6 line_ydxi::e#2 line_ydxi::e#1 line_xdyi::x1#6 line_xdyi::x1#0 line_xdyi::x1#1 line::x0#0 line_ydxd::e#3 line_ydxd::e#0 line_ydxd::e#6 line_ydxd::e#2 line_ydxd::e#1 line_xdyd::$6 ]
|
||||||
Allocated (was zp ZP_WORD:32) zp ZP_WORD:8 [ init_plot_tables::yoffs#2 init_plot_tables::yoffs#4 init_plot_tables::yoffs#1 init_screen::b#2 init_screen::b#1 init_screen::c#2 init_screen::c#1 plot::plotter_x#0 plot::$0 ]
|
Allocated (was zp ZP_BYTE:25) zp ZP_BYTE:8 [ line_xdyd::x1#6 line_xdyd::x1#0 line_xdyd::x1#1 line::x1#0 line_xdyi::$6 ]
|
||||||
Allocated (was zp ZP_BYTE:39) zp ZP_BYTE:10 [ line::x1#0 line_xdyi::$6 line_xdyd::$6 ]
|
Allocated (was zp ZP_WORD:32) zp ZP_WORD:9 [ init_plot_tables::yoffs#2 init_plot_tables::yoffs#4 init_plot_tables::yoffs#1 init_screen::b#2 init_screen::b#1 init_screen::c#2 init_screen::c#1 plot::plotter_x#0 plot::$0 ]
|
||||||
Allocated (was zp ZP_WORD:51) zp ZP_WORD:11 [ plot::plotter_y#0 ]
|
Allocated (was zp ZP_WORD:51) zp ZP_WORD:11 [ plot::plotter_y#0 ]
|
||||||
|
|
||||||
ASSEMBLER BEFORE OPTIMIZATION
|
ASSEMBLER BEFORE OPTIMIZATION
|
||||||
@ -5725,7 +5725,7 @@ lines: {
|
|||||||
//SEG43 line
|
//SEG43 line
|
||||||
line: {
|
line: {
|
||||||
.label x0 = 7
|
.label x0 = 7
|
||||||
.label x1 = $a
|
.label x1 = 8
|
||||||
.label y0 = 5
|
.label y0 = 5
|
||||||
.label xd = 3
|
.label xd = 3
|
||||||
.label yd = 4
|
.label yd = 4
|
||||||
@ -5828,9 +5828,8 @@ line: {
|
|||||||
ldx x0
|
ldx x0
|
||||||
//SEG84 [46] (byte) line_xdyd::y#0 ← (byte) line::y0#0 [ line::x1#0 line::xd#1 line::yd#0 line_xdyd::x#0 line_xdyd::y#0 ] ( main:2::lines:12::line:21 [ lines::l#2 line::x1#0 line::xd#1 line::yd#0 line_xdyd::x#0 line_xdyd::y#0 ] )
|
//SEG84 [46] (byte) line_xdyd::y#0 ← (byte) line::y0#0 [ line::x1#0 line::xd#1 line::yd#0 line_xdyd::x#0 line_xdyd::y#0 ] ( main:2::lines:12::line:21 [ lines::l#2 line::x1#0 line::xd#1 line::yd#0 line_xdyd::x#0 line_xdyd::y#0 ] )
|
||||||
// (byte) line_xdyd::y#0 = (byte) line::y0#0 // register copy zp ZP_BYTE:5
|
// (byte) line_xdyd::y#0 = (byte) line::y0#0 // register copy zp ZP_BYTE:5
|
||||||
//SEG85 [47] (byte) line_xdyd::x1#0 ← (byte) line::x1#0 [ line::xd#1 line::yd#0 line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 ] ( main:2::lines:12::line:21 [ lines::l#2 line::xd#1 line::yd#0 line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 ] ) -- vbuz1=vbuz2
|
//SEG85 [47] (byte) line_xdyd::x1#0 ← (byte) line::x1#0 [ line::xd#1 line::yd#0 line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 ] ( main:2::lines:12::line:21 [ lines::l#2 line::xd#1 line::yd#0 line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 ] )
|
||||||
lda x1
|
// (byte) line_xdyd::x1#0 = (byte) line::x1#0 // register copy zp ZP_BYTE:8
|
||||||
sta line_xdyd.x1
|
|
||||||
//SEG86 [48] (byte) line_xdyd::xd#0 ← (byte) line::xd#1 [ line::yd#0 line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 line_xdyd::xd#0 ] ( main:2::lines:12::line:21 [ lines::l#2 line::yd#0 line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 line_xdyd::xd#0 ] )
|
//SEG86 [48] (byte) line_xdyd::xd#0 ← (byte) line::xd#1 [ line::yd#0 line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 line_xdyd::xd#0 ] ( main:2::lines:12::line:21 [ lines::l#2 line::yd#0 line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 line_xdyd::xd#0 ] )
|
||||||
// (byte) line_xdyd::xd#0 = (byte) line::xd#1 // register copy zp ZP_BYTE:3
|
// (byte) line_xdyd::xd#0 = (byte) line::xd#1 // register copy zp ZP_BYTE:3
|
||||||
//SEG87 [49] (byte) line_xdyd::yd#0 ← (byte) line::yd#0 [ line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 line_xdyd::xd#0 line_xdyd::yd#0 ] ( main:2::lines:12::line:21 [ lines::l#2 line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 line_xdyd::xd#0 line_xdyd::yd#0 ] )
|
//SEG87 [49] (byte) line_xdyd::yd#0 ← (byte) line::yd#0 [ line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 line_xdyd::xd#0 line_xdyd::yd#0 ] ( main:2::lines:12::line:21 [ lines::l#2 line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 line_xdyd::xd#0 line_xdyd::yd#0 ] )
|
||||||
@ -5898,8 +5897,9 @@ line: {
|
|||||||
ldx x1
|
ldx x1
|
||||||
//SEG116 [62] (byte) line_xdyd::y#1 ← (byte) line::y1#0 [ line::x0#0 line::xd#0 line::yd#3 line_xdyd::x#1 line_xdyd::y#1 ] ( main:2::lines:12::line:21 [ lines::l#2 line::x0#0 line::xd#0 line::yd#3 line_xdyd::x#1 line_xdyd::y#1 ] ) -- vbuz1=vbuyy
|
//SEG116 [62] (byte) line_xdyd::y#1 ← (byte) line::y1#0 [ line::x0#0 line::xd#0 line::yd#3 line_xdyd::x#1 line_xdyd::y#1 ] ( main:2::lines:12::line:21 [ lines::l#2 line::x0#0 line::xd#0 line::yd#3 line_xdyd::x#1 line_xdyd::y#1 ] ) -- vbuz1=vbuyy
|
||||||
sty line_xdyd.y
|
sty line_xdyd.y
|
||||||
//SEG117 [63] (byte) line_xdyd::x1#1 ← (byte) line::x0#0 [ line::xd#0 line::yd#3 line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 ] ( main:2::lines:12::line:21 [ lines::l#2 line::xd#0 line::yd#3 line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 ] )
|
//SEG117 [63] (byte) line_xdyd::x1#1 ← (byte) line::x0#0 [ line::xd#0 line::yd#3 line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 ] ( main:2::lines:12::line:21 [ lines::l#2 line::xd#0 line::yd#3 line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 ] ) -- vbuz1=vbuz2
|
||||||
// (byte) line_xdyd::x1#1 = (byte) line::x0#0 // register copy zp ZP_BYTE:7
|
lda x0
|
||||||
|
sta line_xdyd.x1
|
||||||
//SEG118 [64] (byte) line_xdyd::xd#1 ← (byte) line::xd#0 [ line::yd#3 line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 line_xdyd::xd#1 ] ( main:2::lines:12::line:21 [ lines::l#2 line::yd#3 line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 line_xdyd::xd#1 ] )
|
//SEG118 [64] (byte) line_xdyd::xd#1 ← (byte) line::xd#0 [ line::yd#3 line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 line_xdyd::xd#1 ] ( main:2::lines:12::line:21 [ lines::l#2 line::yd#3 line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 line_xdyd::xd#1 ] )
|
||||||
// (byte) line_xdyd::xd#1 = (byte) line::xd#0 // register copy zp ZP_BYTE:3
|
// (byte) line_xdyd::xd#1 = (byte) line::xd#0 // register copy zp ZP_BYTE:3
|
||||||
//SEG119 [65] (byte) line_xdyd::yd#1 ← (byte) line::yd#3 [ line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 line_xdyd::xd#1 line_xdyd::yd#1 ] ( main:2::lines:12::line:21 [ lines::l#2 line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 line_xdyd::xd#1 line_xdyd::yd#1 ] )
|
//SEG119 [65] (byte) line_xdyd::yd#1 ← (byte) line::yd#3 [ line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 line_xdyd::xd#1 line_xdyd::yd#1 ] ( main:2::lines:12::line:21 [ lines::l#2 line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 line_xdyd::xd#1 line_xdyd::yd#1 ] )
|
||||||
@ -6071,8 +6071,8 @@ line_ydxi: {
|
|||||||
}
|
}
|
||||||
//SEG197 plot
|
//SEG197 plot
|
||||||
plot: {
|
plot: {
|
||||||
.label _0 = 8
|
.label _0 = 9
|
||||||
.label plotter_x = 8
|
.label plotter_x = 9
|
||||||
.label plotter_y = $b
|
.label plotter_y = $b
|
||||||
//SEG198 [103] (word) plot::plotter_x#0 ← *((const byte[256]) plot_xhi#0 + (byte) plot::x#4) w= *((const byte[256]) plot_xlo#0 + (byte) plot::x#4) [ plot::x#4 plot::y#4 plot::plotter_x#0 ] ( main:2::lines:12::line:21::line_ydxi:42::plot:92 [ lines::l#2 line_ydxi::xd#2 line_ydxi::yd#5 line_ydxi::y1#6 line_ydxi::x#3 line_ydxi::y#3 line_ydxi::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_ydxi:86::plot:92 [ lines::l#2 line_ydxi::xd#2 line_ydxi::yd#5 line_ydxi::y1#6 line_ydxi::x#3 line_ydxi::y#3 line_ydxi::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_xdyi:35::plot:114 [ lines::l#2 line_xdyi::yd#2 line_xdyi::xd#5 line_xdyi::x1#6 line_xdyi::x#3 line_xdyi::y#3 line_xdyi::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_xdyi:80::plot:114 [ lines::l#2 line_xdyi::yd#2 line_xdyi::xd#5 line_xdyi::x1#6 line_xdyi::x#3 line_xdyi::y#3 line_xdyi::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_ydxd:56::plot:129 [ lines::l#2 line_ydxd::xd#2 line_ydxd::yd#5 line_ydxd::y1#6 line_ydxd::x#3 line_ydxd::y#2 line_ydxd::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_ydxd:72::plot:129 [ lines::l#2 line_ydxd::xd#2 line_ydxd::yd#5 line_ydxd::y1#6 line_ydxd::x#3 line_ydxd::y#2 line_ydxd::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_xdyd:50::plot:144 [ lines::l#2 line_xdyd::yd#2 line_xdyd::xd#5 line_xdyd::x1#6 line_xdyd::x#3 line_xdyd::y#3 line_xdyd::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_xdyd:66::plot:144 [ lines::l#2 line_xdyd::yd#2 line_xdyd::xd#5 line_xdyd::x1#6 line_xdyd::x#3 line_xdyd::y#3 line_xdyd::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] ) -- vwuz1=pbuc1_derefidx_vbuxx_word_pbuc2_derefidx_vbuxx
|
//SEG198 [103] (word) plot::plotter_x#0 ← *((const byte[256]) plot_xhi#0 + (byte) plot::x#4) w= *((const byte[256]) plot_xlo#0 + (byte) plot::x#4) [ plot::x#4 plot::y#4 plot::plotter_x#0 ] ( main:2::lines:12::line:21::line_ydxi:42::plot:92 [ lines::l#2 line_ydxi::xd#2 line_ydxi::yd#5 line_ydxi::y1#6 line_ydxi::x#3 line_ydxi::y#3 line_ydxi::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_ydxi:86::plot:92 [ lines::l#2 line_ydxi::xd#2 line_ydxi::yd#5 line_ydxi::y1#6 line_ydxi::x#3 line_ydxi::y#3 line_ydxi::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_xdyi:35::plot:114 [ lines::l#2 line_xdyi::yd#2 line_xdyi::xd#5 line_xdyi::x1#6 line_xdyi::x#3 line_xdyi::y#3 line_xdyi::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_xdyi:80::plot:114 [ lines::l#2 line_xdyi::yd#2 line_xdyi::xd#5 line_xdyi::x1#6 line_xdyi::x#3 line_xdyi::y#3 line_xdyi::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_ydxd:56::plot:129 [ lines::l#2 line_ydxd::xd#2 line_ydxd::yd#5 line_ydxd::y1#6 line_ydxd::x#3 line_ydxd::y#2 line_ydxd::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_ydxd:72::plot:129 [ lines::l#2 line_ydxd::xd#2 line_ydxd::yd#5 line_ydxd::y1#6 line_ydxd::x#3 line_ydxd::y#2 line_ydxd::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_xdyd:50::plot:144 [ lines::l#2 line_xdyd::yd#2 line_xdyd::xd#5 line_xdyd::x1#6 line_xdyd::x#3 line_xdyd::y#3 line_xdyd::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_xdyd:66::plot:144 [ lines::l#2 line_xdyd::yd#2 line_xdyd::xd#5 line_xdyd::x1#6 line_xdyd::x#3 line_xdyd::y#3 line_xdyd::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] ) -- vwuz1=pbuc1_derefidx_vbuxx_word_pbuc2_derefidx_vbuxx
|
||||||
lda plot_xhi,x
|
lda plot_xhi,x
|
||||||
@ -6107,7 +6107,7 @@ plot: {
|
|||||||
}
|
}
|
||||||
//SEG205 line_xdyi
|
//SEG205 line_xdyi
|
||||||
line_xdyi: {
|
line_xdyi: {
|
||||||
.label _6 = $a
|
.label _6 = 8
|
||||||
.label y = 5
|
.label y = 5
|
||||||
.label x1 = 7
|
.label x1 = 7
|
||||||
.label xd = 3
|
.label xd = 3
|
||||||
@ -6257,9 +6257,9 @@ line_ydxd: {
|
|||||||
}
|
}
|
||||||
//SEG261 line_xdyd
|
//SEG261 line_xdyd
|
||||||
line_xdyd: {
|
line_xdyd: {
|
||||||
.label _6 = $a
|
.label _6 = 7
|
||||||
.label y = 5
|
.label y = 5
|
||||||
.label x1 = 7
|
.label x1 = 8
|
||||||
.label xd = 3
|
.label xd = 3
|
||||||
.label yd = 4
|
.label yd = 4
|
||||||
.label e = 6
|
.label e = 6
|
||||||
@ -6334,7 +6334,7 @@ line_xdyd: {
|
|||||||
//SEG289 init_plot_tables
|
//SEG289 init_plot_tables
|
||||||
init_plot_tables: {
|
init_plot_tables: {
|
||||||
.label _6 = 2
|
.label _6 = 2
|
||||||
.label yoffs = 8
|
.label yoffs = 9
|
||||||
//SEG290 [155] phi from init_plot_tables to init_plot_tables::@1 [phi:init_plot_tables->init_plot_tables::@1]
|
//SEG290 [155] phi from init_plot_tables to init_plot_tables::@1 [phi:init_plot_tables->init_plot_tables::@1]
|
||||||
b1_from_init_plot_tables:
|
b1_from_init_plot_tables:
|
||||||
//SEG291 [155] phi (byte) init_plot_tables::bits#3 = (byte/word/signed word/dword/signed dword) 128 [phi:init_plot_tables->init_plot_tables::@1#0] -- vbuyy=vbuc1
|
//SEG291 [155] phi (byte) init_plot_tables::bits#3 = (byte/word/signed word/dword/signed dword) 128 [phi:init_plot_tables->init_plot_tables::@1#0] -- vbuyy=vbuc1
|
||||||
@ -6456,8 +6456,8 @@ init_plot_tables: {
|
|||||||
}
|
}
|
||||||
//SEG336 init_screen
|
//SEG336 init_screen
|
||||||
init_screen: {
|
init_screen: {
|
||||||
.label b = 8
|
.label b = 9
|
||||||
.label c = 8
|
.label c = 9
|
||||||
//SEG337 [181] phi from init_screen to init_screen::@1 [phi:init_screen->init_screen::@1]
|
//SEG337 [181] phi from init_screen to init_screen::@1 [phi:init_screen->init_screen::@1]
|
||||||
b1_from_init_screen:
|
b1_from_init_screen:
|
||||||
//SEG338 [181] phi (byte*) init_screen::b#2 = (const byte*) BITMAP#0 [phi:init_screen->init_screen::@1#0] -- pbuz1=pbuc1
|
//SEG338 [181] phi (byte*) init_screen::b#2 = (const byte*) BITMAP#0 [phi:init_screen->init_screen::@1#0] -- pbuz1=pbuc1
|
||||||
@ -6758,19 +6758,19 @@ FINAL SYMBOL TABLE
|
|||||||
(byte) init_plot_tables::y#1 reg byte x 16.5
|
(byte) init_plot_tables::y#1 reg byte x 16.5
|
||||||
(byte) init_plot_tables::y#2 reg byte x 6.0
|
(byte) init_plot_tables::y#2 reg byte x 6.0
|
||||||
(byte*) init_plot_tables::yoffs
|
(byte*) init_plot_tables::yoffs
|
||||||
(byte*) init_plot_tables::yoffs#1 yoffs zp ZP_WORD:8 22.0
|
(byte*) init_plot_tables::yoffs#1 yoffs zp ZP_WORD:9 22.0
|
||||||
(byte*) init_plot_tables::yoffs#2 yoffs zp ZP_WORD:8 6.111111111111112
|
(byte*) init_plot_tables::yoffs#2 yoffs zp ZP_WORD:9 6.111111111111112
|
||||||
(byte*) init_plot_tables::yoffs#4 yoffs zp ZP_WORD:8 11.0
|
(byte*) init_plot_tables::yoffs#4 yoffs zp ZP_WORD:9 11.0
|
||||||
(void()) init_screen()
|
(void()) init_screen()
|
||||||
(label) init_screen::@1
|
(label) init_screen::@1
|
||||||
(label) init_screen::@2
|
(label) init_screen::@2
|
||||||
(label) init_screen::@return
|
(label) init_screen::@return
|
||||||
(byte*) init_screen::b
|
(byte*) init_screen::b
|
||||||
(byte*) init_screen::b#1 b zp ZP_WORD:8 16.5
|
(byte*) init_screen::b#1 b zp ZP_WORD:9 16.5
|
||||||
(byte*) init_screen::b#2 b zp ZP_WORD:8 16.5
|
(byte*) init_screen::b#2 b zp ZP_WORD:9 16.5
|
||||||
(byte*) init_screen::c
|
(byte*) init_screen::c
|
||||||
(byte*) init_screen::c#1 c zp ZP_WORD:8 16.5
|
(byte*) init_screen::c#1 c zp ZP_WORD:9 16.5
|
||||||
(byte*) init_screen::c#2 c zp ZP_WORD:8 16.5
|
(byte*) init_screen::c#2 c zp ZP_WORD:9 16.5
|
||||||
(void()) line((byte) line::x0 , (byte) line::x1 , (byte) line::y0 , (byte) line::y1)
|
(void()) line((byte) line::x0 , (byte) line::x1 , (byte) line::y0 , (byte) line::y1)
|
||||||
(label) line::@1
|
(label) line::@1
|
||||||
(label) line::@10
|
(label) line::@10
|
||||||
@ -6790,7 +6790,7 @@ FINAL SYMBOL TABLE
|
|||||||
(byte) line::x0
|
(byte) line::x0
|
||||||
(byte) line::x0#0 x0 zp ZP_BYTE:7 5.173913043478264
|
(byte) line::x0#0 x0 zp ZP_BYTE:7 5.173913043478264
|
||||||
(byte) line::x1
|
(byte) line::x1
|
||||||
(byte) line::x1#0 x1 zp ZP_BYTE:10 5.409090909090908
|
(byte) line::x1#0 x1 zp ZP_BYTE:8 5.409090909090908
|
||||||
(byte) line::xd
|
(byte) line::xd
|
||||||
(byte) line::xd#0 xd zp ZP_BYTE:3 0.7
|
(byte) line::xd#0 xd zp ZP_BYTE:3 0.7
|
||||||
(byte) line::xd#1 xd zp ZP_BYTE:3 0.7
|
(byte) line::xd#1 xd zp ZP_BYTE:3 0.7
|
||||||
@ -6804,7 +6804,7 @@ FINAL SYMBOL TABLE
|
|||||||
(byte) line::yd#10 yd zp ZP_BYTE:4 0.8888888888888888
|
(byte) line::yd#10 yd zp ZP_BYTE:4 0.8888888888888888
|
||||||
(byte) line::yd#3 yd zp ZP_BYTE:4 0.8888888888888888
|
(byte) line::yd#3 yd zp ZP_BYTE:4 0.8888888888888888
|
||||||
(void()) line_xdyd((byte) line_xdyd::x , (byte) line_xdyd::y , (byte) line_xdyd::x1 , (byte) line_xdyd::xd , (byte) line_xdyd::yd)
|
(void()) line_xdyd((byte) line_xdyd::x , (byte) line_xdyd::y , (byte) line_xdyd::x1 , (byte) line_xdyd::xd , (byte) line_xdyd::yd)
|
||||||
(byte/word~) line_xdyd::$6 $6 zp ZP_BYTE:10 2002.0
|
(byte/word~) line_xdyd::$6 $6 zp ZP_BYTE:7 2002.0
|
||||||
(label) line_xdyd::@1
|
(label) line_xdyd::@1
|
||||||
(label) line_xdyd::@2
|
(label) line_xdyd::@2
|
||||||
(label) line_xdyd::@3
|
(label) line_xdyd::@3
|
||||||
@ -6823,9 +6823,9 @@ FINAL SYMBOL TABLE
|
|||||||
(byte) line_xdyd::x#3 reg byte x 751.25
|
(byte) line_xdyd::x#3 reg byte x 751.25
|
||||||
(byte) line_xdyd::x#6 reg byte x 3.0
|
(byte) line_xdyd::x#6 reg byte x 3.0
|
||||||
(byte) line_xdyd::x1
|
(byte) line_xdyd::x1
|
||||||
(byte) line_xdyd::x1#0 x1 zp ZP_BYTE:7 1.3333333333333333
|
(byte) line_xdyd::x1#0 x1 zp ZP_BYTE:8 1.3333333333333333
|
||||||
(byte) line_xdyd::x1#1 x1 zp ZP_BYTE:7 1.3333333333333333
|
(byte) line_xdyd::x1#1 x1 zp ZP_BYTE:8 1.3333333333333333
|
||||||
(byte) line_xdyd::x1#6 x1 zp ZP_BYTE:7 71.78571428571429
|
(byte) line_xdyd::x1#6 x1 zp ZP_BYTE:8 71.78571428571429
|
||||||
(byte) line_xdyd::xd
|
(byte) line_xdyd::xd
|
||||||
(byte) line_xdyd::xd#0 xd zp ZP_BYTE:3 2.0
|
(byte) line_xdyd::xd#0 xd zp ZP_BYTE:3 2.0
|
||||||
(byte) line_xdyd::xd#1 xd zp ZP_BYTE:3 2.0
|
(byte) line_xdyd::xd#1 xd zp ZP_BYTE:3 2.0
|
||||||
@ -6842,7 +6842,7 @@ FINAL SYMBOL TABLE
|
|||||||
(byte) line_xdyd::yd#1 yd zp ZP_BYTE:4 4.0
|
(byte) line_xdyd::yd#1 yd zp ZP_BYTE:4 4.0
|
||||||
(byte) line_xdyd::yd#2 yd zp ZP_BYTE:4 71.92857142857143
|
(byte) line_xdyd::yd#2 yd zp ZP_BYTE:4 71.92857142857143
|
||||||
(void()) line_xdyi((byte) line_xdyi::x , (byte) line_xdyi::y , (byte) line_xdyi::x1 , (byte) line_xdyi::xd , (byte) line_xdyi::yd)
|
(void()) line_xdyi((byte) line_xdyi::x , (byte) line_xdyi::y , (byte) line_xdyi::x1 , (byte) line_xdyi::xd , (byte) line_xdyi::yd)
|
||||||
(byte/word~) line_xdyi::$6 $6 zp ZP_BYTE:10 2002.0
|
(byte/word~) line_xdyi::$6 $6 zp ZP_BYTE:8 2002.0
|
||||||
(label) line_xdyi::@1
|
(label) line_xdyi::@1
|
||||||
(label) line_xdyi::@2
|
(label) line_xdyi::@2
|
||||||
(label) line_xdyi::@3
|
(label) line_xdyi::@3
|
||||||
@ -6974,12 +6974,12 @@ FINAL SYMBOL TABLE
|
|||||||
(label) main::@5
|
(label) main::@5
|
||||||
(label) main::@return
|
(label) main::@return
|
||||||
(void()) plot((byte) plot::x , (byte) plot::y)
|
(void()) plot((byte) plot::x , (byte) plot::y)
|
||||||
(word~) plot::$0 $0 zp ZP_WORD:8 1.0
|
(word~) plot::$0 $0 zp ZP_WORD:9 1.0
|
||||||
(byte~) plot::$1 reg byte a 4.0
|
(byte~) plot::$1 reg byte a 4.0
|
||||||
(label) plot::@return
|
(label) plot::@return
|
||||||
(byte*) plot::plotter
|
(byte*) plot::plotter
|
||||||
(word) plot::plotter_x
|
(word) plot::plotter_x
|
||||||
(word) plot::plotter_x#0 plotter_x zp ZP_WORD:8 2.0
|
(word) plot::plotter_x#0 plotter_x zp ZP_WORD:9 2.0
|
||||||
(word) plot::plotter_y
|
(word) plot::plotter_y
|
||||||
(word) plot::plotter_y#0 plotter_y zp ZP_WORD:11 4.0
|
(word) plot::plotter_y#0 plotter_y zp ZP_WORD:11 4.0
|
||||||
(byte) plot::x
|
(byte) plot::x
|
||||||
@ -7006,22 +7006,22 @@ FINAL SYMBOL TABLE
|
|||||||
(const byte[256]) plot_ylo#0 plot_ylo = { fill( 256, 0) }
|
(const byte[256]) plot_ylo#0 plot_ylo = { fill( 256, 0) }
|
||||||
|
|
||||||
zp ZP_BYTE:2 [ lines::l#2 lines::l#1 init_plot_tables::$6 ]
|
zp ZP_BYTE:2 [ lines::l#2 lines::l#1 init_plot_tables::$6 ]
|
||||||
zp ZP_BYTE:3 [ line_ydxi::xd#2 line_ydxi::xd#1 line_ydxi::xd#0 line::xd#1 line_xdyi::xd#5 line_xdyi::xd#0 line_xdyi::xd#1 line::xd#0 line_ydxd::xd#2 line_ydxd::xd#1 line_ydxd::xd#0 line_xdyd::xd#5 line_xdyd::xd#0 line_xdyd::xd#1 ]
|
zp ZP_BYTE:3 [ line_ydxi::xd#2 line_ydxi::xd#1 line_ydxi::xd#0 line::xd#1 line::xd#0 line_xdyi::xd#5 line_xdyi::xd#0 line_xdyi::xd#1 line_ydxd::xd#2 line_ydxd::xd#1 line_ydxd::xd#0 line_xdyd::xd#5 line_xdyd::xd#0 line_xdyd::xd#1 ]
|
||||||
zp ZP_BYTE:4 [ line_ydxi::yd#5 line_ydxi::yd#1 line_ydxi::yd#0 line::yd#1 line_xdyi::yd#2 line_xdyi::yd#0 line_xdyi::yd#1 line::yd#10 line_ydxd::yd#5 line_ydxd::yd#1 line_ydxd::yd#0 line::yd#0 line_xdyd::yd#2 line_xdyd::yd#0 line_xdyd::yd#1 line::yd#3 ]
|
zp ZP_BYTE:4 [ line_ydxi::yd#5 line_ydxi::yd#1 line_ydxi::yd#0 line::yd#1 line::yd#10 line_xdyi::yd#2 line_xdyi::yd#0 line_xdyi::yd#1 line_ydxd::yd#5 line_ydxd::yd#1 line_ydxd::yd#0 line::yd#0 line::yd#3 line_xdyd::yd#2 line_xdyd::yd#0 line_xdyd::yd#1 ]
|
||||||
zp ZP_BYTE:5 [ line_ydxi::y1#6 line_ydxi::y1#1 line_ydxi::y1#0 line::y0#0 line_xdyi::y#3 line_xdyi::y#5 line_xdyi::y#0 line_xdyi::y#1 line_xdyi::y#6 line_xdyi::y#2 line_ydxd::y1#6 line_ydxd::y1#1 line_ydxd::y1#0 line_xdyd::y#3 line_xdyd::y#5 line_xdyd::y#0 line_xdyd::y#1 line_xdyd::y#6 line_xdyd::y#2 ]
|
zp ZP_BYTE:5 [ line_ydxi::y1#6 line_ydxi::y1#1 line_ydxi::y1#0 line::y0#0 line_xdyi::y#3 line_xdyi::y#5 line_xdyi::y#0 line_xdyi::y#1 line_xdyi::y#6 line_xdyi::y#2 line_ydxd::y1#6 line_ydxd::y1#1 line_ydxd::y1#0 line_xdyd::y#3 line_xdyd::y#5 line_xdyd::y#0 line_xdyd::y#1 line_xdyd::y#6 line_xdyd::y#2 ]
|
||||||
reg byte x [ line_ydxi::x#3 line_ydxi::x#5 line_ydxi::x#1 line_ydxi::x#0 line_ydxi::x#6 line_ydxi::x#2 ]
|
reg byte x [ line_ydxi::x#3 line_ydxi::x#5 line_ydxi::x#1 line_ydxi::x#0 line_ydxi::x#6 line_ydxi::x#2 ]
|
||||||
zp ZP_BYTE:6 [ line_ydxi::y#3 line_ydxi::y#6 line_ydxi::y#1 line_ydxi::y#0 line_ydxi::y#2 line_xdyi::e#3 line_xdyi::e#0 line_xdyi::e#6 line_xdyi::e#2 line_xdyi::e#1 line_ydxd::y#2 line_ydxd::y#7 line_ydxd::y#1 line_ydxd::y#0 line_ydxd::y#3 line_xdyd::e#3 line_xdyd::e#0 line_xdyd::e#6 line_xdyd::e#2 line_xdyd::e#1 ]
|
zp ZP_BYTE:6 [ line_ydxi::y#3 line_ydxi::y#6 line_ydxi::y#1 line_ydxi::y#0 line_ydxi::y#2 line_xdyi::e#3 line_xdyi::e#0 line_xdyi::e#6 line_xdyi::e#2 line_xdyi::e#1 line_ydxd::y#2 line_ydxd::y#7 line_ydxd::y#1 line_ydxd::y#0 line_ydxd::y#3 line_xdyd::e#3 line_xdyd::e#0 line_xdyd::e#6 line_xdyd::e#2 line_xdyd::e#1 ]
|
||||||
zp ZP_BYTE:7 [ line_ydxi::e#3 line_ydxi::e#0 line_ydxi::e#6 line_ydxi::e#2 line_ydxi::e#1 line_xdyi::x1#6 line_xdyi::x1#0 line_xdyi::x1#1 line::x0#0 line_xdyd::x1#6 line_xdyd::x1#0 line_xdyd::x1#1 line_ydxd::e#3 line_ydxd::e#0 line_ydxd::e#6 line_ydxd::e#2 line_ydxd::e#1 ]
|
zp ZP_BYTE:7 [ line_ydxi::e#3 line_ydxi::e#0 line_ydxi::e#6 line_ydxi::e#2 line_ydxi::e#1 line_xdyi::x1#6 line_xdyi::x1#0 line_xdyi::x1#1 line::x0#0 line_ydxd::e#3 line_ydxd::e#0 line_ydxd::e#6 line_ydxd::e#2 line_ydxd::e#1 line_xdyd::$6 ]
|
||||||
reg byte x [ plot::x#4 plot::x#1 plot::x#0 plot::x#3 plot::x#2 ]
|
reg byte x [ plot::x#4 plot::x#1 plot::x#0 plot::x#3 plot::x#2 ]
|
||||||
reg byte y [ plot::y#4 plot::y#1 plot::y#0 plot::y#3 plot::y#2 ]
|
reg byte y [ plot::y#4 plot::y#1 plot::y#0 plot::y#3 plot::y#2 ]
|
||||||
reg byte x [ line_xdyi::x#3 line_xdyi::x#6 line_xdyi::x#0 line_xdyi::x#1 line_xdyi::x#2 ]
|
reg byte x [ line_xdyi::x#3 line_xdyi::x#6 line_xdyi::x#0 line_xdyi::x#1 line_xdyi::x#2 ]
|
||||||
reg byte x [ line_ydxd::x#3 line_ydxd::x#5 line_ydxd::x#1 line_ydxd::x#0 line_ydxd::x#6 line_ydxd::x#2 ]
|
reg byte x [ line_ydxd::x#3 line_ydxd::x#5 line_ydxd::x#1 line_ydxd::x#0 line_ydxd::x#6 line_ydxd::x#2 ]
|
||||||
|
zp ZP_BYTE:8 [ line_xdyd::x1#6 line_xdyd::x1#0 line_xdyd::x1#1 line::x1#0 line_xdyi::$6 ]
|
||||||
reg byte x [ line_xdyd::x#3 line_xdyd::x#6 line_xdyd::x#0 line_xdyd::x#1 line_xdyd::x#2 ]
|
reg byte x [ line_xdyd::x#3 line_xdyd::x#6 line_xdyd::x#0 line_xdyd::x#1 line_xdyd::x#2 ]
|
||||||
reg byte x [ init_plot_tables::x#2 init_plot_tables::x#1 ]
|
reg byte x [ init_plot_tables::x#2 init_plot_tables::x#1 ]
|
||||||
reg byte y [ init_plot_tables::bits#3 init_plot_tables::bits#4 init_plot_tables::bits#1 ]
|
reg byte y [ init_plot_tables::bits#3 init_plot_tables::bits#4 init_plot_tables::bits#1 ]
|
||||||
reg byte x [ init_plot_tables::y#2 init_plot_tables::y#1 ]
|
reg byte x [ init_plot_tables::y#2 init_plot_tables::y#1 ]
|
||||||
zp ZP_WORD:8 [ init_plot_tables::yoffs#2 init_plot_tables::yoffs#4 init_plot_tables::yoffs#1 init_screen::b#2 init_screen::b#1 init_screen::c#2 init_screen::c#1 plot::plotter_x#0 plot::$0 ]
|
zp ZP_WORD:9 [ init_plot_tables::yoffs#2 init_plot_tables::yoffs#4 init_plot_tables::yoffs#1 init_screen::b#2 init_screen::b#1 init_screen::c#2 init_screen::c#1 plot::plotter_x#0 plot::$0 ]
|
||||||
zp ZP_BYTE:10 [ line::x1#0 line_xdyi::$6 line_xdyd::$6 ]
|
|
||||||
reg byte y [ line::y1#0 ]
|
reg byte y [ line::y1#0 ]
|
||||||
reg byte y [ line_ydxi::$6 ]
|
reg byte y [ line_ydxi::$6 ]
|
||||||
zp ZP_WORD:11 [ plot::plotter_y#0 ]
|
zp ZP_WORD:11 [ plot::plotter_y#0 ]
|
||||||
@ -7132,7 +7132,7 @@ lines: {
|
|||||||
//SEG43 line
|
//SEG43 line
|
||||||
line: {
|
line: {
|
||||||
.label x0 = 7
|
.label x0 = 7
|
||||||
.label x1 = $a
|
.label x1 = 8
|
||||||
.label y0 = 5
|
.label y0 = 5
|
||||||
.label xd = 3
|
.label xd = 3
|
||||||
.label yd = 4
|
.label yd = 4
|
||||||
@ -7222,9 +7222,8 @@ line: {
|
|||||||
ldx x0
|
ldx x0
|
||||||
//SEG84 [46] (byte) line_xdyd::y#0 ← (byte) line::y0#0 [ line::x1#0 line::xd#1 line::yd#0 line_xdyd::x#0 line_xdyd::y#0 ] ( main:2::lines:12::line:21 [ lines::l#2 line::x1#0 line::xd#1 line::yd#0 line_xdyd::x#0 line_xdyd::y#0 ] )
|
//SEG84 [46] (byte) line_xdyd::y#0 ← (byte) line::y0#0 [ line::x1#0 line::xd#1 line::yd#0 line_xdyd::x#0 line_xdyd::y#0 ] ( main:2::lines:12::line:21 [ lines::l#2 line::x1#0 line::xd#1 line::yd#0 line_xdyd::x#0 line_xdyd::y#0 ] )
|
||||||
// (byte) line_xdyd::y#0 = (byte) line::y0#0 // register copy zp ZP_BYTE:5
|
// (byte) line_xdyd::y#0 = (byte) line::y0#0 // register copy zp ZP_BYTE:5
|
||||||
//SEG85 [47] (byte) line_xdyd::x1#0 ← (byte) line::x1#0 [ line::xd#1 line::yd#0 line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 ] ( main:2::lines:12::line:21 [ lines::l#2 line::xd#1 line::yd#0 line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 ] ) -- vbuz1=vbuz2
|
//SEG85 [47] (byte) line_xdyd::x1#0 ← (byte) line::x1#0 [ line::xd#1 line::yd#0 line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 ] ( main:2::lines:12::line:21 [ lines::l#2 line::xd#1 line::yd#0 line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 ] )
|
||||||
lda x1
|
// (byte) line_xdyd::x1#0 = (byte) line::x1#0 // register copy zp ZP_BYTE:8
|
||||||
sta line_xdyd.x1
|
|
||||||
//SEG86 [48] (byte) line_xdyd::xd#0 ← (byte) line::xd#1 [ line::yd#0 line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 line_xdyd::xd#0 ] ( main:2::lines:12::line:21 [ lines::l#2 line::yd#0 line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 line_xdyd::xd#0 ] )
|
//SEG86 [48] (byte) line_xdyd::xd#0 ← (byte) line::xd#1 [ line::yd#0 line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 line_xdyd::xd#0 ] ( main:2::lines:12::line:21 [ lines::l#2 line::yd#0 line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 line_xdyd::xd#0 ] )
|
||||||
// (byte) line_xdyd::xd#0 = (byte) line::xd#1 // register copy zp ZP_BYTE:3
|
// (byte) line_xdyd::xd#0 = (byte) line::xd#1 // register copy zp ZP_BYTE:3
|
||||||
//SEG87 [49] (byte) line_xdyd::yd#0 ← (byte) line::yd#0 [ line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 line_xdyd::xd#0 line_xdyd::yd#0 ] ( main:2::lines:12::line:21 [ lines::l#2 line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 line_xdyd::xd#0 line_xdyd::yd#0 ] )
|
//SEG87 [49] (byte) line_xdyd::yd#0 ← (byte) line::yd#0 [ line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 line_xdyd::xd#0 line_xdyd::yd#0 ] ( main:2::lines:12::line:21 [ lines::l#2 line_xdyd::x#0 line_xdyd::y#0 line_xdyd::x1#0 line_xdyd::xd#0 line_xdyd::yd#0 ] )
|
||||||
@ -7285,8 +7284,9 @@ line: {
|
|||||||
ldx x1
|
ldx x1
|
||||||
//SEG116 [62] (byte) line_xdyd::y#1 ← (byte) line::y1#0 [ line::x0#0 line::xd#0 line::yd#3 line_xdyd::x#1 line_xdyd::y#1 ] ( main:2::lines:12::line:21 [ lines::l#2 line::x0#0 line::xd#0 line::yd#3 line_xdyd::x#1 line_xdyd::y#1 ] ) -- vbuz1=vbuyy
|
//SEG116 [62] (byte) line_xdyd::y#1 ← (byte) line::y1#0 [ line::x0#0 line::xd#0 line::yd#3 line_xdyd::x#1 line_xdyd::y#1 ] ( main:2::lines:12::line:21 [ lines::l#2 line::x0#0 line::xd#0 line::yd#3 line_xdyd::x#1 line_xdyd::y#1 ] ) -- vbuz1=vbuyy
|
||||||
sty line_xdyd.y
|
sty line_xdyd.y
|
||||||
//SEG117 [63] (byte) line_xdyd::x1#1 ← (byte) line::x0#0 [ line::xd#0 line::yd#3 line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 ] ( main:2::lines:12::line:21 [ lines::l#2 line::xd#0 line::yd#3 line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 ] )
|
//SEG117 [63] (byte) line_xdyd::x1#1 ← (byte) line::x0#0 [ line::xd#0 line::yd#3 line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 ] ( main:2::lines:12::line:21 [ lines::l#2 line::xd#0 line::yd#3 line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 ] ) -- vbuz1=vbuz2
|
||||||
// (byte) line_xdyd::x1#1 = (byte) line::x0#0 // register copy zp ZP_BYTE:7
|
lda x0
|
||||||
|
sta line_xdyd.x1
|
||||||
//SEG118 [64] (byte) line_xdyd::xd#1 ← (byte) line::xd#0 [ line::yd#3 line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 line_xdyd::xd#1 ] ( main:2::lines:12::line:21 [ lines::l#2 line::yd#3 line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 line_xdyd::xd#1 ] )
|
//SEG118 [64] (byte) line_xdyd::xd#1 ← (byte) line::xd#0 [ line::yd#3 line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 line_xdyd::xd#1 ] ( main:2::lines:12::line:21 [ lines::l#2 line::yd#3 line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 line_xdyd::xd#1 ] )
|
||||||
// (byte) line_xdyd::xd#1 = (byte) line::xd#0 // register copy zp ZP_BYTE:3
|
// (byte) line_xdyd::xd#1 = (byte) line::xd#0 // register copy zp ZP_BYTE:3
|
||||||
//SEG119 [65] (byte) line_xdyd::yd#1 ← (byte) line::yd#3 [ line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 line_xdyd::xd#1 line_xdyd::yd#1 ] ( main:2::lines:12::line:21 [ lines::l#2 line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 line_xdyd::xd#1 line_xdyd::yd#1 ] )
|
//SEG119 [65] (byte) line_xdyd::yd#1 ← (byte) line::yd#3 [ line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 line_xdyd::xd#1 line_xdyd::yd#1 ] ( main:2::lines:12::line:21 [ lines::l#2 line_xdyd::x#1 line_xdyd::y#1 line_xdyd::x1#1 line_xdyd::xd#1 line_xdyd::yd#1 ] )
|
||||||
@ -7438,8 +7438,8 @@ line_ydxi: {
|
|||||||
}
|
}
|
||||||
//SEG197 plot
|
//SEG197 plot
|
||||||
plot: {
|
plot: {
|
||||||
.label _0 = 8
|
.label _0 = 9
|
||||||
.label plotter_x = 8
|
.label plotter_x = 9
|
||||||
.label plotter_y = $b
|
.label plotter_y = $b
|
||||||
//SEG198 [103] (word) plot::plotter_x#0 ← *((const byte[256]) plot_xhi#0 + (byte) plot::x#4) w= *((const byte[256]) plot_xlo#0 + (byte) plot::x#4) [ plot::x#4 plot::y#4 plot::plotter_x#0 ] ( main:2::lines:12::line:21::line_ydxi:42::plot:92 [ lines::l#2 line_ydxi::xd#2 line_ydxi::yd#5 line_ydxi::y1#6 line_ydxi::x#3 line_ydxi::y#3 line_ydxi::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_ydxi:86::plot:92 [ lines::l#2 line_ydxi::xd#2 line_ydxi::yd#5 line_ydxi::y1#6 line_ydxi::x#3 line_ydxi::y#3 line_ydxi::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_xdyi:35::plot:114 [ lines::l#2 line_xdyi::yd#2 line_xdyi::xd#5 line_xdyi::x1#6 line_xdyi::x#3 line_xdyi::y#3 line_xdyi::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_xdyi:80::plot:114 [ lines::l#2 line_xdyi::yd#2 line_xdyi::xd#5 line_xdyi::x1#6 line_xdyi::x#3 line_xdyi::y#3 line_xdyi::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_ydxd:56::plot:129 [ lines::l#2 line_ydxd::xd#2 line_ydxd::yd#5 line_ydxd::y1#6 line_ydxd::x#3 line_ydxd::y#2 line_ydxd::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_ydxd:72::plot:129 [ lines::l#2 line_ydxd::xd#2 line_ydxd::yd#5 line_ydxd::y1#6 line_ydxd::x#3 line_ydxd::y#2 line_ydxd::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_xdyd:50::plot:144 [ lines::l#2 line_xdyd::yd#2 line_xdyd::xd#5 line_xdyd::x1#6 line_xdyd::x#3 line_xdyd::y#3 line_xdyd::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_xdyd:66::plot:144 [ lines::l#2 line_xdyd::yd#2 line_xdyd::xd#5 line_xdyd::x1#6 line_xdyd::x#3 line_xdyd::y#3 line_xdyd::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] ) -- vwuz1=pbuc1_derefidx_vbuxx_word_pbuc2_derefidx_vbuxx
|
//SEG198 [103] (word) plot::plotter_x#0 ← *((const byte[256]) plot_xhi#0 + (byte) plot::x#4) w= *((const byte[256]) plot_xlo#0 + (byte) plot::x#4) [ plot::x#4 plot::y#4 plot::plotter_x#0 ] ( main:2::lines:12::line:21::line_ydxi:42::plot:92 [ lines::l#2 line_ydxi::xd#2 line_ydxi::yd#5 line_ydxi::y1#6 line_ydxi::x#3 line_ydxi::y#3 line_ydxi::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_ydxi:86::plot:92 [ lines::l#2 line_ydxi::xd#2 line_ydxi::yd#5 line_ydxi::y1#6 line_ydxi::x#3 line_ydxi::y#3 line_ydxi::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_xdyi:35::plot:114 [ lines::l#2 line_xdyi::yd#2 line_xdyi::xd#5 line_xdyi::x1#6 line_xdyi::x#3 line_xdyi::y#3 line_xdyi::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_xdyi:80::plot:114 [ lines::l#2 line_xdyi::yd#2 line_xdyi::xd#5 line_xdyi::x1#6 line_xdyi::x#3 line_xdyi::y#3 line_xdyi::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_ydxd:56::plot:129 [ lines::l#2 line_ydxd::xd#2 line_ydxd::yd#5 line_ydxd::y1#6 line_ydxd::x#3 line_ydxd::y#2 line_ydxd::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_ydxd:72::plot:129 [ lines::l#2 line_ydxd::xd#2 line_ydxd::yd#5 line_ydxd::y1#6 line_ydxd::x#3 line_ydxd::y#2 line_ydxd::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_xdyd:50::plot:144 [ lines::l#2 line_xdyd::yd#2 line_xdyd::xd#5 line_xdyd::x1#6 line_xdyd::x#3 line_xdyd::y#3 line_xdyd::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] main:2::lines:12::line:21::line_xdyd:66::plot:144 [ lines::l#2 line_xdyd::yd#2 line_xdyd::xd#5 line_xdyd::x1#6 line_xdyd::x#3 line_xdyd::y#3 line_xdyd::e#3 plot::x#4 plot::y#4 plot::plotter_x#0 ] ) -- vwuz1=pbuc1_derefidx_vbuxx_word_pbuc2_derefidx_vbuxx
|
||||||
lda plot_xhi,x
|
lda plot_xhi,x
|
||||||
@ -7471,7 +7471,7 @@ plot: {
|
|||||||
}
|
}
|
||||||
//SEG205 line_xdyi
|
//SEG205 line_xdyi
|
||||||
line_xdyi: {
|
line_xdyi: {
|
||||||
.label _6 = $a
|
.label _6 = 8
|
||||||
.label y = 5
|
.label y = 5
|
||||||
.label x1 = 7
|
.label x1 = 7
|
||||||
.label xd = 3
|
.label xd = 3
|
||||||
@ -7595,9 +7595,9 @@ line_ydxd: {
|
|||||||
}
|
}
|
||||||
//SEG261 line_xdyd
|
//SEG261 line_xdyd
|
||||||
line_xdyd: {
|
line_xdyd: {
|
||||||
.label _6 = $a
|
.label _6 = 7
|
||||||
.label y = 5
|
.label y = 5
|
||||||
.label x1 = 7
|
.label x1 = 8
|
||||||
.label xd = 3
|
.label xd = 3
|
||||||
.label yd = 4
|
.label yd = 4
|
||||||
.label e = 6
|
.label e = 6
|
||||||
@ -7659,7 +7659,7 @@ line_xdyd: {
|
|||||||
//SEG289 init_plot_tables
|
//SEG289 init_plot_tables
|
||||||
init_plot_tables: {
|
init_plot_tables: {
|
||||||
.label _6 = 2
|
.label _6 = 2
|
||||||
.label yoffs = 8
|
.label yoffs = 9
|
||||||
//SEG290 [155] phi from init_plot_tables to init_plot_tables::@1 [phi:init_plot_tables->init_plot_tables::@1]
|
//SEG290 [155] phi from init_plot_tables to init_plot_tables::@1 [phi:init_plot_tables->init_plot_tables::@1]
|
||||||
//SEG291 [155] phi (byte) init_plot_tables::bits#3 = (byte/word/signed word/dword/signed dword) 128 [phi:init_plot_tables->init_plot_tables::@1#0] -- vbuyy=vbuc1
|
//SEG291 [155] phi (byte) init_plot_tables::bits#3 = (byte/word/signed word/dword/signed dword) 128 [phi:init_plot_tables->init_plot_tables::@1#0] -- vbuyy=vbuc1
|
||||||
ldy #$80
|
ldy #$80
|
||||||
@ -7758,8 +7758,8 @@ init_plot_tables: {
|
|||||||
}
|
}
|
||||||
//SEG336 init_screen
|
//SEG336 init_screen
|
||||||
init_screen: {
|
init_screen: {
|
||||||
.label b = 8
|
.label b = 9
|
||||||
.label c = 8
|
.label c = 9
|
||||||
//SEG337 [181] phi from init_screen to init_screen::@1 [phi:init_screen->init_screen::@1]
|
//SEG337 [181] phi from init_screen to init_screen::@1 [phi:init_screen->init_screen::@1]
|
||||||
//SEG338 [181] phi (byte*) init_screen::b#2 = (const byte*) BITMAP#0 [phi:init_screen->init_screen::@1#0] -- pbuz1=pbuc1
|
//SEG338 [181] phi (byte*) init_screen::b#2 = (const byte*) BITMAP#0 [phi:init_screen->init_screen::@1#0] -- pbuz1=pbuc1
|
||||||
lda #<BITMAP
|
lda #<BITMAP
|
||||||
|
@ -44,19 +44,19 @@
|
|||||||
(byte) init_plot_tables::y#1 reg byte x 16.5
|
(byte) init_plot_tables::y#1 reg byte x 16.5
|
||||||
(byte) init_plot_tables::y#2 reg byte x 6.0
|
(byte) init_plot_tables::y#2 reg byte x 6.0
|
||||||
(byte*) init_plot_tables::yoffs
|
(byte*) init_plot_tables::yoffs
|
||||||
(byte*) init_plot_tables::yoffs#1 yoffs zp ZP_WORD:8 22.0
|
(byte*) init_plot_tables::yoffs#1 yoffs zp ZP_WORD:9 22.0
|
||||||
(byte*) init_plot_tables::yoffs#2 yoffs zp ZP_WORD:8 6.111111111111112
|
(byte*) init_plot_tables::yoffs#2 yoffs zp ZP_WORD:9 6.111111111111112
|
||||||
(byte*) init_plot_tables::yoffs#4 yoffs zp ZP_WORD:8 11.0
|
(byte*) init_plot_tables::yoffs#4 yoffs zp ZP_WORD:9 11.0
|
||||||
(void()) init_screen()
|
(void()) init_screen()
|
||||||
(label) init_screen::@1
|
(label) init_screen::@1
|
||||||
(label) init_screen::@2
|
(label) init_screen::@2
|
||||||
(label) init_screen::@return
|
(label) init_screen::@return
|
||||||
(byte*) init_screen::b
|
(byte*) init_screen::b
|
||||||
(byte*) init_screen::b#1 b zp ZP_WORD:8 16.5
|
(byte*) init_screen::b#1 b zp ZP_WORD:9 16.5
|
||||||
(byte*) init_screen::b#2 b zp ZP_WORD:8 16.5
|
(byte*) init_screen::b#2 b zp ZP_WORD:9 16.5
|
||||||
(byte*) init_screen::c
|
(byte*) init_screen::c
|
||||||
(byte*) init_screen::c#1 c zp ZP_WORD:8 16.5
|
(byte*) init_screen::c#1 c zp ZP_WORD:9 16.5
|
||||||
(byte*) init_screen::c#2 c zp ZP_WORD:8 16.5
|
(byte*) init_screen::c#2 c zp ZP_WORD:9 16.5
|
||||||
(void()) line((byte) line::x0 , (byte) line::x1 , (byte) line::y0 , (byte) line::y1)
|
(void()) line((byte) line::x0 , (byte) line::x1 , (byte) line::y0 , (byte) line::y1)
|
||||||
(label) line::@1
|
(label) line::@1
|
||||||
(label) line::@10
|
(label) line::@10
|
||||||
@ -76,7 +76,7 @@
|
|||||||
(byte) line::x0
|
(byte) line::x0
|
||||||
(byte) line::x0#0 x0 zp ZP_BYTE:7 5.173913043478264
|
(byte) line::x0#0 x0 zp ZP_BYTE:7 5.173913043478264
|
||||||
(byte) line::x1
|
(byte) line::x1
|
||||||
(byte) line::x1#0 x1 zp ZP_BYTE:10 5.409090909090908
|
(byte) line::x1#0 x1 zp ZP_BYTE:8 5.409090909090908
|
||||||
(byte) line::xd
|
(byte) line::xd
|
||||||
(byte) line::xd#0 xd zp ZP_BYTE:3 0.7
|
(byte) line::xd#0 xd zp ZP_BYTE:3 0.7
|
||||||
(byte) line::xd#1 xd zp ZP_BYTE:3 0.7
|
(byte) line::xd#1 xd zp ZP_BYTE:3 0.7
|
||||||
@ -90,7 +90,7 @@
|
|||||||
(byte) line::yd#10 yd zp ZP_BYTE:4 0.8888888888888888
|
(byte) line::yd#10 yd zp ZP_BYTE:4 0.8888888888888888
|
||||||
(byte) line::yd#3 yd zp ZP_BYTE:4 0.8888888888888888
|
(byte) line::yd#3 yd zp ZP_BYTE:4 0.8888888888888888
|
||||||
(void()) line_xdyd((byte) line_xdyd::x , (byte) line_xdyd::y , (byte) line_xdyd::x1 , (byte) line_xdyd::xd , (byte) line_xdyd::yd)
|
(void()) line_xdyd((byte) line_xdyd::x , (byte) line_xdyd::y , (byte) line_xdyd::x1 , (byte) line_xdyd::xd , (byte) line_xdyd::yd)
|
||||||
(byte/word~) line_xdyd::$6 $6 zp ZP_BYTE:10 2002.0
|
(byte/word~) line_xdyd::$6 $6 zp ZP_BYTE:7 2002.0
|
||||||
(label) line_xdyd::@1
|
(label) line_xdyd::@1
|
||||||
(label) line_xdyd::@2
|
(label) line_xdyd::@2
|
||||||
(label) line_xdyd::@3
|
(label) line_xdyd::@3
|
||||||
@ -109,9 +109,9 @@
|
|||||||
(byte) line_xdyd::x#3 reg byte x 751.25
|
(byte) line_xdyd::x#3 reg byte x 751.25
|
||||||
(byte) line_xdyd::x#6 reg byte x 3.0
|
(byte) line_xdyd::x#6 reg byte x 3.0
|
||||||
(byte) line_xdyd::x1
|
(byte) line_xdyd::x1
|
||||||
(byte) line_xdyd::x1#0 x1 zp ZP_BYTE:7 1.3333333333333333
|
(byte) line_xdyd::x1#0 x1 zp ZP_BYTE:8 1.3333333333333333
|
||||||
(byte) line_xdyd::x1#1 x1 zp ZP_BYTE:7 1.3333333333333333
|
(byte) line_xdyd::x1#1 x1 zp ZP_BYTE:8 1.3333333333333333
|
||||||
(byte) line_xdyd::x1#6 x1 zp ZP_BYTE:7 71.78571428571429
|
(byte) line_xdyd::x1#6 x1 zp ZP_BYTE:8 71.78571428571429
|
||||||
(byte) line_xdyd::xd
|
(byte) line_xdyd::xd
|
||||||
(byte) line_xdyd::xd#0 xd zp ZP_BYTE:3 2.0
|
(byte) line_xdyd::xd#0 xd zp ZP_BYTE:3 2.0
|
||||||
(byte) line_xdyd::xd#1 xd zp ZP_BYTE:3 2.0
|
(byte) line_xdyd::xd#1 xd zp ZP_BYTE:3 2.0
|
||||||
@ -128,7 +128,7 @@
|
|||||||
(byte) line_xdyd::yd#1 yd zp ZP_BYTE:4 4.0
|
(byte) line_xdyd::yd#1 yd zp ZP_BYTE:4 4.0
|
||||||
(byte) line_xdyd::yd#2 yd zp ZP_BYTE:4 71.92857142857143
|
(byte) line_xdyd::yd#2 yd zp ZP_BYTE:4 71.92857142857143
|
||||||
(void()) line_xdyi((byte) line_xdyi::x , (byte) line_xdyi::y , (byte) line_xdyi::x1 , (byte) line_xdyi::xd , (byte) line_xdyi::yd)
|
(void()) line_xdyi((byte) line_xdyi::x , (byte) line_xdyi::y , (byte) line_xdyi::x1 , (byte) line_xdyi::xd , (byte) line_xdyi::yd)
|
||||||
(byte/word~) line_xdyi::$6 $6 zp ZP_BYTE:10 2002.0
|
(byte/word~) line_xdyi::$6 $6 zp ZP_BYTE:8 2002.0
|
||||||
(label) line_xdyi::@1
|
(label) line_xdyi::@1
|
||||||
(label) line_xdyi::@2
|
(label) line_xdyi::@2
|
||||||
(label) line_xdyi::@3
|
(label) line_xdyi::@3
|
||||||
@ -260,12 +260,12 @@
|
|||||||
(label) main::@5
|
(label) main::@5
|
||||||
(label) main::@return
|
(label) main::@return
|
||||||
(void()) plot((byte) plot::x , (byte) plot::y)
|
(void()) plot((byte) plot::x , (byte) plot::y)
|
||||||
(word~) plot::$0 $0 zp ZP_WORD:8 1.0
|
(word~) plot::$0 $0 zp ZP_WORD:9 1.0
|
||||||
(byte~) plot::$1 reg byte a 4.0
|
(byte~) plot::$1 reg byte a 4.0
|
||||||
(label) plot::@return
|
(label) plot::@return
|
||||||
(byte*) plot::plotter
|
(byte*) plot::plotter
|
||||||
(word) plot::plotter_x
|
(word) plot::plotter_x
|
||||||
(word) plot::plotter_x#0 plotter_x zp ZP_WORD:8 2.0
|
(word) plot::plotter_x#0 plotter_x zp ZP_WORD:9 2.0
|
||||||
(word) plot::plotter_y
|
(word) plot::plotter_y
|
||||||
(word) plot::plotter_y#0 plotter_y zp ZP_WORD:11 4.0
|
(word) plot::plotter_y#0 plotter_y zp ZP_WORD:11 4.0
|
||||||
(byte) plot::x
|
(byte) plot::x
|
||||||
@ -292,22 +292,22 @@
|
|||||||
(const byte[256]) plot_ylo#0 plot_ylo = { fill( 256, 0) }
|
(const byte[256]) plot_ylo#0 plot_ylo = { fill( 256, 0) }
|
||||||
|
|
||||||
zp ZP_BYTE:2 [ lines::l#2 lines::l#1 init_plot_tables::$6 ]
|
zp ZP_BYTE:2 [ lines::l#2 lines::l#1 init_plot_tables::$6 ]
|
||||||
zp ZP_BYTE:3 [ line_ydxi::xd#2 line_ydxi::xd#1 line_ydxi::xd#0 line::xd#1 line_xdyi::xd#5 line_xdyi::xd#0 line_xdyi::xd#1 line::xd#0 line_ydxd::xd#2 line_ydxd::xd#1 line_ydxd::xd#0 line_xdyd::xd#5 line_xdyd::xd#0 line_xdyd::xd#1 ]
|
zp ZP_BYTE:3 [ line_ydxi::xd#2 line_ydxi::xd#1 line_ydxi::xd#0 line::xd#1 line::xd#0 line_xdyi::xd#5 line_xdyi::xd#0 line_xdyi::xd#1 line_ydxd::xd#2 line_ydxd::xd#1 line_ydxd::xd#0 line_xdyd::xd#5 line_xdyd::xd#0 line_xdyd::xd#1 ]
|
||||||
zp ZP_BYTE:4 [ line_ydxi::yd#5 line_ydxi::yd#1 line_ydxi::yd#0 line::yd#1 line_xdyi::yd#2 line_xdyi::yd#0 line_xdyi::yd#1 line::yd#10 line_ydxd::yd#5 line_ydxd::yd#1 line_ydxd::yd#0 line::yd#0 line_xdyd::yd#2 line_xdyd::yd#0 line_xdyd::yd#1 line::yd#3 ]
|
zp ZP_BYTE:4 [ line_ydxi::yd#5 line_ydxi::yd#1 line_ydxi::yd#0 line::yd#1 line::yd#10 line_xdyi::yd#2 line_xdyi::yd#0 line_xdyi::yd#1 line_ydxd::yd#5 line_ydxd::yd#1 line_ydxd::yd#0 line::yd#0 line::yd#3 line_xdyd::yd#2 line_xdyd::yd#0 line_xdyd::yd#1 ]
|
||||||
zp ZP_BYTE:5 [ line_ydxi::y1#6 line_ydxi::y1#1 line_ydxi::y1#0 line::y0#0 line_xdyi::y#3 line_xdyi::y#5 line_xdyi::y#0 line_xdyi::y#1 line_xdyi::y#6 line_xdyi::y#2 line_ydxd::y1#6 line_ydxd::y1#1 line_ydxd::y1#0 line_xdyd::y#3 line_xdyd::y#5 line_xdyd::y#0 line_xdyd::y#1 line_xdyd::y#6 line_xdyd::y#2 ]
|
zp ZP_BYTE:5 [ line_ydxi::y1#6 line_ydxi::y1#1 line_ydxi::y1#0 line::y0#0 line_xdyi::y#3 line_xdyi::y#5 line_xdyi::y#0 line_xdyi::y#1 line_xdyi::y#6 line_xdyi::y#2 line_ydxd::y1#6 line_ydxd::y1#1 line_ydxd::y1#0 line_xdyd::y#3 line_xdyd::y#5 line_xdyd::y#0 line_xdyd::y#1 line_xdyd::y#6 line_xdyd::y#2 ]
|
||||||
reg byte x [ line_ydxi::x#3 line_ydxi::x#5 line_ydxi::x#1 line_ydxi::x#0 line_ydxi::x#6 line_ydxi::x#2 ]
|
reg byte x [ line_ydxi::x#3 line_ydxi::x#5 line_ydxi::x#1 line_ydxi::x#0 line_ydxi::x#6 line_ydxi::x#2 ]
|
||||||
zp ZP_BYTE:6 [ line_ydxi::y#3 line_ydxi::y#6 line_ydxi::y#1 line_ydxi::y#0 line_ydxi::y#2 line_xdyi::e#3 line_xdyi::e#0 line_xdyi::e#6 line_xdyi::e#2 line_xdyi::e#1 line_ydxd::y#2 line_ydxd::y#7 line_ydxd::y#1 line_ydxd::y#0 line_ydxd::y#3 line_xdyd::e#3 line_xdyd::e#0 line_xdyd::e#6 line_xdyd::e#2 line_xdyd::e#1 ]
|
zp ZP_BYTE:6 [ line_ydxi::y#3 line_ydxi::y#6 line_ydxi::y#1 line_ydxi::y#0 line_ydxi::y#2 line_xdyi::e#3 line_xdyi::e#0 line_xdyi::e#6 line_xdyi::e#2 line_xdyi::e#1 line_ydxd::y#2 line_ydxd::y#7 line_ydxd::y#1 line_ydxd::y#0 line_ydxd::y#3 line_xdyd::e#3 line_xdyd::e#0 line_xdyd::e#6 line_xdyd::e#2 line_xdyd::e#1 ]
|
||||||
zp ZP_BYTE:7 [ line_ydxi::e#3 line_ydxi::e#0 line_ydxi::e#6 line_ydxi::e#2 line_ydxi::e#1 line_xdyi::x1#6 line_xdyi::x1#0 line_xdyi::x1#1 line::x0#0 line_xdyd::x1#6 line_xdyd::x1#0 line_xdyd::x1#1 line_ydxd::e#3 line_ydxd::e#0 line_ydxd::e#6 line_ydxd::e#2 line_ydxd::e#1 ]
|
zp ZP_BYTE:7 [ line_ydxi::e#3 line_ydxi::e#0 line_ydxi::e#6 line_ydxi::e#2 line_ydxi::e#1 line_xdyi::x1#6 line_xdyi::x1#0 line_xdyi::x1#1 line::x0#0 line_ydxd::e#3 line_ydxd::e#0 line_ydxd::e#6 line_ydxd::e#2 line_ydxd::e#1 line_xdyd::$6 ]
|
||||||
reg byte x [ plot::x#4 plot::x#1 plot::x#0 plot::x#3 plot::x#2 ]
|
reg byte x [ plot::x#4 plot::x#1 plot::x#0 plot::x#3 plot::x#2 ]
|
||||||
reg byte y [ plot::y#4 plot::y#1 plot::y#0 plot::y#3 plot::y#2 ]
|
reg byte y [ plot::y#4 plot::y#1 plot::y#0 plot::y#3 plot::y#2 ]
|
||||||
reg byte x [ line_xdyi::x#3 line_xdyi::x#6 line_xdyi::x#0 line_xdyi::x#1 line_xdyi::x#2 ]
|
reg byte x [ line_xdyi::x#3 line_xdyi::x#6 line_xdyi::x#0 line_xdyi::x#1 line_xdyi::x#2 ]
|
||||||
reg byte x [ line_ydxd::x#3 line_ydxd::x#5 line_ydxd::x#1 line_ydxd::x#0 line_ydxd::x#6 line_ydxd::x#2 ]
|
reg byte x [ line_ydxd::x#3 line_ydxd::x#5 line_ydxd::x#1 line_ydxd::x#0 line_ydxd::x#6 line_ydxd::x#2 ]
|
||||||
|
zp ZP_BYTE:8 [ line_xdyd::x1#6 line_xdyd::x1#0 line_xdyd::x1#1 line::x1#0 line_xdyi::$6 ]
|
||||||
reg byte x [ line_xdyd::x#3 line_xdyd::x#6 line_xdyd::x#0 line_xdyd::x#1 line_xdyd::x#2 ]
|
reg byte x [ line_xdyd::x#3 line_xdyd::x#6 line_xdyd::x#0 line_xdyd::x#1 line_xdyd::x#2 ]
|
||||||
reg byte x [ init_plot_tables::x#2 init_plot_tables::x#1 ]
|
reg byte x [ init_plot_tables::x#2 init_plot_tables::x#1 ]
|
||||||
reg byte y [ init_plot_tables::bits#3 init_plot_tables::bits#4 init_plot_tables::bits#1 ]
|
reg byte y [ init_plot_tables::bits#3 init_plot_tables::bits#4 init_plot_tables::bits#1 ]
|
||||||
reg byte x [ init_plot_tables::y#2 init_plot_tables::y#1 ]
|
reg byte x [ init_plot_tables::y#2 init_plot_tables::y#1 ]
|
||||||
zp ZP_WORD:8 [ init_plot_tables::yoffs#2 init_plot_tables::yoffs#4 init_plot_tables::yoffs#1 init_screen::b#2 init_screen::b#1 init_screen::c#2 init_screen::c#1 plot::plotter_x#0 plot::$0 ]
|
zp ZP_WORD:9 [ init_plot_tables::yoffs#2 init_plot_tables::yoffs#4 init_plot_tables::yoffs#1 init_screen::b#2 init_screen::b#1 init_screen::c#2 init_screen::c#1 plot::plotter_x#0 plot::$0 ]
|
||||||
zp ZP_BYTE:10 [ line::x1#0 line_xdyi::$6 line_xdyd::$6 ]
|
|
||||||
reg byte y [ line::y1#0 ]
|
reg byte y [ line::y1#0 ]
|
||||||
reg byte y [ line_ydxi::$6 ]
|
reg byte y [ line_ydxi::$6 ]
|
||||||
zp ZP_WORD:11 [ plot::plotter_y#0 ]
|
zp ZP_WORD:11 [ plot::plotter_y#0 ]
|
||||||
|
@ -2266,9 +2266,9 @@ Attempting to uplift remaining variables inzp ZP_BYTE:30 [ init_plot_tables::$6
|
|||||||
Uplifting [init_plot_tables] best 8251 combination zp ZP_BYTE:30 [ init_plot_tables::$6 ]
|
Uplifting [init_plot_tables] best 8251 combination zp ZP_BYTE:30 [ init_plot_tables::$6 ]
|
||||||
Attempting to uplift remaining variables inzp ZP_BYTE:12 [ plot::x#0 ]
|
Attempting to uplift remaining variables inzp ZP_BYTE:12 [ plot::x#0 ]
|
||||||
Uplifting [plot] best 8251 combination zp ZP_BYTE:12 [ plot::x#0 ]
|
Uplifting [plot] best 8251 combination zp ZP_BYTE:12 [ plot::x#0 ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:15 [ plot::plotter_x#1 ] ] with [ zp ZP_WORD:18 [ plot::plotter_x#2 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:15 [ plot::plotter_x#1 ] ] with [ zp ZP_WORD:18 [ plot::plotter_x#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:15 [ plot::plotter_x#1 plot::plotter_x#2 ] ] with [ zp ZP_WORD:26 [ plot::plotter#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:21 [ plot::plotter_y#1 ] ] with [ zp ZP_WORD:24 [ plot::plotter_y#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:21 [ plot::plotter_y#1 ] ] with [ zp ZP_WORD:24 [ plot::plotter_y#2 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:15 [ plot::plotter_x#1 plot::plotter_x#2 ] ] with [ zp ZP_WORD:26 [ plot::plotter#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:6 [ init_plot_tables::yoffs#2 init_plot_tables::yoffs#4 init_plot_tables::yoffs#1 ] ] with [ zp ZP_WORD:8 [ init_screen::b#2 init_screen::b#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:6 [ init_plot_tables::yoffs#2 init_plot_tables::yoffs#4 init_plot_tables::yoffs#1 ] ] with [ zp ZP_WORD:8 [ init_screen::b#2 init_screen::b#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:6 [ init_plot_tables::yoffs#2 init_plot_tables::yoffs#4 init_plot_tables::yoffs#1 init_screen::b#2 init_screen::b#1 ] ] with [ zp ZP_WORD:10 [ init_screen::c#2 init_screen::c#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:6 [ init_plot_tables::yoffs#2 init_plot_tables::yoffs#4 init_plot_tables::yoffs#1 init_screen::b#2 init_screen::b#1 ] ] with [ zp ZP_WORD:10 [ init_screen::c#2 init_screen::c#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:6 [ init_plot_tables::yoffs#2 init_plot_tables::yoffs#4 init_plot_tables::yoffs#1 init_screen::b#2 init_screen::b#1 init_screen::c#2 init_screen::c#1 ] ] with [ zp ZP_WORD:15 [ plot::plotter_x#1 plot::plotter_x#2 plot::plotter#0 ] ]
|
Coalescing zero page register [ zp ZP_WORD:6 [ init_plot_tables::yoffs#2 init_plot_tables::yoffs#4 init_plot_tables::yoffs#1 init_screen::b#2 init_screen::b#1 init_screen::c#2 init_screen::c#1 ] ] with [ zp ZP_WORD:15 [ plot::plotter_x#1 plot::plotter_x#2 plot::plotter#0 ] ]
|
||||||
|
@ -3130,8 +3130,8 @@ Attempting to uplift remaining variables inzp ZP_BYTE:15 [ assert_byte::c#3 ]
|
|||||||
Uplifting [assert_byte] best 2175 combination zp ZP_BYTE:15 [ assert_byte::c#3 ]
|
Uplifting [assert_byte] best 2175 combination zp ZP_BYTE:15 [ assert_byte::c#3 ]
|
||||||
Attempting to uplift remaining variables inzp ZP_BYTE:5 [ assert_sbyte::c#5 ]
|
Attempting to uplift remaining variables inzp ZP_BYTE:5 [ assert_sbyte::c#5 ]
|
||||||
Uplifting [assert_sbyte] best 2175 combination zp ZP_BYTE:5 [ assert_sbyte::c#5 ]
|
Uplifting [assert_sbyte] best 2175 combination zp ZP_BYTE:5 [ assert_sbyte::c#5 ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:2 [ assert_sbyte::msg#5 ] ] with [ zp ZP_WORD:8 [ print_str::str#10 print_str::str#11 print_str::str#1 print_str::str#5 print_str::str#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:2 [ assert_sbyte::msg#5 ] ] with [ zp ZP_WORD:8 [ print_str::str#10 print_str::str#11 print_str::str#1 print_str::str#5 print_str::str#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:2 [ assert_sbyte::msg#5 print_str::str#10 print_str::str#11 print_str::str#1 print_str::str#5 print_str::str#0 ] ] with [ zp ZP_WORD:12 [ assert_byte::msg#3 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:2 [ assert_sbyte::msg#5 print_str::str#10 print_str::str#11 print_str::str#1 print_str::str#5 print_str::str#0 ] ] with [ zp ZP_WORD:12 [ assert_byte::msg#3 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:2 [ assert_sbyte::msg#5 print_str::str#10 print_str::str#11 print_str::str#1 print_str::str#5 print_str::str#0 assert_byte::msg#3 ] ] with [ zp ZP_WORD:16 [ print_cls::sc#2 print_cls::sc#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:2 [ assert_sbyte::msg#5 print_str::str#10 print_str::str#11 print_str::str#1 print_str::str#5 print_str::str#0 assert_byte::msg#3 ] ] with [ zp ZP_WORD:16 [ print_cls::sc#2 print_cls::sc#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_BYTE:5 [ assert_sbyte::c#5 ] ] with [ zp ZP_BYTE:15 [ assert_byte::c#3 ] ]
|
Coalescing zero page register [ zp ZP_BYTE:5 [ assert_sbyte::c#5 ] ] with [ zp ZP_BYTE:15 [ assert_byte::c#3 ] ]
|
||||||
Allocated (was zp ZP_BYTE:5) zp ZP_BYTE:4 [ assert_sbyte::c#5 assert_byte::c#3 ]
|
Allocated (was zp ZP_BYTE:5) zp ZP_BYTE:4 [ assert_sbyte::c#5 assert_byte::c#3 ]
|
||||||
|
@ -5151,11 +5151,11 @@ Uplifting [print_char] best 15832 combination reg byte a [ print_char::ch#2 prin
|
|||||||
Uplifting [print_ln] best 15832 combination
|
Uplifting [print_ln] best 15832 combination
|
||||||
Attempting to uplift remaining variables inzp ZP_BYTE:2 [ main::i#10 main::i#1 ]
|
Attempting to uplift remaining variables inzp ZP_BYTE:2 [ main::i#10 main::i#1 ]
|
||||||
Uplifting [main] best 15832 combination zp ZP_BYTE:2 [ main::i#10 main::i#1 ]
|
Uplifting [main] best 15832 combination zp ZP_BYTE:2 [ main::i#10 main::i#1 ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:15 [ lin16u_gen::max#3 ] ] with [ zp ZP_WORD:31 [ divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 rem16u#22 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:15 [ lin16u_gen::max#3 ] ] with [ zp ZP_WORD:31 [ divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 rem16u#22 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:15 [ lin16u_gen::max#3 divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 rem16u#22 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 ] ] with [ zp ZP_WORD:40 [ lin16u_gen::ampl#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:15 [ lin16u_gen::max#3 divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 rem16u#22 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 ] ] with [ zp ZP_WORD:40 [ lin16u_gen::ampl#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:35 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 ] ] with [ zp ZP_WORD:42 [ divr16u::return#2 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:35 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 ] ] with [ zp ZP_WORD:42 [ divr16u::return#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:35 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 ] ] with [ zp ZP_WORD:46 [ divr16u::return#3 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:35 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 ] ] with [ zp ZP_WORD:46 [ divr16u::return#3 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:35 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 divr16u::return#3 ] ] with [ zp ZP_WORD:48 [ lin16u_gen::stepf#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:35 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 divr16u::return#3 ] ] with [ zp ZP_WORD:48 [ lin16u_gen::stepf#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:3 [ line_cursor#11 line_cursor#21 line_cursor#1 ] ] with [ zp ZP_WORD:13 [ print_cls::sc#2 print_cls::sc#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:3 [ line_cursor#11 line_cursor#21 line_cursor#1 ] ] with [ zp ZP_WORD:13 [ print_cls::sc#2 print_cls::sc#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:3 [ line_cursor#11 line_cursor#21 line_cursor#1 print_cls::sc#2 print_cls::sc#1 ] ] with [ zp ZP_WORD:15 [ lin16u_gen::max#3 divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 rem16u#22 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 lin16u_gen::ampl#0 ] ]
|
Coalescing zero page register [ zp ZP_WORD:3 [ line_cursor#11 line_cursor#21 line_cursor#1 print_cls::sc#2 print_cls::sc#1 ] ] with [ zp ZP_WORD:15 [ lin16u_gen::max#3 divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 rem16u#22 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 lin16u_gen::ampl#0 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:5 [ print_word::w#10 print_word::w#3 print_word::w#4 print_word::w#5 ] ] with [ zp ZP_WORD:11 [ print_str::str#10 print_str::str#12 print_str::str#0 ] ]
|
Coalescing zero page register [ zp ZP_WORD:5 [ print_word::w#10 print_word::w#3 print_word::w#4 print_word::w#5 ] ] with [ zp ZP_WORD:11 [ print_str::str#10 print_str::str#12 print_str::str#0 ] ]
|
||||||
|
@ -3159,8 +3159,8 @@ Uplifting [main] best 24678 combination
|
|||||||
Uplifting [scroll_soft] best 24678 combination
|
Uplifting [scroll_soft] best 24678 combination
|
||||||
Attempting to uplift remaining variables inzp ZP_BYTE:3 [ current_bit#29 current_bit#12 current_bit#21 current_bit#5 ]
|
Attempting to uplift remaining variables inzp ZP_BYTE:3 [ current_bit#29 current_bit#12 current_bit#21 current_bit#5 ]
|
||||||
Uplifting [] best 24678 combination zp ZP_BYTE:3 [ current_bit#29 current_bit#12 current_bit#21 current_bit#5 ]
|
Uplifting [] best 24678 combination zp ZP_BYTE:3 [ current_bit#29 current_bit#12 current_bit#21 current_bit#5 ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:4 [ current_chargen#27 current_chargen#11 current_chargen#19 current_chargen#5 ] ] with [ zp ZP_WORD:20 [ scroll_bit::$4 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:4 [ current_chargen#27 current_chargen#11 current_chargen#19 current_chargen#5 ] ] with [ zp ZP_WORD:20 [ scroll_bit::$4 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:4 [ current_chargen#27 current_chargen#11 current_chargen#19 current_chargen#5 scroll_bit::$4 ] ] with [ zp ZP_WORD:18 [ scroll_bit::c#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:4 [ current_chargen#27 current_chargen#11 current_chargen#19 current_chargen#5 scroll_bit::$4 ] ] with [ zp ZP_WORD:18 [ scroll_bit::c#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:4 [ current_chargen#27 current_chargen#11 current_chargen#19 current_chargen#5 scroll_bit::$4 scroll_bit::c#0 ] ] with [ zp ZP_WORD:14 [ fillscreen::cursor#2 fillscreen::cursor#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:4 [ current_chargen#27 current_chargen#11 current_chargen#19 current_chargen#5 scroll_bit::$4 scroll_bit::c#0 ] ] with [ zp ZP_WORD:14 [ fillscreen::cursor#2 fillscreen::cursor#1 ] ]
|
||||||
Allocated (was zp ZP_BYTE:3) zp ZP_BYTE:2 [ current_bit#29 current_bit#12 current_bit#21 current_bit#5 ]
|
Allocated (was zp ZP_BYTE:3) zp ZP_BYTE:2 [ current_bit#29 current_bit#12 current_bit#21 current_bit#5 ]
|
||||||
Allocated (was zp ZP_WORD:4) zp ZP_WORD:3 [ current_chargen#27 current_chargen#11 current_chargen#19 current_chargen#5 scroll_bit::$4 scroll_bit::c#0 fillscreen::cursor#2 fillscreen::cursor#1 ]
|
Allocated (was zp ZP_WORD:4) zp ZP_WORD:3 [ current_chargen#27 current_chargen#11 current_chargen#19 current_chargen#5 scroll_bit::$4 scroll_bit::c#0 fillscreen::cursor#2 fillscreen::cursor#1 ]
|
||||||
|
@ -2005,8 +2005,8 @@ Uplifting [init] best 8154 combination zp ZP_WORD:12 [ init::sc#2 init::sc#1 ] r
|
|||||||
Uplifting [] best 8154 combination zp ZP_WORD:6 [ yvel#9 yvel#12 yvel#10 yvel#22 ] zp ZP_WORD:4 [ yvel_init#13 yvel_init#11 yvel#4 yvel_init#3 ] zp ZP_WORD:8 [ xpos#9 xpos#12 xpos#10 ] zp ZP_WORD:10 [ ypos#10 ypos#13 ypos#11 ] zp ZP_WORD:2 [ xvel#12 xvel#10 xvel#14 ]
|
Uplifting [] best 8154 combination zp ZP_WORD:6 [ yvel#9 yvel#12 yvel#10 yvel#22 ] zp ZP_WORD:4 [ yvel_init#13 yvel_init#11 yvel#4 yvel_init#3 ] zp ZP_WORD:8 [ xpos#9 xpos#12 xpos#10 ] zp ZP_WORD:10 [ ypos#10 ypos#13 ypos#11 ] zp ZP_WORD:2 [ xvel#12 xvel#10 xvel#14 ]
|
||||||
Uplifting [anim] best 8136 combination zp ZP_WORD:15 [ anim::$10 ] zp ZP_WORD:19 [ anim::$12 ] reg byte a [ anim::$14 ] reg byte a [ anim::$15 ] reg byte a [ anim::$16 ] zp ZP_WORD:21 [ anim::sprite_y#0 ] zp ZP_WORD:17 [ anim::sprite_x#0 ]
|
Uplifting [anim] best 8136 combination zp ZP_WORD:15 [ anim::$10 ] zp ZP_WORD:19 [ anim::$12 ] reg byte a [ anim::$14 ] reg byte a [ anim::$15 ] reg byte a [ anim::$16 ] zp ZP_WORD:21 [ anim::sprite_y#0 ] zp ZP_WORD:17 [ anim::sprite_x#0 ]
|
||||||
Uplifting [main] best 8136 combination
|
Uplifting [main] best 8136 combination
|
||||||
Coalescing zero page register [ zp ZP_WORD:15 [ anim::$10 ] ] with [ zp ZP_WORD:17 [ anim::sprite_x#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:15 [ anim::$10 ] ] with [ zp ZP_WORD:17 [ anim::sprite_x#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:19 [ anim::$12 ] ] with [ zp ZP_WORD:21 [ anim::sprite_y#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:19 [ anim::$12 ] ] with [ zp ZP_WORD:21 [ anim::sprite_y#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:2 [ xvel#12 xvel#10 xvel#14 ] ] with [ zp ZP_WORD:12 [ init::sc#2 init::sc#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:2 [ xvel#12 xvel#10 xvel#14 ] ] with [ zp ZP_WORD:12 [ init::sc#2 init::sc#1 ] ]
|
||||||
Allocated (was zp ZP_WORD:15) zp ZP_WORD:12 [ anim::$10 anim::sprite_x#0 ]
|
Allocated (was zp ZP_WORD:15) zp ZP_WORD:12 [ anim::$10 anim::sprite_x#0 ]
|
||||||
Allocated (was zp ZP_WORD:19) zp ZP_WORD:14 [ anim::$12 anim::sprite_y#0 ]
|
Allocated (was zp ZP_WORD:19) zp ZP_WORD:14 [ anim::$12 anim::sprite_y#0 ]
|
||||||
|
@ -3368,11 +3368,11 @@ Uplifting [sinFAC] best 6281 combination
|
|||||||
Uplifting [divFACby10] best 6281 combination
|
Uplifting [divFACby10] best 6281 combination
|
||||||
Attempting to uplift remaining variables inzp ZP_BYTE:2 [ main::i#10 main::i#1 ]
|
Attempting to uplift remaining variables inzp ZP_BYTE:2 [ main::i#10 main::i#1 ]
|
||||||
Uplifting [main] best 6281 combination zp ZP_BYTE:2 [ main::i#10 main::i#1 ]
|
Uplifting [main] best 6281 combination zp ZP_BYTE:2 [ main::i#10 main::i#1 ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:9 [ prepareMEM::mem#5 prepareMEM::mem#4 prepareMEM::mem#7 prepareMEM::mem#1 ] ] with [ zp ZP_WORD:11 [ mulFACbyMEM::mem#2 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:9 [ prepareMEM::mem#5 prepareMEM::mem#4 prepareMEM::mem#7 prepareMEM::mem#1 ] ] with [ zp ZP_WORD:11 [ mulFACbyMEM::mem#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:9 [ prepareMEM::mem#5 prepareMEM::mem#4 prepareMEM::mem#7 prepareMEM::mem#1 mulFACbyMEM::mem#2 ] ] with [ zp ZP_WORD:13 [ setFAC::w#3 setFAC::w#1 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:9 [ prepareMEM::mem#5 prepareMEM::mem#4 prepareMEM::mem#7 prepareMEM::mem#1 mulFACbyMEM::mem#2 ] ] with [ zp ZP_WORD:13 [ setFAC::w#3 setFAC::w#1 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:9 [ prepareMEM::mem#5 prepareMEM::mem#4 prepareMEM::mem#7 prepareMEM::mem#1 mulFACbyMEM::mem#2 setFAC::w#3 setFAC::w#1 ] ] with [ zp ZP_WORD:15 [ setMEMtoFAC::mem#2 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:9 [ prepareMEM::mem#5 prepareMEM::mem#4 prepareMEM::mem#7 prepareMEM::mem#1 mulFACbyMEM::mem#2 setFAC::w#3 setFAC::w#1 ] ] with [ zp ZP_WORD:15 [ setMEMtoFAC::mem#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:17 [ getFAC::return#2 ] ] with [ zp ZP_WORD:19 [ print_word::w#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:17 [ getFAC::return#2 ] ] with [ zp ZP_WORD:19 [ print_word::w#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:17 [ getFAC::return#2 print_word::w#0 ] ] with [ zp ZP_WORD:23 [ getFAC::return#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:17 [ getFAC::return#2 print_word::w#0 ] ] with [ zp ZP_WORD:23 [ getFAC::return#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:9 [ prepareMEM::mem#5 prepareMEM::mem#4 prepareMEM::mem#7 prepareMEM::mem#1 mulFACbyMEM::mem#2 setFAC::w#3 setFAC::w#1 setMEMtoFAC::mem#2 ] ] with [ zp ZP_WORD:17 [ getFAC::return#2 print_word::w#0 getFAC::return#0 ] ]
|
Coalescing zero page register [ zp ZP_WORD:9 [ prepareMEM::mem#5 prepareMEM::mem#4 prepareMEM::mem#7 prepareMEM::mem#1 mulFACbyMEM::mem#2 setFAC::w#3 setFAC::w#1 setMEMtoFAC::mem#2 ] ] with [ zp ZP_WORD:17 [ getFAC::return#2 print_word::w#0 getFAC::return#0 ] ]
|
||||||
Allocated (was zp ZP_WORD:7) zp ZP_WORD:5 [ char_cursor#23 char_cursor#31 char_cursor#32 char_cursor#48 char_cursor#10 ]
|
Allocated (was zp ZP_WORD:7) zp ZP_WORD:5 [ char_cursor#23 char_cursor#31 char_cursor#32 char_cursor#48 char_cursor#10 ]
|
||||||
Allocated (was zp ZP_WORD:9) zp ZP_WORD:7 [ prepareMEM::mem#5 prepareMEM::mem#4 prepareMEM::mem#7 prepareMEM::mem#1 mulFACbyMEM::mem#2 setFAC::w#3 setFAC::w#1 setMEMtoFAC::mem#2 getFAC::return#2 print_word::w#0 getFAC::return#0 ]
|
Allocated (was zp ZP_WORD:9) zp ZP_WORD:7 [ prepareMEM::mem#5 prepareMEM::mem#4 prepareMEM::mem#7 prepareMEM::mem#1 mulFACbyMEM::mem#2 setFAC::w#3 setFAC::w#1 setMEMtoFAC::mem#2 getFAC::return#2 print_word::w#0 getFAC::return#0 ]
|
||||||
|
@ -8076,15 +8076,15 @@ Attempting to uplift remaining variables inzp ZP_BYTE:14 [ gen_sintab::length#10
|
|||||||
Uplifting [gen_sintab] best 1061722 combination zp ZP_BYTE:14 [ gen_sintab::length#10 ]
|
Uplifting [gen_sintab] best 1061722 combination zp ZP_BYTE:14 [ gen_sintab::length#10 ]
|
||||||
Attempting to uplift remaining variables inzp ZP_BYTE:13 [ gen_sintab::min#2 ]
|
Attempting to uplift remaining variables inzp ZP_BYTE:13 [ gen_sintab::min#2 ]
|
||||||
Uplifting [gen_sintab] best 1061722 combination zp ZP_BYTE:13 [ gen_sintab::min#2 ]
|
Uplifting [gen_sintab] best 1061722 combination zp ZP_BYTE:13 [ gen_sintab::min#2 ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:21 [ addMEMtoFAC::mem#2 ] ] with [ zp ZP_WORD:23 [ prepareMEM::mem#5 prepareMEM::mem#2 prepareMEM::mem#3 prepareMEM::mem#4 prepareMEM::mem#9 prepareMEM::mem#1 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:21 [ addMEMtoFAC::mem#2 ] ] with [ zp ZP_WORD:23 [ prepareMEM::mem#5 prepareMEM::mem#2 prepareMEM::mem#3 prepareMEM::mem#4 prepareMEM::mem#9 prepareMEM::mem#1 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:21 [ addMEMtoFAC::mem#2 prepareMEM::mem#5 prepareMEM::mem#2 prepareMEM::mem#3 prepareMEM::mem#4 prepareMEM::mem#9 prepareMEM::mem#1 ] ] with [ zp ZP_WORD:25 [ mulFACbyMEM::mem#2 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:55 [ getFAC::return#2 ] ] with [ zp ZP_WORD:57 [ gen_sintab::$23 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:21 [ addMEMtoFAC::mem#2 prepareMEM::mem#5 prepareMEM::mem#2 prepareMEM::mem#3 prepareMEM::mem#4 prepareMEM::mem#9 prepareMEM::mem#1 mulFACbyMEM::mem#2 ] ] with [ zp ZP_WORD:27 [ divMEMbyFAC::mem#2 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:55 [ getFAC::return#2 gen_sintab::$23 ] ] with [ zp ZP_WORD:60 [ getFAC::return#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:21 [ addMEMtoFAC::mem#2 prepareMEM::mem#5 prepareMEM::mem#2 prepareMEM::mem#3 prepareMEM::mem#4 prepareMEM::mem#9 prepareMEM::mem#1 mulFACbyMEM::mem#2 divMEMbyFAC::mem#2 ] ] with [ zp ZP_WORD:29 [ setFAC::w#5 setFAC::w#0 setFAC::w#3 setFAC::w#4 setFAC::w#1 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:65 [ gen_chargen_sprite::$0 ] ] with [ zp ZP_WORD:67 [ gen_chargen_sprite::$1 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:21 [ addMEMtoFAC::mem#2 prepareMEM::mem#5 prepareMEM::mem#2 prepareMEM::mem#3 prepareMEM::mem#4 prepareMEM::mem#9 prepareMEM::mem#1 mulFACbyMEM::mem#2 divMEMbyFAC::mem#2 setFAC::w#5 setFAC::w#0 setFAC::w#3 setFAC::w#4 setFAC::w#1 ] ] with [ zp ZP_WORD:31 [ setMEMtoFAC::mem#5 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:21 [ addMEMtoFAC::mem#2 prepareMEM::mem#5 prepareMEM::mem#2 prepareMEM::mem#3 prepareMEM::mem#4 prepareMEM::mem#9 prepareMEM::mem#1 ] ] with [ zp ZP_WORD:25 [ mulFACbyMEM::mem#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:55 [ getFAC::return#2 ] ] with [ zp ZP_WORD:57 [ gen_sintab::$23 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:21 [ addMEMtoFAC::mem#2 prepareMEM::mem#5 prepareMEM::mem#2 prepareMEM::mem#3 prepareMEM::mem#4 prepareMEM::mem#9 prepareMEM::mem#1 mulFACbyMEM::mem#2 ] ] with [ zp ZP_WORD:27 [ divMEMbyFAC::mem#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:55 [ getFAC::return#2 gen_sintab::$23 ] ] with [ zp ZP_WORD:60 [ getFAC::return#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:21 [ addMEMtoFAC::mem#2 prepareMEM::mem#5 prepareMEM::mem#2 prepareMEM::mem#3 prepareMEM::mem#4 prepareMEM::mem#9 prepareMEM::mem#1 mulFACbyMEM::mem#2 divMEMbyFAC::mem#2 ] ] with [ zp ZP_WORD:29 [ setFAC::w#5 setFAC::w#0 setFAC::w#3 setFAC::w#4 setFAC::w#1 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:65 [ gen_chargen_sprite::$0 ] ] with [ zp ZP_WORD:67 [ gen_chargen_sprite::$1 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:21 [ addMEMtoFAC::mem#2 prepareMEM::mem#5 prepareMEM::mem#2 prepareMEM::mem#3 prepareMEM::mem#4 prepareMEM::mem#9 prepareMEM::mem#1 mulFACbyMEM::mem#2 divMEMbyFAC::mem#2 setFAC::w#5 setFAC::w#0 setFAC::w#3 setFAC::w#4 setFAC::w#1 ] ] with [ zp ZP_WORD:31 [ setMEMtoFAC::mem#5 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:65 [ gen_chargen_sprite::$0 gen_chargen_sprite::$1 ] ] with [ zp ZP_WORD:69 [ gen_chargen_sprite::chargen#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:65 [ gen_chargen_sprite::$0 gen_chargen_sprite::$1 ] ] with [ zp ZP_WORD:69 [ gen_chargen_sprite::chargen#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:2 [ sin_idx_x#13 sin_idx_x#11 sin_idx_x#3 ] ] with [ zp ZP_BYTE:13 [ gen_sintab::min#2 ] ]
|
Coalescing zero page register [ zp ZP_BYTE:2 [ sin_idx_x#13 sin_idx_x#11 sin_idx_x#3 ] ] with [ zp ZP_BYTE:13 [ gen_sintab::min#2 ] ]
|
||||||
Coalescing zero page register [ zp ZP_BYTE:2 [ sin_idx_x#13 sin_idx_x#11 sin_idx_x#3 gen_sintab::min#2 ] ] with [ zp ZP_BYTE:17 [ gen_sintab::i#10 gen_sintab::i#1 ] ]
|
Coalescing zero page register [ zp ZP_BYTE:2 [ sin_idx_x#13 sin_idx_x#11 sin_idx_x#3 gen_sintab::min#2 ] ] with [ zp ZP_BYTE:17 [ gen_sintab::i#10 gen_sintab::i#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_BYTE:2 [ sin_idx_x#13 sin_idx_x#11 sin_idx_x#3 gen_sintab::min#2 gen_sintab::i#10 gen_sintab::i#1 ] ] with [ zp ZP_BYTE:33 [ gen_sprites::i#2 gen_sprites::i#1 ] ]
|
Coalescing zero page register [ zp ZP_BYTE:2 [ sin_idx_x#13 sin_idx_x#11 sin_idx_x#3 gen_sintab::min#2 gen_sintab::i#10 gen_sintab::i#1 ] ] with [ zp ZP_BYTE:33 [ gen_sprites::i#2 gen_sprites::i#1 ] ]
|
||||||
|
@ -235,7 +235,7 @@ sin16s: {
|
|||||||
.label x1 = $1f
|
.label x1 = $1f
|
||||||
.label x2 = 8
|
.label x2 = 8
|
||||||
.label x3 = 8
|
.label x3 = 8
|
||||||
.label x3_6 = 6
|
.label x3_6 = $13
|
||||||
.label usinx = 6
|
.label usinx = 6
|
||||||
.label x4 = 8
|
.label x4 = 8
|
||||||
.label x5 = 8
|
.label x5 = 8
|
||||||
@ -330,36 +330,32 @@ sin16s: {
|
|||||||
sta mul_u16_sel.v2+1
|
sta mul_u16_sel.v2+1
|
||||||
ldx #0
|
ldx #0
|
||||||
jsr mul_u16_sel
|
jsr mul_u16_sel
|
||||||
lda mul_u16_sel.return_14
|
lda mul_u16_sel.return
|
||||||
sta mul_u16_sel.return
|
sta x2
|
||||||
lda mul_u16_sel.return_14+1
|
lda mul_u16_sel.return+1
|
||||||
sta mul_u16_sel.return+1
|
sta x2+1
|
||||||
lda x1
|
lda x1
|
||||||
sta mul_u16_sel.v2
|
sta mul_u16_sel.v2
|
||||||
lda x1+1
|
lda x1+1
|
||||||
sta mul_u16_sel.v2+1
|
sta mul_u16_sel.v2+1
|
||||||
ldx #1
|
ldx #1
|
||||||
jsr mul_u16_sel
|
jsr mul_u16_sel
|
||||||
lda mul_u16_sel.return_14
|
lda mul_u16_sel.return
|
||||||
sta mul_u16_sel.return
|
sta mul_u16_sel.return_1
|
||||||
lda mul_u16_sel.return_14+1
|
lda mul_u16_sel.return+1
|
||||||
sta mul_u16_sel.return+1
|
sta mul_u16_sel.return_1+1
|
||||||
ldx #1
|
ldx #1
|
||||||
lda #<$10000/6
|
lda #<$10000/6
|
||||||
sta mul_u16_sel.v2
|
sta mul_u16_sel.v2
|
||||||
lda #>$10000/6
|
lda #>$10000/6
|
||||||
sta mul_u16_sel.v2+1
|
sta mul_u16_sel.v2+1
|
||||||
jsr mul_u16_sel
|
jsr mul_u16_sel
|
||||||
lda mul_u16_sel.return_14
|
|
||||||
sta mul_u16_sel.return_10
|
|
||||||
lda mul_u16_sel.return_14+1
|
|
||||||
sta mul_u16_sel.return_10+1
|
|
||||||
lda x1
|
lda x1
|
||||||
sec
|
sec
|
||||||
sbc usinx
|
sbc x3_6
|
||||||
sta usinx
|
sta usinx
|
||||||
lda x1+1
|
lda x1+1
|
||||||
sbc usinx+1
|
sbc x3_6+1
|
||||||
sta usinx+1
|
sta usinx+1
|
||||||
lda x1
|
lda x1
|
||||||
sta mul_u16_sel.v2
|
sta mul_u16_sel.v2
|
||||||
@ -367,20 +363,20 @@ sin16s: {
|
|||||||
sta mul_u16_sel.v2+1
|
sta mul_u16_sel.v2+1
|
||||||
ldx #0
|
ldx #0
|
||||||
jsr mul_u16_sel
|
jsr mul_u16_sel
|
||||||
lda mul_u16_sel.return_14
|
lda mul_u16_sel.return
|
||||||
sta mul_u16_sel.return
|
sta mul_u16_sel.return_11
|
||||||
lda mul_u16_sel.return_14+1
|
lda mul_u16_sel.return+1
|
||||||
sta mul_u16_sel.return+1
|
sta mul_u16_sel.return_11+1
|
||||||
lda x1
|
lda x1
|
||||||
sta mul_u16_sel.v2
|
sta mul_u16_sel.v2
|
||||||
lda x1+1
|
lda x1+1
|
||||||
sta mul_u16_sel.v2+1
|
sta mul_u16_sel.v2+1
|
||||||
ldx #0
|
ldx #0
|
||||||
jsr mul_u16_sel
|
jsr mul_u16_sel
|
||||||
lda mul_u16_sel.return_14
|
lda mul_u16_sel.return
|
||||||
sta mul_u16_sel.return
|
sta mul_u16_sel.return_12
|
||||||
lda mul_u16_sel.return_14+1
|
lda mul_u16_sel.return+1
|
||||||
sta mul_u16_sel.return+1
|
sta mul_u16_sel.return_12+1
|
||||||
ldx #3
|
ldx #3
|
||||||
lda #<$10000/$80
|
lda #<$10000/$80
|
||||||
sta mul_u16_sel.v2
|
sta mul_u16_sel.v2
|
||||||
@ -413,10 +409,10 @@ mul_u16_sel: {
|
|||||||
.label _1 = $f
|
.label _1 = $f
|
||||||
.label v1 = 8
|
.label v1 = 8
|
||||||
.label v2 = $13
|
.label v2 = $13
|
||||||
.label return = 8
|
.label return = $13
|
||||||
.label return_10 = 6
|
.label return_1 = 8
|
||||||
.label return_13 = $13
|
.label return_11 = 8
|
||||||
.label return_14 = $13
|
.label return_12 = 8
|
||||||
lda v1
|
lda v1
|
||||||
sta mul16u.a
|
sta mul16u.a
|
||||||
lda v1+1
|
lda v1+1
|
||||||
@ -433,9 +429,9 @@ mul_u16_sel: {
|
|||||||
bne !-
|
bne !-
|
||||||
!e:
|
!e:
|
||||||
lda _1+2
|
lda _1+2
|
||||||
sta return_14
|
sta return
|
||||||
lda _1+3
|
lda _1+3
|
||||||
sta return_14+1
|
sta return+1
|
||||||
rts
|
rts
|
||||||
}
|
}
|
||||||
mul16u: {
|
mul16u: {
|
||||||
|
@ -7006,51 +7006,51 @@ Uplifting [print_sword] best 24916 combination zp ZP_WORD:6 [ print_sword::w#3 p
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|||||||
Uplifting [print_word] best 24916 combination
|
Uplifting [print_word] best 24916 combination
|
||||||
Attempting to uplift remaining variables inzp ZP_BYTE:22 [ sin16s::isUpper#10 ]
|
Attempting to uplift remaining variables inzp ZP_BYTE:22 [ sin16s::isUpper#10 ]
|
||||||
Uplifting [sin16s] best 24916 combination zp ZP_BYTE:22 [ sin16s::isUpper#10 ]
|
Uplifting [sin16s] best 24916 combination zp ZP_BYTE:22 [ sin16s::isUpper#10 ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:27 [ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 ] ] with [ zp ZP_WORD:101 [ sin16s::usinx#1 ] ]
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Coalescing zero page register with common assignment [ zp ZP_WORD:27 [ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 ] ] with [ zp ZP_WORD:101 [ sin16s::usinx#1 ] ] - score: 2
|
||||||
Coalescing zero page register [ zp ZP_WORD:29 [ mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 ] ] with [ zp ZP_WORD:81 [ sin16s::x3#0 ] ]
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Coalescing zero page register with common assignment [ zp ZP_WORD:29 [ mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 ] ] with [ zp ZP_WORD:81 [ sin16s::x3#0 ] ] - score: 2
|
||||||
Coalescing zero page register [ zp ZP_WORD:46 [ divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 ] ] with [ zp ZP_WORD:134 [ rem16u#1 ] ]
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Coalescing zero page register with common assignment [ zp ZP_WORD:46 [ divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 ] ] with [ zp ZP_WORD:134 [ rem16u#1 ] ] - score: 2
|
||||||
Coalescing zero page register [ zp ZP_WORD:6 [ print_sword::w#3 print_sword::w#1 print_sword::w#0 ] ] with [ zp ZP_WORD:53 [ main::sw#0 ] ]
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Coalescing zero page register with common assignment [ zp ZP_WORD:6 [ print_sword::w#3 print_sword::w#1 print_sword::w#0 ] ] with [ zp ZP_WORD:53 [ main::sw#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:23 [ sin16s::x#6 sin16s::x#4 sin16s::x#0 sin16s::x#1 sin16s::x#2 ] ] with [ zp ZP_DWORD:69 [ sin16s::$6 ] ]
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Coalescing zero page register with common assignment [ zp ZP_DWORD:23 [ sin16s::x#6 sin16s::x#4 sin16s::x#0 sin16s::x#1 sin16s::x#2 ] ] with [ zp ZP_DWORD:69 [ sin16s::$6 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:27 [ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 ] ] with [ zp ZP_WORD:65 [ sin16s::return#0 ] ]
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Coalescing zero page register with common assignment [ zp ZP_WORD:27 [ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 ] ] with [ zp ZP_WORD:65 [ sin16s::return#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:27 [ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 ] ] with [ zp ZP_WORD:67 [ sin16s_gen::$1 ] ]
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Coalescing zero page register with common assignment [ zp ZP_WORD:29 [ mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 ] ] with [ zp ZP_WORD:77 [ sin16s::x2#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:27 [ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$1 ] ] with [ zp ZP_WORD:87 [ sin16s::usinx#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:29 [ mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 sin16s::x2#0 ] ] with [ zp ZP_WORD:91 [ sin16s::x4#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:27 [ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$1 sin16s::usinx#0 ] ] with [ zp ZP_WORD:85 [ sin16s::x3_6#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:29 [ mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 sin16s::x2#0 sin16s::x4#0 ] ] with [ zp ZP_WORD:95 [ sin16s::x5#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:27 [ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$1 sin16s::usinx#0 sin16s::x3_6#0 ] ] with [ zp ZP_WORD:83 [ mul_u16_sel::return#10 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:31 [ mul_u16_sel::v2#6 mul_u16_sel::v2#3 mul_u16_sel::v2#4 mul_u16_sel::v2#0 mul_u16_sel::v2#1 ] ] with [ zp ZP_WORD:103 [ mul16u::b#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:29 [ mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 ] ] with [ zp ZP_WORD:77 [ sin16s::x2#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_DWORD:36 [ mul16u::res#2 mul16u::res#6 mul16u::res#1 ] ] with [ zp ZP_DWORD:105 [ mul16u::return#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:29 [ mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 sin16s::x2#0 ] ] with [ zp ZP_WORD:75 [ mul_u16_sel::return#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:50 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 ] ] with [ zp ZP_WORD:120 [ divr16u::return#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:29 [ mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 sin16s::x2#0 mul_u16_sel::return#0 ] ] with [ zp ZP_WORD:79 [ mul_u16_sel::return#1 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:50 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 ] ] with [ zp ZP_WORD:124 [ divr16u::return#3 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:29 [ mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 sin16s::x2#0 mul_u16_sel::return#0 mul_u16_sel::return#1 ] ] with [ zp ZP_WORD:91 [ sin16s::x4#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_DWORD:57 [ div32u16u::return#0 ] ] with [ zp ZP_DWORD:61 [ sin16s_gen::step#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:29 [ mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 sin16s::x2#0 mul_u16_sel::return#0 mul_u16_sel::return#1 sin16s::x4#0 ] ] with [ zp ZP_WORD:89 [ mul_u16_sel::return#11 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_DWORD:57 [ div32u16u::return#0 sin16s_gen::step#0 ] ] with [ zp ZP_DWORD:128 [ div32u16u::return#1 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:29 [ mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 sin16s::x2#0 mul_u16_sel::return#0 mul_u16_sel::return#1 sin16s::x4#0 mul_u16_sel::return#11 ] ] with [ zp ZP_WORD:95 [ sin16s::x5#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:75 [ mul_u16_sel::return#0 ] ] with [ zp ZP_WORD:117 [ mul_u16_sel::return#14 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:29 [ mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 sin16s::x2#0 mul_u16_sel::return#0 mul_u16_sel::return#1 sin16s::x4#0 mul_u16_sel::return#11 sin16s::x5#0 ] ] with [ zp ZP_WORD:93 [ mul_u16_sel::return#12 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:83 [ mul_u16_sel::return#10 ] ] with [ zp ZP_WORD:85 [ sin16s::x3_6#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:31 [ mul_u16_sel::v2#6 mul_u16_sel::v2#3 mul_u16_sel::v2#4 mul_u16_sel::v2#0 mul_u16_sel::v2#1 ] ] with [ zp ZP_WORD:103 [ mul16u::b#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:97 [ mul_u16_sel::return#13 ] ] with [ zp ZP_WORD:99 [ sin16s::x5_128#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:36 [ mul16u::res#2 mul16u::res#6 mul16u::res#1 ] ] with [ zp ZP_DWORD:105 [ mul16u::return#2 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_DWORD:109 [ mul_u16_sel::$0 ] ] with [ zp ZP_DWORD:113 [ mul_u16_sel::$1 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:36 [ mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#2 ] ] with [ zp ZP_DWORD:109 [ mul_u16_sel::$0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:27 [ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 ] ] with [ zp ZP_WORD:67 [ sin16s_gen::$1 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:36 [ mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#2 mul_u16_sel::$0 ] ] with [ zp ZP_DWORD:113 [ mul_u16_sel::$1 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:27 [ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$1 ] ] with [ zp ZP_WORD:87 [ sin16s::usinx#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:50 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 ] ] with [ zp ZP_WORD:120 [ divr16u::return#2 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:29 [ mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 sin16s::x2#0 sin16s::x4#0 sin16s::x5#0 ] ] with [ zp ZP_WORD:79 [ mul_u16_sel::return#1 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:50 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 ] ] with [ zp ZP_WORD:124 [ divr16u::return#3 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:29 [ mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 sin16s::x2#0 sin16s::x4#0 sin16s::x5#0 mul_u16_sel::return#1 ] ] with [ zp ZP_WORD:89 [ mul_u16_sel::return#11 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:50 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 divr16u::return#3 ] ] with [ zp ZP_WORD:126 [ div32u16u::quotient_lo#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:29 [ mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 sin16s::x2#0 sin16s::x4#0 sin16s::x5#0 mul_u16_sel::return#1 mul_u16_sel::return#11 ] ] with [ zp ZP_WORD:93 [ mul_u16_sel::return#12 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:57 [ div32u16u::return#0 ] ] with [ zp ZP_DWORD:61 [ sin16s_gen::step#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_DWORD:36 [ mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#2 ] ] with [ zp ZP_DWORD:109 [ mul_u16_sel::$0 mul_u16_sel::$1 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:57 [ div32u16u::return#0 sin16s_gen::step#0 ] ] with [ zp ZP_DWORD:128 [ div32u16u::return#1 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:50 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 divr16u::return#3 ] ] with [ zp ZP_WORD:126 [ div32u16u::quotient_lo#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:97 [ mul_u16_sel::return#13 ] ] with [ zp ZP_WORD:99 [ sin16s::x5_128#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:75 [ mul_u16_sel::return#0 mul_u16_sel::return#14 ] ] with [ zp ZP_WORD:83 [ mul_u16_sel::return#10 sin16s::x3_6#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:97 [ mul_u16_sel::return#13 sin16s::x5_128#0 ] ] with [ zp ZP_WORD:117 [ mul_u16_sel::return#14 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:75 [ mul_u16_sel::return#0 mul_u16_sel::return#14 mul_u16_sel::return#10 sin16s::x3_6#0 ] ] with [ zp ZP_WORD:97 [ mul_u16_sel::return#13 sin16s::x5_128#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:2 [ main::st1#2 main::st1#1 ] ] with [ zp ZP_WORD:12 [ print_cls::sc#2 print_cls::sc#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:2 [ main::st1#2 main::st1#1 ] ] with [ zp ZP_WORD:12 [ print_cls::sc#2 print_cls::sc#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:2 [ main::st1#2 main::st1#1 print_cls::sc#2 print_cls::sc#1 ] ] with [ zp ZP_WORD:18 [ sin16s_gen::sintab#2 sin16s_gen::sintab#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:2 [ main::st1#2 main::st1#1 print_cls::sc#2 print_cls::sc#1 ] ] with [ zp ZP_WORD:18 [ sin16s_gen::sintab#2 sin16s_gen::sintab#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:2 [ main::st1#2 main::st1#1 print_cls::sc#2 print_cls::sc#1 sin16s_gen::sintab#2 sin16s_gen::sintab#1 ] ] with [ zp ZP_WORD:44 [ divr16u::divisor#6 ] ]
|
Coalescing zero page register [ zp ZP_WORD:2 [ main::st1#2 main::st1#1 print_cls::sc#2 print_cls::sc#1 sin16s_gen::sintab#2 sin16s_gen::sintab#1 ] ] with [ zp ZP_WORD:44 [ divr16u::divisor#6 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:4 [ print_str::str#3 print_str::str#5 print_str::str#0 ] ] with [ zp ZP_WORD:20 [ sin16s_gen::i#2 sin16s_gen::i#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:4 [ print_str::str#3 print_str::str#5 print_str::str#0 ] ] with [ zp ZP_WORD:20 [ sin16s_gen::i#2 sin16s_gen::i#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:4 [ print_str::str#3 print_str::str#5 print_str::str#0 sin16s_gen::i#2 sin16s_gen::i#1 ] ] with [ zp ZP_WORD:46 [ divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 rem16u#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:4 [ print_str::str#3 print_str::str#5 print_str::str#0 sin16s_gen::i#2 sin16s_gen::i#1 ] ] with [ zp ZP_WORD:46 [ divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 rem16u#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:6 [ print_sword::w#3 print_sword::w#1 print_sword::w#0 main::sw#0 ] ] with [ zp ZP_WORD:27 [ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$1 sin16s::usinx#0 sin16s::x3_6#0 mul_u16_sel::return#10 ] ]
|
Coalescing zero page register [ zp ZP_WORD:6 [ print_sword::w#3 print_sword::w#1 print_sword::w#0 main::sw#0 ] ] with [ zp ZP_WORD:27 [ sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$1 sin16s::usinx#0 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:6 [ print_sword::w#3 print_sword::w#1 print_sword::w#0 main::sw#0 sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$1 sin16s::usinx#0 sin16s::x3_6#0 mul_u16_sel::return#10 ] ] with [ zp ZP_WORD:48 [ divr16u::dividend#3 divr16u::dividend#5 divr16u::dividend#0 ] ]
|
Coalescing zero page register [ zp ZP_WORD:6 [ print_sword::w#3 print_sword::w#1 print_sword::w#0 main::sw#0 sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$1 sin16s::usinx#0 ] ] with [ zp ZP_WORD:48 [ divr16u::dividend#3 divr16u::dividend#5 divr16u::dividend#0 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:10 [ char_cursor#33 char_cursor#46 char_cursor#43 char_cursor#51 char_cursor#48 char_cursor#49 char_cursor#2 char_cursor#12 char_cursor#1 ] ] with [ zp ZP_WORD:29 [ mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 sin16s::x2#0 mul_u16_sel::return#0 mul_u16_sel::return#1 sin16s::x4#0 mul_u16_sel::return#11 sin16s::x5#0 mul_u16_sel::return#12 ] ]
|
Coalescing zero page register [ zp ZP_WORD:10 [ char_cursor#33 char_cursor#46 char_cursor#43 char_cursor#51 char_cursor#48 char_cursor#49 char_cursor#2 char_cursor#12 char_cursor#1 ] ] with [ zp ZP_WORD:29 [ mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 sin16s::x2#0 sin16s::x4#0 sin16s::x5#0 mul_u16_sel::return#1 mul_u16_sel::return#11 mul_u16_sel::return#12 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:10 [ char_cursor#33 char_cursor#46 char_cursor#43 char_cursor#51 char_cursor#48 char_cursor#49 char_cursor#2 char_cursor#12 char_cursor#1 mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 sin16s::x2#0 mul_u16_sel::return#0 mul_u16_sel::return#1 sin16s::x4#0 mul_u16_sel::return#11 sin16s::x5#0 mul_u16_sel::return#12 ] ] with [ zp ZP_WORD:50 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 divr16u::return#3 div32u16u::quotient_lo#0 ] ]
|
Coalescing zero page register [ zp ZP_WORD:10 [ char_cursor#33 char_cursor#46 char_cursor#43 char_cursor#51 char_cursor#48 char_cursor#49 char_cursor#2 char_cursor#12 char_cursor#1 mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 sin16s::x2#0 sin16s::x4#0 sin16s::x5#0 mul_u16_sel::return#1 mul_u16_sel::return#11 mul_u16_sel::return#12 ] ] with [ zp ZP_WORD:50 [ divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 divr16u::return#3 div32u16u::quotient_lo#0 ] ]
|
||||||
Coalescing zero page register [ zp ZP_DWORD:23 [ sin16s::x#6 sin16s::x#4 sin16s::x#0 sin16s::x#1 sin16s::x#2 sin16s::$6 ] ] with [ zp ZP_DWORD:36 [ mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#2 mul_u16_sel::$0 mul_u16_sel::$1 ] ]
|
Coalescing zero page register [ zp ZP_DWORD:23 [ sin16s::x#6 sin16s::x#4 sin16s::x#0 sin16s::x#1 sin16s::x#2 sin16s::$6 ] ] with [ zp ZP_DWORD:36 [ mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#2 mul_u16_sel::$0 mul_u16_sel::$1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:31 [ mul_u16_sel::v2#6 mul_u16_sel::v2#3 mul_u16_sel::v2#4 mul_u16_sel::v2#0 mul_u16_sel::v2#1 mul16u::b#0 ] ] with [ zp ZP_WORD:97 [ mul_u16_sel::return#13 sin16s::x5_128#0 mul_u16_sel::return#14 ] ]
|
Coalescing zero page register [ zp ZP_WORD:31 [ mul_u16_sel::v2#6 mul_u16_sel::v2#3 mul_u16_sel::v2#4 mul_u16_sel::v2#0 mul_u16_sel::v2#1 mul16u::b#0 ] ] with [ zp ZP_WORD:75 [ mul_u16_sel::return#0 mul_u16_sel::return#14 mul_u16_sel::return#10 sin16s::x3_6#0 mul_u16_sel::return#13 sin16s::x5_128#0 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:31 [ mul_u16_sel::v2#6 mul_u16_sel::v2#3 mul_u16_sel::v2#4 mul_u16_sel::v2#0 mul_u16_sel::v2#1 mul16u::b#0 mul_u16_sel::return#13 sin16s::x5_128#0 mul_u16_sel::return#14 ] ] with [ zp ZP_WORD:122 [ div32u16u::quotient_hi#0 ] ]
|
Coalescing zero page register [ zp ZP_WORD:31 [ mul_u16_sel::v2#6 mul_u16_sel::v2#3 mul_u16_sel::v2#4 mul_u16_sel::v2#0 mul_u16_sel::v2#1 mul16u::b#0 mul_u16_sel::return#0 mul_u16_sel::return#14 mul_u16_sel::return#10 sin16s::x3_6#0 mul_u16_sel::return#13 sin16s::x5_128#0 ] ] with [ zp ZP_WORD:122 [ div32u16u::quotient_hi#0 ] ]
|
||||||
Allocated (was zp ZP_WORD:10) zp ZP_WORD:8 [ char_cursor#33 char_cursor#46 char_cursor#43 char_cursor#51 char_cursor#48 char_cursor#49 char_cursor#2 char_cursor#12 char_cursor#1 mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 sin16s::x2#0 mul_u16_sel::return#0 mul_u16_sel::return#1 sin16s::x4#0 mul_u16_sel::return#11 sin16s::x5#0 mul_u16_sel::return#12 divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 divr16u::return#3 div32u16u::quotient_lo#0 ]
|
Allocated (was zp ZP_WORD:10) zp ZP_WORD:8 [ char_cursor#33 char_cursor#46 char_cursor#43 char_cursor#51 char_cursor#48 char_cursor#49 char_cursor#2 char_cursor#12 char_cursor#1 mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 sin16s::x2#0 sin16s::x4#0 sin16s::x5#0 mul_u16_sel::return#1 mul_u16_sel::return#11 mul_u16_sel::return#12 divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 divr16u::return#3 div32u16u::quotient_lo#0 ]
|
||||||
Allocated (was zp ZP_DWORD:14) zp ZP_DWORD:10 [ sin16s_gen::x#2 sin16s_gen::x#1 ]
|
Allocated (was zp ZP_DWORD:14) zp ZP_DWORD:10 [ sin16s_gen::x#2 sin16s_gen::x#1 ]
|
||||||
Allocated (was zp ZP_BYTE:22) zp ZP_BYTE:14 [ sin16s::isUpper#10 ]
|
Allocated (was zp ZP_BYTE:22) zp ZP_BYTE:14 [ sin16s::isUpper#10 ]
|
||||||
Allocated (was zp ZP_DWORD:23) zp ZP_DWORD:15 [ sin16s::x#6 sin16s::x#4 sin16s::x#0 sin16s::x#1 sin16s::x#2 sin16s::$6 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#2 mul_u16_sel::$0 mul_u16_sel::$1 ]
|
Allocated (was zp ZP_DWORD:23) zp ZP_DWORD:15 [ sin16s::x#6 sin16s::x#4 sin16s::x#0 sin16s::x#1 sin16s::x#2 sin16s::$6 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#2 mul_u16_sel::$0 mul_u16_sel::$1 ]
|
||||||
Allocated (was zp ZP_WORD:31) zp ZP_WORD:19 [ mul_u16_sel::v2#6 mul_u16_sel::v2#3 mul_u16_sel::v2#4 mul_u16_sel::v2#0 mul_u16_sel::v2#1 mul16u::b#0 mul_u16_sel::return#13 sin16s::x5_128#0 mul_u16_sel::return#14 div32u16u::quotient_hi#0 ]
|
Allocated (was zp ZP_WORD:31) zp ZP_WORD:19 [ mul_u16_sel::v2#6 mul_u16_sel::v2#3 mul_u16_sel::v2#4 mul_u16_sel::v2#0 mul_u16_sel::v2#1 mul16u::b#0 mul_u16_sel::return#0 mul_u16_sel::return#14 mul_u16_sel::return#10 sin16s::x3_6#0 mul_u16_sel::return#13 sin16s::x5_128#0 div32u16u::quotient_hi#0 ]
|
||||||
Allocated (was zp ZP_WORD:34) zp ZP_WORD:21 [ mul16u::a#2 mul16u::a#1 mul16u::a#0 ]
|
Allocated (was zp ZP_WORD:34) zp ZP_WORD:21 [ mul16u::a#2 mul16u::a#1 mul16u::a#0 ]
|
||||||
Allocated (was zp ZP_DWORD:40) zp ZP_DWORD:23 [ mul16u::mb#2 mul16u::mb#0 mul16u::mb#1 ]
|
Allocated (was zp ZP_DWORD:40) zp ZP_DWORD:23 [ mul16u::mb#2 mul16u::mb#0 mul16u::mb#1 ]
|
||||||
Allocated (was zp ZP_DWORD:57) zp ZP_DWORD:27 [ div32u16u::return#0 sin16s_gen::step#0 div32u16u::return#1 ]
|
Allocated (was zp ZP_DWORD:57) zp ZP_DWORD:27 [ div32u16u::return#0 sin16s_gen::step#0 div32u16u::return#1 ]
|
||||||
@ -7533,7 +7533,7 @@ sin16s: {
|
|||||||
.label x1 = $1f
|
.label x1 = $1f
|
||||||
.label x2 = 8
|
.label x2 = 8
|
||||||
.label x3 = 8
|
.label x3 = 8
|
||||||
.label x3_6 = 6
|
.label x3_6 = $13
|
||||||
.label usinx = 6
|
.label usinx = 6
|
||||||
.label x4 = 8
|
.label x4 = 8
|
||||||
.label x5 = 8
|
.label x5 = 8
|
||||||
@ -7663,16 +7663,16 @@ sin16s: {
|
|||||||
//SEG173 [116] phi (word) mul_u16_sel::v2#6 = (word) mul_u16_sel::v2#0 [phi:sin16s::@2->mul_u16_sel#1] -- register_copy
|
//SEG173 [116] phi (word) mul_u16_sel::v2#6 = (word) mul_u16_sel::v2#0 [phi:sin16s::@2->mul_u16_sel#1] -- register_copy
|
||||||
//SEG174 [116] phi (word) mul_u16_sel::v1#6 = (word) mul_u16_sel::v1#0 [phi:sin16s::@2->mul_u16_sel#2] -- register_copy
|
//SEG174 [116] phi (word) mul_u16_sel::v1#6 = (word) mul_u16_sel::v1#0 [phi:sin16s::@2->mul_u16_sel#2] -- register_copy
|
||||||
jsr mul_u16_sel
|
jsr mul_u16_sel
|
||||||
//SEG175 [84] (word) mul_u16_sel::return#0 ← (word) mul_u16_sel::return#14 [ sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#0 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#0 ] ) -- vwuz1=vwuz2
|
//SEG175 [84] (word) mul_u16_sel::return#0 ← (word) mul_u16_sel::return#14 [ sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#0 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#0 ] )
|
||||||
lda mul_u16_sel.return_14
|
// (word) mul_u16_sel::return#0 = (word) mul_u16_sel::return#14 // register copy zp ZP_WORD:19
|
||||||
sta mul_u16_sel.return
|
|
||||||
lda mul_u16_sel.return_14+1
|
|
||||||
sta mul_u16_sel.return+1
|
|
||||||
jmp b8
|
jmp b8
|
||||||
//SEG176 sin16s::@8
|
//SEG176 sin16s::@8
|
||||||
b8:
|
b8:
|
||||||
//SEG177 [85] (word) sin16s::x2#0 ← (word) mul_u16_sel::return#0 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::x2#0 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x2#0 ] )
|
//SEG177 [85] (word) sin16s::x2#0 ← (word) mul_u16_sel::return#0 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::x2#0 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x2#0 ] ) -- vwuz1=vwuz2
|
||||||
// (word) sin16s::x2#0 = (word) mul_u16_sel::return#0 // register copy zp ZP_WORD:8
|
lda mul_u16_sel.return
|
||||||
|
sta x2
|
||||||
|
lda mul_u16_sel.return+1
|
||||||
|
sta x2+1
|
||||||
//SEG178 [86] (word) mul_u16_sel::v1#1 ← (word) sin16s::x2#0 [ sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v1#1 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v1#1 ] )
|
//SEG178 [86] (word) mul_u16_sel::v1#1 ← (word) sin16s::x2#0 [ sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v1#1 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v1#1 ] )
|
||||||
// (word) mul_u16_sel::v1#1 = (word) sin16s::x2#0 // register copy zp ZP_WORD:8
|
// (word) mul_u16_sel::v1#1 = (word) sin16s::x2#0 // register copy zp ZP_WORD:8
|
||||||
//SEG179 [87] (word) mul_u16_sel::v2#1 ← (word) sin16s::x1#0 [ sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v1#1 mul_u16_sel::v2#1 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v1#1 mul_u16_sel::v2#1 ] ) -- vwuz1=vwuz2
|
//SEG179 [87] (word) mul_u16_sel::v2#1 ← (word) sin16s::x1#0 [ sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v1#1 mul_u16_sel::v2#1 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v1#1 mul_u16_sel::v2#1 ] ) -- vwuz1=vwuz2
|
||||||
@ -7689,10 +7689,10 @@ sin16s: {
|
|||||||
//SEG184 [116] phi (word) mul_u16_sel::v1#6 = (word) mul_u16_sel::v1#1 [phi:sin16s::@8->mul_u16_sel#2] -- register_copy
|
//SEG184 [116] phi (word) mul_u16_sel::v1#6 = (word) mul_u16_sel::v1#1 [phi:sin16s::@8->mul_u16_sel#2] -- register_copy
|
||||||
jsr mul_u16_sel
|
jsr mul_u16_sel
|
||||||
//SEG185 [89] (word) mul_u16_sel::return#1 ← (word) mul_u16_sel::return#14 [ sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#1 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#1 ] ) -- vwuz1=vwuz2
|
//SEG185 [89] (word) mul_u16_sel::return#1 ← (word) mul_u16_sel::return#14 [ sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#1 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#1 ] ) -- vwuz1=vwuz2
|
||||||
lda mul_u16_sel.return_14
|
lda mul_u16_sel.return
|
||||||
sta mul_u16_sel.return
|
sta mul_u16_sel.return_1
|
||||||
lda mul_u16_sel.return_14+1
|
lda mul_u16_sel.return+1
|
||||||
sta mul_u16_sel.return+1
|
sta mul_u16_sel.return_1+1
|
||||||
jmp b9
|
jmp b9
|
||||||
//SEG186 sin16s::@9
|
//SEG186 sin16s::@9
|
||||||
b9:
|
b9:
|
||||||
@ -7712,23 +7712,20 @@ sin16s: {
|
|||||||
sta mul_u16_sel.v2+1
|
sta mul_u16_sel.v2+1
|
||||||
//SEG193 [116] phi (word) mul_u16_sel::v1#6 = (word) mul_u16_sel::v1#2 [phi:sin16s::@9->mul_u16_sel#2] -- register_copy
|
//SEG193 [116] phi (word) mul_u16_sel::v1#6 = (word) mul_u16_sel::v1#2 [phi:sin16s::@9->mul_u16_sel#2] -- register_copy
|
||||||
jsr mul_u16_sel
|
jsr mul_u16_sel
|
||||||
//SEG194 [93] (word) mul_u16_sel::return#10 ← (word) mul_u16_sel::return#14 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 mul_u16_sel::return#10 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 mul_u16_sel::return#10 ] ) -- vwuz1=vwuz2
|
//SEG194 [93] (word) mul_u16_sel::return#10 ← (word) mul_u16_sel::return#14 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 mul_u16_sel::return#10 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 mul_u16_sel::return#10 ] )
|
||||||
lda mul_u16_sel.return_14
|
// (word) mul_u16_sel::return#10 = (word) mul_u16_sel::return#14 // register copy zp ZP_WORD:19
|
||||||
sta mul_u16_sel.return_10
|
|
||||||
lda mul_u16_sel.return_14+1
|
|
||||||
sta mul_u16_sel.return_10+1
|
|
||||||
jmp b10
|
jmp b10
|
||||||
//SEG195 sin16s::@10
|
//SEG195 sin16s::@10
|
||||||
b10:
|
b10:
|
||||||
//SEG196 [94] (word) sin16s::x3_6#0 ← (word) mul_u16_sel::return#10 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 sin16s::x3_6#0 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 sin16s::x3_6#0 ] )
|
//SEG196 [94] (word) sin16s::x3_6#0 ← (word) mul_u16_sel::return#10 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 sin16s::x3_6#0 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 sin16s::x3_6#0 ] )
|
||||||
// (word) sin16s::x3_6#0 = (word) mul_u16_sel::return#10 // register copy zp ZP_WORD:6
|
// (word) sin16s::x3_6#0 = (word) mul_u16_sel::return#10 // register copy zp ZP_WORD:19
|
||||||
//SEG197 [95] (word) sin16s::usinx#0 ← (word) sin16s::x1#0 - (word) sin16s::x3_6#0 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 sin16s::usinx#0 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 sin16s::usinx#0 ] ) -- vwuz1=vwuz2_minus_vwuz1
|
//SEG197 [95] (word) sin16s::usinx#0 ← (word) sin16s::x1#0 - (word) sin16s::x3_6#0 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 sin16s::usinx#0 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 sin16s::usinx#0 ] ) -- vwuz1=vwuz2_minus_vwuz3
|
||||||
lda x1
|
lda x1
|
||||||
sec
|
sec
|
||||||
sbc usinx
|
sbc x3_6
|
||||||
sta usinx
|
sta usinx
|
||||||
lda x1+1
|
lda x1+1
|
||||||
sbc usinx+1
|
sbc x3_6+1
|
||||||
sta usinx+1
|
sta usinx+1
|
||||||
//SEG198 [96] (word) mul_u16_sel::v1#3 ← (word) sin16s::x3#0 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::v1#3 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::v1#3 ] )
|
//SEG198 [96] (word) mul_u16_sel::v1#3 ← (word) sin16s::x3#0 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::v1#3 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::v1#3 ] )
|
||||||
// (word) mul_u16_sel::v1#3 = (word) sin16s::x3#0 // register copy zp ZP_WORD:8
|
// (word) mul_u16_sel::v1#3 = (word) sin16s::x3#0 // register copy zp ZP_WORD:8
|
||||||
@ -7746,10 +7743,10 @@ sin16s: {
|
|||||||
//SEG204 [116] phi (word) mul_u16_sel::v1#6 = (word) mul_u16_sel::v1#3 [phi:sin16s::@10->mul_u16_sel#2] -- register_copy
|
//SEG204 [116] phi (word) mul_u16_sel::v1#6 = (word) mul_u16_sel::v1#3 [phi:sin16s::@10->mul_u16_sel#2] -- register_copy
|
||||||
jsr mul_u16_sel
|
jsr mul_u16_sel
|
||||||
//SEG205 [99] (word) mul_u16_sel::return#11 ← (word) mul_u16_sel::return#14 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::return#11 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::return#11 ] ) -- vwuz1=vwuz2
|
//SEG205 [99] (word) mul_u16_sel::return#11 ← (word) mul_u16_sel::return#14 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::return#11 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::return#11 ] ) -- vwuz1=vwuz2
|
||||||
lda mul_u16_sel.return_14
|
lda mul_u16_sel.return
|
||||||
sta mul_u16_sel.return
|
sta mul_u16_sel.return_11
|
||||||
lda mul_u16_sel.return_14+1
|
lda mul_u16_sel.return+1
|
||||||
sta mul_u16_sel.return+1
|
sta mul_u16_sel.return_11+1
|
||||||
jmp b11
|
jmp b11
|
||||||
//SEG206 sin16s::@11
|
//SEG206 sin16s::@11
|
||||||
b11:
|
b11:
|
||||||
@ -7771,10 +7768,10 @@ sin16s: {
|
|||||||
//SEG214 [116] phi (word) mul_u16_sel::v1#6 = (word) mul_u16_sel::v1#4 [phi:sin16s::@11->mul_u16_sel#2] -- register_copy
|
//SEG214 [116] phi (word) mul_u16_sel::v1#6 = (word) mul_u16_sel::v1#4 [phi:sin16s::@11->mul_u16_sel#2] -- register_copy
|
||||||
jsr mul_u16_sel
|
jsr mul_u16_sel
|
||||||
//SEG215 [104] (word) mul_u16_sel::return#12 ← (word) mul_u16_sel::return#14 [ sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::return#12 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::return#12 ] ) -- vwuz1=vwuz2
|
//SEG215 [104] (word) mul_u16_sel::return#12 ← (word) mul_u16_sel::return#14 [ sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::return#12 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::return#12 ] ) -- vwuz1=vwuz2
|
||||||
lda mul_u16_sel.return_14
|
lda mul_u16_sel.return
|
||||||
sta mul_u16_sel.return
|
sta mul_u16_sel.return_12
|
||||||
lda mul_u16_sel.return_14+1
|
lda mul_u16_sel.return+1
|
||||||
sta mul_u16_sel.return+1
|
sta mul_u16_sel.return_12+1
|
||||||
jmp b12
|
jmp b12
|
||||||
//SEG216 sin16s::@12
|
//SEG216 sin16s::@12
|
||||||
b12:
|
b12:
|
||||||
@ -7849,10 +7846,10 @@ mul_u16_sel: {
|
|||||||
.label _1 = $f
|
.label _1 = $f
|
||||||
.label v1 = 8
|
.label v1 = 8
|
||||||
.label v2 = $13
|
.label v2 = $13
|
||||||
.label return = 8
|
.label return = $13
|
||||||
.label return_10 = 6
|
.label return_1 = 8
|
||||||
.label return_13 = $13
|
.label return_11 = 8
|
||||||
.label return_14 = $13
|
.label return_12 = 8
|
||||||
//SEG239 [117] (word) mul16u::a#1 ← (word) mul_u16_sel::v1#6 [ mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] ( main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:83 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:88 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:92 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:98 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:103 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:107 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] ) -- vwuz1=vwuz2
|
//SEG239 [117] (word) mul16u::a#1 ← (word) mul_u16_sel::v1#6 [ mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] ( main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:83 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:88 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:92 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:98 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:103 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:107 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] ) -- vwuz1=vwuz2
|
||||||
lda v1
|
lda v1
|
||||||
sta mul16u.a
|
sta mul16u.a
|
||||||
@ -7882,9 +7879,9 @@ mul_u16_sel: {
|
|||||||
!e:
|
!e:
|
||||||
//SEG246 [123] (word) mul_u16_sel::return#14 ← > (dword~) mul_u16_sel::$1 [ mul_u16_sel::return#14 ] ( main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:83 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:88 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:92 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:98 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:103 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:107 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::return#14 ] ) -- vwuz1=_hi_vduz2
|
//SEG246 [123] (word) mul_u16_sel::return#14 ← > (dword~) mul_u16_sel::$1 [ mul_u16_sel::return#14 ] ( main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:83 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:88 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:92 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:98 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:103 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:107 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::return#14 ] ) -- vwuz1=_hi_vduz2
|
||||||
lda _1+2
|
lda _1+2
|
||||||
sta return_14
|
sta return
|
||||||
lda _1+3
|
lda _1+3
|
||||||
sta return_14+1
|
sta return+1
|
||||||
jmp breturn
|
jmp breturn
|
||||||
//SEG247 mul_u16_sel::@return
|
//SEG247 mul_u16_sel::@return
|
||||||
breturn:
|
breturn:
|
||||||
@ -8478,13 +8475,13 @@ FINAL SYMBOL TABLE
|
|||||||
(label) mul_u16_sel::@2
|
(label) mul_u16_sel::@2
|
||||||
(label) mul_u16_sel::@return
|
(label) mul_u16_sel::@return
|
||||||
(word) mul_u16_sel::return
|
(word) mul_u16_sel::return
|
||||||
(word) mul_u16_sel::return#0 return zp ZP_WORD:8 4.0
|
(word) mul_u16_sel::return#0 return zp ZP_WORD:19 4.0
|
||||||
(word) mul_u16_sel::return#1 return zp ZP_WORD:8 4.0
|
(word) mul_u16_sel::return#1 return#1 zp ZP_WORD:8 4.0
|
||||||
(word) mul_u16_sel::return#10 return#10 zp ZP_WORD:6 4.0
|
(word) mul_u16_sel::return#10 return zp ZP_WORD:19 4.0
|
||||||
(word) mul_u16_sel::return#11 return zp ZP_WORD:8 4.0
|
(word) mul_u16_sel::return#11 return#11 zp ZP_WORD:8 4.0
|
||||||
(word) mul_u16_sel::return#12 return zp ZP_WORD:8 4.0
|
(word) mul_u16_sel::return#12 return#12 zp ZP_WORD:8 4.0
|
||||||
(word) mul_u16_sel::return#13 return#13 zp ZP_WORD:19 4.0
|
(word) mul_u16_sel::return#13 return zp ZP_WORD:19 4.0
|
||||||
(word) mul_u16_sel::return#14 return#14 zp ZP_WORD:19 1.75
|
(word) mul_u16_sel::return#14 return zp ZP_WORD:19 1.75
|
||||||
(byte) mul_u16_sel::select
|
(byte) mul_u16_sel::select
|
||||||
(byte) mul_u16_sel::select#6 reg byte x 0.3333333333333333
|
(byte) mul_u16_sel::select#6 reg byte x 0.3333333333333333
|
||||||
(word) mul_u16_sel::v1
|
(word) mul_u16_sel::v1
|
||||||
@ -8587,7 +8584,7 @@ FINAL SYMBOL TABLE
|
|||||||
(word) sin16s::x3
|
(word) sin16s::x3
|
||||||
(word) sin16s::x3#0 x3 zp ZP_WORD:8 1.0
|
(word) sin16s::x3#0 x3 zp ZP_WORD:8 1.0
|
||||||
(word) sin16s::x3_6
|
(word) sin16s::x3_6
|
||||||
(word) sin16s::x3_6#0 x3_6 zp ZP_WORD:6 4.0
|
(word) sin16s::x3_6#0 x3_6 zp ZP_WORD:19 4.0
|
||||||
(word) sin16s::x4
|
(word) sin16s::x4
|
||||||
(word) sin16s::x4#0 x4 zp ZP_WORD:8 4.0
|
(word) sin16s::x4#0 x4 zp ZP_WORD:8 4.0
|
||||||
(word) sin16s::x5
|
(word) sin16s::x5
|
||||||
@ -8615,14 +8612,14 @@ FINAL SYMBOL TABLE
|
|||||||
|
|
||||||
zp ZP_WORD:2 [ main::st1#2 main::st1#1 print_cls::sc#2 print_cls::sc#1 sin16s_gen::sintab#2 sin16s_gen::sintab#1 divr16u::divisor#6 ]
|
zp ZP_WORD:2 [ main::st1#2 main::st1#1 print_cls::sc#2 print_cls::sc#1 sin16s_gen::sintab#2 sin16s_gen::sintab#1 divr16u::divisor#6 ]
|
||||||
zp ZP_WORD:4 [ print_str::str#3 print_str::str#5 print_str::str#0 sin16s_gen::i#2 sin16s_gen::i#1 divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 rem16u#1 ]
|
zp ZP_WORD:4 [ print_str::str#3 print_str::str#5 print_str::str#0 sin16s_gen::i#2 sin16s_gen::i#1 divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 rem16u#1 ]
|
||||||
zp ZP_WORD:6 [ print_sword::w#3 print_sword::w#1 print_sword::w#0 main::sw#0 sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$1 sin16s::usinx#0 sin16s::x3_6#0 mul_u16_sel::return#10 divr16u::dividend#3 divr16u::dividend#5 divr16u::dividend#0 ]
|
zp ZP_WORD:6 [ print_sword::w#3 print_sword::w#1 print_sword::w#0 main::sw#0 sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$1 sin16s::usinx#0 divr16u::dividend#3 divr16u::dividend#5 divr16u::dividend#0 ]
|
||||||
reg byte x [ print_byte::b#2 print_byte::b#0 print_byte::b#1 ]
|
reg byte x [ print_byte::b#2 print_byte::b#0 print_byte::b#1 ]
|
||||||
reg byte a [ print_char::ch#3 print_char::ch#1 print_char::ch#2 ]
|
reg byte a [ print_char::ch#3 print_char::ch#1 print_char::ch#2 ]
|
||||||
zp ZP_WORD:8 [ char_cursor#33 char_cursor#46 char_cursor#43 char_cursor#51 char_cursor#48 char_cursor#49 char_cursor#2 char_cursor#12 char_cursor#1 mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 sin16s::x2#0 mul_u16_sel::return#0 mul_u16_sel::return#1 sin16s::x4#0 mul_u16_sel::return#11 sin16s::x5#0 mul_u16_sel::return#12 divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 divr16u::return#3 div32u16u::quotient_lo#0 ]
|
zp ZP_WORD:8 [ char_cursor#33 char_cursor#46 char_cursor#43 char_cursor#51 char_cursor#48 char_cursor#49 char_cursor#2 char_cursor#12 char_cursor#1 mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 sin16s::x2#0 sin16s::x4#0 sin16s::x5#0 mul_u16_sel::return#1 mul_u16_sel::return#11 mul_u16_sel::return#12 divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 divr16u::return#3 div32u16u::quotient_lo#0 ]
|
||||||
zp ZP_DWORD:10 [ sin16s_gen::x#2 sin16s_gen::x#1 ]
|
zp ZP_DWORD:10 [ sin16s_gen::x#2 sin16s_gen::x#1 ]
|
||||||
zp ZP_BYTE:14 [ sin16s::isUpper#10 ]
|
zp ZP_BYTE:14 [ sin16s::isUpper#10 ]
|
||||||
zp ZP_DWORD:15 [ sin16s::x#6 sin16s::x#4 sin16s::x#0 sin16s::x#1 sin16s::x#2 sin16s::$6 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#2 mul_u16_sel::$0 mul_u16_sel::$1 ]
|
zp ZP_DWORD:15 [ sin16s::x#6 sin16s::x#4 sin16s::x#0 sin16s::x#1 sin16s::x#2 sin16s::$6 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#2 mul_u16_sel::$0 mul_u16_sel::$1 ]
|
||||||
zp ZP_WORD:19 [ mul_u16_sel::v2#6 mul_u16_sel::v2#3 mul_u16_sel::v2#4 mul_u16_sel::v2#0 mul_u16_sel::v2#1 mul16u::b#0 mul_u16_sel::return#13 sin16s::x5_128#0 mul_u16_sel::return#14 div32u16u::quotient_hi#0 ]
|
zp ZP_WORD:19 [ mul_u16_sel::v2#6 mul_u16_sel::v2#3 mul_u16_sel::v2#4 mul_u16_sel::v2#0 mul_u16_sel::v2#1 mul16u::b#0 mul_u16_sel::return#0 mul_u16_sel::return#14 mul_u16_sel::return#10 sin16s::x3_6#0 mul_u16_sel::return#13 sin16s::x5_128#0 div32u16u::quotient_hi#0 ]
|
||||||
reg byte x [ mul_u16_sel::select#6 ]
|
reg byte x [ mul_u16_sel::select#6 ]
|
||||||
zp ZP_WORD:21 [ mul16u::a#2 mul16u::a#1 mul16u::a#0 ]
|
zp ZP_WORD:21 [ mul16u::a#2 mul16u::a#1 mul16u::a#0 ]
|
||||||
zp ZP_DWORD:23 [ mul16u::mb#2 mul16u::mb#0 mul16u::mb#1 ]
|
zp ZP_DWORD:23 [ mul16u::mb#2 mul16u::mb#0 mul16u::mb#1 ]
|
||||||
@ -8637,7 +8634,7 @@ reg byte a [ divr16u::$2 ]
|
|||||||
|
|
||||||
|
|
||||||
FINAL ASSEMBLER
|
FINAL ASSEMBLER
|
||||||
Score: 20933
|
Score: 20921
|
||||||
|
|
||||||
//SEG0 Basic Upstart
|
//SEG0 Basic Upstart
|
||||||
.pc = $801 "Basic"
|
.pc = $801 "Basic"
|
||||||
@ -9031,7 +9028,7 @@ sin16s: {
|
|||||||
.label x1 = $1f
|
.label x1 = $1f
|
||||||
.label x2 = 8
|
.label x2 = 8
|
||||||
.label x3 = 8
|
.label x3 = 8
|
||||||
.label x3_6 = 6
|
.label x3_6 = $13
|
||||||
.label usinx = 6
|
.label usinx = 6
|
||||||
.label x4 = 8
|
.label x4 = 8
|
||||||
.label x5 = 8
|
.label x5 = 8
|
||||||
@ -9151,14 +9148,14 @@ sin16s: {
|
|||||||
//SEG173 [116] phi (word) mul_u16_sel::v2#6 = (word) mul_u16_sel::v2#0 [phi:sin16s::@2->mul_u16_sel#1] -- register_copy
|
//SEG173 [116] phi (word) mul_u16_sel::v2#6 = (word) mul_u16_sel::v2#0 [phi:sin16s::@2->mul_u16_sel#1] -- register_copy
|
||||||
//SEG174 [116] phi (word) mul_u16_sel::v1#6 = (word) mul_u16_sel::v1#0 [phi:sin16s::@2->mul_u16_sel#2] -- register_copy
|
//SEG174 [116] phi (word) mul_u16_sel::v1#6 = (word) mul_u16_sel::v1#0 [phi:sin16s::@2->mul_u16_sel#2] -- register_copy
|
||||||
jsr mul_u16_sel
|
jsr mul_u16_sel
|
||||||
//SEG175 [84] (word) mul_u16_sel::return#0 ← (word) mul_u16_sel::return#14 [ sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#0 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#0 ] ) -- vwuz1=vwuz2
|
//SEG175 [84] (word) mul_u16_sel::return#0 ← (word) mul_u16_sel::return#14 [ sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#0 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#0 ] )
|
||||||
lda mul_u16_sel.return_14
|
// (word) mul_u16_sel::return#0 = (word) mul_u16_sel::return#14 // register copy zp ZP_WORD:19
|
||||||
sta mul_u16_sel.return
|
|
||||||
lda mul_u16_sel.return_14+1
|
|
||||||
sta mul_u16_sel.return+1
|
|
||||||
//SEG176 sin16s::@8
|
//SEG176 sin16s::@8
|
||||||
//SEG177 [85] (word) sin16s::x2#0 ← (word) mul_u16_sel::return#0 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::x2#0 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x2#0 ] )
|
//SEG177 [85] (word) sin16s::x2#0 ← (word) mul_u16_sel::return#0 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::x2#0 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x2#0 ] ) -- vwuz1=vwuz2
|
||||||
// (word) sin16s::x2#0 = (word) mul_u16_sel::return#0 // register copy zp ZP_WORD:8
|
lda mul_u16_sel.return
|
||||||
|
sta x2
|
||||||
|
lda mul_u16_sel.return+1
|
||||||
|
sta x2+1
|
||||||
//SEG178 [86] (word) mul_u16_sel::v1#1 ← (word) sin16s::x2#0 [ sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v1#1 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v1#1 ] )
|
//SEG178 [86] (word) mul_u16_sel::v1#1 ← (word) sin16s::x2#0 [ sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v1#1 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v1#1 ] )
|
||||||
// (word) mul_u16_sel::v1#1 = (word) sin16s::x2#0 // register copy zp ZP_WORD:8
|
// (word) mul_u16_sel::v1#1 = (word) sin16s::x2#0 // register copy zp ZP_WORD:8
|
||||||
//SEG179 [87] (word) mul_u16_sel::v2#1 ← (word) sin16s::x1#0 [ sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v1#1 mul_u16_sel::v2#1 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v1#1 mul_u16_sel::v2#1 ] ) -- vwuz1=vwuz2
|
//SEG179 [87] (word) mul_u16_sel::v2#1 ← (word) sin16s::x1#0 [ sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v1#1 mul_u16_sel::v2#1 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v1#1 mul_u16_sel::v2#1 ] ) -- vwuz1=vwuz2
|
||||||
@ -9174,10 +9171,10 @@ sin16s: {
|
|||||||
//SEG184 [116] phi (word) mul_u16_sel::v1#6 = (word) mul_u16_sel::v1#1 [phi:sin16s::@8->mul_u16_sel#2] -- register_copy
|
//SEG184 [116] phi (word) mul_u16_sel::v1#6 = (word) mul_u16_sel::v1#1 [phi:sin16s::@8->mul_u16_sel#2] -- register_copy
|
||||||
jsr mul_u16_sel
|
jsr mul_u16_sel
|
||||||
//SEG185 [89] (word) mul_u16_sel::return#1 ← (word) mul_u16_sel::return#14 [ sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#1 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#1 ] ) -- vwuz1=vwuz2
|
//SEG185 [89] (word) mul_u16_sel::return#1 ← (word) mul_u16_sel::return#14 [ sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#1 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#1 ] ) -- vwuz1=vwuz2
|
||||||
lda mul_u16_sel.return_14
|
lda mul_u16_sel.return
|
||||||
sta mul_u16_sel.return
|
sta mul_u16_sel.return_1
|
||||||
lda mul_u16_sel.return_14+1
|
lda mul_u16_sel.return+1
|
||||||
sta mul_u16_sel.return+1
|
sta mul_u16_sel.return_1+1
|
||||||
//SEG186 sin16s::@9
|
//SEG186 sin16s::@9
|
||||||
//SEG187 [90] (word) sin16s::x3#0 ← (word) mul_u16_sel::return#1 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 ] )
|
//SEG187 [90] (word) sin16s::x3#0 ← (word) mul_u16_sel::return#1 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 ] )
|
||||||
// (word) sin16s::x3#0 = (word) mul_u16_sel::return#1 // register copy zp ZP_WORD:8
|
// (word) sin16s::x3#0 = (word) mul_u16_sel::return#1 // register copy zp ZP_WORD:8
|
||||||
@ -9194,21 +9191,18 @@ sin16s: {
|
|||||||
sta mul_u16_sel.v2+1
|
sta mul_u16_sel.v2+1
|
||||||
//SEG193 [116] phi (word) mul_u16_sel::v1#6 = (word) mul_u16_sel::v1#2 [phi:sin16s::@9->mul_u16_sel#2] -- register_copy
|
//SEG193 [116] phi (word) mul_u16_sel::v1#6 = (word) mul_u16_sel::v1#2 [phi:sin16s::@9->mul_u16_sel#2] -- register_copy
|
||||||
jsr mul_u16_sel
|
jsr mul_u16_sel
|
||||||
//SEG194 [93] (word) mul_u16_sel::return#10 ← (word) mul_u16_sel::return#14 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 mul_u16_sel::return#10 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 mul_u16_sel::return#10 ] ) -- vwuz1=vwuz2
|
//SEG194 [93] (word) mul_u16_sel::return#10 ← (word) mul_u16_sel::return#14 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 mul_u16_sel::return#10 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 mul_u16_sel::return#10 ] )
|
||||||
lda mul_u16_sel.return_14
|
// (word) mul_u16_sel::return#10 = (word) mul_u16_sel::return#14 // register copy zp ZP_WORD:19
|
||||||
sta mul_u16_sel.return_10
|
|
||||||
lda mul_u16_sel.return_14+1
|
|
||||||
sta mul_u16_sel.return_10+1
|
|
||||||
//SEG195 sin16s::@10
|
//SEG195 sin16s::@10
|
||||||
//SEG196 [94] (word) sin16s::x3_6#0 ← (word) mul_u16_sel::return#10 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 sin16s::x3_6#0 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 sin16s::x3_6#0 ] )
|
//SEG196 [94] (word) sin16s::x3_6#0 ← (word) mul_u16_sel::return#10 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 sin16s::x3_6#0 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 sin16s::x3_6#0 ] )
|
||||||
// (word) sin16s::x3_6#0 = (word) mul_u16_sel::return#10 // register copy zp ZP_WORD:6
|
// (word) sin16s::x3_6#0 = (word) mul_u16_sel::return#10 // register copy zp ZP_WORD:19
|
||||||
//SEG197 [95] (word) sin16s::usinx#0 ← (word) sin16s::x1#0 - (word) sin16s::x3_6#0 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 sin16s::usinx#0 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 sin16s::usinx#0 ] ) -- vwuz1=vwuz2_minus_vwuz1
|
//SEG197 [95] (word) sin16s::usinx#0 ← (word) sin16s::x1#0 - (word) sin16s::x3_6#0 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 sin16s::usinx#0 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 sin16s::usinx#0 ] ) -- vwuz1=vwuz2_minus_vwuz3
|
||||||
lda x1
|
lda x1
|
||||||
sec
|
sec
|
||||||
sbc usinx
|
sbc x3_6
|
||||||
sta usinx
|
sta usinx
|
||||||
lda x1+1
|
lda x1+1
|
||||||
sbc usinx+1
|
sbc x3_6+1
|
||||||
sta usinx+1
|
sta usinx+1
|
||||||
//SEG198 [96] (word) mul_u16_sel::v1#3 ← (word) sin16s::x3#0 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::v1#3 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::v1#3 ] )
|
//SEG198 [96] (word) mul_u16_sel::v1#3 ← (word) sin16s::x3#0 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::v1#3 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::v1#3 ] )
|
||||||
// (word) mul_u16_sel::v1#3 = (word) sin16s::x3#0 // register copy zp ZP_WORD:8
|
// (word) mul_u16_sel::v1#3 = (word) sin16s::x3#0 // register copy zp ZP_WORD:8
|
||||||
@ -9225,10 +9219,10 @@ sin16s: {
|
|||||||
//SEG204 [116] phi (word) mul_u16_sel::v1#6 = (word) mul_u16_sel::v1#3 [phi:sin16s::@10->mul_u16_sel#2] -- register_copy
|
//SEG204 [116] phi (word) mul_u16_sel::v1#6 = (word) mul_u16_sel::v1#3 [phi:sin16s::@10->mul_u16_sel#2] -- register_copy
|
||||||
jsr mul_u16_sel
|
jsr mul_u16_sel
|
||||||
//SEG205 [99] (word) mul_u16_sel::return#11 ← (word) mul_u16_sel::return#14 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::return#11 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::return#11 ] ) -- vwuz1=vwuz2
|
//SEG205 [99] (word) mul_u16_sel::return#11 ← (word) mul_u16_sel::return#14 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::return#11 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::return#11 ] ) -- vwuz1=vwuz2
|
||||||
lda mul_u16_sel.return_14
|
lda mul_u16_sel.return
|
||||||
sta mul_u16_sel.return
|
sta mul_u16_sel.return_11
|
||||||
lda mul_u16_sel.return_14+1
|
lda mul_u16_sel.return+1
|
||||||
sta mul_u16_sel.return+1
|
sta mul_u16_sel.return_11+1
|
||||||
//SEG206 sin16s::@11
|
//SEG206 sin16s::@11
|
||||||
//SEG207 [100] (word) sin16s::x4#0 ← (word) mul_u16_sel::return#11 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 sin16s::x4#0 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 sin16s::x4#0 ] )
|
//SEG207 [100] (word) sin16s::x4#0 ← (word) mul_u16_sel::return#11 [ sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 sin16s::x4#0 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 sin16s::x4#0 ] )
|
||||||
// (word) sin16s::x4#0 = (word) mul_u16_sel::return#11 // register copy zp ZP_WORD:8
|
// (word) sin16s::x4#0 = (word) mul_u16_sel::return#11 // register copy zp ZP_WORD:8
|
||||||
@ -9247,10 +9241,10 @@ sin16s: {
|
|||||||
//SEG214 [116] phi (word) mul_u16_sel::v1#6 = (word) mul_u16_sel::v1#4 [phi:sin16s::@11->mul_u16_sel#2] -- register_copy
|
//SEG214 [116] phi (word) mul_u16_sel::v1#6 = (word) mul_u16_sel::v1#4 [phi:sin16s::@11->mul_u16_sel#2] -- register_copy
|
||||||
jsr mul_u16_sel
|
jsr mul_u16_sel
|
||||||
//SEG215 [104] (word) mul_u16_sel::return#12 ← (word) mul_u16_sel::return#14 [ sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::return#12 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::return#12 ] ) -- vwuz1=vwuz2
|
//SEG215 [104] (word) mul_u16_sel::return#12 ← (word) mul_u16_sel::return#14 [ sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::return#12 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::return#12 ] ) -- vwuz1=vwuz2
|
||||||
lda mul_u16_sel.return_14
|
lda mul_u16_sel.return
|
||||||
sta mul_u16_sel.return
|
sta mul_u16_sel.return_12
|
||||||
lda mul_u16_sel.return_14+1
|
lda mul_u16_sel.return+1
|
||||||
sta mul_u16_sel.return+1
|
sta mul_u16_sel.return_12+1
|
||||||
//SEG216 sin16s::@12
|
//SEG216 sin16s::@12
|
||||||
//SEG217 [105] (word) sin16s::x5#0 ← (word) mul_u16_sel::return#12 [ sin16s::isUpper#10 sin16s::usinx#0 sin16s::x5#0 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 sin16s::x5#0 ] )
|
//SEG217 [105] (word) sin16s::x5#0 ← (word) mul_u16_sel::return#12 [ sin16s::isUpper#10 sin16s::usinx#0 sin16s::x5#0 ] ( main:2::sin16s_gen:5::sin16s:64 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 sin16s::x5#0 ] )
|
||||||
// (word) sin16s::x5#0 = (word) mul_u16_sel::return#12 // register copy zp ZP_WORD:8
|
// (word) sin16s::x5#0 = (word) mul_u16_sel::return#12 // register copy zp ZP_WORD:8
|
||||||
@ -9311,10 +9305,10 @@ mul_u16_sel: {
|
|||||||
.label _1 = $f
|
.label _1 = $f
|
||||||
.label v1 = 8
|
.label v1 = 8
|
||||||
.label v2 = $13
|
.label v2 = $13
|
||||||
.label return = 8
|
.label return = $13
|
||||||
.label return_10 = 6
|
.label return_1 = 8
|
||||||
.label return_13 = $13
|
.label return_11 = 8
|
||||||
.label return_14 = $13
|
.label return_12 = 8
|
||||||
//SEG239 [117] (word) mul16u::a#1 ← (word) mul_u16_sel::v1#6 [ mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] ( main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:83 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:88 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:92 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:98 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:103 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:107 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] ) -- vwuz1=vwuz2
|
//SEG239 [117] (word) mul16u::a#1 ← (word) mul_u16_sel::v1#6 [ mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] ( main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:83 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:88 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:92 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:98 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:103 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:107 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::v2#6 mul_u16_sel::select#6 mul16u::a#1 ] ) -- vwuz1=vwuz2
|
||||||
lda v1
|
lda v1
|
||||||
sta mul16u.a
|
sta mul16u.a
|
||||||
@ -9342,9 +9336,9 @@ mul_u16_sel: {
|
|||||||
!e:
|
!e:
|
||||||
//SEG246 [123] (word) mul_u16_sel::return#14 ← > (dword~) mul_u16_sel::$1 [ mul_u16_sel::return#14 ] ( main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:83 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:88 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:92 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:98 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:103 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:107 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::return#14 ] ) -- vwuz1=_hi_vduz2
|
//SEG246 [123] (word) mul_u16_sel::return#14 ← > (dword~) mul_u16_sel::$1 [ mul_u16_sel::return#14 ] ( main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:83 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:88 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:92 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:98 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:103 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:107 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::return#14 ] ) -- vwuz1=_hi_vduz2
|
||||||
lda _1+2
|
lda _1+2
|
||||||
sta return_14
|
sta return
|
||||||
lda _1+3
|
lda _1+3
|
||||||
sta return_14+1
|
sta return+1
|
||||||
//SEG247 mul_u16_sel::@return
|
//SEG247 mul_u16_sel::@return
|
||||||
//SEG248 [124] return [ mul_u16_sel::return#14 ] ( main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:83 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:88 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:92 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:98 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:103 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:107 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::return#14 ] )
|
//SEG248 [124] return [ mul_u16_sel::return#14 ] ( main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:83 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:88 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:92 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::x3#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:98 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::x1#0 sin16s::usinx#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:103 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::return#14 ] main:2::sin16s_gen:5::sin16s:64::mul_u16_sel:107 [ sin16s_gen::step#0 sin16s_gen::x#2 sin16s_gen::sintab#2 sin16s_gen::i#2 sin16s::isUpper#10 sin16s::usinx#0 mul_u16_sel::return#14 ] )
|
||||||
rts
|
rts
|
||||||
|
@ -118,13 +118,13 @@
|
|||||||
(label) mul_u16_sel::@2
|
(label) mul_u16_sel::@2
|
||||||
(label) mul_u16_sel::@return
|
(label) mul_u16_sel::@return
|
||||||
(word) mul_u16_sel::return
|
(word) mul_u16_sel::return
|
||||||
(word) mul_u16_sel::return#0 return zp ZP_WORD:8 4.0
|
(word) mul_u16_sel::return#0 return zp ZP_WORD:19 4.0
|
||||||
(word) mul_u16_sel::return#1 return zp ZP_WORD:8 4.0
|
(word) mul_u16_sel::return#1 return#1 zp ZP_WORD:8 4.0
|
||||||
(word) mul_u16_sel::return#10 return#10 zp ZP_WORD:6 4.0
|
(word) mul_u16_sel::return#10 return zp ZP_WORD:19 4.0
|
||||||
(word) mul_u16_sel::return#11 return zp ZP_WORD:8 4.0
|
(word) mul_u16_sel::return#11 return#11 zp ZP_WORD:8 4.0
|
||||||
(word) mul_u16_sel::return#12 return zp ZP_WORD:8 4.0
|
(word) mul_u16_sel::return#12 return#12 zp ZP_WORD:8 4.0
|
||||||
(word) mul_u16_sel::return#13 return#13 zp ZP_WORD:19 4.0
|
(word) mul_u16_sel::return#13 return zp ZP_WORD:19 4.0
|
||||||
(word) mul_u16_sel::return#14 return#14 zp ZP_WORD:19 1.75
|
(word) mul_u16_sel::return#14 return zp ZP_WORD:19 1.75
|
||||||
(byte) mul_u16_sel::select
|
(byte) mul_u16_sel::select
|
||||||
(byte) mul_u16_sel::select#6 reg byte x 0.3333333333333333
|
(byte) mul_u16_sel::select#6 reg byte x 0.3333333333333333
|
||||||
(word) mul_u16_sel::v1
|
(word) mul_u16_sel::v1
|
||||||
@ -227,7 +227,7 @@
|
|||||||
(word) sin16s::x3
|
(word) sin16s::x3
|
||||||
(word) sin16s::x3#0 x3 zp ZP_WORD:8 1.0
|
(word) sin16s::x3#0 x3 zp ZP_WORD:8 1.0
|
||||||
(word) sin16s::x3_6
|
(word) sin16s::x3_6
|
||||||
(word) sin16s::x3_6#0 x3_6 zp ZP_WORD:6 4.0
|
(word) sin16s::x3_6#0 x3_6 zp ZP_WORD:19 4.0
|
||||||
(word) sin16s::x4
|
(word) sin16s::x4
|
||||||
(word) sin16s::x4#0 x4 zp ZP_WORD:8 4.0
|
(word) sin16s::x4#0 x4 zp ZP_WORD:8 4.0
|
||||||
(word) sin16s::x5
|
(word) sin16s::x5
|
||||||
@ -255,14 +255,14 @@
|
|||||||
|
|
||||||
zp ZP_WORD:2 [ main::st1#2 main::st1#1 print_cls::sc#2 print_cls::sc#1 sin16s_gen::sintab#2 sin16s_gen::sintab#1 divr16u::divisor#6 ]
|
zp ZP_WORD:2 [ main::st1#2 main::st1#1 print_cls::sc#2 print_cls::sc#1 sin16s_gen::sintab#2 sin16s_gen::sintab#1 divr16u::divisor#6 ]
|
||||||
zp ZP_WORD:4 [ print_str::str#3 print_str::str#5 print_str::str#0 sin16s_gen::i#2 sin16s_gen::i#1 divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 rem16u#1 ]
|
zp ZP_WORD:4 [ print_str::str#3 print_str::str#5 print_str::str#0 sin16s_gen::i#2 sin16s_gen::i#1 divr16u::rem#5 divr16u::rem#10 divr16u::rem#4 divr16u::rem#11 divr16u::rem#6 divr16u::rem#0 divr16u::rem#1 divr16u::rem#2 rem16u#1 ]
|
||||||
zp ZP_WORD:6 [ print_sword::w#3 print_sword::w#1 print_sword::w#0 main::sw#0 sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$1 sin16s::usinx#0 sin16s::x3_6#0 mul_u16_sel::return#10 divr16u::dividend#3 divr16u::dividend#5 divr16u::dividend#0 ]
|
zp ZP_WORD:6 [ print_sword::w#3 print_sword::w#1 print_sword::w#0 main::sw#0 sin16s::return#1 sin16s::return#5 sin16s::sinx#1 sin16s::usinx#1 sin16s::return#0 sin16s_gen::$1 sin16s::usinx#0 divr16u::dividend#3 divr16u::dividend#5 divr16u::dividend#0 ]
|
||||||
reg byte x [ print_byte::b#2 print_byte::b#0 print_byte::b#1 ]
|
reg byte x [ print_byte::b#2 print_byte::b#0 print_byte::b#1 ]
|
||||||
reg byte a [ print_char::ch#3 print_char::ch#1 print_char::ch#2 ]
|
reg byte a [ print_char::ch#3 print_char::ch#1 print_char::ch#2 ]
|
||||||
zp ZP_WORD:8 [ char_cursor#33 char_cursor#46 char_cursor#43 char_cursor#51 char_cursor#48 char_cursor#49 char_cursor#2 char_cursor#12 char_cursor#1 mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 sin16s::x2#0 mul_u16_sel::return#0 mul_u16_sel::return#1 sin16s::x4#0 mul_u16_sel::return#11 sin16s::x5#0 mul_u16_sel::return#12 divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 divr16u::return#3 div32u16u::quotient_lo#0 ]
|
zp ZP_WORD:8 [ char_cursor#33 char_cursor#46 char_cursor#43 char_cursor#51 char_cursor#48 char_cursor#49 char_cursor#2 char_cursor#12 char_cursor#1 mul_u16_sel::v1#6 mul_u16_sel::v1#3 mul_u16_sel::v1#4 mul_u16_sel::v1#5 mul_u16_sel::v1#0 mul_u16_sel::v1#1 mul_u16_sel::v1#2 sin16s::x3#0 sin16s::x2#0 sin16s::x4#0 sin16s::x5#0 mul_u16_sel::return#1 mul_u16_sel::return#11 mul_u16_sel::return#12 divr16u::quotient#3 divr16u::return#0 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#2 divr16u::return#3 div32u16u::quotient_lo#0 ]
|
||||||
zp ZP_DWORD:10 [ sin16s_gen::x#2 sin16s_gen::x#1 ]
|
zp ZP_DWORD:10 [ sin16s_gen::x#2 sin16s_gen::x#1 ]
|
||||||
zp ZP_BYTE:14 [ sin16s::isUpper#10 ]
|
zp ZP_BYTE:14 [ sin16s::isUpper#10 ]
|
||||||
zp ZP_DWORD:15 [ sin16s::x#6 sin16s::x#4 sin16s::x#0 sin16s::x#1 sin16s::x#2 sin16s::$6 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#2 mul_u16_sel::$0 mul_u16_sel::$1 ]
|
zp ZP_DWORD:15 [ sin16s::x#6 sin16s::x#4 sin16s::x#0 sin16s::x#1 sin16s::x#2 sin16s::$6 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#2 mul_u16_sel::$0 mul_u16_sel::$1 ]
|
||||||
zp ZP_WORD:19 [ mul_u16_sel::v2#6 mul_u16_sel::v2#3 mul_u16_sel::v2#4 mul_u16_sel::v2#0 mul_u16_sel::v2#1 mul16u::b#0 mul_u16_sel::return#13 sin16s::x5_128#0 mul_u16_sel::return#14 div32u16u::quotient_hi#0 ]
|
zp ZP_WORD:19 [ mul_u16_sel::v2#6 mul_u16_sel::v2#3 mul_u16_sel::v2#4 mul_u16_sel::v2#0 mul_u16_sel::v2#1 mul16u::b#0 mul_u16_sel::return#0 mul_u16_sel::return#14 mul_u16_sel::return#10 sin16s::x3_6#0 mul_u16_sel::return#13 sin16s::x5_128#0 div32u16u::quotient_hi#0 ]
|
||||||
reg byte x [ mul_u16_sel::select#6 ]
|
reg byte x [ mul_u16_sel::select#6 ]
|
||||||
zp ZP_WORD:21 [ mul16u::a#2 mul16u::a#1 mul16u::a#0 ]
|
zp ZP_WORD:21 [ mul16u::a#2 mul16u::a#1 mul16u::a#0 ]
|
||||||
zp ZP_DWORD:23 [ mul16u::mb#2 mul16u::mb#0 mul16u::mb#1 ]
|
zp ZP_DWORD:23 [ mul16u::mb#2 mul16u::mb#0 mul16u::mb#1 ]
|
||||||
|
@ -8984,8 +8984,8 @@ Attempting to uplift remaining variables inzp ZP_BYTE:23 [ main::r#59 ]
|
|||||||
Uplifting [main] best 20013 combination reg byte x [ main::r#59 ]
|
Uplifting [main] best 20013 combination reg byte x [ main::r#59 ]
|
||||||
Attempting to uplift remaining variables inzp ZP_BYTE:39 [ main::b#0 ]
|
Attempting to uplift remaining variables inzp ZP_BYTE:39 [ main::b#0 ]
|
||||||
Uplifting [main] best 20013 combination zp ZP_BYTE:39 [ main::b#0 ]
|
Uplifting [main] best 20013 combination zp ZP_BYTE:39 [ main::b#0 ]
|
||||||
Coalescing zero page register [ zp ZP_BYTE:2 [ main::a#10 main::a#1 ] ] with [ zp ZP_BYTE:26 [ printu::a#20 printu::a#8 printu::a#9 printu::a#10 printu::a#11 printu::a#12 printu::a#13 printu::a#14 printu::a#15 printu::a#16 printu::a#17 printu::a#0 printu::a#18 printu::a#19 printu::a#1 printu::a#2 printu::a#3 printu::a#4 printu::a#5 printu::a#6 printu::a#7 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:2 [ main::a#10 main::a#1 ] ] with [ zp ZP_BYTE:26 [ printu::a#20 printu::a#8 printu::a#9 printu::a#10 printu::a#11 printu::a#12 printu::a#13 printu::a#14 printu::a#15 printu::a#16 printu::a#17 printu::a#0 printu::a#18 printu::a#19 printu::a#1 printu::a#2 printu::a#3 printu::a#4 printu::a#5 printu::a#6 printu::a#7 ] ] - score: 20
|
||||||
Coalescing zero page register [ zp ZP_WORD:27 [ printu::op#20 ] ] with [ zp ZP_WORD:35 [ print_str::str#2 print_str::str#1 print_str::str#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:27 [ printu::op#20 ] ] with [ zp ZP_WORD:35 [ print_str::str#2 print_str::str#1 print_str::str#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:24 [ line_cursor#13 line_cursor#25 line_cursor#27 line_cursor#1 ] ] with [ zp ZP_WORD:37 [ print_cls::sc#2 print_cls::sc#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:24 [ line_cursor#13 line_cursor#25 line_cursor#27 line_cursor#1 ] ] with [ zp ZP_WORD:37 [ print_cls::sc#2 print_cls::sc#1 ] ]
|
||||||
Allocated (was zp ZP_WORD:24) zp ZP_WORD:4 [ line_cursor#13 line_cursor#25 line_cursor#27 line_cursor#1 print_cls::sc#2 print_cls::sc#1 ]
|
Allocated (was zp ZP_WORD:24) zp ZP_WORD:4 [ line_cursor#13 line_cursor#25 line_cursor#27 line_cursor#1 print_cls::sc#2 print_cls::sc#1 ]
|
||||||
Allocated (was zp ZP_WORD:27) zp ZP_WORD:6 [ printu::op#20 print_str::str#2 print_str::str#1 print_str::str#0 ]
|
Allocated (was zp ZP_WORD:27) zp ZP_WORD:6 [ printu::op#20 print_str::str#2 print_str::str#1 print_str::str#0 ]
|
||||||
|
@ -35,6 +35,10 @@ test_16s: {
|
|||||||
sta divisor
|
sta divisor
|
||||||
lda divisors+1,y
|
lda divisors+1,y
|
||||||
sta divisor+1
|
sta divisor+1
|
||||||
|
lda dividend
|
||||||
|
sta div16s.dividend
|
||||||
|
lda dividend+1
|
||||||
|
sta div16s.dividend+1
|
||||||
lda divisor
|
lda divisor
|
||||||
sta div16s.divisor
|
sta div16s.divisor
|
||||||
lda divisor+1
|
lda divisor+1
|
||||||
@ -193,18 +197,18 @@ div16s: {
|
|||||||
.label _7 = $c
|
.label _7 = $c
|
||||||
.label resultu = $e
|
.label resultu = $e
|
||||||
.label return = $e
|
.label return = $e
|
||||||
.label dividend = 7
|
.label dividend = 3
|
||||||
.label divisor = $c
|
.label divisor = $c
|
||||||
.label dividendu = 3
|
.label dividendu = 3
|
||||||
.label divisoru = $c
|
.label divisoru = $c
|
||||||
lda dividend+1
|
lda dividend+1
|
||||||
bpl b16
|
bpl b16
|
||||||
sec
|
sec
|
||||||
lda dividend
|
lda _2
|
||||||
eor #$ff
|
eor #$ff
|
||||||
adc #0
|
adc #0
|
||||||
sta _2
|
sta _2
|
||||||
lda dividend+1
|
lda _2+1
|
||||||
eor #$ff
|
eor #$ff
|
||||||
adc #0
|
adc #0
|
||||||
sta _2+1
|
sta _2+1
|
||||||
@ -255,10 +259,6 @@ div16s: {
|
|||||||
sta return+1
|
sta return+1
|
||||||
jmp breturn
|
jmp breturn
|
||||||
b16:
|
b16:
|
||||||
lda dividend
|
|
||||||
sta dividendu
|
|
||||||
lda dividend+1
|
|
||||||
sta dividendu+1
|
|
||||||
ldy #0
|
ldy #0
|
||||||
jmp b2
|
jmp b2
|
||||||
}
|
}
|
||||||
|
@ -9174,42 +9174,42 @@ Attempting to uplift remaining variables inzp ZP_BYTE:89 [ div8s::$7 ]
|
|||||||
Uplifting [div8s] best 42767 combination reg byte x [ div8s::$7 ]
|
Uplifting [div8s] best 42767 combination reg byte x [ div8s::$7 ]
|
||||||
Attempting to uplift remaining variables inzp ZP_BYTE:91 [ div8s::resultu#0 ]
|
Attempting to uplift remaining variables inzp ZP_BYTE:91 [ div8s::resultu#0 ]
|
||||||
Uplifting [div8s] best 42766 combination reg byte y [ div8s::resultu#0 ]
|
Uplifting [div8s] best 42766 combination reg byte y [ div8s::resultu#0 ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:22 [ div16s::return#2 div16s::return#6 div16s::return#0 ] ] with [ zp ZP_WORD:72 [ div16s::resultu#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:22 [ div16s::return#2 div16s::return#6 div16s::return#0 ] ] with [ zp ZP_WORD:72 [ div16s::resultu#0 ] ] - score: 2
|
||||||
Coalescing zero page register [ zp ZP_WORD:7 [ print_sword::w#6 print_sword::w#5 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#4 print_sword::w#0 ] ] with [ zp ZP_WORD:9 [ print_word::w#5 print_word::w#7 print_word::w#1 print_word::w#2 print_word::w#3 print_word::w#4 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:7 [ print_sword::w#6 print_sword::w#5 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#4 print_sword::w#0 ] ] with [ zp ZP_WORD:9 [ print_word::w#5 print_word::w#7 print_word::w#1 print_word::w#2 print_word::w#3 print_word::w#4 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:7 [ print_sword::w#6 print_sword::w#5 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#4 print_sword::w#0 print_word::w#5 print_word::w#7 print_word::w#1 print_word::w#2 print_word::w#3 print_word::w#4 ] ] with [ zp ZP_WORD:52 [ test_16s::dividend#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:7 [ print_sword::w#6 print_sword::w#5 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#4 print_sword::w#0 print_word::w#5 print_word::w#7 print_word::w#1 print_word::w#2 print_word::w#3 print_word::w#4 ] ] with [ zp ZP_WORD:52 [ test_16s::dividend#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:7 [ print_sword::w#6 print_sword::w#5 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#4 print_sword::w#0 print_word::w#5 print_word::w#7 print_word::w#1 print_word::w#2 print_word::w#3 print_word::w#4 test_16s::dividend#0 ] ] with [ zp ZP_WORD:56 [ div16s::dividend#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:11 [ print_byte::b#7 print_byte::b#9 print_byte::b#1 print_byte::b#2 print_byte::b#3 print_byte::b#4 print_byte::b#5 print_byte::b#6 ] ] with [ zp ZP_BYTE:37 [ print_sbyte::b#6 print_sbyte::b#5 print_sbyte::b#1 print_sbyte::b#2 print_sbyte::b#3 print_sbyte::b#4 print_sbyte::b#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:7 [ print_sword::w#6 print_sword::w#5 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#4 print_sword::w#0 print_word::w#5 print_word::w#7 print_word::w#1 print_word::w#2 print_word::w#3 print_word::w#4 test_16s::dividend#0 div16s::dividend#0 ] ] with [ zp ZP_WORD:96 [ test_16u::dividend#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:11 [ print_byte::b#7 print_byte::b#9 print_byte::b#1 print_byte::b#2 print_byte::b#3 print_byte::b#4 print_byte::b#5 print_byte::b#6 print_sbyte::b#6 print_sbyte::b#5 print_sbyte::b#1 print_sbyte::b#2 print_sbyte::b#3 print_sbyte::b#4 print_sbyte::b#0 ] ] with [ zp ZP_BYTE:104 [ test_8u::dividend#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:11 [ print_byte::b#7 print_byte::b#9 print_byte::b#1 print_byte::b#2 print_byte::b#3 print_byte::b#4 print_byte::b#5 print_byte::b#6 ] ] with [ zp ZP_BYTE:37 [ print_sbyte::b#6 print_sbyte::b#5 print_sbyte::b#1 print_sbyte::b#2 print_sbyte::b#3 print_sbyte::b#4 print_sbyte::b#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:17 [ div16s::dividendu#3 div16s::dividendu#7 div16s::dividendu#8 ] ] with [ zp ZP_WORD:24 [ div16u::dividend#2 div16u::dividend#0 div16u::dividend#1 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:11 [ print_byte::b#7 print_byte::b#9 print_byte::b#1 print_byte::b#2 print_byte::b#3 print_byte::b#4 print_byte::b#5 print_byte::b#6 print_sbyte::b#6 print_sbyte::b#5 print_sbyte::b#1 print_sbyte::b#2 print_sbyte::b#3 print_sbyte::b#4 print_sbyte::b#0 ] ] with [ zp ZP_BYTE:82 [ test_8s::dividend#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:17 [ div16s::dividendu#3 div16s::dividendu#7 div16s::dividendu#8 div16u::dividend#2 div16u::dividend#0 div16u::dividend#1 ] ] with [ zp ZP_WORD:56 [ div16s::dividend#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:11 [ print_byte::b#7 print_byte::b#9 print_byte::b#1 print_byte::b#2 print_byte::b#3 print_byte::b#4 print_byte::b#5 print_byte::b#6 print_sbyte::b#6 print_sbyte::b#5 print_sbyte::b#1 print_sbyte::b#2 print_sbyte::b#3 print_sbyte::b#4 print_sbyte::b#0 test_8s::dividend#0 ] ] with [ zp ZP_BYTE:104 [ test_8u::dividend#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:17 [ div16s::dividendu#3 div16s::dividendu#7 div16s::dividendu#8 div16u::dividend#2 div16u::dividend#0 div16u::dividend#1 div16s::dividend#0 ] ] with [ zp ZP_WORD:66 [ div16s::$2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:17 [ div16s::dividendu#3 div16s::dividendu#7 div16s::dividendu#8 ] ] with [ zp ZP_WORD:24 [ div16u::dividend#2 div16u::dividend#0 div16u::dividend#1 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:19 [ div16s::divisoru#3 div16s::divisoru#4 div16s::divisoru#5 ] ] with [ zp ZP_WORD:26 [ div16u::divisor#2 div16u::divisor#0 div16u::divisor#1 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:17 [ div16s::dividendu#3 div16s::dividendu#7 div16s::dividendu#8 div16u::dividend#2 div16u::dividend#0 div16u::dividend#1 ] ] with [ zp ZP_WORD:30 [ divr16u::dividend#2 divr16u::dividend#0 divr16u::dividend#1 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:19 [ div16s::divisoru#3 div16s::divisoru#4 div16s::divisoru#5 div16u::divisor#2 div16u::divisor#0 div16u::divisor#1 ] ] with [ zp ZP_WORD:58 [ div16s::divisor#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:17 [ div16s::dividendu#3 div16s::dividendu#7 div16s::dividendu#8 div16u::dividend#2 div16u::dividend#0 div16u::dividend#1 divr16u::dividend#2 divr16u::dividend#0 divr16u::dividend#1 ] ] with [ zp ZP_WORD:66 [ div16s::$2 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:19 [ div16s::divisoru#3 div16s::divisoru#4 div16s::divisoru#5 div16u::divisor#2 div16u::divisor#0 div16u::divisor#1 div16s::divisor#0 ] ] with [ zp ZP_WORD:68 [ div16s::$7 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:19 [ div16s::divisoru#3 div16s::divisoru#4 div16s::divisoru#5 ] ] with [ zp ZP_WORD:26 [ div16u::divisor#2 div16u::divisor#0 div16u::divisor#1 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:22 [ div16s::return#2 div16s::return#6 div16s::return#0 div16s::resultu#0 ] ] with [ zp ZP_WORD:60 [ div16s::return#3 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:19 [ div16s::divisoru#3 div16s::divisoru#4 div16s::divisoru#5 div16u::divisor#2 div16u::divisor#0 div16u::divisor#1 ] ] with [ zp ZP_WORD:58 [ div16s::divisor#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:32 [ divr16u::quotient#3 divr16u::return#1 divr16u::quotient#1 divr16u::quotient#2 ] ] with [ zp ZP_WORD:76 [ divr16u::return#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:19 [ div16s::divisoru#3 div16s::divisoru#4 div16s::divisoru#5 div16u::divisor#2 div16u::divisor#0 div16u::divisor#1 div16s::divisor#0 ] ] with [ zp ZP_WORD:68 [ div16s::$7 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:70 [ div16u::return#2 ] ] with [ zp ZP_WORD:78 [ div16u::return#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:19 [ div16s::divisoru#3 div16s::divisoru#4 div16s::divisoru#5 div16u::divisor#2 div16u::divisor#0 div16u::divisor#1 div16s::divisor#0 div16s::$7 ] ] with [ zp ZP_WORD:74 [ divr16u::divisor#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:100 [ div16u::return#3 ] ] with [ zp ZP_WORD:102 [ test_16u::res#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:19 [ div16s::divisoru#3 div16s::divisoru#4 div16s::divisoru#5 div16u::divisor#2 div16u::divisor#0 div16u::divisor#1 div16s::divisor#0 div16s::$7 divr16u::divisor#0 ] ] with [ zp ZP_WORD:98 [ test_16u::divisor#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:7 [ print_sword::w#6 print_sword::w#5 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#4 print_sword::w#0 print_word::w#5 print_word::w#7 print_word::w#1 print_word::w#2 print_word::w#3 print_word::w#4 test_16s::dividend#0 ] ] with [ zp ZP_WORD:96 [ test_16u::dividend#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:22 [ div16s::return#2 div16s::return#6 div16s::return#0 div16s::resultu#0 ] ] with [ zp ZP_WORD:60 [ div16s::return#3 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:11 [ print_byte::b#7 print_byte::b#9 print_byte::b#1 print_byte::b#2 print_byte::b#3 print_byte::b#4 print_byte::b#5 print_byte::b#6 print_sbyte::b#6 print_sbyte::b#5 print_sbyte::b#1 print_sbyte::b#2 print_sbyte::b#3 print_sbyte::b#4 print_sbyte::b#0 test_8u::dividend#0 ] ] with [ zp ZP_BYTE:82 [ test_8s::dividend#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:22 [ div16s::return#2 div16s::return#6 div16s::return#0 div16s::resultu#0 div16s::return#3 ] ] with [ zp ZP_WORD:62 [ test_16s::res#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:17 [ div16s::dividendu#3 div16s::dividendu#7 div16s::dividendu#8 div16u::dividend#2 div16u::dividend#0 div16u::dividend#1 div16s::dividend#0 div16s::$2 ] ] with [ zp ZP_WORD:30 [ divr16u::dividend#2 divr16u::dividend#0 divr16u::dividend#1 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:22 [ div16s::return#2 div16s::return#6 div16s::return#0 div16s::resultu#0 div16s::return#3 test_16s::res#0 ] ] with [ zp ZP_WORD:70 [ div16u::return#2 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:19 [ div16s::divisoru#3 div16s::divisoru#4 div16s::divisoru#5 div16u::divisor#2 div16u::divisor#0 div16u::divisor#1 div16s::divisor#0 div16s::$7 ] ] with [ zp ZP_WORD:74 [ divr16u::divisor#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:22 [ div16s::return#2 div16s::return#6 div16s::return#0 div16s::resultu#0 div16s::return#3 test_16s::res#0 div16u::return#2 ] ] with [ zp ZP_WORD:78 [ div16u::return#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:19 [ div16s::divisoru#3 div16s::divisoru#4 div16s::divisoru#5 div16u::divisor#2 div16u::divisor#0 div16u::divisor#1 div16s::divisor#0 div16s::$7 divr16u::divisor#0 ] ] with [ zp ZP_WORD:98 [ test_16u::divisor#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:22 [ div16s::return#2 div16s::return#6 div16s::return#0 div16s::resultu#0 div16s::return#3 test_16s::res#0 div16u::return#2 div16u::return#0 ] ] with [ zp ZP_WORD:76 [ divr16u::return#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:22 [ div16s::return#2 div16s::return#6 div16s::return#0 div16s::resultu#0 div16s::return#3 ] ] with [ zp ZP_WORD:62 [ test_16s::res#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:22 [ div16s::return#2 div16s::return#6 div16s::return#0 div16s::resultu#0 div16s::return#3 test_16s::res#0 div16u::return#2 div16u::return#0 divr16u::return#0 ] ] with [ zp ZP_WORD:32 [ divr16u::quotient#3 divr16u::return#1 divr16u::quotient#1 divr16u::quotient#2 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:22 [ div16s::return#2 div16s::return#6 div16s::return#0 div16s::resultu#0 div16s::return#3 test_16s::res#0 ] ] with [ zp ZP_WORD:70 [ div16u::return#2 div16u::return#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:22 [ div16s::return#2 div16s::return#6 div16s::return#0 div16s::resultu#0 div16s::return#3 test_16s::res#0 div16u::return#2 div16u::return#0 divr16u::return#0 divr16u::quotient#3 divr16u::return#1 divr16u::quotient#1 divr16u::quotient#2 ] ] with [ zp ZP_WORD:100 [ div16u::return#3 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:22 [ div16s::return#2 div16s::return#6 div16s::return#0 div16s::resultu#0 div16s::return#3 test_16s::res#0 div16u::return#2 div16u::return#0 ] ] with [ zp ZP_WORD:32 [ divr16u::quotient#3 divr16u::return#1 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:22 [ div16s::return#2 div16s::return#6 div16s::return#0 div16s::resultu#0 div16s::return#3 test_16s::res#0 div16u::return#2 div16u::return#0 divr16u::return#0 divr16u::quotient#3 divr16u::return#1 divr16u::quotient#1 divr16u::quotient#2 div16u::return#3 ] ] with [ zp ZP_WORD:102 [ test_16u::res#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:22 [ div16s::return#2 div16s::return#6 div16s::return#0 div16s::resultu#0 div16s::return#3 test_16s::res#0 div16u::return#2 div16u::return#0 divr16u::quotient#3 divr16u::return#1 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#0 ] ] with [ zp ZP_WORD:100 [ div16u::return#3 test_16u::res#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:2 [ test_16s::i#10 test_16s::i#1 ] ] with [ zp ZP_BYTE:35 [ test_8s::i#10 test_8s::i#1 ] ]
|
Coalescing zero page register [ zp ZP_BYTE:2 [ test_16s::i#10 test_16s::i#1 ] ] with [ zp ZP_BYTE:35 [ test_8s::i#10 test_8s::i#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_BYTE:2 [ test_16s::i#10 test_16s::i#1 test_8s::i#10 test_8s::i#1 ] ] with [ zp ZP_BYTE:48 [ test_16u::i#10 test_16u::i#1 ] ]
|
Coalescing zero page register [ zp ZP_BYTE:2 [ test_16s::i#10 test_16s::i#1 test_8s::i#10 test_8s::i#1 ] ] with [ zp ZP_BYTE:48 [ test_16u::i#10 test_16u::i#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_BYTE:2 [ test_16s::i#10 test_16s::i#1 test_8s::i#10 test_8s::i#1 test_16u::i#10 test_16u::i#1 ] ] with [ zp ZP_BYTE:49 [ test_8u::i#10 test_8u::i#1 ] ]
|
Coalescing zero page register [ zp ZP_BYTE:2 [ test_16s::i#10 test_16s::i#1 test_8s::i#10 test_8s::i#1 test_16u::i#10 test_16u::i#1 ] ] with [ zp ZP_BYTE:49 [ test_8u::i#10 test_8u::i#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:3 [ rem16s#17 rem16s#3 rem16s#32 rem16s#1 ] ] with [ zp ZP_WORD:17 [ div16s::dividendu#3 div16s::dividendu#7 div16s::dividendu#8 div16u::dividend#2 div16u::dividend#0 div16u::dividend#1 divr16u::dividend#2 divr16u::dividend#0 divr16u::dividend#1 div16s::$2 ] ]
|
Coalescing zero page register [ zp ZP_WORD:3 [ rem16s#17 rem16s#3 rem16s#32 rem16s#1 ] ] with [ zp ZP_WORD:17 [ div16s::dividendu#3 div16s::dividendu#7 div16s::dividendu#8 div16u::dividend#2 div16u::dividend#0 div16u::dividend#1 div16s::dividend#0 div16s::$2 divr16u::dividend#2 divr16u::dividend#0 divr16u::dividend#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:3 [ rem16s#17 rem16s#3 rem16s#32 rem16s#1 div16s::dividendu#3 div16s::dividendu#7 div16s::dividendu#8 div16u::dividend#2 div16u::dividend#0 div16u::dividend#1 divr16u::dividend#2 divr16u::dividend#0 divr16u::dividend#1 div16s::$2 ] ] with [ zp ZP_WORD:50 [ print_cls::sc#2 print_cls::sc#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:3 [ rem16s#17 rem16s#3 rem16s#32 rem16s#1 div16s::dividendu#3 div16s::dividendu#7 div16s::dividendu#8 div16u::dividend#2 div16u::dividend#0 div16u::dividend#1 div16s::dividend#0 div16s::$2 divr16u::dividend#2 divr16u::dividend#0 divr16u::dividend#1 ] ] with [ zp ZP_WORD:50 [ print_cls::sc#2 print_cls::sc#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:7 [ print_sword::w#6 print_sword::w#5 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#4 print_sword::w#0 print_word::w#5 print_word::w#7 print_word::w#1 print_word::w#2 print_word::w#3 print_word::w#4 test_16s::dividend#0 div16s::dividend#0 test_16u::dividend#0 ] ] with [ zp ZP_WORD:15 [ print_str::str#13 print_str::str#15 print_str::str#0 ] ]
|
Coalescing zero page register [ zp ZP_WORD:7 [ print_sword::w#6 print_sword::w#5 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#4 print_sword::w#0 print_word::w#5 print_word::w#7 print_word::w#1 print_word::w#2 print_word::w#3 print_word::w#4 test_16s::dividend#0 test_16u::dividend#0 ] ] with [ zp ZP_WORD:15 [ print_str::str#13 print_str::str#15 print_str::str#0 ] ]
|
||||||
Coalescing zero page register [ zp ZP_BYTE:40 [ div8s::neg#4 div8s::neg#3 div8s::neg#2 ] ] with [ zp ZP_BYTE:87 [ test_8s::res#0 ] ]
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Coalescing zero page register [ zp ZP_BYTE:40 [ div8s::neg#4 div8s::neg#3 div8s::neg#2 ] ] with [ zp ZP_BYTE:87 [ test_8s::res#0 ] ]
|
||||||
Coalescing zero page register [ zp ZP_BYTE:40 [ div8s::neg#4 div8s::neg#3 div8s::neg#2 test_8s::res#0 ] ] with [ zp ZP_BYTE:105 [ test_8u::divisor#0 ] ]
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Coalescing zero page register [ zp ZP_BYTE:40 [ div8s::neg#4 div8s::neg#3 div8s::neg#2 test_8s::res#0 ] ] with [ zp ZP_BYTE:105 [ test_8u::divisor#0 ] ]
|
||||||
Allocated (was zp ZP_BYTE:11) zp ZP_BYTE:9 [ print_byte::b#7 print_byte::b#9 print_byte::b#1 print_byte::b#2 print_byte::b#3 print_byte::b#4 print_byte::b#5 print_byte::b#6 print_sbyte::b#6 print_sbyte::b#5 print_sbyte::b#1 print_sbyte::b#2 print_sbyte::b#3 print_sbyte::b#4 print_sbyte::b#0 test_8s::dividend#0 test_8u::dividend#0 ]
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Allocated (was zp ZP_BYTE:11) zp ZP_BYTE:9 [ print_byte::b#7 print_byte::b#9 print_byte::b#1 print_byte::b#2 print_byte::b#3 print_byte::b#4 print_byte::b#5 print_byte::b#6 print_sbyte::b#6 print_sbyte::b#5 print_sbyte::b#1 print_sbyte::b#2 print_sbyte::b#3 print_sbyte::b#4 print_sbyte::b#0 test_8u::dividend#0 test_8s::dividend#0 ]
|
||||||
Allocated (was zp ZP_WORD:13) zp ZP_WORD:10 [ char_cursor#80 char_cursor#133 char_cursor#130 char_cursor#132 char_cursor#128 char_cursor#129 char_cursor#155 char_cursor#126 char_cursor#17 char_cursor#162 char_cursor#135 char_cursor#131 char_cursor#1 char_cursor#179 char_cursor#185 ]
|
Allocated (was zp ZP_WORD:13) zp ZP_WORD:10 [ char_cursor#80 char_cursor#133 char_cursor#130 char_cursor#132 char_cursor#128 char_cursor#129 char_cursor#155 char_cursor#126 char_cursor#17 char_cursor#162 char_cursor#135 char_cursor#131 char_cursor#1 char_cursor#179 char_cursor#185 ]
|
||||||
Allocated (was zp ZP_WORD:19) zp ZP_WORD:12 [ div16s::divisoru#3 div16s::divisoru#4 div16s::divisoru#5 div16u::divisor#2 div16u::divisor#0 div16u::divisor#1 div16s::divisor#0 div16s::$7 divr16u::divisor#0 test_16u::divisor#0 ]
|
Allocated (was zp ZP_WORD:19) zp ZP_WORD:12 [ div16s::divisoru#3 div16s::divisoru#4 div16s::divisoru#5 div16u::divisor#2 div16u::divisor#0 div16u::divisor#1 div16s::divisor#0 div16s::$7 divr16u::divisor#0 test_16u::divisor#0 ]
|
||||||
Allocated (was zp ZP_WORD:22) zp ZP_WORD:14 [ div16s::return#2 div16s::return#6 div16s::return#0 div16s::resultu#0 div16s::return#3 test_16s::res#0 div16u::return#2 div16u::return#0 divr16u::return#0 divr16u::quotient#3 divr16u::return#1 divr16u::quotient#1 divr16u::quotient#2 div16u::return#3 test_16u::res#0 ]
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Allocated (was zp ZP_WORD:22) zp ZP_WORD:14 [ div16s::return#2 div16s::return#6 div16s::return#0 div16s::resultu#0 div16s::return#3 test_16s::res#0 div16u::return#2 div16u::return#0 divr16u::quotient#3 divr16u::return#1 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#0 div16u::return#3 test_16u::res#0 ]
|
||||||
Allocated (was zp ZP_WORD:28) zp ZP_WORD:16 [ divr16u::rem#4 rem16u#31 divr16u::rem#10 rem16u#35 divr16u::rem#5 divr16u::rem#1 divr16u::rem#2 divr16u::rem#3 ]
|
Allocated (was zp ZP_WORD:28) zp ZP_WORD:16 [ divr16u::rem#4 rem16u#31 divr16u::rem#10 rem16u#35 divr16u::rem#5 divr16u::rem#1 divr16u::rem#2 divr16u::rem#3 ]
|
||||||
Allocated (was zp ZP_BYTE:40) zp ZP_BYTE:18 [ div8s::neg#4 div8s::neg#3 div8s::neg#2 test_8s::res#0 test_8u::divisor#0 ]
|
Allocated (was zp ZP_BYTE:40) zp ZP_BYTE:18 [ div8s::neg#4 div8s::neg#3 div8s::neg#2 test_8s::res#0 test_8u::divisor#0 ]
|
||||||
Allocated (was zp ZP_BYTE:44) zp ZP_BYTE:19 [ divr8u::rem#4 rem8u#31 divr8u::rem#10 rem8u#36 divr8u::rem#5 divr8u::rem#1 divr8u::rem#2 divr8u::rem#3 ]
|
Allocated (was zp ZP_BYTE:44) zp ZP_BYTE:19 [ divr8u::rem#4 rem8u#31 divr8u::rem#10 rem8u#36 divr8u::rem#5 divr8u::rem#1 divr8u::rem#2 divr8u::rem#3 ]
|
||||||
@ -9330,8 +9330,11 @@ test_16s: {
|
|||||||
sta divisor
|
sta divisor
|
||||||
lda divisors+1,y
|
lda divisors+1,y
|
||||||
sta divisor+1
|
sta divisor+1
|
||||||
//SEG40 [19] (signed word) div16s::dividend#0 ← (signed word) test_16s::dividend#0 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 div16s::dividend#0 line_cursor#1 divr16u::rem#10 ] ( main:2::test_16s:13 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 div16s::dividend#0 line_cursor#1 divr16u::rem#10 ] )
|
//SEG40 [19] (signed word) div16s::dividend#0 ← (signed word) test_16s::dividend#0 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 div16s::dividend#0 line_cursor#1 divr16u::rem#10 ] ( main:2::test_16s:13 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 div16s::dividend#0 line_cursor#1 divr16u::rem#10 ] ) -- vwsz1=vwsz2
|
||||||
// (signed word) div16s::dividend#0 = (signed word) test_16s::dividend#0 // register copy zp ZP_WORD:7
|
lda dividend
|
||||||
|
sta div16s.dividend
|
||||||
|
lda dividend+1
|
||||||
|
sta div16s.dividend+1
|
||||||
//SEG41 [20] (signed word) div16s::divisor#0 ← (signed word) test_16s::divisor#0 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 div16s::dividend#0 div16s::divisor#0 line_cursor#1 divr16u::rem#10 ] ( main:2::test_16s:13 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 div16s::dividend#0 div16s::divisor#0 line_cursor#1 divr16u::rem#10 ] ) -- vwsz1=vwsz2
|
//SEG41 [20] (signed word) div16s::divisor#0 ← (signed word) test_16s::divisor#0 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 div16s::dividend#0 div16s::divisor#0 line_cursor#1 divr16u::rem#10 ] ( main:2::test_16s:13 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 div16s::dividend#0 div16s::divisor#0 line_cursor#1 divr16u::rem#10 ] ) -- vwsz1=vwsz2
|
||||||
lda divisor
|
lda divisor
|
||||||
sta div16s.divisor
|
sta div16s.divisor
|
||||||
@ -9693,7 +9696,7 @@ div16s: {
|
|||||||
.label _7 = $c
|
.label _7 = $c
|
||||||
.label resultu = $e
|
.label resultu = $e
|
||||||
.label return = $e
|
.label return = $e
|
||||||
.label dividend = 7
|
.label dividend = 3
|
||||||
.label divisor = $c
|
.label divisor = $c
|
||||||
.label dividendu = 3
|
.label dividendu = 3
|
||||||
.label divisoru = $c
|
.label divisoru = $c
|
||||||
@ -9703,13 +9706,13 @@ div16s: {
|
|||||||
jmp b7
|
jmp b7
|
||||||
//SEG173 div16s::@7
|
//SEG173 div16s::@7
|
||||||
b7:
|
b7:
|
||||||
//SEG174 [84] (signed word~) div16s::$2 ← - (signed word) div16s::dividend#0 [ div16s::divisor#0 div16s::$2 divr16u::rem#10 ] ( main:2::test_16s:13::div16s:21 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 line_cursor#1 div16s::divisor#0 div16s::$2 divr16u::rem#10 ] ) -- vwsz1=_neg_vwsz2
|
//SEG174 [84] (signed word~) div16s::$2 ← - (signed word) div16s::dividend#0 [ div16s::divisor#0 div16s::$2 divr16u::rem#10 ] ( main:2::test_16s:13::div16s:21 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 line_cursor#1 div16s::divisor#0 div16s::$2 divr16u::rem#10 ] ) -- vwsz1=_neg_vwsz1
|
||||||
sec
|
sec
|
||||||
lda dividend
|
lda _2
|
||||||
eor #$ff
|
eor #$ff
|
||||||
adc #0
|
adc #0
|
||||||
sta _2
|
sta _2
|
||||||
lda dividend+1
|
lda _2+1
|
||||||
eor #$ff
|
eor #$ff
|
||||||
adc #0
|
adc #0
|
||||||
sta _2+1
|
sta _2+1
|
||||||
@ -9824,11 +9827,8 @@ div16s: {
|
|||||||
jmp b4_from_b17
|
jmp b4_from_b17
|
||||||
//SEG213 div16s::@16
|
//SEG213 div16s::@16
|
||||||
b16:
|
b16:
|
||||||
//SEG214 [105] (word~) div16s::dividendu#7 ← (word)(signed word) div16s::dividend#0 [ div16s::divisor#0 div16s::dividendu#7 divr16u::rem#10 ] ( main:2::test_16s:13::div16s:21 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 line_cursor#1 div16s::divisor#0 div16s::dividendu#7 divr16u::rem#10 ] ) -- vwuz1=vwuz2
|
//SEG214 [105] (word~) div16s::dividendu#7 ← (word)(signed word) div16s::dividend#0 [ div16s::divisor#0 div16s::dividendu#7 divr16u::rem#10 ] ( main:2::test_16s:13::div16s:21 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 line_cursor#1 div16s::divisor#0 div16s::dividendu#7 divr16u::rem#10 ] )
|
||||||
lda dividend
|
// (word~) div16s::dividendu#7 = (word)(signed word) div16s::dividend#0 // register copy zp ZP_WORD:3
|
||||||
sta dividendu
|
|
||||||
lda dividend+1
|
|
||||||
sta dividendu+1
|
|
||||||
//SEG215 [86] phi from div16s::@16 to div16s::@2 [phi:div16s::@16->div16s::@2]
|
//SEG215 [86] phi from div16s::@16 to div16s::@2 [phi:div16s::@16->div16s::@2]
|
||||||
b2_from_b16:
|
b2_from_b16:
|
||||||
//SEG216 [86] phi (word) div16s::dividendu#3 = (word~) div16s::dividendu#7 [phi:div16s::@16->div16s::@2#0] -- register_copy
|
//SEG216 [86] phi (word) div16s::dividendu#3 = (word~) div16s::dividendu#7 [phi:div16s::@16->div16s::@2#0] -- register_copy
|
||||||
@ -11178,7 +11178,7 @@ Succesful ASM optimization Pass5UnusedLabelElimination
|
|||||||
Removing unreachable instruction jmp b4
|
Removing unreachable instruction jmp b4
|
||||||
Removing unreachable instruction jmp b4
|
Removing unreachable instruction jmp b4
|
||||||
Succesful ASM optimization Pass5UnreachableCodeElimination
|
Succesful ASM optimization Pass5UnreachableCodeElimination
|
||||||
Fixing long branch [83] bne b1 to beq
|
Fixing long branch [87] bne b1 to beq
|
||||||
|
|
||||||
FINAL SYMBOL TABLE
|
FINAL SYMBOL TABLE
|
||||||
(label) @21
|
(label) @21
|
||||||
@ -11216,7 +11216,7 @@ FINAL SYMBOL TABLE
|
|||||||
(label) div16s::@9
|
(label) div16s::@9
|
||||||
(label) div16s::@return
|
(label) div16s::@return
|
||||||
(signed word) div16s::dividend
|
(signed word) div16s::dividend
|
||||||
(signed word) div16s::dividend#0 dividend zp ZP_WORD:7 5.0
|
(signed word) div16s::dividend#0 dividend zp ZP_WORD:3 5.0
|
||||||
(word) div16s::dividendu
|
(word) div16s::dividendu
|
||||||
(word) div16s::dividendu#3 dividendu zp ZP_WORD:3 0.8571428571428571
|
(word) div16s::dividendu#3 dividendu zp ZP_WORD:3 0.8571428571428571
|
||||||
(word~) div16s::dividendu#7 dividendu zp ZP_WORD:3 4.0
|
(word~) div16s::dividendu#7 dividendu zp ZP_WORD:3 4.0
|
||||||
@ -11584,15 +11584,15 @@ FINAL SYMBOL TABLE
|
|||||||
(const string) test_8u::str2 str2 = (string) " @"
|
(const string) test_8u::str2 str2 = (string) " @"
|
||||||
|
|
||||||
zp ZP_BYTE:2 [ test_16s::i#10 test_16s::i#1 test_8s::i#10 test_8s::i#1 test_16u::i#10 test_16u::i#1 test_8u::i#10 test_8u::i#1 ]
|
zp ZP_BYTE:2 [ test_16s::i#10 test_16s::i#1 test_8s::i#10 test_8s::i#1 test_16u::i#10 test_16u::i#1 test_8u::i#10 test_8u::i#1 ]
|
||||||
zp ZP_WORD:3 [ rem16s#17 rem16s#3 rem16s#32 rem16s#1 div16s::dividendu#3 div16s::dividendu#7 div16s::dividendu#8 div16u::dividend#2 div16u::dividend#0 div16u::dividend#1 divr16u::dividend#2 divr16u::dividend#0 divr16u::dividend#1 div16s::$2 print_cls::sc#2 print_cls::sc#1 ]
|
zp ZP_WORD:3 [ rem16s#17 rem16s#3 rem16s#32 rem16s#1 div16s::dividendu#3 div16s::dividendu#7 div16s::dividendu#8 div16u::dividend#2 div16u::dividend#0 div16u::dividend#1 div16s::dividend#0 div16s::$2 divr16u::dividend#2 divr16u::dividend#0 divr16u::dividend#1 print_cls::sc#2 print_cls::sc#1 ]
|
||||||
zp ZP_WORD:5 [ line_cursor#20 line_cursor#39 line_cursor#1 line_cursor#41 ]
|
zp ZP_WORD:5 [ line_cursor#20 line_cursor#39 line_cursor#1 line_cursor#41 ]
|
||||||
zp ZP_WORD:7 [ print_sword::w#6 print_sword::w#5 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#4 print_sword::w#0 print_word::w#5 print_word::w#7 print_word::w#1 print_word::w#2 print_word::w#3 print_word::w#4 test_16s::dividend#0 div16s::dividend#0 test_16u::dividend#0 print_str::str#13 print_str::str#15 print_str::str#0 ]
|
zp ZP_WORD:7 [ print_sword::w#6 print_sword::w#5 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#4 print_sword::w#0 print_word::w#5 print_word::w#7 print_word::w#1 print_word::w#2 print_word::w#3 print_word::w#4 test_16s::dividend#0 test_16u::dividend#0 print_str::str#13 print_str::str#15 print_str::str#0 ]
|
||||||
zp ZP_BYTE:9 [ print_byte::b#7 print_byte::b#9 print_byte::b#1 print_byte::b#2 print_byte::b#3 print_byte::b#4 print_byte::b#5 print_byte::b#6 print_sbyte::b#6 print_sbyte::b#5 print_sbyte::b#1 print_sbyte::b#2 print_sbyte::b#3 print_sbyte::b#4 print_sbyte::b#0 test_8s::dividend#0 test_8u::dividend#0 ]
|
zp ZP_BYTE:9 [ print_byte::b#7 print_byte::b#9 print_byte::b#1 print_byte::b#2 print_byte::b#3 print_byte::b#4 print_byte::b#5 print_byte::b#6 print_sbyte::b#6 print_sbyte::b#5 print_sbyte::b#1 print_sbyte::b#2 print_sbyte::b#3 print_sbyte::b#4 print_sbyte::b#0 test_8u::dividend#0 test_8s::dividend#0 ]
|
||||||
reg byte a [ print_char::ch#4 print_char::ch#2 print_char::ch#3 ]
|
reg byte a [ print_char::ch#4 print_char::ch#2 print_char::ch#3 ]
|
||||||
zp ZP_WORD:10 [ char_cursor#80 char_cursor#133 char_cursor#130 char_cursor#132 char_cursor#128 char_cursor#129 char_cursor#155 char_cursor#126 char_cursor#17 char_cursor#162 char_cursor#135 char_cursor#131 char_cursor#1 char_cursor#179 char_cursor#185 ]
|
zp ZP_WORD:10 [ char_cursor#80 char_cursor#133 char_cursor#130 char_cursor#132 char_cursor#128 char_cursor#129 char_cursor#155 char_cursor#126 char_cursor#17 char_cursor#162 char_cursor#135 char_cursor#131 char_cursor#1 char_cursor#179 char_cursor#185 ]
|
||||||
zp ZP_WORD:12 [ div16s::divisoru#3 div16s::divisoru#4 div16s::divisoru#5 div16u::divisor#2 div16u::divisor#0 div16u::divisor#1 div16s::divisor#0 div16s::$7 divr16u::divisor#0 test_16u::divisor#0 ]
|
zp ZP_WORD:12 [ div16s::divisoru#3 div16s::divisoru#4 div16s::divisoru#5 div16u::divisor#2 div16u::divisor#0 div16u::divisor#1 div16s::divisor#0 div16s::$7 divr16u::divisor#0 test_16u::divisor#0 ]
|
||||||
reg byte y [ div16s::neg#4 div16s::neg#3 div16s::neg#2 ]
|
reg byte y [ div16s::neg#4 div16s::neg#3 div16s::neg#2 ]
|
||||||
zp ZP_WORD:14 [ div16s::return#2 div16s::return#6 div16s::return#0 div16s::resultu#0 div16s::return#3 test_16s::res#0 div16u::return#2 div16u::return#0 divr16u::return#0 divr16u::quotient#3 divr16u::return#1 divr16u::quotient#1 divr16u::quotient#2 div16u::return#3 test_16u::res#0 ]
|
zp ZP_WORD:14 [ div16s::return#2 div16s::return#6 div16s::return#0 div16s::resultu#0 div16s::return#3 test_16s::res#0 div16u::return#2 div16u::return#0 divr16u::quotient#3 divr16u::return#1 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#0 div16u::return#3 test_16u::res#0 ]
|
||||||
zp ZP_WORD:16 [ divr16u::rem#4 rem16u#31 divr16u::rem#10 rem16u#35 divr16u::rem#5 divr16u::rem#1 divr16u::rem#2 divr16u::rem#3 ]
|
zp ZP_WORD:16 [ divr16u::rem#4 rem16u#31 divr16u::rem#10 rem16u#35 divr16u::rem#5 divr16u::rem#1 divr16u::rem#2 divr16u::rem#3 ]
|
||||||
reg byte x [ divr16u::i#2 divr16u::i#1 ]
|
reg byte x [ divr16u::i#2 divr16u::i#1 ]
|
||||||
reg byte x [ rem8s#18 rem8s#3 rem8s#33 rem8s#1 ]
|
reg byte x [ rem8s#18 rem8s#3 rem8s#33 rem8s#1 ]
|
||||||
@ -11628,7 +11628,7 @@ reg byte x [ test_8u::res#0 ]
|
|||||||
|
|
||||||
|
|
||||||
FINAL ASSEMBLER
|
FINAL ASSEMBLER
|
||||||
Score: 33566
|
Score: 33674
|
||||||
|
|
||||||
//SEG0 Basic Upstart
|
//SEG0 Basic Upstart
|
||||||
.pc = $801 "Basic"
|
.pc = $801 "Basic"
|
||||||
@ -11707,8 +11707,11 @@ test_16s: {
|
|||||||
sta divisor
|
sta divisor
|
||||||
lda divisors+1,y
|
lda divisors+1,y
|
||||||
sta divisor+1
|
sta divisor+1
|
||||||
//SEG40 [19] (signed word) div16s::dividend#0 ← (signed word) test_16s::dividend#0 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 div16s::dividend#0 line_cursor#1 divr16u::rem#10 ] ( main:2::test_16s:13 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 div16s::dividend#0 line_cursor#1 divr16u::rem#10 ] )
|
//SEG40 [19] (signed word) div16s::dividend#0 ← (signed word) test_16s::dividend#0 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 div16s::dividend#0 line_cursor#1 divr16u::rem#10 ] ( main:2::test_16s:13 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 div16s::dividend#0 line_cursor#1 divr16u::rem#10 ] ) -- vwsz1=vwsz2
|
||||||
// (signed word) div16s::dividend#0 = (signed word) test_16s::dividend#0 // register copy zp ZP_WORD:7
|
lda dividend
|
||||||
|
sta div16s.dividend
|
||||||
|
lda dividend+1
|
||||||
|
sta div16s.dividend+1
|
||||||
//SEG41 [20] (signed word) div16s::divisor#0 ← (signed word) test_16s::divisor#0 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 div16s::dividend#0 div16s::divisor#0 line_cursor#1 divr16u::rem#10 ] ( main:2::test_16s:13 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 div16s::dividend#0 div16s::divisor#0 line_cursor#1 divr16u::rem#10 ] ) -- vwsz1=vwsz2
|
//SEG41 [20] (signed word) div16s::divisor#0 ← (signed word) test_16s::divisor#0 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 div16s::dividend#0 div16s::divisor#0 line_cursor#1 divr16u::rem#10 ] ( main:2::test_16s:13 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 div16s::dividend#0 div16s::divisor#0 line_cursor#1 divr16u::rem#10 ] ) -- vwsz1=vwsz2
|
||||||
lda divisor
|
lda divisor
|
||||||
sta div16s.divisor
|
sta div16s.divisor
|
||||||
@ -12002,7 +12005,7 @@ div16s: {
|
|||||||
.label _7 = $c
|
.label _7 = $c
|
||||||
.label resultu = $e
|
.label resultu = $e
|
||||||
.label return = $e
|
.label return = $e
|
||||||
.label dividend = 7
|
.label dividend = 3
|
||||||
.label divisor = $c
|
.label divisor = $c
|
||||||
.label dividendu = 3
|
.label dividendu = 3
|
||||||
.label divisoru = $c
|
.label divisoru = $c
|
||||||
@ -12010,13 +12013,13 @@ div16s: {
|
|||||||
lda dividend+1
|
lda dividend+1
|
||||||
bpl b16
|
bpl b16
|
||||||
//SEG173 div16s::@7
|
//SEG173 div16s::@7
|
||||||
//SEG174 [84] (signed word~) div16s::$2 ← - (signed word) div16s::dividend#0 [ div16s::divisor#0 div16s::$2 divr16u::rem#10 ] ( main:2::test_16s:13::div16s:21 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 line_cursor#1 div16s::divisor#0 div16s::$2 divr16u::rem#10 ] ) -- vwsz1=_neg_vwsz2
|
//SEG174 [84] (signed word~) div16s::$2 ← - (signed word) div16s::dividend#0 [ div16s::divisor#0 div16s::$2 divr16u::rem#10 ] ( main:2::test_16s:13::div16s:21 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 line_cursor#1 div16s::divisor#0 div16s::$2 divr16u::rem#10 ] ) -- vwsz1=_neg_vwsz1
|
||||||
sec
|
sec
|
||||||
lda dividend
|
lda _2
|
||||||
eor #$ff
|
eor #$ff
|
||||||
adc #0
|
adc #0
|
||||||
sta _2
|
sta _2
|
||||||
lda dividend+1
|
lda _2+1
|
||||||
eor #$ff
|
eor #$ff
|
||||||
adc #0
|
adc #0
|
||||||
sta _2+1
|
sta _2+1
|
||||||
@ -12114,11 +12117,8 @@ div16s: {
|
|||||||
// (word~) div16s::divisoru#4 = (word)(signed word) div16s::divisor#0 // register copy zp ZP_WORD:12
|
// (word~) div16s::divisoru#4 = (word)(signed word) div16s::divisor#0 // register copy zp ZP_WORD:12
|
||||||
//SEG213 div16s::@16
|
//SEG213 div16s::@16
|
||||||
b16:
|
b16:
|
||||||
//SEG214 [105] (word~) div16s::dividendu#7 ← (word)(signed word) div16s::dividend#0 [ div16s::divisor#0 div16s::dividendu#7 divr16u::rem#10 ] ( main:2::test_16s:13::div16s:21 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 line_cursor#1 div16s::divisor#0 div16s::dividendu#7 divr16u::rem#10 ] ) -- vwuz1=vwuz2
|
//SEG214 [105] (word~) div16s::dividendu#7 ← (word)(signed word) div16s::dividend#0 [ div16s::divisor#0 div16s::dividendu#7 divr16u::rem#10 ] ( main:2::test_16s:13::div16s:21 [ test_16s::i#10 test_16s::dividend#0 test_16s::divisor#0 line_cursor#1 div16s::divisor#0 div16s::dividendu#7 divr16u::rem#10 ] )
|
||||||
lda dividend
|
// (word~) div16s::dividendu#7 = (word)(signed word) div16s::dividend#0 // register copy zp ZP_WORD:3
|
||||||
sta dividendu
|
|
||||||
lda dividend+1
|
|
||||||
sta dividendu+1
|
|
||||||
//SEG215 [86] phi from div16s::@16 to div16s::@2 [phi:div16s::@16->div16s::@2]
|
//SEG215 [86] phi from div16s::@16 to div16s::@2 [phi:div16s::@16->div16s::@2]
|
||||||
//SEG216 [86] phi (word) div16s::dividendu#3 = (word~) div16s::dividendu#7 [phi:div16s::@16->div16s::@2#0] -- register_copy
|
//SEG216 [86] phi (word) div16s::dividendu#3 = (word~) div16s::dividendu#7 [phi:div16s::@16->div16s::@2#0] -- register_copy
|
||||||
//SEG217 [86] phi (byte) div16s::neg#3 = (byte/signed byte/word/signed word/dword/signed dword) 0 [phi:div16s::@16->div16s::@2#1] -- vbuyy=vbuc1
|
//SEG217 [86] phi (byte) div16s::neg#3 = (byte/signed byte/word/signed word/dword/signed dword) 0 [phi:div16s::@16->div16s::@2#1] -- vbuyy=vbuc1
|
||||||
|
@ -33,7 +33,7 @@
|
|||||||
(label) div16s::@9
|
(label) div16s::@9
|
||||||
(label) div16s::@return
|
(label) div16s::@return
|
||||||
(signed word) div16s::dividend
|
(signed word) div16s::dividend
|
||||||
(signed word) div16s::dividend#0 dividend zp ZP_WORD:7 5.0
|
(signed word) div16s::dividend#0 dividend zp ZP_WORD:3 5.0
|
||||||
(word) div16s::dividendu
|
(word) div16s::dividendu
|
||||||
(word) div16s::dividendu#3 dividendu zp ZP_WORD:3 0.8571428571428571
|
(word) div16s::dividendu#3 dividendu zp ZP_WORD:3 0.8571428571428571
|
||||||
(word~) div16s::dividendu#7 dividendu zp ZP_WORD:3 4.0
|
(word~) div16s::dividendu#7 dividendu zp ZP_WORD:3 4.0
|
||||||
@ -401,15 +401,15 @@
|
|||||||
(const string) test_8u::str2 str2 = (string) " @"
|
(const string) test_8u::str2 str2 = (string) " @"
|
||||||
|
|
||||||
zp ZP_BYTE:2 [ test_16s::i#10 test_16s::i#1 test_8s::i#10 test_8s::i#1 test_16u::i#10 test_16u::i#1 test_8u::i#10 test_8u::i#1 ]
|
zp ZP_BYTE:2 [ test_16s::i#10 test_16s::i#1 test_8s::i#10 test_8s::i#1 test_16u::i#10 test_16u::i#1 test_8u::i#10 test_8u::i#1 ]
|
||||||
zp ZP_WORD:3 [ rem16s#17 rem16s#3 rem16s#32 rem16s#1 div16s::dividendu#3 div16s::dividendu#7 div16s::dividendu#8 div16u::dividend#2 div16u::dividend#0 div16u::dividend#1 divr16u::dividend#2 divr16u::dividend#0 divr16u::dividend#1 div16s::$2 print_cls::sc#2 print_cls::sc#1 ]
|
zp ZP_WORD:3 [ rem16s#17 rem16s#3 rem16s#32 rem16s#1 div16s::dividendu#3 div16s::dividendu#7 div16s::dividendu#8 div16u::dividend#2 div16u::dividend#0 div16u::dividend#1 div16s::dividend#0 div16s::$2 divr16u::dividend#2 divr16u::dividend#0 divr16u::dividend#1 print_cls::sc#2 print_cls::sc#1 ]
|
||||||
zp ZP_WORD:5 [ line_cursor#20 line_cursor#39 line_cursor#1 line_cursor#41 ]
|
zp ZP_WORD:5 [ line_cursor#20 line_cursor#39 line_cursor#1 line_cursor#41 ]
|
||||||
zp ZP_WORD:7 [ print_sword::w#6 print_sword::w#5 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#4 print_sword::w#0 print_word::w#5 print_word::w#7 print_word::w#1 print_word::w#2 print_word::w#3 print_word::w#4 test_16s::dividend#0 div16s::dividend#0 test_16u::dividend#0 print_str::str#13 print_str::str#15 print_str::str#0 ]
|
zp ZP_WORD:7 [ print_sword::w#6 print_sword::w#5 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#4 print_sword::w#0 print_word::w#5 print_word::w#7 print_word::w#1 print_word::w#2 print_word::w#3 print_word::w#4 test_16s::dividend#0 test_16u::dividend#0 print_str::str#13 print_str::str#15 print_str::str#0 ]
|
||||||
zp ZP_BYTE:9 [ print_byte::b#7 print_byte::b#9 print_byte::b#1 print_byte::b#2 print_byte::b#3 print_byte::b#4 print_byte::b#5 print_byte::b#6 print_sbyte::b#6 print_sbyte::b#5 print_sbyte::b#1 print_sbyte::b#2 print_sbyte::b#3 print_sbyte::b#4 print_sbyte::b#0 test_8s::dividend#0 test_8u::dividend#0 ]
|
zp ZP_BYTE:9 [ print_byte::b#7 print_byte::b#9 print_byte::b#1 print_byte::b#2 print_byte::b#3 print_byte::b#4 print_byte::b#5 print_byte::b#6 print_sbyte::b#6 print_sbyte::b#5 print_sbyte::b#1 print_sbyte::b#2 print_sbyte::b#3 print_sbyte::b#4 print_sbyte::b#0 test_8u::dividend#0 test_8s::dividend#0 ]
|
||||||
reg byte a [ print_char::ch#4 print_char::ch#2 print_char::ch#3 ]
|
reg byte a [ print_char::ch#4 print_char::ch#2 print_char::ch#3 ]
|
||||||
zp ZP_WORD:10 [ char_cursor#80 char_cursor#133 char_cursor#130 char_cursor#132 char_cursor#128 char_cursor#129 char_cursor#155 char_cursor#126 char_cursor#17 char_cursor#162 char_cursor#135 char_cursor#131 char_cursor#1 char_cursor#179 char_cursor#185 ]
|
zp ZP_WORD:10 [ char_cursor#80 char_cursor#133 char_cursor#130 char_cursor#132 char_cursor#128 char_cursor#129 char_cursor#155 char_cursor#126 char_cursor#17 char_cursor#162 char_cursor#135 char_cursor#131 char_cursor#1 char_cursor#179 char_cursor#185 ]
|
||||||
zp ZP_WORD:12 [ div16s::divisoru#3 div16s::divisoru#4 div16s::divisoru#5 div16u::divisor#2 div16u::divisor#0 div16u::divisor#1 div16s::divisor#0 div16s::$7 divr16u::divisor#0 test_16u::divisor#0 ]
|
zp ZP_WORD:12 [ div16s::divisoru#3 div16s::divisoru#4 div16s::divisoru#5 div16u::divisor#2 div16u::divisor#0 div16u::divisor#1 div16s::divisor#0 div16s::$7 divr16u::divisor#0 test_16u::divisor#0 ]
|
||||||
reg byte y [ div16s::neg#4 div16s::neg#3 div16s::neg#2 ]
|
reg byte y [ div16s::neg#4 div16s::neg#3 div16s::neg#2 ]
|
||||||
zp ZP_WORD:14 [ div16s::return#2 div16s::return#6 div16s::return#0 div16s::resultu#0 div16s::return#3 test_16s::res#0 div16u::return#2 div16u::return#0 divr16u::return#0 divr16u::quotient#3 divr16u::return#1 divr16u::quotient#1 divr16u::quotient#2 div16u::return#3 test_16u::res#0 ]
|
zp ZP_WORD:14 [ div16s::return#2 div16s::return#6 div16s::return#0 div16s::resultu#0 div16s::return#3 test_16s::res#0 div16u::return#2 div16u::return#0 divr16u::quotient#3 divr16u::return#1 divr16u::quotient#1 divr16u::quotient#2 divr16u::return#0 div16u::return#3 test_16u::res#0 ]
|
||||||
zp ZP_WORD:16 [ divr16u::rem#4 rem16u#31 divr16u::rem#10 rem16u#35 divr16u::rem#5 divr16u::rem#1 divr16u::rem#2 divr16u::rem#3 ]
|
zp ZP_WORD:16 [ divr16u::rem#4 rem16u#31 divr16u::rem#10 rem16u#35 divr16u::rem#5 divr16u::rem#1 divr16u::rem#2 divr16u::rem#3 ]
|
||||||
reg byte x [ divr16u::i#2 divr16u::i#1 ]
|
reg byte x [ divr16u::i#2 divr16u::i#1 ]
|
||||||
reg byte x [ rem8s#18 rem8s#3 rem8s#33 rem8s#1 ]
|
reg byte x [ rem8s#18 rem8s#3 rem8s#33 rem8s#1 ]
|
||||||
|
@ -2686,10 +2686,10 @@ Uplifting [print_cls] best 8895 combination zp ZP_WORD:14 [ print_cls::sc#2 prin
|
|||||||
Uplifting [print_char] best 8868 combination reg byte a [ print_char::ch#8 print_char::ch#0 print_char::ch#1 ]
|
Uplifting [print_char] best 8868 combination reg byte a [ print_char::ch#8 print_char::ch#0 print_char::ch#1 ]
|
||||||
Uplifting [print_dword] best 8868 combination zp ZP_DWORD:32 [ print_dword::dw#0 ]
|
Uplifting [print_dword] best 8868 combination zp ZP_DWORD:32 [ print_dword::dw#0 ]
|
||||||
Uplifting [print_ln] best 8868 combination
|
Uplifting [print_ln] best 8868 combination
|
||||||
Coalescing zero page register [ zp ZP_WORD:16 [ main::$2 ] ] with [ zp ZP_WORD:18 [ main::$32 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:16 [ main::$2 ] ] with [ zp ZP_WORD:18 [ main::$32 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:20 [ main::dw2#1 ] ] with [ zp ZP_DWORD:28 [ main::dw2#10 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_DWORD:20 [ main::dw2#1 ] ] with [ zp ZP_DWORD:28 [ main::dw2#10 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:20 [ main::dw2#1 main::dw2#10 ] ] with [ zp ZP_DWORD:32 [ print_dword::dw#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:24 [ main::$5 ] ] with [ zp ZP_WORD:26 [ main::$33 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:24 [ main::$5 ] ] with [ zp ZP_WORD:26 [ main::$33 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_DWORD:20 [ main::dw2#1 main::dw2#10 ] ] with [ zp ZP_DWORD:32 [ print_dword::dw#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:6 [ line_cursor#9 line_cursor#19 line_cursor#1 ] ] with [ zp ZP_WORD:14 [ print_cls::sc#2 print_cls::sc#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:6 [ line_cursor#9 line_cursor#19 line_cursor#1 ] ] with [ zp ZP_WORD:14 [ print_cls::sc#2 print_cls::sc#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:12 [ print_word::w#4 print_word::w#2 print_word::w#3 print_word::w#0 print_word::w#1 ] ] with [ zp ZP_WORD:16 [ main::$2 main::$32 ] ]
|
Coalescing zero page register [ zp ZP_WORD:12 [ print_word::w#4 print_word::w#2 print_word::w#3 print_word::w#0 print_word::w#1 ] ] with [ zp ZP_WORD:16 [ main::$2 main::$32 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:12 [ print_word::w#4 print_word::w#2 print_word::w#3 print_word::w#0 print_word::w#1 main::$2 main::$32 ] ] with [ zp ZP_WORD:24 [ main::$5 main::$33 ] ]
|
Coalescing zero page register [ zp ZP_WORD:12 [ print_word::w#4 print_word::w#2 print_word::w#3 print_word::w#0 print_word::w#1 main::$2 main::$32 ] ] with [ zp ZP_WORD:24 [ main::$5 main::$33 ] ]
|
||||||
|
@ -9010,43 +9010,43 @@ Attempting to uplift remaining variables inzp ZP_BYTE:71 [ mulf_init::x_2#3 mulf
|
|||||||
Uplifting [mulf_init] best 517145 combination zp ZP_BYTE:71 [ mulf_init::x_2#3 mulf_init::x_2#2 mulf_init::x_2#1 ]
|
Uplifting [mulf_init] best 517145 combination zp ZP_BYTE:71 [ mulf_init::x_2#3 mulf_init::x_2#2 mulf_init::x_2#1 ]
|
||||||
Attempting to uplift remaining variables inzp ZP_BYTE:79 [ mulf_init::dir#2 mulf_init::dir#3 ]
|
Attempting to uplift remaining variables inzp ZP_BYTE:79 [ mulf_init::dir#2 mulf_init::dir#3 ]
|
||||||
Uplifting [mulf_init] best 517145 combination zp ZP_BYTE:79 [ mulf_init::dir#2 mulf_init::dir#3 ]
|
Uplifting [mulf_init] best 517145 combination zp ZP_BYTE:79 [ mulf_init::dir#2 mulf_init::dir#3 ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:3 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 ] ] with [ zp ZP_WORD:82 [ muls16s::a#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:3 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 ] ] with [ zp ZP_WORD:82 [ muls16s::a#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:3 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 ] ] with [ zp ZP_WORD:94 [ mul16s::a#0 ] ]
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Coalescing zero page register with common assignment [ zp ZP_WORD:3 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 ] ] with [ zp ZP_WORD:94 [ mul16s::a#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:3 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 mul16s::a#0 ] ] with [ zp ZP_WORD:106 [ mul16s_error::a#0 ] ]
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Coalescing zero page register with common assignment [ zp ZP_WORD:3 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 mul16s::a#0 ] ] with [ zp ZP_WORD:106 [ mul16s_error::a#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:3 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 mul16s::a#0 mul16s_error::a#0 ] ] with [ zp ZP_WORD:27 [ print_sword::w#4 print_sword::w#3 print_sword::w#1 print_sword::w#2 print_sword::w#0 ] ]
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Coalescing zero page register with common assignment [ zp ZP_WORD:5 [ mul16s_compare::b#2 mul16s_compare::b#5 mul16s_compare::b#1 ] ] with [ zp ZP_WORD:84 [ muls16s::b#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:3 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 mul16s::a#0 mul16s_error::a#0 print_sword::w#4 print_sword::w#3 print_sword::w#1 print_sword::w#2 print_sword::w#0 ] ] with [ zp ZP_WORD:21 [ print_word::w#5 print_word::w#3 print_word::w#4 print_word::w#1 print_word::w#2 print_word::w#11 ] ]
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Coalescing zero page register with common assignment [ zp ZP_WORD:5 [ mul16s_compare::b#2 mul16s_compare::b#5 mul16s_compare::b#1 muls16s::b#0 ] ] with [ zp ZP_WORD:96 [ mul16s::b#0 ] ] - score: 1
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||||||
Coalescing zero page register [ zp ZP_WORD:3 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 mul16s::a#0 mul16s_error::a#0 print_sword::w#4 print_sword::w#3 print_sword::w#1 print_sword::w#2 print_sword::w#0 print_word::w#5 print_word::w#3 print_word::w#4 print_word::w#1 print_word::w#2 print_word::w#11 ] ] with [ zp ZP_WORD:157 [ mul16u_error::a#0 ] ]
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Coalescing zero page register with common assignment [ zp ZP_WORD:5 [ mul16s_compare::b#2 mul16s_compare::b#5 mul16s_compare::b#1 muls16s::b#0 mul16s::b#0 ] ] with [ zp ZP_WORD:108 [ mul16s_error::b#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:3 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 mul16s::a#0 mul16s_error::a#0 print_sword::w#4 print_sword::w#3 print_sword::w#1 print_sword::w#2 print_sword::w#0 print_word::w#5 print_word::w#3 print_word::w#4 print_word::w#1 print_word::w#2 print_word::w#11 mul16u_error::a#0 ] ] with [ zp ZP_WORD:54 [ mul16u_compare::a#2 mul16u_compare::a#5 mul16u_compare::a#1 ] ]
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Coalescing zero page register with common assignment [ zp ZP_DWORD:13 [ print_sdword::dw#4 print_sdword::dw#3 print_sdword::dw#1 print_sdword::dw#2 print_sdword::dw#0 ] ] with [ zp ZP_DWORD:17 [ print_dword::dw#3 print_dword::dw#1 print_dword::dw#2 print_dword::dw#0 ] ] - score: 1
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||||||
Coalescing zero page register [ zp ZP_WORD:3 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 mul16s::a#0 mul16s_error::a#0 print_sword::w#4 print_sword::w#3 print_sword::w#1 print_sword::w#2 print_sword::w#0 print_word::w#5 print_word::w#3 print_word::w#4 print_word::w#1 print_word::w#2 print_word::w#11 mul16u_error::a#0 mul16u_compare::a#2 mul16u_compare::a#5 mul16u_compare::a#1 ] ] with [ zp ZP_WORD:137 [ muls16u::a#0 ] ]
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Coalescing zero page register with common assignment [ zp ZP_DWORD:13 [ print_sdword::dw#4 print_sdword::dw#3 print_sdword::dw#1 print_sdword::dw#2 print_sdword::dw#0 print_dword::dw#3 print_dword::dw#1 print_dword::dw#2 print_dword::dw#0 ] ] with [ zp ZP_DWORD:110 [ mul16s_error::ms#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:5 [ mul16s_compare::b#2 mul16s_compare::b#5 mul16s_compare::b#1 ] ] with [ zp ZP_WORD:84 [ muls16s::b#0 ] ]
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Coalescing zero page register with common assignment [ zp ZP_WORD:21 [ print_word::w#5 print_word::w#3 print_word::w#4 print_word::w#1 print_word::w#2 print_word::w#11 ] ] with [ zp ZP_WORD:27 [ print_sword::w#4 print_sword::w#3 print_sword::w#1 print_sword::w#2 print_sword::w#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:5 [ mul16s_compare::b#2 mul16s_compare::b#5 mul16s_compare::b#1 muls16s::b#0 ] ] with [ zp ZP_WORD:96 [ mul16s::b#0 ] ]
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Coalescing zero page register with common assignment [ zp ZP_WORD:21 [ print_word::w#5 print_word::w#3 print_word::w#4 print_word::w#1 print_word::w#2 print_word::w#11 print_sword::w#4 print_sword::w#3 print_sword::w#1 print_sword::w#2 print_sword::w#0 ] ] with [ zp ZP_WORD:157 [ mul16u_error::a#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:5 [ mul16s_compare::b#2 mul16s_compare::b#5 mul16s_compare::b#1 muls16s::b#0 mul16s::b#0 ] ] with [ zp ZP_WORD:108 [ mul16s_error::b#0 ] ]
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Coalescing zero page register with common assignment [ zp ZP_DWORD:29 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 ] ] with [ zp ZP_DWORD:120 [ mul16u::return#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:13 [ print_sdword::dw#4 print_sdword::dw#3 print_sdword::dw#1 print_sdword::dw#2 print_sdword::dw#0 ] ] with [ zp ZP_DWORD:17 [ print_dword::dw#3 print_dword::dw#1 print_dword::dw#2 print_dword::dw#0 ] ]
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Coalescing zero page register with common assignment [ zp ZP_DWORD:29 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 mul16u::return#2 ] ] with [ zp ZP_DWORD:132 [ mul16s::return#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:13 [ print_sdword::dw#4 print_sdword::dw#3 print_sdword::dw#1 print_sdword::dw#2 print_sdword::dw#0 print_dword::dw#3 print_dword::dw#1 print_dword::dw#2 print_dword::dw#0 ] ] with [ zp ZP_DWORD:110 [ mul16s_error::ms#0 ] ]
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Coalescing zero page register with common assignment [ zp ZP_WORD:33 [ mul16u::b#2 mul16u::b#3 mul16u::b#1 ] ] with [ zp ZP_WORD:56 [ mul16u_compare::b#2 mul16u_compare::b#5 mul16u_compare::b#1 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:13 [ print_sdword::dw#4 print_sdword::dw#3 print_sdword::dw#1 print_sdword::dw#2 print_sdword::dw#0 print_dword::dw#3 print_dword::dw#1 print_dword::dw#2 print_dword::dw#0 mul16s_error::ms#0 ] ] with [ zp ZP_DWORD:90 [ mul16s_compare::ms#0 ] ]
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Coalescing zero page register with common assignment [ zp ZP_DWORD:37 [ mul16u::res#2 mul16u::res#6 mul16u::res#1 ] ] with [ zp ZP_DWORD:149 [ mul16u::return#3 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:13 [ print_sdword::dw#4 print_sdword::dw#3 print_sdword::dw#1 print_sdword::dw#2 print_sdword::dw#0 print_dword::dw#3 print_dword::dw#1 print_dword::dw#2 print_dword::dw#0 mul16s_error::ms#0 mul16s_compare::ms#0 ] ] with [ zp ZP_DWORD:86 [ muls16s::return#2 ] ]
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Coalescing zero page register with common assignment [ zp ZP_DWORD:47 [ muls16s::m#5 muls16s::return#0 muls16s::m#3 muls16s::m#1 muls16s::m#2 ] ] with [ zp ZP_DWORD:86 [ muls16s::return#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:13 [ print_sdword::dw#4 print_sdword::dw#3 print_sdword::dw#1 print_sdword::dw#2 print_sdword::dw#0 print_dword::dw#3 print_dword::dw#1 print_dword::dw#2 print_dword::dw#0 mul16s_error::ms#0 mul16s_compare::ms#0 muls16s::return#2 ] ] with [ zp ZP_DWORD:47 [ muls16s::m#5 muls16s::return#0 muls16s::m#3 muls16s::m#1 muls16s::m#2 ] ]
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Coalescing zero page register with common assignment [ zp ZP_WORD:54 [ mul16u_compare::a#2 mul16u_compare::a#5 mul16u_compare::a#1 ] ] with [ zp ZP_WORD:137 [ muls16u::a#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:13 [ print_sdword::dw#4 print_sdword::dw#3 print_sdword::dw#1 print_sdword::dw#2 print_sdword::dw#0 print_dword::dw#3 print_dword::dw#1 print_dword::dw#2 print_dword::dw#0 mul16s_error::ms#0 mul16s_compare::ms#0 muls16s::return#2 muls16s::m#5 muls16s::return#0 muls16s::m#3 muls16s::m#1 muls16s::m#2 ] ] with [ zp ZP_DWORD:161 [ mul16u_error::ms#0 ] ]
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Coalescing zero page register with common assignment [ zp ZP_DWORD:62 [ muls16u::return#0 muls16u::m#3 muls16u::m#1 ] ] with [ zp ZP_DWORD:141 [ muls16u::return#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:13 [ print_sdword::dw#4 print_sdword::dw#3 print_sdword::dw#1 print_sdword::dw#2 print_sdword::dw#0 print_dword::dw#3 print_dword::dw#1 print_dword::dw#2 print_dword::dw#0 mul16s_error::ms#0 mul16s_compare::ms#0 muls16s::return#2 muls16s::m#5 muls16s::return#0 muls16s::m#3 muls16s::m#1 muls16s::m#2 mul16u_error::ms#0 ] ] with [ zp ZP_DWORD:145 [ mul16u_compare::ms#0 ] ]
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Coalescing zero page register with common assignment [ zp ZP_DWORD:98 [ mul16s::return#2 ] ] with [ zp ZP_DWORD:102 [ mul16s_compare::mn#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:13 [ print_sdword::dw#4 print_sdword::dw#3 print_sdword::dw#1 print_sdword::dw#2 print_sdword::dw#0 print_dword::dw#3 print_dword::dw#1 print_dword::dw#2 print_dword::dw#0 mul16s_error::ms#0 mul16s_compare::ms#0 muls16s::return#2 muls16s::m#5 muls16s::return#0 muls16s::m#3 muls16s::m#1 muls16s::m#2 mul16u_error::ms#0 mul16u_compare::ms#0 ] ] with [ zp ZP_DWORD:141 [ muls16u::return#2 ] ]
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Coalescing zero page register with common assignment [ zp ZP_WORD:124 [ mul16s::$6 ] ] with [ zp ZP_WORD:126 [ mul16s::$16 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:13 [ print_sdword::dw#4 print_sdword::dw#3 print_sdword::dw#1 print_sdword::dw#2 print_sdword::dw#0 print_dword::dw#3 print_dword::dw#1 print_dword::dw#2 print_dword::dw#0 mul16s_error::ms#0 mul16s_compare::ms#0 muls16s::return#2 muls16s::m#5 muls16s::return#0 muls16s::m#3 muls16s::m#1 muls16s::m#2 mul16u_error::ms#0 mul16u_compare::ms#0 muls16u::return#2 ] ] with [ zp ZP_DWORD:62 [ muls16u::return#0 muls16u::m#3 muls16u::m#1 ] ]
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Coalescing zero page register with common assignment [ zp ZP_WORD:128 [ mul16s::$12 ] ] with [ zp ZP_WORD:130 [ mul16s::$17 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:29 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 ] ] with [ zp ZP_DWORD:120 [ mul16u::return#2 ] ]
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Coalescing zero page register with common assignment [ zp ZP_DWORD:145 [ mul16u_compare::ms#0 ] ] with [ zp ZP_DWORD:161 [ mul16u_error::ms#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:29 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 mul16u::return#2 ] ] with [ zp ZP_DWORD:37 [ mul16u::res#2 mul16u::res#6 mul16u::res#1 ] ]
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Coalescing zero page register with common assignment [ zp ZP_DWORD:153 [ mul16u_compare::mn#0 ] ] with [ zp ZP_DWORD:165 [ mul16u_error::mn#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:29 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 mul16u::return#2 mul16u::res#2 mul16u::res#6 mul16u::res#1 ] ] with [ zp ZP_DWORD:132 [ mul16s::return#0 ] ]
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Coalescing zero page register with common assignment [ zp ZP_WORD:3 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 mul16s::a#0 mul16s_error::a#0 ] ] with [ zp ZP_WORD:21 [ print_word::w#5 print_word::w#3 print_word::w#4 print_word::w#1 print_word::w#2 print_word::w#11 print_sword::w#4 print_sword::w#3 print_sword::w#1 print_sword::w#2 print_sword::w#0 mul16u_error::a#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:29 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 mul16u::return#2 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16s::return#0 ] ] with [ zp ZP_DWORD:98 [ mul16s::return#2 ] ]
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Coalescing zero page register with common assignment [ zp ZP_DWORD:13 [ print_sdword::dw#4 print_sdword::dw#3 print_sdword::dw#1 print_sdword::dw#2 print_sdword::dw#0 print_dword::dw#3 print_dword::dw#1 print_dword::dw#2 print_dword::dw#0 mul16s_error::ms#0 ] ] with [ zp ZP_DWORD:90 [ mul16s_compare::ms#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:29 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 mul16u::return#2 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16s::return#0 mul16s::return#2 ] ] with [ zp ZP_DWORD:102 [ mul16s_compare::mn#0 ] ]
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Coalescing zero page register with common assignment [ zp ZP_DWORD:13 [ print_sdword::dw#4 print_sdword::dw#3 print_sdword::dw#1 print_sdword::dw#2 print_sdword::dw#0 print_dword::dw#3 print_dword::dw#1 print_dword::dw#2 print_dword::dw#0 mul16s_error::ms#0 mul16s_compare::ms#0 ] ] with [ zp ZP_DWORD:145 [ mul16u_compare::ms#0 mul16u_error::ms#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:29 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 mul16u::return#2 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16s::return#0 mul16s::return#2 mul16s_compare::mn#0 ] ] with [ zp ZP_DWORD:114 [ mul16s_error::mn#0 ] ]
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Coalescing zero page register with common assignment [ zp ZP_DWORD:29 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 mul16u::return#2 mul16s::return#0 ] ] with [ zp ZP_DWORD:37 [ mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#3 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:29 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 mul16u::return#2 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16s::return#0 mul16s::return#2 mul16s_compare::mn#0 mul16s_error::mn#0 ] ] with [ zp ZP_DWORD:149 [ mul16u::return#3 ] ]
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Coalescing zero page register with common assignment [ zp ZP_DWORD:29 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 mul16u::return#2 mul16s::return#0 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#3 ] ] with [ zp ZP_DWORD:98 [ mul16s::return#2 mul16s_compare::mn#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:29 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 mul16u::return#2 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16s::return#0 mul16s::return#2 mul16s_compare::mn#0 mul16s_error::mn#0 mul16u::return#3 ] ] with [ zp ZP_DWORD:153 [ mul16u_compare::mn#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:33 [ mul16u::b#2 mul16u::b#3 mul16u::b#1 mul16u_compare::b#2 mul16u_compare::b#5 mul16u_compare::b#1 ] ] with [ zp ZP_WORD:139 [ muls16u::b#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_DWORD:29 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 mul16u::return#2 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16s::return#0 mul16s::return#2 mul16s_compare::mn#0 mul16s_error::mn#0 mul16u::return#3 mul16u_compare::mn#0 ] ] with [ zp ZP_DWORD:165 [ mul16u_error::mn#0 ] ]
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Coalescing zero page register with common assignment [ zp ZP_WORD:33 [ mul16u::b#2 mul16u::b#3 mul16u::b#1 mul16u_compare::b#2 mul16u_compare::b#5 mul16u_compare::b#1 muls16u::b#0 ] ] with [ zp ZP_WORD:159 [ mul16u_error::b#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:33 [ mul16u::b#2 mul16u::b#3 mul16u::b#1 ] ] with [ zp ZP_WORD:56 [ mul16u_compare::b#2 mul16u_compare::b#5 mul16u_compare::b#1 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:3 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 mul16s::a#0 mul16s_error::a#0 print_word::w#5 print_word::w#3 print_word::w#4 print_word::w#1 print_word::w#2 print_word::w#11 print_sword::w#4 print_sword::w#3 print_sword::w#1 print_sword::w#2 print_sword::w#0 mul16u_error::a#0 ] ] with [ zp ZP_WORD:54 [ mul16u_compare::a#2 mul16u_compare::a#5 mul16u_compare::a#1 muls16u::a#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:33 [ mul16u::b#2 mul16u::b#3 mul16u::b#1 mul16u_compare::b#2 mul16u_compare::b#5 mul16u_compare::b#1 ] ] with [ zp ZP_WORD:139 [ muls16u::b#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_DWORD:13 [ print_sdword::dw#4 print_sdword::dw#3 print_sdword::dw#1 print_sdword::dw#2 print_sdword::dw#0 print_dword::dw#3 print_dword::dw#1 print_dword::dw#2 print_dword::dw#0 mul16s_error::ms#0 mul16s_compare::ms#0 mul16u_compare::ms#0 mul16u_error::ms#0 ] ] with [ zp ZP_DWORD:47 [ muls16s::m#5 muls16s::return#0 muls16s::m#3 muls16s::m#1 muls16s::m#2 muls16s::return#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:33 [ mul16u::b#2 mul16u::b#3 mul16u::b#1 mul16u_compare::b#2 mul16u_compare::b#5 mul16u_compare::b#1 muls16u::b#0 ] ] with [ zp ZP_WORD:159 [ mul16u_error::b#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_DWORD:13 [ print_sdword::dw#4 print_sdword::dw#3 print_sdword::dw#1 print_sdword::dw#2 print_sdword::dw#0 print_dword::dw#3 print_dword::dw#1 print_dword::dw#2 print_dword::dw#0 mul16s_error::ms#0 mul16s_compare::ms#0 mul16u_compare::ms#0 mul16u_error::ms#0 muls16s::m#5 muls16s::return#0 muls16s::m#3 muls16s::m#1 muls16s::m#2 muls16s::return#2 ] ] with [ zp ZP_DWORD:62 [ muls16u::return#0 muls16u::m#3 muls16u::m#1 muls16u::return#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:124 [ mul16s::$6 ] ] with [ zp ZP_WORD:126 [ mul16s::$16 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_DWORD:29 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 mul16u::return#2 mul16s::return#0 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#3 mul16s::return#2 mul16s_compare::mn#0 ] ] with [ zp ZP_DWORD:114 [ mul16s_error::mn#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:128 [ mul16s::$12 ] ] with [ zp ZP_WORD:130 [ mul16s::$17 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_DWORD:29 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 mul16u::return#2 mul16s::return#0 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#3 mul16s::return#2 mul16s_compare::mn#0 mul16s_error::mn#0 ] ] with [ zp ZP_DWORD:153 [ mul16u_compare::mn#0 mul16u_error::mn#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:3 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 mul16s::a#0 mul16s_error::a#0 print_sword::w#4 print_sword::w#3 print_sword::w#1 print_sword::w#2 print_sword::w#0 print_word::w#5 print_word::w#3 print_word::w#4 print_word::w#1 print_word::w#2 print_word::w#11 mul16u_error::a#0 mul16u_compare::a#2 mul16u_compare::a#5 mul16u_compare::a#1 muls16u::a#0 ] ] with [ zp ZP_WORD:67 [ mulf_init::sqr1_lo#2 mulf_init::sqr1_lo#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:3 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 mul16s::a#0 mul16s_error::a#0 print_word::w#5 print_word::w#3 print_word::w#4 print_word::w#1 print_word::w#2 print_word::w#11 print_sword::w#4 print_sword::w#3 print_sword::w#1 print_sword::w#2 print_sword::w#0 mul16u_error::a#0 mul16u_compare::a#2 mul16u_compare::a#5 mul16u_compare::a#1 muls16u::a#0 ] ] with [ zp ZP_WORD:67 [ mulf_init::sqr1_lo#2 mulf_init::sqr1_lo#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:3 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 mul16s::a#0 mul16s_error::a#0 print_sword::w#4 print_sword::w#3 print_sword::w#1 print_sword::w#2 print_sword::w#0 print_word::w#5 print_word::w#3 print_word::w#4 print_word::w#1 print_word::w#2 print_word::w#11 mul16u_error::a#0 mul16u_compare::a#2 mul16u_compare::a#5 mul16u_compare::a#1 muls16u::a#0 mulf_init::sqr1_lo#2 mulf_init::sqr1_lo#1 ] ] with [ zp ZP_WORD:75 [ mulf_init::sqr2_lo#2 mulf_init::sqr2_lo#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:3 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 mul16s::a#0 mul16s_error::a#0 print_word::w#5 print_word::w#3 print_word::w#4 print_word::w#1 print_word::w#2 print_word::w#11 print_sword::w#4 print_sword::w#3 print_sword::w#1 print_sword::w#2 print_sword::w#0 mul16u_error::a#0 mul16u_compare::a#2 mul16u_compare::a#5 mul16u_compare::a#1 muls16u::a#0 mulf_init::sqr1_lo#2 mulf_init::sqr1_lo#1 ] ] with [ zp ZP_WORD:75 [ mulf_init::sqr2_lo#2 mulf_init::sqr2_lo#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:3 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 mul16s::a#0 mul16s_error::a#0 print_sword::w#4 print_sword::w#3 print_sword::w#1 print_sword::w#2 print_sword::w#0 print_word::w#5 print_word::w#3 print_word::w#4 print_word::w#1 print_word::w#2 print_word::w#11 mul16u_error::a#0 mul16u_compare::a#2 mul16u_compare::a#5 mul16u_compare::a#1 muls16u::a#0 mulf_init::sqr1_lo#2 mulf_init::sqr1_lo#1 mulf_init::sqr2_lo#2 mulf_init::sqr2_lo#1 ] ] with [ zp ZP_WORD:80 [ print_cls::sc#2 print_cls::sc#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:3 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 mul16s::a#0 mul16s_error::a#0 print_word::w#5 print_word::w#3 print_word::w#4 print_word::w#1 print_word::w#2 print_word::w#11 print_sword::w#4 print_sword::w#3 print_sword::w#1 print_sword::w#2 print_sword::w#0 mul16u_error::a#0 mul16u_compare::a#2 mul16u_compare::a#5 mul16u_compare::a#1 muls16u::a#0 mulf_init::sqr1_lo#2 mulf_init::sqr1_lo#1 mulf_init::sqr2_lo#2 mulf_init::sqr2_lo#1 ] ] with [ zp ZP_WORD:80 [ print_cls::sc#2 print_cls::sc#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:5 [ mul16s_compare::b#2 mul16s_compare::b#5 mul16s_compare::b#1 muls16s::b#0 mul16s::b#0 mul16s_error::b#0 ] ] with [ zp ZP_WORD:60 [ muls16u::i#2 muls16u::i#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:5 [ mul16s_compare::b#2 mul16s_compare::b#5 mul16s_compare::b#1 muls16s::b#0 mul16s::b#0 mul16s_error::b#0 ] ] with [ zp ZP_WORD:60 [ muls16u::i#2 muls16u::i#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:5 [ mul16s_compare::b#2 mul16s_compare::b#5 mul16s_compare::b#1 muls16s::b#0 mul16s::b#0 mul16s_error::b#0 muls16u::i#2 muls16u::i#1 ] ] with [ zp ZP_WORD:69 [ mulf_init::sqr1_hi#2 mulf_init::sqr1_hi#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:5 [ mul16s_compare::b#2 mul16s_compare::b#5 mul16s_compare::b#1 muls16s::b#0 mul16s::b#0 mul16s_error::b#0 muls16u::i#2 muls16u::i#1 ] ] with [ zp ZP_WORD:69 [ mulf_init::sqr1_hi#2 mulf_init::sqr1_hi#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:5 [ mul16s_compare::b#2 mul16s_compare::b#5 mul16s_compare::b#1 muls16s::b#0 mul16s::b#0 mul16s_error::b#0 muls16u::i#2 muls16u::i#1 mulf_init::sqr1_hi#2 mulf_init::sqr1_hi#1 ] ] with [ zp ZP_WORD:77 [ mulf_init::sqr2_hi#2 mulf_init::sqr2_hi#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:5 [ mul16s_compare::b#2 mul16s_compare::b#5 mul16s_compare::b#1 muls16s::b#0 mul16s::b#0 mul16s_error::b#0 muls16u::i#2 muls16u::i#1 mulf_init::sqr1_hi#2 mulf_init::sqr1_hi#1 ] ] with [ zp ZP_WORD:77 [ mulf_init::sqr2_hi#2 mulf_init::sqr2_hi#1 ] ]
|
||||||
@ -9057,13 +9057,13 @@ Coalescing zero page register [ zp ZP_WORD:11 [ print_str::str#11 print_str::str
|
|||||||
Coalescing zero page register [ zp ZP_WORD:11 [ print_str::str#11 print_str::str#13 print_str::str#0 mul16u::a#3 mul16u::a#6 mul16u::a#8 mul16u::a#2 mul16u::a#0 muls16s::i#2 muls16s::i#1 muls16s::j#2 muls16s::j#1 ] ] with [ zp ZP_WORD:124 [ mul16s::$6 mul16s::$16 ] ]
|
Coalescing zero page register [ zp ZP_WORD:11 [ print_str::str#11 print_str::str#13 print_str::str#0 mul16u::a#3 mul16u::a#6 mul16u::a#8 mul16u::a#2 mul16u::a#0 muls16s::i#2 muls16s::i#1 muls16s::j#2 muls16s::j#1 ] ] with [ zp ZP_WORD:124 [ mul16s::$6 mul16s::$16 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:11 [ print_str::str#11 print_str::str#13 print_str::str#0 mul16u::a#3 mul16u::a#6 mul16u::a#8 mul16u::a#2 mul16u::a#0 muls16s::i#2 muls16s::i#1 muls16s::j#2 muls16s::j#1 mul16s::$6 mul16s::$16 ] ] with [ zp ZP_WORD:128 [ mul16s::$12 mul16s::$17 ] ]
|
Coalescing zero page register [ zp ZP_WORD:11 [ print_str::str#11 print_str::str#13 print_str::str#0 mul16u::a#3 mul16u::a#6 mul16u::a#8 mul16u::a#2 mul16u::a#0 muls16s::i#2 muls16s::i#1 muls16s::j#2 muls16s::j#1 mul16s::$6 mul16s::$16 ] ] with [ zp ZP_WORD:128 [ mul16s::$12 mul16s::$17 ] ]
|
||||||
Coalescing zero page register [ zp ZP_BYTE:71 [ mulf_init::x_2#3 mulf_init::x_2#2 mulf_init::x_2#1 ] ] with [ zp ZP_BYTE:79 [ mulf_init::dir#2 mulf_init::dir#3 ] ]
|
Coalescing zero page register [ zp ZP_BYTE:71 [ mulf_init::x_2#3 mulf_init::x_2#2 mulf_init::x_2#1 ] ] with [ zp ZP_BYTE:79 [ mulf_init::dir#2 mulf_init::dir#3 ] ]
|
||||||
Allocated (was zp ZP_WORD:3) zp ZP_WORD:2 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 mul16s::a#0 mul16s_error::a#0 print_sword::w#4 print_sword::w#3 print_sword::w#1 print_sword::w#2 print_sword::w#0 print_word::w#5 print_word::w#3 print_word::w#4 print_word::w#1 print_word::w#2 print_word::w#11 mul16u_error::a#0 mul16u_compare::a#2 mul16u_compare::a#5 mul16u_compare::a#1 muls16u::a#0 mulf_init::sqr1_lo#2 mulf_init::sqr1_lo#1 mulf_init::sqr2_lo#2 mulf_init::sqr2_lo#1 print_cls::sc#2 print_cls::sc#1 ]
|
Allocated (was zp ZP_WORD:3) zp ZP_WORD:2 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 mul16s::a#0 mul16s_error::a#0 print_word::w#5 print_word::w#3 print_word::w#4 print_word::w#1 print_word::w#2 print_word::w#11 print_sword::w#4 print_sword::w#3 print_sword::w#1 print_sword::w#2 print_sword::w#0 mul16u_error::a#0 mul16u_compare::a#2 mul16u_compare::a#5 mul16u_compare::a#1 muls16u::a#0 mulf_init::sqr1_lo#2 mulf_init::sqr1_lo#1 mulf_init::sqr2_lo#2 mulf_init::sqr2_lo#1 print_cls::sc#2 print_cls::sc#1 ]
|
||||||
Allocated (was zp ZP_WORD:5) zp ZP_WORD:4 [ mul16s_compare::b#2 mul16s_compare::b#5 mul16s_compare::b#1 muls16s::b#0 mul16s::b#0 mul16s_error::b#0 muls16u::i#2 muls16u::i#1 mulf_init::sqr1_hi#2 mulf_init::sqr1_hi#1 mulf_init::sqr2_hi#2 mulf_init::sqr2_hi#1 ]
|
Allocated (was zp ZP_WORD:5) zp ZP_WORD:4 [ mul16s_compare::b#2 mul16s_compare::b#5 mul16s_compare::b#1 muls16s::b#0 mul16s::b#0 mul16s_error::b#0 muls16u::i#2 muls16u::i#1 mulf_init::sqr1_hi#2 mulf_init::sqr1_hi#1 mulf_init::sqr2_hi#2 mulf_init::sqr2_hi#1 ]
|
||||||
Allocated (was zp ZP_WORD:9) zp ZP_WORD:6 [ line_cursor#20 line_cursor#39 line_cursor#1 mulf_init::sqr#3 mulf_init::sqr#4 mulf_init::sqr#1 mulf_init::sqr#2 ]
|
Allocated (was zp ZP_WORD:9) zp ZP_WORD:6 [ line_cursor#20 line_cursor#39 line_cursor#1 mulf_init::sqr#3 mulf_init::sqr#4 mulf_init::sqr#1 mulf_init::sqr#2 ]
|
||||||
Allocated (was zp ZP_WORD:11) zp ZP_WORD:8 [ print_str::str#11 print_str::str#13 print_str::str#0 mul16u::a#3 mul16u::a#6 mul16u::a#8 mul16u::a#2 mul16u::a#0 muls16s::i#2 muls16s::i#1 muls16s::j#2 muls16s::j#1 mul16s::$6 mul16s::$16 mul16s::$12 mul16s::$17 ]
|
Allocated (was zp ZP_WORD:11) zp ZP_WORD:8 [ print_str::str#11 print_str::str#13 print_str::str#0 mul16u::a#3 mul16u::a#6 mul16u::a#8 mul16u::a#2 mul16u::a#0 muls16s::i#2 muls16s::i#1 muls16s::j#2 muls16s::j#1 mul16s::$6 mul16s::$16 mul16s::$12 mul16s::$17 ]
|
||||||
Allocated (was zp ZP_DWORD:13) zp ZP_DWORD:10 [ print_sdword::dw#4 print_sdword::dw#3 print_sdword::dw#1 print_sdword::dw#2 print_sdword::dw#0 print_dword::dw#3 print_dword::dw#1 print_dword::dw#2 print_dword::dw#0 mul16s_error::ms#0 mul16s_compare::ms#0 muls16s::return#2 muls16s::m#5 muls16s::return#0 muls16s::m#3 muls16s::m#1 muls16s::m#2 mul16u_error::ms#0 mul16u_compare::ms#0 muls16u::return#2 muls16u::return#0 muls16u::m#3 muls16u::m#1 ]
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Allocated (was zp ZP_DWORD:13) zp ZP_DWORD:10 [ print_sdword::dw#4 print_sdword::dw#3 print_sdword::dw#1 print_sdword::dw#2 print_sdword::dw#0 print_dword::dw#3 print_dword::dw#1 print_dword::dw#2 print_dword::dw#0 mul16s_error::ms#0 mul16s_compare::ms#0 mul16u_compare::ms#0 mul16u_error::ms#0 muls16s::m#5 muls16s::return#0 muls16s::m#3 muls16s::m#1 muls16s::m#2 muls16s::return#2 muls16u::return#0 muls16u::m#3 muls16u::m#1 muls16u::return#2 ]
|
||||||
Allocated (was zp ZP_WORD:25) zp ZP_WORD:14 [ char_cursor#76 char_cursor#120 char_cursor#116 char_cursor#117 char_cursor#118 char_cursor#130 char_cursor#157 char_cursor#158 char_cursor#113 char_cursor#112 char_cursor#20 char_cursor#1 char_cursor#114 ]
|
Allocated (was zp ZP_WORD:25) zp ZP_WORD:14 [ char_cursor#76 char_cursor#120 char_cursor#116 char_cursor#117 char_cursor#118 char_cursor#130 char_cursor#157 char_cursor#158 char_cursor#113 char_cursor#112 char_cursor#20 char_cursor#1 char_cursor#114 ]
|
||||||
Allocated (was zp ZP_DWORD:29) zp ZP_DWORD:16 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 mul16u::return#2 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16s::return#0 mul16s::return#2 mul16s_compare::mn#0 mul16s_error::mn#0 mul16u::return#3 mul16u_compare::mn#0 mul16u_error::mn#0 ]
|
Allocated (was zp ZP_DWORD:29) zp ZP_DWORD:16 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 mul16u::return#2 mul16s::return#0 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#3 mul16s::return#2 mul16s_compare::mn#0 mul16s_error::mn#0 mul16u_compare::mn#0 mul16u_error::mn#0 ]
|
||||||
Allocated (was zp ZP_WORD:33) zp ZP_WORD:20 [ mul16u::b#2 mul16u::b#3 mul16u::b#1 mul16u_compare::b#2 mul16u_compare::b#5 mul16u_compare::b#1 muls16u::b#0 mul16u_error::b#0 ]
|
Allocated (was zp ZP_WORD:33) zp ZP_WORD:20 [ mul16u::b#2 mul16u::b#3 mul16u::b#1 mul16u_compare::b#2 mul16u_compare::b#5 mul16u_compare::b#1 muls16u::b#0 mul16u_error::b#0 ]
|
||||||
Allocated (was zp ZP_DWORD:41) zp ZP_DWORD:22 [ mul16u::mb#2 mul16u::mb#0 mul16u::mb#1 ]
|
Allocated (was zp ZP_DWORD:41) zp ZP_DWORD:22 [ mul16u::mb#2 mul16u::mb#0 mul16u::mb#1 ]
|
||||||
Allocated (was zp ZP_BYTE:71) zp ZP_BYTE:26 [ mulf_init::x_2#3 mulf_init::x_2#2 mulf_init::x_2#1 mulf_init::dir#2 mulf_init::dir#3 ]
|
Allocated (was zp ZP_BYTE:71) zp ZP_BYTE:26 [ mulf_init::x_2#3 mulf_init::x_2#2 mulf_init::x_2#1 mulf_init::dir#2 mulf_init::dir#3 ]
|
||||||
@ -11487,17 +11487,17 @@ FINAL SYMBOL TABLE
|
|||||||
(word) print_word::w#5 w zp ZP_WORD:2 4.666666666666666
|
(word) print_word::w#5 w zp ZP_WORD:2 4.666666666666666
|
||||||
|
|
||||||
reg byte x [ mul16s_compare::i#9 mul16s_compare::i#1 ]
|
reg byte x [ mul16s_compare::i#9 mul16s_compare::i#1 ]
|
||||||
zp ZP_WORD:2 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 mul16s::a#0 mul16s_error::a#0 print_sword::w#4 print_sword::w#3 print_sword::w#1 print_sword::w#2 print_sword::w#0 print_word::w#5 print_word::w#3 print_word::w#4 print_word::w#1 print_word::w#2 print_word::w#11 mul16u_error::a#0 mul16u_compare::a#2 mul16u_compare::a#5 mul16u_compare::a#1 muls16u::a#0 mulf_init::sqr1_lo#2 mulf_init::sqr1_lo#1 mulf_init::sqr2_lo#2 mulf_init::sqr2_lo#1 print_cls::sc#2 print_cls::sc#1 ]
|
zp ZP_WORD:2 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 mul16s::a#0 mul16s_error::a#0 print_word::w#5 print_word::w#3 print_word::w#4 print_word::w#1 print_word::w#2 print_word::w#11 print_sword::w#4 print_sword::w#3 print_sword::w#1 print_sword::w#2 print_sword::w#0 mul16u_error::a#0 mul16u_compare::a#2 mul16u_compare::a#5 mul16u_compare::a#1 muls16u::a#0 mulf_init::sqr1_lo#2 mulf_init::sqr1_lo#1 mulf_init::sqr2_lo#2 mulf_init::sqr2_lo#1 print_cls::sc#2 print_cls::sc#1 ]
|
||||||
zp ZP_WORD:4 [ mul16s_compare::b#2 mul16s_compare::b#5 mul16s_compare::b#1 muls16s::b#0 mul16s::b#0 mul16s_error::b#0 muls16u::i#2 muls16u::i#1 mulf_init::sqr1_hi#2 mulf_init::sqr1_hi#1 mulf_init::sqr2_hi#2 mulf_init::sqr2_hi#1 ]
|
zp ZP_WORD:4 [ mul16s_compare::b#2 mul16s_compare::b#5 mul16s_compare::b#1 muls16s::b#0 mul16s::b#0 mul16s_error::b#0 muls16u::i#2 muls16u::i#1 mulf_init::sqr1_hi#2 mulf_init::sqr1_hi#1 mulf_init::sqr2_hi#2 mulf_init::sqr2_hi#1 ]
|
||||||
reg byte y [ mul16s_compare::j#2 mul16s_compare::j#1 ]
|
reg byte y [ mul16s_compare::j#2 mul16s_compare::j#1 ]
|
||||||
reg byte a [ mul16s_compare::ok#2 ]
|
reg byte a [ mul16s_compare::ok#2 ]
|
||||||
zp ZP_WORD:6 [ line_cursor#20 line_cursor#39 line_cursor#1 mulf_init::sqr#3 mulf_init::sqr#4 mulf_init::sqr#1 mulf_init::sqr#2 ]
|
zp ZP_WORD:6 [ line_cursor#20 line_cursor#39 line_cursor#1 mulf_init::sqr#3 mulf_init::sqr#4 mulf_init::sqr#1 mulf_init::sqr#2 ]
|
||||||
zp ZP_WORD:8 [ print_str::str#11 print_str::str#13 print_str::str#0 mul16u::a#3 mul16u::a#6 mul16u::a#8 mul16u::a#2 mul16u::a#0 muls16s::i#2 muls16s::i#1 muls16s::j#2 muls16s::j#1 mul16s::$6 mul16s::$16 mul16s::$12 mul16s::$17 ]
|
zp ZP_WORD:8 [ print_str::str#11 print_str::str#13 print_str::str#0 mul16u::a#3 mul16u::a#6 mul16u::a#8 mul16u::a#2 mul16u::a#0 muls16s::i#2 muls16s::i#1 muls16s::j#2 muls16s::j#1 mul16s::$6 mul16s::$16 mul16s::$12 mul16s::$17 ]
|
||||||
zp ZP_DWORD:10 [ print_sdword::dw#4 print_sdword::dw#3 print_sdword::dw#1 print_sdword::dw#2 print_sdword::dw#0 print_dword::dw#3 print_dword::dw#1 print_dword::dw#2 print_dword::dw#0 mul16s_error::ms#0 mul16s_compare::ms#0 muls16s::return#2 muls16s::m#5 muls16s::return#0 muls16s::m#3 muls16s::m#1 muls16s::m#2 mul16u_error::ms#0 mul16u_compare::ms#0 muls16u::return#2 muls16u::return#0 muls16u::m#3 muls16u::m#1 ]
|
zp ZP_DWORD:10 [ print_sdword::dw#4 print_sdword::dw#3 print_sdword::dw#1 print_sdword::dw#2 print_sdword::dw#0 print_dword::dw#3 print_dword::dw#1 print_dword::dw#2 print_dword::dw#0 mul16s_error::ms#0 mul16s_compare::ms#0 mul16u_compare::ms#0 mul16u_error::ms#0 muls16s::m#5 muls16s::return#0 muls16s::m#3 muls16s::m#1 muls16s::m#2 muls16s::return#2 muls16u::return#0 muls16u::m#3 muls16u::m#1 muls16u::return#2 ]
|
||||||
reg byte x [ print_byte::b#2 print_byte::b#0 print_byte::b#1 ]
|
reg byte x [ print_byte::b#2 print_byte::b#0 print_byte::b#1 ]
|
||||||
reg byte a [ print_char::ch#4 print_char::ch#2 print_char::ch#3 ]
|
reg byte a [ print_char::ch#4 print_char::ch#2 print_char::ch#3 ]
|
||||||
zp ZP_WORD:14 [ char_cursor#76 char_cursor#120 char_cursor#116 char_cursor#117 char_cursor#118 char_cursor#130 char_cursor#157 char_cursor#158 char_cursor#113 char_cursor#112 char_cursor#20 char_cursor#1 char_cursor#114 ]
|
zp ZP_WORD:14 [ char_cursor#76 char_cursor#120 char_cursor#116 char_cursor#117 char_cursor#118 char_cursor#130 char_cursor#157 char_cursor#158 char_cursor#113 char_cursor#112 char_cursor#20 char_cursor#1 char_cursor#114 ]
|
||||||
zp ZP_DWORD:16 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 mul16u::return#2 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16s::return#0 mul16s::return#2 mul16s_compare::mn#0 mul16s_error::mn#0 mul16u::return#3 mul16u_compare::mn#0 mul16u_error::mn#0 ]
|
zp ZP_DWORD:16 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 mul16u::return#2 mul16s::return#0 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#3 mul16s::return#2 mul16s_compare::mn#0 mul16s_error::mn#0 mul16u_compare::mn#0 mul16u_error::mn#0 ]
|
||||||
zp ZP_WORD:20 [ mul16u::b#2 mul16u::b#3 mul16u::b#1 mul16u_compare::b#2 mul16u_compare::b#5 mul16u_compare::b#1 muls16u::b#0 mul16u_error::b#0 ]
|
zp ZP_WORD:20 [ mul16u::b#2 mul16u::b#3 mul16u::b#1 mul16u_compare::b#2 mul16u_compare::b#5 mul16u_compare::b#1 muls16u::b#0 mul16u_error::b#0 ]
|
||||||
zp ZP_DWORD:22 [ mul16u::mb#2 mul16u::mb#0 mul16u::mb#1 ]
|
zp ZP_DWORD:22 [ mul16u::mb#2 mul16u::mb#0 mul16u::mb#1 ]
|
||||||
reg byte x [ mul16u_compare::i#9 mul16u_compare::i#1 ]
|
reg byte x [ mul16u_compare::i#9 mul16u_compare::i#1 ]
|
||||||
|
@ -359,17 +359,17 @@
|
|||||||
(word) print_word::w#5 w zp ZP_WORD:2 4.666666666666666
|
(word) print_word::w#5 w zp ZP_WORD:2 4.666666666666666
|
||||||
|
|
||||||
reg byte x [ mul16s_compare::i#9 mul16s_compare::i#1 ]
|
reg byte x [ mul16s_compare::i#9 mul16s_compare::i#1 ]
|
||||||
zp ZP_WORD:2 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 mul16s::a#0 mul16s_error::a#0 print_sword::w#4 print_sword::w#3 print_sword::w#1 print_sword::w#2 print_sword::w#0 print_word::w#5 print_word::w#3 print_word::w#4 print_word::w#1 print_word::w#2 print_word::w#11 mul16u_error::a#0 mul16u_compare::a#2 mul16u_compare::a#5 mul16u_compare::a#1 muls16u::a#0 mulf_init::sqr1_lo#2 mulf_init::sqr1_lo#1 mulf_init::sqr2_lo#2 mulf_init::sqr2_lo#1 print_cls::sc#2 print_cls::sc#1 ]
|
zp ZP_WORD:2 [ mul16s_compare::a#2 mul16s_compare::a#5 mul16s_compare::a#1 muls16s::a#0 mul16s::a#0 mul16s_error::a#0 print_word::w#5 print_word::w#3 print_word::w#4 print_word::w#1 print_word::w#2 print_word::w#11 print_sword::w#4 print_sword::w#3 print_sword::w#1 print_sword::w#2 print_sword::w#0 mul16u_error::a#0 mul16u_compare::a#2 mul16u_compare::a#5 mul16u_compare::a#1 muls16u::a#0 mulf_init::sqr1_lo#2 mulf_init::sqr1_lo#1 mulf_init::sqr2_lo#2 mulf_init::sqr2_lo#1 print_cls::sc#2 print_cls::sc#1 ]
|
||||||
zp ZP_WORD:4 [ mul16s_compare::b#2 mul16s_compare::b#5 mul16s_compare::b#1 muls16s::b#0 mul16s::b#0 mul16s_error::b#0 muls16u::i#2 muls16u::i#1 mulf_init::sqr1_hi#2 mulf_init::sqr1_hi#1 mulf_init::sqr2_hi#2 mulf_init::sqr2_hi#1 ]
|
zp ZP_WORD:4 [ mul16s_compare::b#2 mul16s_compare::b#5 mul16s_compare::b#1 muls16s::b#0 mul16s::b#0 mul16s_error::b#0 muls16u::i#2 muls16u::i#1 mulf_init::sqr1_hi#2 mulf_init::sqr1_hi#1 mulf_init::sqr2_hi#2 mulf_init::sqr2_hi#1 ]
|
||||||
reg byte y [ mul16s_compare::j#2 mul16s_compare::j#1 ]
|
reg byte y [ mul16s_compare::j#2 mul16s_compare::j#1 ]
|
||||||
reg byte a [ mul16s_compare::ok#2 ]
|
reg byte a [ mul16s_compare::ok#2 ]
|
||||||
zp ZP_WORD:6 [ line_cursor#20 line_cursor#39 line_cursor#1 mulf_init::sqr#3 mulf_init::sqr#4 mulf_init::sqr#1 mulf_init::sqr#2 ]
|
zp ZP_WORD:6 [ line_cursor#20 line_cursor#39 line_cursor#1 mulf_init::sqr#3 mulf_init::sqr#4 mulf_init::sqr#1 mulf_init::sqr#2 ]
|
||||||
zp ZP_WORD:8 [ print_str::str#11 print_str::str#13 print_str::str#0 mul16u::a#3 mul16u::a#6 mul16u::a#8 mul16u::a#2 mul16u::a#0 muls16s::i#2 muls16s::i#1 muls16s::j#2 muls16s::j#1 mul16s::$6 mul16s::$16 mul16s::$12 mul16s::$17 ]
|
zp ZP_WORD:8 [ print_str::str#11 print_str::str#13 print_str::str#0 mul16u::a#3 mul16u::a#6 mul16u::a#8 mul16u::a#2 mul16u::a#0 muls16s::i#2 muls16s::i#1 muls16s::j#2 muls16s::j#1 mul16s::$6 mul16s::$16 mul16s::$12 mul16s::$17 ]
|
||||||
zp ZP_DWORD:10 [ print_sdword::dw#4 print_sdword::dw#3 print_sdword::dw#1 print_sdword::dw#2 print_sdword::dw#0 print_dword::dw#3 print_dword::dw#1 print_dword::dw#2 print_dword::dw#0 mul16s_error::ms#0 mul16s_compare::ms#0 muls16s::return#2 muls16s::m#5 muls16s::return#0 muls16s::m#3 muls16s::m#1 muls16s::m#2 mul16u_error::ms#0 mul16u_compare::ms#0 muls16u::return#2 muls16u::return#0 muls16u::m#3 muls16u::m#1 ]
|
zp ZP_DWORD:10 [ print_sdword::dw#4 print_sdword::dw#3 print_sdword::dw#1 print_sdword::dw#2 print_sdword::dw#0 print_dword::dw#3 print_dword::dw#1 print_dword::dw#2 print_dword::dw#0 mul16s_error::ms#0 mul16s_compare::ms#0 mul16u_compare::ms#0 mul16u_error::ms#0 muls16s::m#5 muls16s::return#0 muls16s::m#3 muls16s::m#1 muls16s::m#2 muls16s::return#2 muls16u::return#0 muls16u::m#3 muls16u::m#1 muls16u::return#2 ]
|
||||||
reg byte x [ print_byte::b#2 print_byte::b#0 print_byte::b#1 ]
|
reg byte x [ print_byte::b#2 print_byte::b#0 print_byte::b#1 ]
|
||||||
reg byte a [ print_char::ch#4 print_char::ch#2 print_char::ch#3 ]
|
reg byte a [ print_char::ch#4 print_char::ch#2 print_char::ch#3 ]
|
||||||
zp ZP_WORD:14 [ char_cursor#76 char_cursor#120 char_cursor#116 char_cursor#117 char_cursor#118 char_cursor#130 char_cursor#157 char_cursor#158 char_cursor#113 char_cursor#112 char_cursor#20 char_cursor#1 char_cursor#114 ]
|
zp ZP_WORD:14 [ char_cursor#76 char_cursor#120 char_cursor#116 char_cursor#117 char_cursor#118 char_cursor#130 char_cursor#157 char_cursor#158 char_cursor#113 char_cursor#112 char_cursor#20 char_cursor#1 char_cursor#114 ]
|
||||||
zp ZP_DWORD:16 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 mul16u::return#2 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16s::return#0 mul16s::return#2 mul16s_compare::mn#0 mul16s_error::mn#0 mul16u::return#3 mul16u_compare::mn#0 mul16u_error::mn#0 ]
|
zp ZP_DWORD:16 [ mul16s::m#4 mul16s::m#5 mul16s::m#1 mul16s::m#0 mul16s::m#2 mul16u::return#2 mul16s::return#0 mul16u::res#2 mul16u::res#6 mul16u::res#1 mul16u::return#3 mul16s::return#2 mul16s_compare::mn#0 mul16s_error::mn#0 mul16u_compare::mn#0 mul16u_error::mn#0 ]
|
||||||
zp ZP_WORD:20 [ mul16u::b#2 mul16u::b#3 mul16u::b#1 mul16u_compare::b#2 mul16u_compare::b#5 mul16u_compare::b#1 muls16u::b#0 mul16u_error::b#0 ]
|
zp ZP_WORD:20 [ mul16u::b#2 mul16u::b#3 mul16u::b#1 mul16u_compare::b#2 mul16u_compare::b#5 mul16u_compare::b#1 muls16u::b#0 mul16u_error::b#0 ]
|
||||||
zp ZP_DWORD:22 [ mul16u::mb#2 mul16u::mb#0 mul16u::mb#1 ]
|
zp ZP_DWORD:22 [ mul16u::mb#2 mul16u::mb#0 mul16u::mb#1 ]
|
||||||
reg byte x [ mul16u_compare::i#9 mul16u_compare::i#1 ]
|
reg byte x [ mul16u_compare::i#9 mul16u_compare::i#1 ]
|
||||||
|
@ -10677,38 +10677,38 @@ Attempting to uplift remaining variables inzp ZP_BYTE:79 [ mul8s_error::b#0 ]
|
|||||||
Uplifting [mul8s_error] best 293696 combination zp ZP_BYTE:79 [ mul8s_error::b#0 ]
|
Uplifting [mul8s_error] best 293696 combination zp ZP_BYTE:79 [ mul8s_error::b#0 ]
|
||||||
Attempting to uplift remaining variables inzp ZP_BYTE:118 [ mul8u_error::b#0 ]
|
Attempting to uplift remaining variables inzp ZP_BYTE:118 [ mul8u_error::b#0 ]
|
||||||
Uplifting [mul8u_error] best 293696 combination zp ZP_BYTE:118 [ mul8u_error::b#0 ]
|
Uplifting [mul8u_error] best 293696 combination zp ZP_BYTE:118 [ mul8u_error::b#0 ]
|
||||||
Coalescing zero page register [ zp ZP_BYTE:2 [ mul8s_compare::a#7 mul8s_compare::a#1 ] ] with [ zp ZP_BYTE:60 [ muls8s::a#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:2 [ mul8s_compare::a#7 mul8s_compare::a#1 ] ] with [ zp ZP_BYTE:60 [ muls8s::a#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:2 [ mul8s_compare::a#7 mul8s_compare::a#1 muls8s::a#0 ] ] with [ zp ZP_BYTE:72 [ mul8s::a#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:2 [ mul8s_compare::a#7 mul8s_compare::a#1 muls8s::a#0 ] ] with [ zp ZP_BYTE:72 [ mul8s::a#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:3 [ mul8s_compare::b#10 mul8s_compare::b#1 ] ] with [ zp ZP_BYTE:67 [ mulf8s::b#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:3 [ mul8s_compare::b#10 mul8s_compare::b#1 ] ] with [ zp ZP_BYTE:67 [ mulf8s::b#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:3 [ mul8s_compare::b#10 mul8s_compare::b#1 mulf8s::b#0 ] ] with [ zp ZP_BYTE:79 [ mul8s_error::b#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:3 [ mul8s_compare::b#10 mul8s_compare::b#1 mulf8s::b#0 ] ] with [ zp ZP_BYTE:79 [ mul8s_error::b#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:9 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 ] ] with [ zp ZP_WORD:11 [ print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:9 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 ] ] with [ zp ZP_WORD:11 [ print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:9 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 ] ] with [ zp ZP_WORD:42 [ mulf_tables_cmp::asm_sqr#2 mulf_tables_cmp::asm_sqr#1 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:9 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 ] ] with [ zp ZP_WORD:80 [ mul8s_error::ms#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:9 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 mulf_tables_cmp::asm_sqr#2 mulf_tables_cmp::asm_sqr#1 ] ] with [ zp ZP_WORD:80 [ mul8s_error::ms#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:18 [ mul8s::m#4 mul8s::m#5 mul8s::m#1 mul8s::m#0 mul8s::m#2 ] ] with [ zp ZP_WORD:74 [ mul8s::return#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:9 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 mulf_tables_cmp::asm_sqr#2 mulf_tables_cmp::asm_sqr#1 mul8s_error::ms#0 ] ] with [ zp ZP_WORD:64 [ mul8s_compare::ms#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:18 [ mul8s::m#4 mul8s::m#5 mul8s::m#1 mul8s::m#0 mul8s::m#2 mul8s::return#2 ] ] with [ zp ZP_WORD:88 [ mul8u::return#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:9 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 mulf_tables_cmp::asm_sqr#2 mulf_tables_cmp::asm_sqr#1 mul8s_error::ms#0 mul8s_compare::ms#0 ] ] with [ zp ZP_WORD:62 [ muls8s::return#2 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:22 [ mul8u::res#2 mul8u::res#6 mul8u::res#1 ] ] with [ zp ZP_WORD:113 [ mul8u::return#3 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:9 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 mulf_tables_cmp::asm_sqr#2 mulf_tables_cmp::asm_sqr#1 mul8s_error::ms#0 mul8s_compare::ms#0 muls8s::return#2 ] ] with [ zp ZP_WORD:31 [ muls8s::m#5 muls8s::return#0 muls8s::m#3 muls8s::m#1 muls8s::m#2 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:26 [ mulf8s::m#4 mulf8s::m#5 mulf8s::m#1 mulf8s::m#0 mulf8s::m#2 ] ] with [ zp ZP_WORD:68 [ mulf8s::return#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:9 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 mulf_tables_cmp::asm_sqr#2 mulf_tables_cmp::asm_sqr#1 mul8s_error::ms#0 mul8s_compare::ms#0 muls8s::return#2 muls8s::m#5 muls8s::return#0 muls8s::m#3 muls8s::m#1 muls8s::m#2 ] ] with [ zp ZP_WORD:119 [ mul8u_error::ms#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:26 [ mulf8s::m#4 mulf8s::m#5 mulf8s::m#1 mulf8s::m#0 mulf8s::m#2 mulf8s::return#2 ] ] with [ zp ZP_WORD:95 [ mulf8u::return#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:9 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 mulf_tables_cmp::asm_sqr#2 mulf_tables_cmp::asm_sqr#1 mul8s_error::ms#0 mul8s_compare::ms#0 muls8s::return#2 muls8s::m#5 muls8s::return#0 muls8s::m#3 muls8s::m#1 muls8s::m#2 mul8u_error::ms#0 ] ] with [ zp ZP_WORD:107 [ mul8u_compare::ms#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:31 [ muls8s::m#5 muls8s::return#0 muls8s::m#3 muls8s::m#1 muls8s::m#2 ] ] with [ zp ZP_WORD:62 [ muls8s::return#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:9 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 mulf_tables_cmp::asm_sqr#2 mulf_tables_cmp::asm_sqr#1 mul8s_error::ms#0 mul8s_compare::ms#0 muls8s::return#2 muls8s::m#5 muls8s::return#0 muls8s::m#3 muls8s::m#1 muls8s::m#2 mul8u_error::ms#0 mul8u_compare::ms#0 ] ] with [ zp ZP_WORD:105 [ muls8u::return#2 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:34 [ mul8u_compare::a#7 mul8u_compare::a#1 ] ] with [ zp ZP_BYTE:103 [ muls8u::a#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:9 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 mulf_tables_cmp::asm_sqr#2 mulf_tables_cmp::asm_sqr#1 mul8s_error::ms#0 mul8s_compare::ms#0 muls8s::return#2 muls8s::m#5 muls8s::return#0 muls8s::m#3 muls8s::m#1 muls8s::m#2 mul8u_error::ms#0 mul8u_compare::ms#0 muls8u::return#2 ] ] with [ zp ZP_WORD:38 [ muls8u::return#0 muls8u::m#3 muls8u::m#1 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:35 [ mul8u_compare::b#10 mul8u_compare::b#1 ] ] with [ zp ZP_BYTE:118 [ mul8u_error::b#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:18 [ mul8s::m#4 mul8s::m#5 mul8s::m#1 mul8s::m#0 mul8s::m#2 ] ] with [ zp ZP_WORD:74 [ mul8s::return#2 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:38 [ muls8u::return#0 muls8u::m#3 muls8u::m#1 ] ] with [ zp ZP_WORD:105 [ muls8u::return#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:18 [ mul8s::m#4 mul8s::m#5 mul8s::m#1 mul8s::m#0 mul8s::m#2 mul8s::return#2 ] ] with [ zp ZP_WORD:76 [ mul8s_compare::mn#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:70 [ mul8s_compare::mf#0 ] ] with [ zp ZP_WORD:84 [ mul8s_error::mf#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:18 [ mul8s::m#4 mul8s::m#5 mul8s::m#1 mul8s::m#0 mul8s::m#2 mul8s::return#2 mul8s_compare::mn#0 ] ] with [ zp ZP_WORD:82 [ mul8s_error::mn#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:76 [ mul8s_compare::mn#0 ] ] with [ zp ZP_WORD:82 [ mul8s_error::mn#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:18 [ mul8s::m#4 mul8s::m#5 mul8s::m#1 mul8s::m#0 mul8s::m#2 mul8s::return#2 mul8s_compare::mn#0 mul8s_error::mn#0 ] ] with [ zp ZP_WORD:88 [ mul8u::return#2 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:101 [ mulf8u::return#0 ] ] with [ zp ZP_WORD:109 [ mulf8u::return#3 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:18 [ mul8s::m#4 mul8s::m#5 mul8s::m#1 mul8s::m#0 mul8s::m#2 mul8s::return#2 mul8s_compare::mn#0 mul8s_error::mn#0 mul8u::return#2 ] ] with [ zp ZP_WORD:22 [ mul8u::res#2 mul8u::res#6 mul8u::res#1 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:107 [ mul8u_compare::ms#0 ] ] with [ zp ZP_WORD:119 [ mul8u_error::ms#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:18 [ mul8s::m#4 mul8s::m#5 mul8s::m#1 mul8s::m#0 mul8s::m#2 mul8s::return#2 mul8s_compare::mn#0 mul8s_error::mn#0 mul8u::return#2 mul8u::res#2 mul8u::res#6 mul8u::res#1 ] ] with [ zp ZP_WORD:113 [ mul8u::return#3 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:111 [ mul8u_compare::mf#0 ] ] with [ zp ZP_WORD:123 [ mul8u_error::mf#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:18 [ mul8s::m#4 mul8s::m#5 mul8s::m#1 mul8s::m#0 mul8s::m#2 mul8s::return#2 mul8s_compare::mn#0 mul8s_error::mn#0 mul8u::return#2 mul8u::res#2 mul8u::res#6 mul8u::res#1 mul8u::return#3 ] ] with [ zp ZP_WORD:115 [ mul8u_compare::mn#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:115 [ mul8u_compare::mn#0 ] ] with [ zp ZP_WORD:121 [ mul8u_error::mn#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:18 [ mul8s::m#4 mul8s::m#5 mul8s::m#1 mul8s::m#0 mul8s::m#2 mul8s::return#2 mul8s_compare::mn#0 mul8s_error::mn#0 mul8u::return#2 mul8u::res#2 mul8u::res#6 mul8u::res#1 mul8u::return#3 mul8u_compare::mn#0 ] ] with [ zp ZP_WORD:121 [ mul8u_error::mn#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:9 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 mul8s_error::ms#0 ] ] with [ zp ZP_WORD:42 [ mulf_tables_cmp::asm_sqr#2 mulf_tables_cmp::asm_sqr#1 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:26 [ mulf8s::m#4 mulf8s::m#5 mulf8s::m#1 mulf8s::m#0 mulf8s::m#2 ] ] with [ zp ZP_WORD:68 [ mulf8s::return#2 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:9 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 mul8s_error::ms#0 mulf_tables_cmp::asm_sqr#2 mulf_tables_cmp::asm_sqr#1 ] ] with [ zp ZP_WORD:64 [ mul8s_compare::ms#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:26 [ mulf8s::m#4 mulf8s::m#5 mulf8s::m#1 mulf8s::m#0 mulf8s::m#2 mulf8s::return#2 ] ] with [ zp ZP_WORD:70 [ mul8s_compare::mf#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:9 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 mul8s_error::ms#0 mulf_tables_cmp::asm_sqr#2 mulf_tables_cmp::asm_sqr#1 mul8s_compare::ms#0 ] ] with [ zp ZP_WORD:107 [ mul8u_compare::ms#0 mul8u_error::ms#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:26 [ mulf8s::m#4 mulf8s::m#5 mulf8s::m#1 mulf8s::m#0 mulf8s::m#2 mulf8s::return#2 mul8s_compare::mf#0 ] ] with [ zp ZP_WORD:84 [ mul8s_error::mf#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:18 [ mul8s::m#4 mul8s::m#5 mul8s::m#1 mul8s::m#0 mul8s::m#2 mul8s::return#2 mul8u::return#2 ] ] with [ zp ZP_WORD:22 [ mul8u::res#2 mul8u::res#6 mul8u::res#1 mul8u::return#3 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:26 [ mulf8s::m#4 mulf8s::m#5 mulf8s::m#1 mulf8s::m#0 mulf8s::m#2 mulf8s::return#2 mul8s_compare::mf#0 mul8s_error::mf#0 ] ] with [ zp ZP_WORD:95 [ mulf8u::return#2 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:18 [ mul8s::m#4 mul8s::m#5 mul8s::m#1 mul8s::m#0 mul8s::m#2 mul8s::return#2 mul8u::return#2 mul8u::res#2 mul8u::res#6 mul8u::res#1 mul8u::return#3 ] ] with [ zp ZP_WORD:76 [ mul8s_compare::mn#0 mul8s_error::mn#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:26 [ mulf8s::m#4 mulf8s::m#5 mulf8s::m#1 mulf8s::m#0 mulf8s::m#2 mulf8s::return#2 mul8s_compare::mf#0 mul8s_error::mf#0 mulf8u::return#2 ] ] with [ zp ZP_WORD:101 [ mulf8u::return#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:26 [ mulf8s::m#4 mulf8s::m#5 mulf8s::m#1 mulf8s::m#0 mulf8s::m#2 mulf8s::return#2 mulf8u::return#2 ] ] with [ zp ZP_WORD:70 [ mul8s_compare::mf#0 mul8s_error::mf#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:26 [ mulf8s::m#4 mulf8s::m#5 mulf8s::m#1 mulf8s::m#0 mulf8s::m#2 mulf8s::return#2 mul8s_compare::mf#0 mul8s_error::mf#0 mulf8u::return#2 mulf8u::return#0 ] ] with [ zp ZP_WORD:109 [ mulf8u::return#3 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:26 [ mulf8s::m#4 mulf8s::m#5 mulf8s::m#1 mulf8s::m#0 mulf8s::m#2 mulf8s::return#2 mulf8u::return#2 mul8s_compare::mf#0 mul8s_error::mf#0 ] ] with [ zp ZP_WORD:101 [ mulf8u::return#0 mulf8u::return#3 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:26 [ mulf8s::m#4 mulf8s::m#5 mulf8s::m#1 mulf8s::m#0 mulf8s::m#2 mulf8s::return#2 mul8s_compare::mf#0 mul8s_error::mf#0 mulf8u::return#2 mulf8u::return#0 mulf8u::return#3 ] ] with [ zp ZP_WORD:111 [ mul8u_compare::mf#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:9 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 mul8s_error::ms#0 mulf_tables_cmp::asm_sqr#2 mulf_tables_cmp::asm_sqr#1 mul8s_compare::ms#0 mul8u_compare::ms#0 mul8u_error::ms#0 ] ] with [ zp ZP_WORD:31 [ muls8s::m#5 muls8s::return#0 muls8s::m#3 muls8s::m#1 muls8s::m#2 muls8s::return#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:26 [ mulf8s::m#4 mulf8s::m#5 mulf8s::m#1 mulf8s::m#0 mulf8s::m#2 mulf8s::return#2 mul8s_compare::mf#0 mul8s_error::mf#0 mulf8u::return#2 mulf8u::return#0 mulf8u::return#3 mul8u_compare::mf#0 ] ] with [ zp ZP_WORD:123 [ mul8u_error::mf#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:9 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 mul8s_error::ms#0 mulf_tables_cmp::asm_sqr#2 mulf_tables_cmp::asm_sqr#1 mul8s_compare::ms#0 mul8u_compare::ms#0 mul8u_error::ms#0 muls8s::m#5 muls8s::return#0 muls8s::m#3 muls8s::m#1 muls8s::m#2 muls8s::return#2 ] ] with [ zp ZP_WORD:38 [ muls8u::return#0 muls8u::m#3 muls8u::m#1 muls8u::return#2 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:34 [ mul8u_compare::a#7 mul8u_compare::a#1 ] ] with [ zp ZP_BYTE:103 [ muls8u::a#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:18 [ mul8s::m#4 mul8s::m#5 mul8s::m#1 mul8s::m#0 mul8s::m#2 mul8s::return#2 mul8u::return#2 mul8u::res#2 mul8u::res#6 mul8u::res#1 mul8u::return#3 mul8s_compare::mn#0 mul8s_error::mn#0 ] ] with [ zp ZP_WORD:115 [ mul8u_compare::mn#0 mul8u_error::mn#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:35 [ mul8u_compare::b#10 mul8u_compare::b#1 ] ] with [ zp ZP_BYTE:118 [ mul8u_error::b#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:26 [ mulf8s::m#4 mulf8s::m#5 mulf8s::m#1 mulf8s::m#0 mulf8s::m#2 mulf8s::return#2 mulf8u::return#2 mul8s_compare::mf#0 mul8s_error::mf#0 mulf8u::return#0 mulf8u::return#3 ] ] with [ zp ZP_WORD:111 [ mul8u_compare::mf#0 mul8u_error::mf#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:2 [ mul8s_compare::a#7 mul8s_compare::a#1 muls8s::a#0 mul8s::a#0 ] ] with [ zp ZP_BYTE:34 [ mul8u_compare::a#7 mul8u_compare::a#1 muls8u::a#0 ] ]
|
Coalescing zero page register [ zp ZP_BYTE:2 [ mul8s_compare::a#7 mul8s_compare::a#1 muls8s::a#0 mul8s::a#0 ] ] with [ zp ZP_BYTE:34 [ mul8u_compare::a#7 mul8u_compare::a#1 muls8u::a#0 ] ]
|
||||||
Coalescing zero page register [ zp ZP_BYTE:2 [ mul8s_compare::a#7 mul8s_compare::a#1 muls8s::a#0 mul8s::a#0 mul8u_compare::a#7 mul8u_compare::a#1 muls8u::a#0 ] ] with [ zp ZP_BYTE:49 [ mulf_init::x_2#3 mulf_init::x_2#2 mulf_init::x_2#1 ] ]
|
Coalescing zero page register [ zp ZP_BYTE:2 [ mul8s_compare::a#7 mul8s_compare::a#1 muls8s::a#0 mul8s::a#0 mul8u_compare::a#7 mul8u_compare::a#1 muls8u::a#0 ] ] with [ zp ZP_BYTE:49 [ mulf_init::x_2#3 mulf_init::x_2#2 mulf_init::x_2#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_BYTE:2 [ mul8s_compare::a#7 mul8s_compare::a#1 muls8s::a#0 mul8s::a#0 mul8u_compare::a#7 mul8u_compare::a#1 muls8u::a#0 mulf_init::x_2#3 mulf_init::x_2#2 mulf_init::x_2#1 ] ] with [ zp ZP_BYTE:57 [ mulf_init::dir#2 mulf_init::dir#3 ] ]
|
Coalescing zero page register [ zp ZP_BYTE:2 [ mul8s_compare::a#7 mul8s_compare::a#1 muls8s::a#0 mul8s::a#0 mul8u_compare::a#7 mul8u_compare::a#1 muls8u::a#0 mulf_init::x_2#3 mulf_init::x_2#2 mulf_init::x_2#1 ] ] with [ zp ZP_BYTE:57 [ mulf_init::dir#2 mulf_init::dir#3 ] ]
|
||||||
@ -10720,13 +10720,13 @@ Coalescing zero page register [ zp ZP_WORD:5 [ line_cursor#23 line_cursor#45 lin
|
|||||||
Coalescing zero page register [ zp ZP_WORD:7 [ print_str::str#16 print_str::str#18 print_str::str#0 ] ] with [ zp ZP_WORD:24 [ mul8u::mb#2 mul8u::mb#0 mul8u::mb#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:7 [ print_str::str#16 print_str::str#18 print_str::str#0 ] ] with [ zp ZP_WORD:24 [ mul8u::mb#2 mul8u::mb#0 mul8u::mb#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:7 [ print_str::str#16 print_str::str#18 print_str::str#0 mul8u::mb#2 mul8u::mb#0 mul8u::mb#1 ] ] with [ zp ZP_WORD:47 [ mulf_init::sqr1_hi#2 mulf_init::sqr1_hi#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:7 [ print_str::str#16 print_str::str#18 print_str::str#0 mul8u::mb#2 mul8u::mb#0 mul8u::mb#1 ] ] with [ zp ZP_WORD:47 [ mulf_init::sqr1_hi#2 mulf_init::sqr1_hi#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:7 [ print_str::str#16 print_str::str#18 print_str::str#0 mul8u::mb#2 mul8u::mb#0 mul8u::mb#1 mulf_init::sqr1_hi#2 mulf_init::sqr1_hi#1 ] ] with [ zp ZP_WORD:55 [ mulf_init::sqr2_hi#2 mulf_init::sqr2_hi#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:7 [ print_str::str#16 print_str::str#18 print_str::str#0 mul8u::mb#2 mul8u::mb#0 mul8u::mb#1 mulf_init::sqr1_hi#2 mulf_init::sqr1_hi#1 ] ] with [ zp ZP_WORD:55 [ mulf_init::sqr2_hi#2 mulf_init::sqr2_hi#1 ] ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:9 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 mulf_tables_cmp::asm_sqr#2 mulf_tables_cmp::asm_sqr#1 mul8s_error::ms#0 mul8s_compare::ms#0 muls8s::return#2 muls8s::m#5 muls8s::return#0 muls8s::m#3 muls8s::m#1 muls8s::m#2 mul8u_error::ms#0 mul8u_compare::ms#0 muls8u::return#2 muls8u::return#0 muls8u::m#3 muls8u::m#1 ] ] with [ zp ZP_WORD:50 [ mulf_init::sqr#3 mulf_init::sqr#4 mulf_init::sqr#1 mulf_init::sqr#2 ] ]
|
Coalescing zero page register [ zp ZP_WORD:9 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 mul8s_error::ms#0 mulf_tables_cmp::asm_sqr#2 mulf_tables_cmp::asm_sqr#1 mul8s_compare::ms#0 mul8u_compare::ms#0 mul8u_error::ms#0 muls8s::m#5 muls8s::return#0 muls8s::m#3 muls8s::m#1 muls8s::m#2 muls8s::return#2 muls8u::return#0 muls8u::m#3 muls8u::m#1 muls8u::return#2 ] ] with [ zp ZP_WORD:50 [ mulf_init::sqr#3 mulf_init::sqr#4 mulf_init::sqr#1 mulf_init::sqr#2 ] ]
|
||||||
Allocated (was zp ZP_WORD:5) zp ZP_WORD:4 [ line_cursor#23 line_cursor#45 line_cursor#1 line_cursor#10 mulf_tables_cmp::kc_sqr#2 mulf_tables_cmp::kc_sqr#1 mulf_init::sqr1_lo#2 mulf_init::sqr1_lo#1 mulf_init::sqr2_lo#2 mulf_init::sqr2_lo#1 print_cls::sc#2 print_cls::sc#1 ]
|
Allocated (was zp ZP_WORD:5) zp ZP_WORD:4 [ line_cursor#23 line_cursor#45 line_cursor#1 line_cursor#10 mulf_tables_cmp::kc_sqr#2 mulf_tables_cmp::kc_sqr#1 mulf_init::sqr1_lo#2 mulf_init::sqr1_lo#1 mulf_init::sqr2_lo#2 mulf_init::sqr2_lo#1 print_cls::sc#2 print_cls::sc#1 ]
|
||||||
Allocated (was zp ZP_WORD:7) zp ZP_WORD:6 [ print_str::str#16 print_str::str#18 print_str::str#0 mul8u::mb#2 mul8u::mb#0 mul8u::mb#1 mulf_init::sqr1_hi#2 mulf_init::sqr1_hi#1 mulf_init::sqr2_hi#2 mulf_init::sqr2_hi#1 ]
|
Allocated (was zp ZP_WORD:7) zp ZP_WORD:6 [ print_str::str#16 print_str::str#18 print_str::str#0 mul8u::mb#2 mul8u::mb#0 mul8u::mb#1 mulf_init::sqr1_hi#2 mulf_init::sqr1_hi#1 mulf_init::sqr2_hi#2 mulf_init::sqr2_hi#1 ]
|
||||||
Allocated (was zp ZP_WORD:9) zp ZP_WORD:8 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 mulf_tables_cmp::asm_sqr#2 mulf_tables_cmp::asm_sqr#1 mul8s_error::ms#0 mul8s_compare::ms#0 muls8s::return#2 muls8s::m#5 muls8s::return#0 muls8s::m#3 muls8s::m#1 muls8s::m#2 mul8u_error::ms#0 mul8u_compare::ms#0 muls8u::return#2 muls8u::return#0 muls8u::m#3 muls8u::m#1 mulf_init::sqr#3 mulf_init::sqr#4 mulf_init::sqr#1 mulf_init::sqr#2 ]
|
Allocated (was zp ZP_WORD:9) zp ZP_WORD:8 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 mul8s_error::ms#0 mulf_tables_cmp::asm_sqr#2 mulf_tables_cmp::asm_sqr#1 mul8s_compare::ms#0 mul8u_compare::ms#0 mul8u_error::ms#0 muls8s::m#5 muls8s::return#0 muls8s::m#3 muls8s::m#1 muls8s::m#2 muls8s::return#2 muls8u::return#0 muls8u::m#3 muls8u::m#1 muls8u::return#2 mulf_init::sqr#3 mulf_init::sqr#4 mulf_init::sqr#1 mulf_init::sqr#2 ]
|
||||||
Allocated (was zp ZP_WORD:15) zp ZP_WORD:10 [ char_cursor#82 char_cursor#137 char_cursor#136 char_cursor#132 char_cursor#149 char_cursor#188 char_cursor#189 char_cursor#131 char_cursor#130 char_cursor#17 char_cursor#30 char_cursor#1 char_cursor#134 char_cursor#222 ]
|
Allocated (was zp ZP_WORD:15) zp ZP_WORD:10 [ char_cursor#82 char_cursor#137 char_cursor#136 char_cursor#132 char_cursor#149 char_cursor#188 char_cursor#189 char_cursor#131 char_cursor#130 char_cursor#17 char_cursor#30 char_cursor#1 char_cursor#134 char_cursor#222 ]
|
||||||
Allocated (was zp ZP_WORD:18) zp ZP_WORD:12 [ mul8s::m#4 mul8s::m#5 mul8s::m#1 mul8s::m#0 mul8s::m#2 mul8s::return#2 mul8s_compare::mn#0 mul8s_error::mn#0 mul8u::return#2 mul8u::res#2 mul8u::res#6 mul8u::res#1 mul8u::return#3 mul8u_compare::mn#0 mul8u_error::mn#0 ]
|
Allocated (was zp ZP_WORD:18) zp ZP_WORD:12 [ mul8s::m#4 mul8s::m#5 mul8s::m#1 mul8s::m#0 mul8s::m#2 mul8s::return#2 mul8u::return#2 mul8u::res#2 mul8u::res#6 mul8u::res#1 mul8u::return#3 mul8s_compare::mn#0 mul8s_error::mn#0 mul8u_compare::mn#0 mul8u_error::mn#0 ]
|
||||||
Allocated (was zp ZP_WORD:26) zp ZP_WORD:14 [ mulf8s::m#4 mulf8s::m#5 mulf8s::m#1 mulf8s::m#0 mulf8s::m#2 mulf8s::return#2 mul8s_compare::mf#0 mul8s_error::mf#0 mulf8u::return#2 mulf8u::return#0 mulf8u::return#3 mul8u_compare::mf#0 mul8u_error::mf#0 ]
|
Allocated (was zp ZP_WORD:26) zp ZP_WORD:14 [ mulf8s::m#4 mulf8s::m#5 mulf8s::m#1 mulf8s::m#0 mulf8s::m#2 mulf8s::return#2 mulf8u::return#2 mul8s_compare::mf#0 mul8s_error::mf#0 mulf8u::return#0 mulf8u::return#3 mul8u_compare::mf#0 mul8u_error::mf#0 ]
|
||||||
|
|
||||||
ASSEMBLER BEFORE OPTIMIZATION
|
ASSEMBLER BEFORE OPTIMIZATION
|
||||||
//SEG0 Basic Upstart
|
//SEG0 Basic Upstart
|
||||||
@ -13549,15 +13549,15 @@ zp ZP_BYTE:3 [ mul8s_compare::b#10 mul8s_compare::b#1 mulf8s::b#0 mul8s_error::b
|
|||||||
reg byte x [ mul8s_compare::ok#3 mul8s_compare::ok#4 ]
|
reg byte x [ mul8s_compare::ok#3 mul8s_compare::ok#4 ]
|
||||||
zp ZP_WORD:4 [ line_cursor#23 line_cursor#45 line_cursor#1 line_cursor#10 mulf_tables_cmp::kc_sqr#2 mulf_tables_cmp::kc_sqr#1 mulf_init::sqr1_lo#2 mulf_init::sqr1_lo#1 mulf_init::sqr2_lo#2 mulf_init::sqr2_lo#1 print_cls::sc#2 print_cls::sc#1 ]
|
zp ZP_WORD:4 [ line_cursor#23 line_cursor#45 line_cursor#1 line_cursor#10 mulf_tables_cmp::kc_sqr#2 mulf_tables_cmp::kc_sqr#1 mulf_init::sqr1_lo#2 mulf_init::sqr1_lo#1 mulf_init::sqr2_lo#2 mulf_init::sqr2_lo#1 print_cls::sc#2 print_cls::sc#1 ]
|
||||||
zp ZP_WORD:6 [ print_str::str#16 print_str::str#18 print_str::str#0 mul8u::mb#2 mul8u::mb#0 mul8u::mb#1 mulf_init::sqr1_hi#2 mulf_init::sqr1_hi#1 mulf_init::sqr2_hi#2 mulf_init::sqr2_hi#1 ]
|
zp ZP_WORD:6 [ print_str::str#16 print_str::str#18 print_str::str#0 mul8u::mb#2 mul8u::mb#0 mul8u::mb#1 mulf_init::sqr1_hi#2 mulf_init::sqr1_hi#1 mulf_init::sqr2_hi#2 mulf_init::sqr2_hi#1 ]
|
||||||
zp ZP_WORD:8 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 mulf_tables_cmp::asm_sqr#2 mulf_tables_cmp::asm_sqr#1 mul8s_error::ms#0 mul8s_compare::ms#0 muls8s::return#2 muls8s::m#5 muls8s::return#0 muls8s::m#3 muls8s::m#1 muls8s::m#2 mul8u_error::ms#0 mul8u_compare::ms#0 muls8u::return#2 muls8u::return#0 muls8u::m#3 muls8u::m#1 mulf_init::sqr#3 mulf_init::sqr#4 mulf_init::sqr#1 mulf_init::sqr#2 ]
|
zp ZP_WORD:8 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 mul8s_error::ms#0 mulf_tables_cmp::asm_sqr#2 mulf_tables_cmp::asm_sqr#1 mul8s_compare::ms#0 mul8u_compare::ms#0 mul8u_error::ms#0 muls8s::m#5 muls8s::return#0 muls8s::m#3 muls8s::m#1 muls8s::m#2 muls8s::return#2 muls8u::return#0 muls8u::m#3 muls8u::m#1 muls8u::return#2 mulf_init::sqr#3 mulf_init::sqr#4 mulf_init::sqr#1 mulf_init::sqr#2 ]
|
||||||
reg byte x [ print_byte::b#5 print_byte::b#3 print_byte::b#4 print_byte::b#9 print_byte::b#1 print_byte::b#2 ]
|
reg byte x [ print_byte::b#5 print_byte::b#3 print_byte::b#4 print_byte::b#9 print_byte::b#1 print_byte::b#2 ]
|
||||||
reg byte a [ print_char::ch#4 print_char::ch#2 print_char::ch#3 ]
|
reg byte a [ print_char::ch#4 print_char::ch#2 print_char::ch#3 ]
|
||||||
zp ZP_WORD:10 [ char_cursor#82 char_cursor#137 char_cursor#136 char_cursor#132 char_cursor#149 char_cursor#188 char_cursor#189 char_cursor#131 char_cursor#130 char_cursor#17 char_cursor#30 char_cursor#1 char_cursor#134 char_cursor#222 ]
|
zp ZP_WORD:10 [ char_cursor#82 char_cursor#137 char_cursor#136 char_cursor#132 char_cursor#149 char_cursor#188 char_cursor#189 char_cursor#131 char_cursor#130 char_cursor#17 char_cursor#30 char_cursor#1 char_cursor#134 char_cursor#222 ]
|
||||||
reg byte x [ print_sbyte::b#4 print_sbyte::b#3 print_sbyte::b#1 print_sbyte::b#2 print_sbyte::b#0 ]
|
reg byte x [ print_sbyte::b#4 print_sbyte::b#3 print_sbyte::b#1 print_sbyte::b#2 print_sbyte::b#0 ]
|
||||||
zp ZP_WORD:12 [ mul8s::m#4 mul8s::m#5 mul8s::m#1 mul8s::m#0 mul8s::m#2 mul8s::return#2 mul8s_compare::mn#0 mul8s_error::mn#0 mul8u::return#2 mul8u::res#2 mul8u::res#6 mul8u::res#1 mul8u::return#3 mul8u_compare::mn#0 mul8u_error::mn#0 ]
|
zp ZP_WORD:12 [ mul8s::m#4 mul8s::m#5 mul8s::m#1 mul8s::m#0 mul8s::m#2 mul8s::return#2 mul8u::return#2 mul8u::res#2 mul8u::res#6 mul8u::res#1 mul8u::return#3 mul8s_compare::mn#0 mul8s_error::mn#0 mul8u_compare::mn#0 mul8u_error::mn#0 ]
|
||||||
reg byte a [ mul8u::b#2 mul8u::b#3 mul8u::b#1 ]
|
reg byte a [ mul8u::b#2 mul8u::b#3 mul8u::b#1 ]
|
||||||
reg byte x [ mul8u::a#3 mul8u::a#6 mul8u::a#8 mul8u::a#2 mul8u::a#0 ]
|
reg byte x [ mul8u::a#3 mul8u::a#6 mul8u::a#8 mul8u::a#2 mul8u::a#0 ]
|
||||||
zp ZP_WORD:14 [ mulf8s::m#4 mulf8s::m#5 mulf8s::m#1 mulf8s::m#0 mulf8s::m#2 mulf8s::return#2 mul8s_compare::mf#0 mul8s_error::mf#0 mulf8u::return#2 mulf8u::return#0 mulf8u::return#3 mul8u_compare::mf#0 mul8u_error::mf#0 ]
|
zp ZP_WORD:14 [ mulf8s::m#4 mulf8s::m#5 mulf8s::m#1 mulf8s::m#0 mulf8s::m#2 mulf8s::return#2 mulf8u::return#2 mul8s_compare::mf#0 mul8s_error::mf#0 mulf8u::return#0 mulf8u::return#3 mul8u_compare::mf#0 mul8u_error::mf#0 ]
|
||||||
reg byte a [ mulf8u::a#2 mulf8u::a#1 mulf8u::a#4 ]
|
reg byte a [ mulf8u::a#2 mulf8u::a#1 mulf8u::a#4 ]
|
||||||
reg byte x [ mulf8u::b#2 mulf8u::b#1 mulf8u::b#4 ]
|
reg byte x [ mulf8u::b#2 mulf8u::b#1 mulf8u::b#4 ]
|
||||||
reg byte y [ muls8s::i#2 muls8s::i#1 ]
|
reg byte y [ muls8s::i#2 muls8s::i#1 ]
|
||||||
|
@ -441,15 +441,15 @@ zp ZP_BYTE:3 [ mul8s_compare::b#10 mul8s_compare::b#1 mulf8s::b#0 mul8s_error::b
|
|||||||
reg byte x [ mul8s_compare::ok#3 mul8s_compare::ok#4 ]
|
reg byte x [ mul8s_compare::ok#3 mul8s_compare::ok#4 ]
|
||||||
zp ZP_WORD:4 [ line_cursor#23 line_cursor#45 line_cursor#1 line_cursor#10 mulf_tables_cmp::kc_sqr#2 mulf_tables_cmp::kc_sqr#1 mulf_init::sqr1_lo#2 mulf_init::sqr1_lo#1 mulf_init::sqr2_lo#2 mulf_init::sqr2_lo#1 print_cls::sc#2 print_cls::sc#1 ]
|
zp ZP_WORD:4 [ line_cursor#23 line_cursor#45 line_cursor#1 line_cursor#10 mulf_tables_cmp::kc_sqr#2 mulf_tables_cmp::kc_sqr#1 mulf_init::sqr1_lo#2 mulf_init::sqr1_lo#1 mulf_init::sqr2_lo#2 mulf_init::sqr2_lo#1 print_cls::sc#2 print_cls::sc#1 ]
|
||||||
zp ZP_WORD:6 [ print_str::str#16 print_str::str#18 print_str::str#0 mul8u::mb#2 mul8u::mb#0 mul8u::mb#1 mulf_init::sqr1_hi#2 mulf_init::sqr1_hi#1 mulf_init::sqr2_hi#2 mulf_init::sqr2_hi#1 ]
|
zp ZP_WORD:6 [ print_str::str#16 print_str::str#18 print_str::str#0 mul8u::mb#2 mul8u::mb#0 mul8u::mb#1 mulf_init::sqr1_hi#2 mulf_init::sqr1_hi#1 mulf_init::sqr2_hi#2 mulf_init::sqr2_hi#1 ]
|
||||||
zp ZP_WORD:8 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 mulf_tables_cmp::asm_sqr#2 mulf_tables_cmp::asm_sqr#1 mul8s_error::ms#0 mul8s_compare::ms#0 muls8s::return#2 muls8s::m#5 muls8s::return#0 muls8s::m#3 muls8s::m#1 muls8s::m#2 mul8u_error::ms#0 mul8u_compare::ms#0 muls8u::return#2 muls8u::return#0 muls8u::m#3 muls8u::m#1 mulf_init::sqr#3 mulf_init::sqr#4 mulf_init::sqr#1 mulf_init::sqr#2 ]
|
zp ZP_WORD:8 [ print_sword::w#5 print_sword::w#4 print_sword::w#1 print_sword::w#2 print_sword::w#3 print_sword::w#0 print_word::w#6 print_word::w#3 print_word::w#4 print_word::w#5 print_word::w#11 print_word::w#12 print_word::w#13 mul8s_error::ms#0 mulf_tables_cmp::asm_sqr#2 mulf_tables_cmp::asm_sqr#1 mul8s_compare::ms#0 mul8u_compare::ms#0 mul8u_error::ms#0 muls8s::m#5 muls8s::return#0 muls8s::m#3 muls8s::m#1 muls8s::m#2 muls8s::return#2 muls8u::return#0 muls8u::m#3 muls8u::m#1 muls8u::return#2 mulf_init::sqr#3 mulf_init::sqr#4 mulf_init::sqr#1 mulf_init::sqr#2 ]
|
||||||
reg byte x [ print_byte::b#5 print_byte::b#3 print_byte::b#4 print_byte::b#9 print_byte::b#1 print_byte::b#2 ]
|
reg byte x [ print_byte::b#5 print_byte::b#3 print_byte::b#4 print_byte::b#9 print_byte::b#1 print_byte::b#2 ]
|
||||||
reg byte a [ print_char::ch#4 print_char::ch#2 print_char::ch#3 ]
|
reg byte a [ print_char::ch#4 print_char::ch#2 print_char::ch#3 ]
|
||||||
zp ZP_WORD:10 [ char_cursor#82 char_cursor#137 char_cursor#136 char_cursor#132 char_cursor#149 char_cursor#188 char_cursor#189 char_cursor#131 char_cursor#130 char_cursor#17 char_cursor#30 char_cursor#1 char_cursor#134 char_cursor#222 ]
|
zp ZP_WORD:10 [ char_cursor#82 char_cursor#137 char_cursor#136 char_cursor#132 char_cursor#149 char_cursor#188 char_cursor#189 char_cursor#131 char_cursor#130 char_cursor#17 char_cursor#30 char_cursor#1 char_cursor#134 char_cursor#222 ]
|
||||||
reg byte x [ print_sbyte::b#4 print_sbyte::b#3 print_sbyte::b#1 print_sbyte::b#2 print_sbyte::b#0 ]
|
reg byte x [ print_sbyte::b#4 print_sbyte::b#3 print_sbyte::b#1 print_sbyte::b#2 print_sbyte::b#0 ]
|
||||||
zp ZP_WORD:12 [ mul8s::m#4 mul8s::m#5 mul8s::m#1 mul8s::m#0 mul8s::m#2 mul8s::return#2 mul8s_compare::mn#0 mul8s_error::mn#0 mul8u::return#2 mul8u::res#2 mul8u::res#6 mul8u::res#1 mul8u::return#3 mul8u_compare::mn#0 mul8u_error::mn#0 ]
|
zp ZP_WORD:12 [ mul8s::m#4 mul8s::m#5 mul8s::m#1 mul8s::m#0 mul8s::m#2 mul8s::return#2 mul8u::return#2 mul8u::res#2 mul8u::res#6 mul8u::res#1 mul8u::return#3 mul8s_compare::mn#0 mul8s_error::mn#0 mul8u_compare::mn#0 mul8u_error::mn#0 ]
|
||||||
reg byte a [ mul8u::b#2 mul8u::b#3 mul8u::b#1 ]
|
reg byte a [ mul8u::b#2 mul8u::b#3 mul8u::b#1 ]
|
||||||
reg byte x [ mul8u::a#3 mul8u::a#6 mul8u::a#8 mul8u::a#2 mul8u::a#0 ]
|
reg byte x [ mul8u::a#3 mul8u::a#6 mul8u::a#8 mul8u::a#2 mul8u::a#0 ]
|
||||||
zp ZP_WORD:14 [ mulf8s::m#4 mulf8s::m#5 mulf8s::m#1 mulf8s::m#0 mulf8s::m#2 mulf8s::return#2 mul8s_compare::mf#0 mul8s_error::mf#0 mulf8u::return#2 mulf8u::return#0 mulf8u::return#3 mul8u_compare::mf#0 mul8u_error::mf#0 ]
|
zp ZP_WORD:14 [ mulf8s::m#4 mulf8s::m#5 mulf8s::m#1 mulf8s::m#0 mulf8s::m#2 mulf8s::return#2 mulf8u::return#2 mul8s_compare::mf#0 mul8s_error::mf#0 mulf8u::return#0 mulf8u::return#3 mul8u_compare::mf#0 mul8u_error::mf#0 ]
|
||||||
reg byte a [ mulf8u::a#2 mulf8u::a#1 mulf8u::a#4 ]
|
reg byte a [ mulf8u::a#2 mulf8u::a#1 mulf8u::a#4 ]
|
||||||
reg byte x [ mulf8u::b#2 mulf8u::b#1 mulf8u::b#4 ]
|
reg byte x [ mulf8u::b#2 mulf8u::b#1 mulf8u::b#4 ]
|
||||||
reg byte y [ muls8s::i#2 muls8s::i#1 ]
|
reg byte y [ muls8s::i#2 muls8s::i#1 ]
|
||||||
|
@ -2600,9 +2600,9 @@ Attempting to uplift remaining variables inzp ZP_BYTE:20 [ findcol::x#0 ]
|
|||||||
Uplifting [findcol] best 1703953 combination zp ZP_BYTE:20 [ findcol::x#0 ]
|
Uplifting [findcol] best 1703953 combination zp ZP_BYTE:20 [ findcol::x#0 ]
|
||||||
Attempting to uplift remaining variables inzp ZP_BYTE:2 [ render::y#4 render::y#1 ]
|
Attempting to uplift remaining variables inzp ZP_BYTE:2 [ render::y#4 render::y#1 ]
|
||||||
Uplifting [render] best 1703953 combination zp ZP_BYTE:2 [ render::y#4 render::y#1 ]
|
Uplifting [render] best 1703953 combination zp ZP_BYTE:2 [ render::y#4 render::y#1 ]
|
||||||
Coalescing zero page register [ zp ZP_BYTE:9 [ findcol::diff#4 findcol::diff#1 findcol::diff#0 ] ] with [ zp ZP_BYTE:24 [ findcol::xp#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:9 [ findcol::diff#4 findcol::diff#1 findcol::diff#0 ] ] with [ zp ZP_BYTE:24 [ findcol::xp#0 ] ] - score: 2
|
||||||
Coalescing zero page register [ zp ZP_BYTE:2 [ render::y#4 render::y#1 ] ] with [ zp ZP_BYTE:21 [ findcol::y#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:2 [ render::y#4 render::y#1 ] ] with [ zp ZP_BYTE:21 [ findcol::y#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_BYTE:5 [ render::x#2 render::x#1 ] ] with [ zp ZP_BYTE:20 [ findcol::x#0 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_BYTE:5 [ render::x#2 render::x#1 ] ] with [ zp ZP_BYTE:20 [ findcol::x#0 ] ] - score: 1
|
||||||
Coalescing zero page register [ zp ZP_WORD:3 [ render::colline#5 render::colline#1 ] ] with [ zp ZP_WORD:11 [ initscreen::screen#2 initscreen::screen#1 ] ]
|
Coalescing zero page register [ zp ZP_WORD:3 [ render::colline#5 render::colline#1 ] ] with [ zp ZP_WORD:11 [ initscreen::screen#2 initscreen::screen#1 ] ]
|
||||||
Allocated (was zp ZP_BYTE:7) zp ZP_BYTE:6 [ findcol::mindiff#10 findcol::mindiff#13 ]
|
Allocated (was zp ZP_BYTE:7) zp ZP_BYTE:6 [ findcol::mindiff#10 findcol::mindiff#13 ]
|
||||||
Allocated (was zp ZP_BYTE:9) zp ZP_BYTE:7 [ findcol::diff#4 findcol::diff#1 findcol::diff#0 findcol::xp#0 ]
|
Allocated (was zp ZP_BYTE:9) zp ZP_BYTE:7 [ findcol::diff#4 findcol::diff#1 findcol::diff#0 findcol::xp#0 ]
|
||||||
|
@ -584,7 +584,7 @@ Attempting to uplift remaining variables inzp ZP_BYTE:3 [ main::i#4 main::i#1 ]
|
|||||||
Uplifting [main] best 78433 combination zp ZP_BYTE:3 [ main::i#4 main::i#1 ]
|
Uplifting [main] best 78433 combination zp ZP_BYTE:3 [ main::i#4 main::i#1 ]
|
||||||
Attempting to uplift remaining variables inzp ZP_BYTE:2 [ main::j#6 main::j#1 ]
|
Attempting to uplift remaining variables inzp ZP_BYTE:2 [ main::j#6 main::j#1 ]
|
||||||
Uplifting [main] best 78433 combination zp ZP_BYTE:2 [ main::j#6 main::j#1 ]
|
Uplifting [main] best 78433 combination zp ZP_BYTE:2 [ main::j#6 main::j#1 ]
|
||||||
Coalescing zero page register [ zp ZP_WORD:5 [ main::zpptr2#0 ] ] with [ zp ZP_WORD:9 [ main::zpptr2#1 ] ]
|
Coalescing zero page register with common assignment [ zp ZP_WORD:5 [ main::zpptr2#0 ] ] with [ zp ZP_WORD:9 [ main::zpptr2#1 ] ] - score: 1
|
||||||
Allocated (was zp ZP_WORD:5) zp ZP_WORD:4 [ main::zpptr2#0 main::zpptr2#1 ]
|
Allocated (was zp ZP_WORD:5) zp ZP_WORD:4 [ main::zpptr2#0 main::zpptr2#1 ]
|
||||||
Allocated (was zp ZP_WORD:7) zp ZP_WORD:6 [ main::w#0 ]
|
Allocated (was zp ZP_WORD:7) zp ZP_WORD:6 [ main::w#0 ]
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user