mirror of
https://gitlab.com/camelot/kickc.git
synced 2025-04-07 06:37:31 +00:00
Implemented hardware & kernel interrupt types.
This commit is contained in:
parent
6a20fc33c7
commit
f8ec74dc14
@ -9,6 +9,8 @@ public class AsmInstruction implements AsmLine {
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private int index;
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private boolean dontOptimize;
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public AsmInstruction(AsmInstructionType type, String parameter) {
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this.type = type;
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this.parameter = parameter;
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@ -59,4 +61,12 @@ public class AsmInstruction implements AsmLine {
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public void setIndex(int index) {
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this.index = index;
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}
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public boolean isDontOptimize() {
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return dontOptimize;
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}
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public void setDontOptimize(boolean dontOptimize) {
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this.dontOptimize = dontOptimize;
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}
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}
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@ -7,6 +7,8 @@ public class AsmLabel implements AsmLine {
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private int index;
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private boolean dontOptimize;
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public AsmLabel(String label) {
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this.label = label;
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}
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@ -44,6 +46,14 @@ public class AsmLabel implements AsmLine {
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this.index = index;
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}
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public boolean isDontOptimize() {
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return dontOptimize;
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}
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public void setDontOptimize(boolean dontOptimize) {
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this.dontOptimize = dontOptimize;
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}
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@Override
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public String toString() {
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return getAsm();
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@ -55,8 +55,10 @@ public class AsmProgram {
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addLine(new AsmComment(comment));
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}
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public void addLabel(String label) {
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addLine(new AsmLabel(label));
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public AsmLabel addLabel(String label) {
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AsmLabel asmLabel = new AsmLabel(label);
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addLine(asmLabel);
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return asmLabel;
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}
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public void addScopeBegin(String label) {
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@ -67,9 +69,11 @@ public class AsmProgram {
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addLine(new AsmScopeEnd());
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}
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public void addInstruction(String mnemonic, AsmAddressingMode addressingMode, String parameter, boolean zp) {
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public AsmInstruction addInstruction(String mnemonic, AsmAddressingMode addressingMode, String parameter, boolean zp) {
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AsmInstructionType instructionType = AsmInstructionSet.getInstructionType(mnemonic, addressingMode, zp);
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addLine(new AsmInstruction(instructionType, parameter));
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AsmInstruction instruction = new AsmInstruction(instructionType, parameter);
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addLine(instruction);
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return instruction;
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}
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public void addLabelDecl(String name, int address) {
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@ -126,6 +126,20 @@ public class ControlFlowBlock {
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return getLabel().isProcExit();
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}
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/**
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* Get the procedure, that the block is part of. Null if the block is not part of a procedure.
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*
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* @return the procedure, that the block is part of
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*/
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public Procedure getProcedure(Program program) {
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Symbol symbol = program.getScope().getSymbol(getLabel());
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if(symbol instanceof Procedure) {
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return (Procedure) symbol;
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} else {
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return null;
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}
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}
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public String toString(Program program) {
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ControlFlowGraph graph = program.getGraph();
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@ -90,10 +90,16 @@ public class Procedure extends Scope {
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/** The different types of supported interrupts. */
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public enum InterruptType {
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/** Interrupt served by the kernel called through $0314-5. Will exit through the kernel using $ea31. */
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KERNEL_STD,
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/** Interrupt served by the kernel called through $0314-5. Will exit through the kernel using $ea81. */
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KERNEL,
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KERNEL_MIN,
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/** Interrupt served directly from hardware through $fffe-f. Will exit through RTI and will save NO registers. */
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HARDWARE_NONE,
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/** Interrupt served directly from hardware through $fffe-f. Will exit through RTI and will save ALL registers. */
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HARDWARE_ALL,
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/** Interrupt served directly from hardware through $fffe-f. Will exit through RTI and will save necessary registers based on clobber. */
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HARDWARE
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HARDWARE_CLOBBER
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}
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@Override
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@ -65,7 +65,7 @@ directive
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| 'register' '(' NAME ')' #directiveRegister
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| 'inline' #directiveInline
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| 'volatile' #directiveVolatile
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| 'interrupt' ( '(' ('hardware' | 'kernel' ) ')' )? #directiveInterrupt
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| 'interrupt' ( '(' ('hardware' ( 'none' | 'clobber' | 'all' )? | 'kernel' ( 'min' | 'std' )? ) ')' )? #directiveInterrupt
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;
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stmtSeq
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@ -68,26 +68,30 @@ T__66=67
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T__67=68
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T__68=69
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T__69=70
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MNEMONIC=71
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KICKASM=72
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SIMPLETYPE=73
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STRING=74
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CHAR=75
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BOOLEAN=76
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NUMBER=77
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NUMFLOAT=78
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BINFLOAT=79
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DECFLOAT=80
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HEXFLOAT=81
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NUMINT=82
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BININTEGER=83
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DECINTEGER=84
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HEXINTEGER=85
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NAME=86
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ASMREL=87
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WS=88
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COMMENT_LINE=89
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COMMENT_BLOCK=90
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T__70=71
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T__71=72
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T__72=73
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T__73=74
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MNEMONIC=75
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KICKASM=76
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SIMPLETYPE=77
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STRING=78
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CHAR=79
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BOOLEAN=80
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NUMBER=81
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NUMFLOAT=82
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BINFLOAT=83
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DECFLOAT=84
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HEXFLOAT=85
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NUMINT=86
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BININTEGER=87
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DECINTEGER=88
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HEXINTEGER=89
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NAME=90
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ASMREL=91
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WS=92
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COMMENT_LINE=93
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COMMENT_BLOCK=94
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'import'=1
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'='=2
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';'=3
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@ -112,49 +116,53 @@ COMMENT_BLOCK=90
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'volatile'=22
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'interrupt'=23
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'hardware'=24
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'kernel'=25
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'if'=26
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'else'=27
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'while'=28
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'do'=29
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'for'=30
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'return'=31
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'asm'=32
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'..'=33
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'signed'=34
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'*'=35
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'['=36
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']'=37
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'--'=38
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'++'=39
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'+'=40
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'-'=41
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'!'=42
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'&'=43
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'~'=44
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'>>'=45
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'<<'=46
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'/'=47
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'%'=48
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'<'=49
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'>'=50
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'=='=51
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'!='=52
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'<='=53
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'>='=54
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'^'=55
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'|'=56
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'&&'=57
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'||'=58
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'+='=59
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'-='=60
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'*='=61
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'/='=62
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'%='=63
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'<<='=64
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'>>='=65
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'&='=66
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'|='=67
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'^='=68
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'.byte'=69
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'#'=70
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'none'=25
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'all'=26
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'kernel'=27
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'min'=28
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'std'=29
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'if'=30
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'else'=31
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'while'=32
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'do'=33
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'for'=34
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'return'=35
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'asm'=36
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'..'=37
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'signed'=38
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'*'=39
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'['=40
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']'=41
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'--'=42
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'++'=43
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'+'=44
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'-'=45
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'!'=46
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'&'=47
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'~'=48
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'>>'=49
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'<<'=50
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'/'=51
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'%'=52
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'<'=53
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'>'=54
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'=='=55
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'!='=56
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'<='=57
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'>='=58
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'^'=59
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'|'=60
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'&&'=61
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'||'=62
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'+='=63
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'-='=64
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'*='=65
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'/='=66
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'%='=67
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'<<='=68
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'>>='=69
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'&='=70
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'|='=71
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'^='=72
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'.byte'=73
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'#'=74
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@ -26,10 +26,11 @@ public class KickCLexer extends Lexer {
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T__45=46, T__46=47, T__47=48, T__48=49, T__49=50, T__50=51, T__51=52,
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T__52=53, T__53=54, T__54=55, T__55=56, T__56=57, T__57=58, T__58=59,
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T__59=60, T__60=61, T__61=62, T__62=63, T__63=64, T__64=65, T__65=66,
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T__66=67, T__67=68, T__68=69, T__69=70, MNEMONIC=71, KICKASM=72, SIMPLETYPE=73,
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STRING=74, CHAR=75, BOOLEAN=76, NUMBER=77, NUMFLOAT=78, BINFLOAT=79, DECFLOAT=80,
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HEXFLOAT=81, NUMINT=82, BININTEGER=83, DECINTEGER=84, HEXINTEGER=85, NAME=86,
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ASMREL=87, WS=88, COMMENT_LINE=89, COMMENT_BLOCK=90;
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T__66=67, T__67=68, T__68=69, T__69=70, T__70=71, T__71=72, T__72=73,
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T__73=74, MNEMONIC=75, KICKASM=76, SIMPLETYPE=77, STRING=78, CHAR=79,
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BOOLEAN=80, NUMBER=81, NUMFLOAT=82, BINFLOAT=83, DECFLOAT=84, HEXFLOAT=85,
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NUMINT=86, BININTEGER=87, DECINTEGER=88, HEXINTEGER=89, NAME=90, ASMREL=91,
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WS=92, COMMENT_LINE=93, COMMENT_BLOCK=94;
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public static String[] channelNames = {
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"DEFAULT_TOKEN_CHANNEL", "HIDDEN"
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};
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@ -47,23 +48,23 @@ public class KickCLexer extends Lexer {
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"T__41", "T__42", "T__43", "T__44", "T__45", "T__46", "T__47", "T__48",
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"T__49", "T__50", "T__51", "T__52", "T__53", "T__54", "T__55", "T__56",
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"T__57", "T__58", "T__59", "T__60", "T__61", "T__62", "T__63", "T__64",
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"T__65", "T__66", "T__67", "T__68", "T__69", "MNEMONIC", "KICKASM", "SIMPLETYPE",
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"STRING", "CHAR", "BOOLEAN", "NUMBER", "NUMFLOAT", "BINFLOAT", "DECFLOAT",
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"HEXFLOAT", "NUMINT", "BININTEGER", "DECINTEGER", "HEXINTEGER", "BINDIGIT",
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"DECDIGIT", "HEXDIGIT", "NAME", "NAME_START", "NAME_CHAR", "ASMREL", "WS",
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"COMMENT_LINE", "COMMENT_BLOCK"
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"T__65", "T__66", "T__67", "T__68", "T__69", "T__70", "T__71", "T__72",
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"T__73", "MNEMONIC", "KICKASM", "SIMPLETYPE", "STRING", "CHAR", "BOOLEAN",
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"NUMBER", "NUMFLOAT", "BINFLOAT", "DECFLOAT", "HEXFLOAT", "NUMINT", "BININTEGER",
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"DECINTEGER", "HEXINTEGER", "BINDIGIT", "DECDIGIT", "HEXDIGIT", "NAME",
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"NAME_START", "NAME_CHAR", "ASMREL", "WS", "COMMENT_LINE", "COMMENT_BLOCK"
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};
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private static final String[] _LITERAL_NAMES = {
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null, "'import'", "'='", "';'", "'('", "')'", "'{'", "'}'", "'kickasm'",
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"','", "'resource'", "'clobber'", "'param'", "':'", "'bytes'", "'cycles'",
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"'pc'", "'inline'", "'const'", "'extern'", "'align'", "'register'", "'volatile'",
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"'interrupt'", "'hardware'", "'kernel'", "'if'", "'else'", "'while'",
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"'do'", "'for'", "'return'", "'asm'", "'..'", "'signed'", "'*'", "'['",
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"']'", "'--'", "'++'", "'+'", "'-'", "'!'", "'&'", "'~'", "'>>'", "'<<'",
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"'/'", "'%'", "'<'", "'>'", "'=='", "'!='", "'<='", "'>='", "'^'", "'|'",
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"'&&'", "'||'", "'+='", "'-='", "'*='", "'/='", "'%='", "'<<='", "'>>='",
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"'&='", "'|='", "'^='", "'.byte'", "'#'"
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"'interrupt'", "'hardware'", "'none'", "'all'", "'kernel'", "'min'", "'std'",
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"'if'", "'else'", "'while'", "'do'", "'for'", "'return'", "'asm'", "'..'",
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"'signed'", "'*'", "'['", "']'", "'--'", "'++'", "'+'", "'-'", "'!'",
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"'&'", "'~'", "'>>'", "'<<'", "'/'", "'%'", "'<'", "'>'", "'=='", "'!='",
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"'<='", "'>='", "'^'", "'|'", "'&&'", "'||'", "'+='", "'-='", "'*='",
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"'/='", "'%='", "'<<='", "'>>='", "'&='", "'|='", "'^='", "'.byte'", "'#'"
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};
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private static final String[] _SYMBOLIC_NAMES = {
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null, null, null, null, null, null, null, null, null, null, null, null,
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@ -71,10 +72,11 @@ public class KickCLexer extends Lexer {
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null, null, null, null, null, null, null, null, null, null, null, null,
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null, null, null, null, null, null, null, null, null, null, null, null,
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null, null, null, null, null, null, null, null, null, null, null, null,
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null, null, null, null, null, null, null, null, null, null, null, "MNEMONIC",
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"KICKASM", "SIMPLETYPE", "STRING", "CHAR", "BOOLEAN", "NUMBER", "NUMFLOAT",
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"BINFLOAT", "DECFLOAT", "HEXFLOAT", "NUMINT", "BININTEGER", "DECINTEGER",
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"HEXINTEGER", "NAME", "ASMREL", "WS", "COMMENT_LINE", "COMMENT_BLOCK"
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null, null, null, null, null, null, null, null, null, null, null, null,
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null, null, null, "MNEMONIC", "KICKASM", "SIMPLETYPE", "STRING", "CHAR",
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"BOOLEAN", "NUMBER", "NUMFLOAT", "BINFLOAT", "DECFLOAT", "HEXFLOAT", "NUMINT",
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"BININTEGER", "DECINTEGER", "HEXINTEGER", "NAME", "ASMREL", "WS", "COMMENT_LINE",
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"COMMENT_BLOCK"
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};
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public static final Vocabulary VOCABULARY = new VocabularyImpl(_LITERAL_NAMES, _SYMBOLIC_NAMES);
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@ -134,7 +136,7 @@ public class KickCLexer extends Lexer {
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public ATN getATN() { return _ATN; }
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public static final String _serializedATN =
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"\3\u608b\ua72a\u8133\ub9ed\u417c\u3be7\u7786\u5964\2\\\u0397\b\1\4\2\t"+
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"\3\u608b\ua72a\u8133\ub9ed\u417c\u3be7\u7786\u5964\2`\u03b0\b\1\4\2\t"+
|
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"\2\4\3\t\3\4\4\t\4\4\5\t\5\4\6\t\6\4\7\t\7\4\b\t\b\4\t\t\t\4\n\t\n\4\13"+
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"\t\13\4\f\t\f\4\r\t\r\4\16\t\16\4\17\t\17\4\20\t\20\4\21\t\21\4\22\t\22"+
|
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"\4\23\t\23\4\24\t\24\4\25\t\25\4\26\t\26\4\27\t\27\4\30\t\30\4\31\t\31"+
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@ -145,326 +147,334 @@ public class KickCLexer extends Lexer {
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"\4>\t>\4?\t?\4@\t@\4A\tA\4B\tB\4C\tC\4D\tD\4E\tE\4F\tF\4G\tG\4H\tH\4I"+
|
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"\tI\4J\tJ\4K\tK\4L\tL\4M\tM\4N\tN\4O\tO\4P\tP\4Q\tQ\4R\tR\4S\tS\4T\tT"+
|
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"\4U\tU\4V\tV\4W\tW\4X\tX\4Y\tY\4Z\tZ\4[\t[\4\\\t\\\4]\t]\4^\t^\4_\t_\4"+
|
||||
"`\t`\3\2\3\2\3\2\3\2\3\2\3\2\3\2\3\3\3\3\3\4\3\4\3\5\3\5\3\6\3\6\3\7\3"+
|
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"\7\3\b\3\b\3\t\3\t\3\t\3\t\3\t\3\t\3\t\3\t\3\n\3\n\3\13\3\13\3\13\3\13"+
|
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"\3\13\3\13\3\13\3\13\3\13\3\f\3\f\3\f\3\f\3\f\3\f\3\f\3\f\3\r\3\r\3\r"+
|
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"\3\r\3\r\3\r\3\16\3\16\3\17\3\17\3\17\3\17\3\17\3\17\3\20\3\20\3\20\3"+
|
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"\20\3\20\3\20\3\20\3\21\3\21\3\21\3\22\3\22\3\22\3\22\3\22\3\22\3\22\3"+
|
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"\23\3\23\3\23\3\23\3\23\3\23\3\24\3\24\3\24\3\24\3\24\3\24\3\24\3\25\3"+
|
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"\25\3\25\3\25\3\25\3\25\3\26\3\26\3\26\3\26\3\26\3\26\3\26\3\26\3\26\3"+
|
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"\27\3\27\3\27\3\27\3\27\3\27\3\27\3\27\3\27\3\30\3\30\3\30\3\30\3\30\3"+
|
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"\30\3\30\3\30\3\30\3\30\3\31\3\31\3\31\3\31\3\31\3\31\3\31\3\31\3\31\3"+
|
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"\32\3\32\3\32\3\32\3\32\3\32\3\32\3\33\3\33\3\33\3\34\3\34\3\34\3\34\3"+
|
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"\34\3\35\3\35\3\35\3\35\3\35\3\35\3\36\3\36\3\36\3\37\3\37\3\37\3\37\3"+
|
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" \3 \3 \3 \3 \3 \3 \3!\3!\3!\3!\3\"\3\"\3\"\3#\3#\3#\3#\3#\3#\3#\3$\3"+
|
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"$\3%\3%\3&\3&\3\'\3\'\3\'\3(\3(\3(\3)\3)\3*\3*\3+\3+\3,\3,\3-\3-\3.\3"+
|
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".\3.\3/\3/\3/\3\60\3\60\3\61\3\61\3\62\3\62\3\63\3\63\3\64\3\64\3\64\3"+
|
||||
"\65\3\65\3\65\3\66\3\66\3\66\3\67\3\67\3\67\38\38\39\39\3:\3:\3:\3;\3"+
|
||||
";\3;\3<\3<\3<\3=\3=\3=\3>\3>\3>\3?\3?\3?\3@\3@\3@\3A\3A\3A\3A\3B\3B\3"+
|
||||
"B\3B\3C\3C\3C\3D\3D\3D\3E\3E\3E\3F\3F\3F\3F\3F\3F\3G\3G\3H\3H\3H\3H\3"+
|
||||
"H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3"+
|
||||
"H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3"+
|
||||
"H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3"+
|
||||
"H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3"+
|
||||
"H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3"+
|
||||
"H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3"+
|
||||
"H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3"+
|
||||
"H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3"+
|
||||
"H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3"+
|
||||
"H\3H\3H\3H\3H\3H\3H\3H\3H\3H\3H\5H\u02b8\nH\3I\3I\3I\3I\7I\u02be\nI\f"+
|
||||
"I\16I\u02c1\13I\3I\3I\3I\3J\3J\3J\3J\3J\3J\3J\3J\3J\3J\3J\3J\3J\3J\3J"+
|
||||
"\3J\3J\3J\3J\3J\3J\5J\u02db\nJ\3K\3K\3K\3K\7K\u02e1\nK\fK\16K\u02e4\13"+
|
||||
"K\3K\3K\3L\3L\3L\3L\5L\u02ec\nL\3L\3L\3M\3M\3M\3M\3M\3M\3M\3M\3M\5M\u02f9"+
|
||||
"\nM\3N\3N\5N\u02fd\nN\3O\3O\3O\5O\u0302\nO\3P\3P\3P\3P\3P\5P\u0309\nP"+
|
||||
"\3P\7P\u030c\nP\fP\16P\u030f\13P\3P\3P\6P\u0313\nP\rP\16P\u0314\3Q\7Q"+
|
||||
"\u0318\nQ\fQ\16Q\u031b\13Q\3Q\3Q\6Q\u031f\nQ\rQ\16Q\u0320\3R\3R\3R\3R"+
|
||||
"\3R\5R\u0328\nR\3R\7R\u032b\nR\fR\16R\u032e\13R\3R\3R\6R\u0332\nR\rR\16"+
|
||||
"R\u0333\3S\3S\3S\5S\u0339\nS\3T\3T\3T\6T\u033e\nT\rT\16T\u033f\3T\3T\6"+
|
||||
"T\u0344\nT\rT\16T\u0345\5T\u0348\nT\3U\6U\u034b\nU\rU\16U\u034c\3V\3V"+
|
||||
"\3V\3V\3V\5V\u0354\nV\3V\6V\u0357\nV\rV\16V\u0358\3W\3W\3X\3X\3Y\3Y\3"+
|
||||
"Z\3Z\7Z\u0363\nZ\fZ\16Z\u0366\13Z\3[\3[\3\\\3\\\3]\3]\7]\u036e\n]\f]\16"+
|
||||
"]\u0371\13]\3]\6]\u0374\n]\r]\16]\u0375\3^\6^\u0379\n^\r^\16^\u037a\3"+
|
||||
"^\3^\3_\3_\3_\3_\7_\u0383\n_\f_\16_\u0386\13_\3_\3_\3`\3`\3`\3`\7`\u038e"+
|
||||
"\n`\f`\16`\u0391\13`\3`\3`\3`\3`\3`\4\u02bf\u038f\2a\3\3\5\4\7\5\t\6\13"+
|
||||
"`\t`\4a\ta\4b\tb\4c\tc\4d\td\3\2\3\2\3\2\3\2\3\2\3\2\3\2\3\3\3\3\3\4\3"+
|
||||
"\4\3\5\3\5\3\6\3\6\3\7\3\7\3\b\3\b\3\t\3\t\3\t\3\t\3\t\3\t\3\t\3\t\3\n"+
|
||||
"\3\n\3\13\3\13\3\13\3\13\3\13\3\13\3\13\3\13\3\13\3\f\3\f\3\f\3\f\3\f"+
|
||||
"\3\f\3\f\3\f\3\r\3\r\3\r\3\r\3\r\3\r\3\16\3\16\3\17\3\17\3\17\3\17\3\17"+
|
||||
"\3\17\3\20\3\20\3\20\3\20\3\20\3\20\3\20\3\21\3\21\3\21\3\22\3\22\3\22"+
|
||||
"\3\22\3\22\3\22\3\22\3\23\3\23\3\23\3\23\3\23\3\23\3\24\3\24\3\24\3\24"+
|
||||
"\3\24\3\24\3\24\3\25\3\25\3\25\3\25\3\25\3\25\3\26\3\26\3\26\3\26\3\26"+
|
||||
"\3\26\3\26\3\26\3\26\3\27\3\27\3\27\3\27\3\27\3\27\3\27\3\27\3\27\3\30"+
|
||||
"\3\30\3\30\3\30\3\30\3\30\3\30\3\30\3\30\3\30\3\31\3\31\3\31\3\31\3\31"+
|
||||
"\3\31\3\31\3\31\3\31\3\32\3\32\3\32\3\32\3\32\3\33\3\33\3\33\3\33\3\34"+
|
||||
"\3\34\3\34\3\34\3\34\3\34\3\34\3\35\3\35\3\35\3\35\3\36\3\36\3\36\3\36"+
|
||||
"\3\37\3\37\3\37\3 \3 \3 \3 \3 \3!\3!\3!\3!\3!\3!\3\"\3\"\3\"\3#\3#\3#"+
|
||||
"\3#\3$\3$\3$\3$\3$\3$\3$\3%\3%\3%\3%\3&\3&\3&\3\'\3\'\3\'\3\'\3\'\3\'"+
|
||||
"\3\'\3(\3(\3)\3)\3*\3*\3+\3+\3+\3,\3,\3,\3-\3-\3.\3.\3/\3/\3\60\3\60\3"+
|
||||
"\61\3\61\3\62\3\62\3\62\3\63\3\63\3\63\3\64\3\64\3\65\3\65\3\66\3\66\3"+
|
||||
"\67\3\67\38\38\38\39\39\39\3:\3:\3:\3;\3;\3;\3<\3<\3=\3=\3>\3>\3>\3?\3"+
|
||||
"?\3?\3@\3@\3@\3A\3A\3A\3B\3B\3B\3C\3C\3C\3D\3D\3D\3E\3E\3E\3E\3F\3F\3"+
|
||||
"F\3F\3G\3G\3G\3H\3H\3H\3I\3I\3I\3J\3J\3J\3J\3J\3J\3K\3K\3L\3L\3L\3L\3"+
|
||||
"L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3"+
|
||||
"L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3"+
|
||||
"L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3"+
|
||||
"L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3"+
|
||||
"L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3"+
|
||||
"L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3"+
|
||||
"L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3"+
|
||||
"L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3"+
|
||||
"L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3"+
|
||||
"L\3L\3L\3L\3L\3L\3L\3L\3L\3L\3L\5L\u02d1\nL\3M\3M\3M\3M\7M\u02d7\nM\f"+
|
||||
"M\16M\u02da\13M\3M\3M\3M\3N\3N\3N\3N\3N\3N\3N\3N\3N\3N\3N\3N\3N\3N\3N"+
|
||||
"\3N\3N\3N\3N\3N\3N\5N\u02f4\nN\3O\3O\3O\3O\7O\u02fa\nO\fO\16O\u02fd\13"+
|
||||
"O\3O\3O\3P\3P\3P\3P\5P\u0305\nP\3P\3P\3Q\3Q\3Q\3Q\3Q\3Q\3Q\3Q\3Q\5Q\u0312"+
|
||||
"\nQ\3R\3R\5R\u0316\nR\3S\3S\3S\5S\u031b\nS\3T\3T\3T\3T\3T\5T\u0322\nT"+
|
||||
"\3T\7T\u0325\nT\fT\16T\u0328\13T\3T\3T\6T\u032c\nT\rT\16T\u032d\3U\7U"+
|
||||
"\u0331\nU\fU\16U\u0334\13U\3U\3U\6U\u0338\nU\rU\16U\u0339\3V\3V\3V\3V"+
|
||||
"\3V\5V\u0341\nV\3V\7V\u0344\nV\fV\16V\u0347\13V\3V\3V\6V\u034b\nV\rV\16"+
|
||||
"V\u034c\3W\3W\3W\5W\u0352\nW\3X\3X\3X\6X\u0357\nX\rX\16X\u0358\3X\3X\6"+
|
||||
"X\u035d\nX\rX\16X\u035e\5X\u0361\nX\3Y\6Y\u0364\nY\rY\16Y\u0365\3Z\3Z"+
|
||||
"\3Z\3Z\3Z\5Z\u036d\nZ\3Z\6Z\u0370\nZ\rZ\16Z\u0371\3[\3[\3\\\3\\\3]\3]"+
|
||||
"\3^\3^\7^\u037c\n^\f^\16^\u037f\13^\3_\3_\3`\3`\3a\3a\7a\u0387\na\fa\16"+
|
||||
"a\u038a\13a\3a\6a\u038d\na\ra\16a\u038e\3b\6b\u0392\nb\rb\16b\u0393\3"+
|
||||
"b\3b\3c\3c\3c\3c\7c\u039c\nc\fc\16c\u039f\13c\3c\3c\3d\3d\3d\3d\7d\u03a7"+
|
||||
"\nd\fd\16d\u03aa\13d\3d\3d\3d\3d\3d\4\u02d8\u03a8\2e\3\3\5\4\7\5\t\6\13"+
|
||||
"\7\r\b\17\t\21\n\23\13\25\f\27\r\31\16\33\17\35\20\37\21!\22#\23%\24\'"+
|
||||
"\25)\26+\27-\30/\31\61\32\63\33\65\34\67\359\36;\37= ?!A\"C#E$G%I&K\'"+
|
||||
"M(O)Q*S+U,W-Y.[/]\60_\61a\62c\63e\64g\65i\66k\67m8o9q:s;u<w=y>{?}@\177"+
|
||||
"A\u0081B\u0083C\u0085D\u0087E\u0089F\u008bG\u008dH\u008fI\u0091J\u0093"+
|
||||
"K\u0095L\u0097M\u0099N\u009bO\u009dP\u009fQ\u00a1R\u00a3S\u00a5T\u00a7"+
|
||||
"U\u00a9V\u00abW\u00ad\2\u00af\2\u00b1\2\u00b3X\u00b5\2\u00b7\2\u00b9Y"+
|
||||
"\u00bbZ\u00bd[\u00bf\\\3\2\r\3\2$$\3\2))\4\2DDdd\3\2\62\63\3\2\62;\5\2"+
|
||||
"\62;CHch\5\2C\\aac|\6\2\62;C\\aac|\4\2--//\5\2\13\f\17\17\"\"\4\2\f\f"+
|
||||
"\17\17\2\u03ff\2\3\3\2\2\2\2\5\3\2\2\2\2\7\3\2\2\2\2\t\3\2\2\2\2\13\3"+
|
||||
"\2\2\2\2\r\3\2\2\2\2\17\3\2\2\2\2\21\3\2\2\2\2\23\3\2\2\2\2\25\3\2\2\2"+
|
||||
"\2\27\3\2\2\2\2\31\3\2\2\2\2\33\3\2\2\2\2\35\3\2\2\2\2\37\3\2\2\2\2!\3"+
|
||||
"\2\2\2\2#\3\2\2\2\2%\3\2\2\2\2\'\3\2\2\2\2)\3\2\2\2\2+\3\2\2\2\2-\3\2"+
|
||||
"\2\2\2/\3\2\2\2\2\61\3\2\2\2\2\63\3\2\2\2\2\65\3\2\2\2\2\67\3\2\2\2\2"+
|
||||
"9\3\2\2\2\2;\3\2\2\2\2=\3\2\2\2\2?\3\2\2\2\2A\3\2\2\2\2C\3\2\2\2\2E\3"+
|
||||
"\2\2\2\2G\3\2\2\2\2I\3\2\2\2\2K\3\2\2\2\2M\3\2\2\2\2O\3\2\2\2\2Q\3\2\2"+
|
||||
"\2\2S\3\2\2\2\2U\3\2\2\2\2W\3\2\2\2\2Y\3\2\2\2\2[\3\2\2\2\2]\3\2\2\2\2"+
|
||||
"_\3\2\2\2\2a\3\2\2\2\2c\3\2\2\2\2e\3\2\2\2\2g\3\2\2\2\2i\3\2\2\2\2k\3"+
|
||||
"\2\2\2\2m\3\2\2\2\2o\3\2\2\2\2q\3\2\2\2\2s\3\2\2\2\2u\3\2\2\2\2w\3\2\2"+
|
||||
"\2\2y\3\2\2\2\2{\3\2\2\2\2}\3\2\2\2\2\177\3\2\2\2\2\u0081\3\2\2\2\2\u0083"+
|
||||
"\3\2\2\2\2\u0085\3\2\2\2\2\u0087\3\2\2\2\2\u0089\3\2\2\2\2\u008b\3\2\2"+
|
||||
"\2\2\u008d\3\2\2\2\2\u008f\3\2\2\2\2\u0091\3\2\2\2\2\u0093\3\2\2\2\2\u0095"+
|
||||
"\3\2\2\2\2\u0097\3\2\2\2\2\u0099\3\2\2\2\2\u009b\3\2\2\2\2\u009d\3\2\2"+
|
||||
"\2\2\u009f\3\2\2\2\2\u00a1\3\2\2\2\2\u00a3\3\2\2\2\2\u00a5\3\2\2\2\2\u00a7"+
|
||||
"\3\2\2\2\2\u00a9\3\2\2\2\2\u00ab\3\2\2\2\2\u00b3\3\2\2\2\2\u00b9\3\2\2"+
|
||||
"\2\2\u00bb\3\2\2\2\2\u00bd\3\2\2\2\2\u00bf\3\2\2\2\3\u00c1\3\2\2\2\5\u00c8"+
|
||||
"\3\2\2\2\7\u00ca\3\2\2\2\t\u00cc\3\2\2\2\13\u00ce\3\2\2\2\r\u00d0\3\2"+
|
||||
"\2\2\17\u00d2\3\2\2\2\21\u00d4\3\2\2\2\23\u00dc\3\2\2\2\25\u00de\3\2\2"+
|
||||
"\2\27\u00e7\3\2\2\2\31\u00ef\3\2\2\2\33\u00f5\3\2\2\2\35\u00f7\3\2\2\2"+
|
||||
"\37\u00fd\3\2\2\2!\u0104\3\2\2\2#\u0107\3\2\2\2%\u010e\3\2\2\2\'\u0114"+
|
||||
"\3\2\2\2)\u011b\3\2\2\2+\u0121\3\2\2\2-\u012a\3\2\2\2/\u0133\3\2\2\2\61"+
|
||||
"\u013d\3\2\2\2\63\u0146\3\2\2\2\65\u014d\3\2\2\2\67\u0150\3\2\2\29\u0155"+
|
||||
"\3\2\2\2;\u015b\3\2\2\2=\u015e\3\2\2\2?\u0162\3\2\2\2A\u0169\3\2\2\2C"+
|
||||
"\u016d\3\2\2\2E\u0170\3\2\2\2G\u0177\3\2\2\2I\u0179\3\2\2\2K\u017b\3\2"+
|
||||
"\2\2M\u017d\3\2\2\2O\u0180\3\2\2\2Q\u0183\3\2\2\2S\u0185\3\2\2\2U\u0187"+
|
||||
"\3\2\2\2W\u0189\3\2\2\2Y\u018b\3\2\2\2[\u018d\3\2\2\2]\u0190\3\2\2\2_"+
|
||||
"\u0193\3\2\2\2a\u0195\3\2\2\2c\u0197\3\2\2\2e\u0199\3\2\2\2g\u019b\3\2"+
|
||||
"\2\2i\u019e\3\2\2\2k\u01a1\3\2\2\2m\u01a4\3\2\2\2o\u01a7\3\2\2\2q\u01a9"+
|
||||
"\3\2\2\2s\u01ab\3\2\2\2u\u01ae\3\2\2\2w\u01b1\3\2\2\2y\u01b4\3\2\2\2{"+
|
||||
"\u01b7\3\2\2\2}\u01ba\3\2\2\2\177\u01bd\3\2\2\2\u0081\u01c0\3\2\2\2\u0083"+
|
||||
"\u01c4\3\2\2\2\u0085\u01c8\3\2\2\2\u0087\u01cb\3\2\2\2\u0089\u01ce\3\2"+
|
||||
"\2\2\u008b\u01d1\3\2\2\2\u008d\u01d7\3\2\2\2\u008f\u02b7\3\2\2\2\u0091"+
|
||||
"\u02b9\3\2\2\2\u0093\u02da\3\2\2\2\u0095\u02dc\3\2\2\2\u0097\u02e7\3\2"+
|
||||
"\2\2\u0099\u02f8\3\2\2\2\u009b\u02fc\3\2\2\2\u009d\u0301\3\2\2\2\u009f"+
|
||||
"\u0308\3\2\2\2\u00a1\u0319\3\2\2\2\u00a3\u0327\3\2\2\2\u00a5\u0338\3\2"+
|
||||
"\2\2\u00a7\u0347\3\2\2\2\u00a9\u034a\3\2\2\2\u00ab\u0353\3\2\2\2\u00ad"+
|
||||
"\u035a\3\2\2\2\u00af\u035c\3\2\2\2\u00b1\u035e\3\2\2\2\u00b3\u0360\3\2"+
|
||||
"\2\2\u00b5\u0367\3\2\2\2\u00b7\u0369\3\2\2\2\u00b9\u036b\3\2\2\2\u00bb"+
|
||||
"\u0378\3\2\2\2\u00bd\u037e\3\2\2\2\u00bf\u0389\3\2\2\2\u00c1\u00c2\7k"+
|
||||
"\2\2\u00c2\u00c3\7o\2\2\u00c3\u00c4\7r\2\2\u00c4\u00c5\7q\2\2\u00c5\u00c6"+
|
||||
"\7t\2\2\u00c6\u00c7\7v\2\2\u00c7\4\3\2\2\2\u00c8\u00c9\7?\2\2\u00c9\6"+
|
||||
"\3\2\2\2\u00ca\u00cb\7=\2\2\u00cb\b\3\2\2\2\u00cc\u00cd\7*\2\2\u00cd\n"+
|
||||
"\3\2\2\2\u00ce\u00cf\7+\2\2\u00cf\f\3\2\2\2\u00d0\u00d1\7}\2\2\u00d1\16"+
|
||||
"\3\2\2\2\u00d2\u00d3\7\177\2\2\u00d3\20\3\2\2\2\u00d4\u00d5\7m\2\2\u00d5"+
|
||||
"\u00d6\7k\2\2\u00d6\u00d7\7e\2\2\u00d7\u00d8\7m\2\2\u00d8\u00d9\7c\2\2"+
|
||||
"\u00d9\u00da\7u\2\2\u00da\u00db\7o\2\2\u00db\22\3\2\2\2\u00dc\u00dd\7"+
|
||||
".\2\2\u00dd\24\3\2\2\2\u00de\u00df\7t\2\2\u00df\u00e0\7g\2\2\u00e0\u00e1"+
|
||||
"\7u\2\2\u00e1\u00e2\7q\2\2\u00e2\u00e3\7w\2\2\u00e3\u00e4\7t\2\2\u00e4"+
|
||||
"\u00e5\7e\2\2\u00e5\u00e6\7g\2\2\u00e6\26\3\2\2\2\u00e7\u00e8\7e\2\2\u00e8"+
|
||||
"\u00e9\7n\2\2\u00e9\u00ea\7q\2\2\u00ea\u00eb\7d\2\2\u00eb\u00ec\7d\2\2"+
|
||||
"\u00ec\u00ed\7g\2\2\u00ed\u00ee\7t\2\2\u00ee\30\3\2\2\2\u00ef\u00f0\7"+
|
||||
"r\2\2\u00f0\u00f1\7c\2\2\u00f1\u00f2\7t\2\2\u00f2\u00f3\7c\2\2\u00f3\u00f4"+
|
||||
"\7o\2\2\u00f4\32\3\2\2\2\u00f5\u00f6\7<\2\2\u00f6\34\3\2\2\2\u00f7\u00f8"+
|
||||
"\7d\2\2\u00f8\u00f9\7{\2\2\u00f9\u00fa\7v\2\2\u00fa\u00fb\7g\2\2\u00fb"+
|
||||
"\u00fc\7u\2\2\u00fc\36\3\2\2\2\u00fd\u00fe\7e\2\2\u00fe\u00ff\7{\2\2\u00ff"+
|
||||
"\u0100\7e\2\2\u0100\u0101\7n\2\2\u0101\u0102\7g\2\2\u0102\u0103\7u\2\2"+
|
||||
"\u0103 \3\2\2\2\u0104\u0105\7r\2\2\u0105\u0106\7e\2\2\u0106\"\3\2\2\2"+
|
||||
"\u0107\u0108\7k\2\2\u0108\u0109\7p\2\2\u0109\u010a\7n\2\2\u010a\u010b"+
|
||||
"\7k\2\2\u010b\u010c\7p\2\2\u010c\u010d\7g\2\2\u010d$\3\2\2\2\u010e\u010f"+
|
||||
"\7e\2\2\u010f\u0110\7q\2\2\u0110\u0111\7p\2\2\u0111\u0112\7u\2\2\u0112"+
|
||||
"\u0113\7v\2\2\u0113&\3\2\2\2\u0114\u0115\7g\2\2\u0115\u0116\7z\2\2\u0116"+
|
||||
"\u0117\7v\2\2\u0117\u0118\7g\2\2\u0118\u0119\7t\2\2\u0119\u011a\7p\2\2"+
|
||||
"\u011a(\3\2\2\2\u011b\u011c\7c\2\2\u011c\u011d\7n\2\2\u011d\u011e\7k\2"+
|
||||
"\2\u011e\u011f\7i\2\2\u011f\u0120\7p\2\2\u0120*\3\2\2\2\u0121\u0122\7"+
|
||||
"t\2\2\u0122\u0123\7g\2\2\u0123\u0124\7i\2\2\u0124\u0125\7k\2\2\u0125\u0126"+
|
||||
"\7u\2\2\u0126\u0127\7v\2\2\u0127\u0128\7g\2\2\u0128\u0129\7t\2\2\u0129"+
|
||||
",\3\2\2\2\u012a\u012b\7x\2\2\u012b\u012c\7q\2\2\u012c\u012d\7n\2\2\u012d"+
|
||||
"\u012e\7c\2\2\u012e\u012f\7v\2\2\u012f\u0130\7k\2\2\u0130\u0131\7n\2\2"+
|
||||
"\u0131\u0132\7g\2\2\u0132.\3\2\2\2\u0133\u0134\7k\2\2\u0134\u0135\7p\2"+
|
||||
"\2\u0135\u0136\7v\2\2\u0136\u0137\7g\2\2\u0137\u0138\7t\2\2\u0138\u0139"+
|
||||
"\7t\2\2\u0139\u013a\7w\2\2\u013a\u013b\7r\2\2\u013b\u013c\7v\2\2\u013c"+
|
||||
"\60\3\2\2\2\u013d\u013e\7j\2\2\u013e\u013f\7c\2\2\u013f\u0140\7t\2\2\u0140"+
|
||||
"\u0141\7f\2\2\u0141\u0142\7y\2\2\u0142\u0143\7c\2\2\u0143\u0144\7t\2\2"+
|
||||
"\u0144\u0145\7g\2\2\u0145\62\3\2\2\2\u0146\u0147\7m\2\2\u0147\u0148\7"+
|
||||
"g\2\2\u0148\u0149\7t\2\2\u0149\u014a\7p\2\2\u014a\u014b\7g\2\2\u014b\u014c"+
|
||||
"\7n\2\2\u014c\64\3\2\2\2\u014d\u014e\7k\2\2\u014e\u014f\7h\2\2\u014f\66"+
|
||||
"\3\2\2\2\u0150\u0151\7g\2\2\u0151\u0152\7n\2\2\u0152\u0153\7u\2\2\u0153"+
|
||||
"\u0154\7g\2\2\u01548\3\2\2\2\u0155\u0156\7y\2\2\u0156\u0157\7j\2\2\u0157"+
|
||||
"\u0158\7k\2\2\u0158\u0159\7n\2\2\u0159\u015a\7g\2\2\u015a:\3\2\2\2\u015b"+
|
||||
"\u015c\7f\2\2\u015c\u015d\7q\2\2\u015d<\3\2\2\2\u015e\u015f\7h\2\2\u015f"+
|
||||
"\u0160\7q\2\2\u0160\u0161\7t\2\2\u0161>\3\2\2\2\u0162\u0163\7t\2\2\u0163"+
|
||||
"\u0164\7g\2\2\u0164\u0165\7v\2\2\u0165\u0166\7w\2\2\u0166\u0167\7t\2\2"+
|
||||
"\u0167\u0168\7p\2\2\u0168@\3\2\2\2\u0169\u016a\7c\2\2\u016a\u016b\7u\2"+
|
||||
"\2\u016b\u016c\7o\2\2\u016cB\3\2\2\2\u016d\u016e\7\60\2\2\u016e\u016f"+
|
||||
"\7\60\2\2\u016fD\3\2\2\2\u0170\u0171\7u\2\2\u0171\u0172\7k\2\2\u0172\u0173"+
|
||||
"\7i\2\2\u0173\u0174\7p\2\2\u0174\u0175\7g\2\2\u0175\u0176\7f\2\2\u0176"+
|
||||
"F\3\2\2\2\u0177\u0178\7,\2\2\u0178H\3\2\2\2\u0179\u017a\7]\2\2\u017aJ"+
|
||||
"\3\2\2\2\u017b\u017c\7_\2\2\u017cL\3\2\2\2\u017d\u017e\7/\2\2\u017e\u017f"+
|
||||
"\7/\2\2\u017fN\3\2\2\2\u0180\u0181\7-\2\2\u0181\u0182\7-\2\2\u0182P\3"+
|
||||
"\2\2\2\u0183\u0184\7-\2\2\u0184R\3\2\2\2\u0185\u0186\7/\2\2\u0186T\3\2"+
|
||||
"\2\2\u0187\u0188\7#\2\2\u0188V\3\2\2\2\u0189\u018a\7(\2\2\u018aX\3\2\2"+
|
||||
"\2\u018b\u018c\7\u0080\2\2\u018cZ\3\2\2\2\u018d\u018e\7@\2\2\u018e\u018f"+
|
||||
"\7@\2\2\u018f\\\3\2\2\2\u0190\u0191\7>\2\2\u0191\u0192\7>\2\2\u0192^\3"+
|
||||
"\2\2\2\u0193\u0194\7\61\2\2\u0194`\3\2\2\2\u0195\u0196\7\'\2\2\u0196b"+
|
||||
"\3\2\2\2\u0197\u0198\7>\2\2\u0198d\3\2\2\2\u0199\u019a\7@\2\2\u019af\3"+
|
||||
"\2\2\2\u019b\u019c\7?\2\2\u019c\u019d\7?\2\2\u019dh\3\2\2\2\u019e\u019f"+
|
||||
"\7#\2\2\u019f\u01a0\7?\2\2\u01a0j\3\2\2\2\u01a1\u01a2\7>\2\2\u01a2\u01a3"+
|
||||
"\7?\2\2\u01a3l\3\2\2\2\u01a4\u01a5\7@\2\2\u01a5\u01a6\7?\2\2\u01a6n\3"+
|
||||
"\2\2\2\u01a7\u01a8\7`\2\2\u01a8p\3\2\2\2\u01a9\u01aa\7~\2\2\u01aar\3\2"+
|
||||
"\2\2\u01ab\u01ac\7(\2\2\u01ac\u01ad\7(\2\2\u01adt\3\2\2\2\u01ae\u01af"+
|
||||
"\7~\2\2\u01af\u01b0\7~\2\2\u01b0v\3\2\2\2\u01b1\u01b2\7-\2\2\u01b2\u01b3"+
|
||||
"\7?\2\2\u01b3x\3\2\2\2\u01b4\u01b5\7/\2\2\u01b5\u01b6\7?\2\2\u01b6z\3"+
|
||||
"\2\2\2\u01b7\u01b8\7,\2\2\u01b8\u01b9\7?\2\2\u01b9|\3\2\2\2\u01ba\u01bb"+
|
||||
"\7\61\2\2\u01bb\u01bc\7?\2\2\u01bc~\3\2\2\2\u01bd\u01be\7\'\2\2\u01be"+
|
||||
"\u01bf\7?\2\2\u01bf\u0080\3\2\2\2\u01c0\u01c1\7>\2\2\u01c1\u01c2\7>\2"+
|
||||
"\2\u01c2\u01c3\7?\2\2\u01c3\u0082\3\2\2\2\u01c4\u01c5\7@\2\2\u01c5\u01c6"+
|
||||
"\7@\2\2\u01c6\u01c7\7?\2\2\u01c7\u0084\3\2\2\2\u01c8\u01c9\7(\2\2\u01c9"+
|
||||
"\u01ca\7?\2\2\u01ca\u0086\3\2\2\2\u01cb\u01cc\7~\2\2\u01cc\u01cd\7?\2"+
|
||||
"\2\u01cd\u0088\3\2\2\2\u01ce\u01cf\7`\2\2\u01cf\u01d0\7?\2\2\u01d0\u008a"+
|
||||
"\3\2\2\2\u01d1\u01d2\7\60\2\2\u01d2\u01d3\7d\2\2\u01d3\u01d4\7{\2\2\u01d4"+
|
||||
"\u01d5\7v\2\2\u01d5\u01d6\7g\2\2\u01d6\u008c\3\2\2\2\u01d7\u01d8\7%\2"+
|
||||
"\2\u01d8\u008e\3\2\2\2\u01d9\u01da\7d\2\2\u01da\u01db\7t\2\2\u01db\u02b8"+
|
||||
"\7m\2\2\u01dc\u01dd\7q\2\2\u01dd\u01de\7t\2\2\u01de\u02b8\7c\2\2\u01df"+
|
||||
"\u01e0\7m\2\2\u01e0\u01e1\7k\2\2\u01e1\u02b8\7n\2\2\u01e2\u01e3\7u\2\2"+
|
||||
"\u01e3\u01e4\7n\2\2\u01e4\u02b8\7q\2\2\u01e5\u01e6\7p\2\2\u01e6\u01e7"+
|
||||
"\7q\2\2\u01e7\u02b8\7r\2\2\u01e8\u01e9\7c\2\2\u01e9\u01ea\7u\2\2\u01ea"+
|
||||
"\u02b8\7n\2\2\u01eb\u01ec\7r\2\2\u01ec\u01ed\7j\2\2\u01ed\u02b8\7r\2\2"+
|
||||
"\u01ee\u01ef\7c\2\2\u01ef\u01f0\7p\2\2\u01f0\u02b8\7e\2\2\u01f1\u01f2"+
|
||||
"\7d\2\2\u01f2\u01f3\7r\2\2\u01f3\u02b8\7n\2\2\u01f4\u01f5\7e\2\2\u01f5"+
|
||||
"\u01f6\7n\2\2\u01f6\u02b8\7e\2\2\u01f7\u01f8\7l\2\2\u01f8\u01f9\7u\2\2"+
|
||||
"\u01f9\u02b8\7t\2\2\u01fa\u01fb\7c\2\2\u01fb\u01fc\7p\2\2\u01fc\u02b8"+
|
||||
"\7f\2\2\u01fd\u01fe\7t\2\2\u01fe\u01ff\7n\2\2\u01ff\u02b8\7c\2\2\u0200"+
|
||||
"\u0201\7d\2\2\u0201\u0202\7k\2\2\u0202\u02b8\7v\2\2\u0203\u0204\7t\2\2"+
|
||||
"\u0204\u0205\7q\2\2\u0205\u02b8\7n\2\2\u0206\u0207\7r\2\2\u0207\u0208"+
|
||||
"\7n\2\2\u0208\u02b8\7c\2\2\u0209\u020a\7r\2\2\u020a\u020b\7n\2\2\u020b"+
|
||||
"\u02b8\7r\2\2\u020c\u020d\7d\2\2\u020d\u020e\7o\2\2\u020e\u02b8\7k\2\2"+
|
||||
"\u020f\u0210\7u\2\2\u0210\u0211\7g\2\2\u0211\u02b8\7e\2\2\u0212\u0213"+
|
||||
"\7t\2\2\u0213\u0214\7v\2\2\u0214\u02b8\7k\2\2\u0215\u0216\7g\2\2\u0216"+
|
||||
"\u0217\7q\2\2\u0217\u02b8\7t\2\2\u0218\u0219\7u\2\2\u0219\u021a\7t\2\2"+
|
||||
"\u021a\u02b8\7g\2\2\u021b\u021c\7n\2\2\u021c\u021d\7u\2\2\u021d\u02b8"+
|
||||
"\7t\2\2\u021e\u021f\7r\2\2\u021f\u0220\7j\2\2\u0220\u02b8\7c\2\2\u0221"+
|
||||
"\u0222\7c\2\2\u0222\u0223\7n\2\2\u0223\u02b8\7t\2\2\u0224\u0225\7l\2\2"+
|
||||
"\u0225\u0226\7o\2\2\u0226\u02b8\7r\2\2\u0227\u0228\7d\2\2\u0228\u0229"+
|
||||
"\7x\2\2\u0229\u02b8\7e\2\2\u022a\u022b\7e\2\2\u022b\u022c\7n\2\2\u022c"+
|
||||
"\u02b8\7k\2\2\u022d\u022e\7t\2\2\u022e\u022f\7v\2\2\u022f\u02b8\7u\2\2"+
|
||||
"\u0230\u0231\7c\2\2\u0231\u0232\7f\2\2\u0232\u02b8\7e\2\2\u0233\u0234"+
|
||||
"\7t\2\2\u0234\u0235\7t\2\2\u0235\u02b8\7c\2\2\u0236\u0237\7d\2\2\u0237"+
|
||||
"\u0238\7x\2\2\u0238\u02b8\7u\2\2\u0239\u023a\7u\2\2\u023a\u023b\7g\2\2"+
|
||||
"\u023b\u02b8\7k\2\2\u023c\u023d\7u\2\2\u023d\u023e\7c\2\2\u023e\u02b8"+
|
||||
"\7z\2\2\u023f\u0240\7u\2\2\u0240\u0241\7v\2\2\u0241\u02b8\7{\2\2\u0242"+
|
||||
"\u0243\7u\2\2\u0243\u0244\7v\2\2\u0244\u02b8\7c\2\2\u0245\u0246\7u\2\2"+
|
||||
"\u0246\u0247\7v\2\2\u0247\u02b8\7z\2\2\u0248\u0249\7f\2\2\u0249\u024a"+
|
||||
"\7g\2\2\u024a\u02b8\7{\2\2\u024b\u024c\7v\2\2\u024c\u024d\7z\2\2\u024d"+
|
||||
"\u02b8\7c\2\2\u024e\u024f\7z\2\2\u024f\u0250\7c\2\2\u0250\u02b8\7c\2\2"+
|
||||
"\u0251\u0252\7d\2\2\u0252\u0253\7e\2\2\u0253\u02b8\7e\2\2\u0254\u0255"+
|
||||
"\7c\2\2\u0255\u0256\7j\2\2\u0256\u02b8\7z\2\2\u0257\u0258\7v\2\2\u0258"+
|
||||
"\u0259\7{\2\2\u0259\u02b8\7c\2\2\u025a\u025b\7v\2\2\u025b\u025c\7z\2\2"+
|
||||
"\u025c\u02b8\7u\2\2\u025d\u025e\7v\2\2\u025e\u025f\7c\2\2\u025f\u02b8"+
|
||||
"\7u\2\2\u0260\u0261\7u\2\2\u0261\u0262\7j\2\2\u0262\u02b8\7{\2\2\u0263"+
|
||||
"\u0264\7u\2\2\u0264\u0265\7j\2\2\u0265\u02b8\7z\2\2\u0266\u0267\7n\2\2"+
|
||||
"\u0267\u0268\7f\2\2\u0268\u02b8\7{\2\2\u0269\u026a\7n\2\2\u026a\u026b"+
|
||||
"\7f\2\2\u026b\u02b8\7c\2\2\u026c\u026d\7n\2\2\u026d\u026e\7f\2\2\u026e"+
|
||||
"\u02b8\7z\2\2\u026f\u0270\7n\2\2\u0270\u0271\7c\2\2\u0271\u02b8\7z\2\2"+
|
||||
"\u0272\u0273\7v\2\2\u0273\u0274\7c\2\2\u0274\u02b8\7{\2\2\u0275\u0276"+
|
||||
"\7v\2\2\u0276\u0277\7c\2\2\u0277\u02b8\7z\2\2\u0278\u0279\7d\2\2\u0279"+
|
||||
"\u027a\7e\2\2\u027a\u02b8\7u\2\2\u027b\u027c\7e\2\2\u027c\u027d\7n\2\2"+
|
||||
"\u027d\u02b8\7x\2\2\u027e\u027f\7v\2\2\u027f\u0280\7u\2\2\u0280\u02b8"+
|
||||
"\7z\2\2\u0281\u0282\7n\2\2\u0282\u0283\7c\2\2\u0283\u02b8\7u\2\2\u0284"+
|
||||
"\u0285\7e\2\2\u0285\u0286\7r\2\2\u0286\u02b8\7{\2\2\u0287\u0288\7e\2\2"+
|
||||
"\u0288\u0289\7o\2\2\u0289\u02b8\7r\2\2\u028a\u028b\7e\2\2\u028b\u028c"+
|
||||
"\7r\2\2\u028c\u02b8\7z\2\2\u028d\u028e\7f\2\2\u028e\u028f\7e\2\2\u028f"+
|
||||
"\u02b8\7r\2\2\u0290\u0291\7f\2\2\u0291\u0292\7g\2\2\u0292\u02b8\7e\2\2"+
|
||||
"\u0293\u0294\7k\2\2\u0294\u0295\7p\2\2\u0295\u02b8\7e\2\2\u0296\u0297"+
|
||||
"\7c\2\2\u0297\u0298\7z\2\2\u0298\u02b8\7u\2\2\u0299\u029a\7d\2\2\u029a"+
|
||||
"\u029b\7p\2\2\u029b\u02b8\7g\2\2\u029c\u029d\7e\2\2\u029d\u029e\7n\2\2"+
|
||||
"\u029e\u02b8\7f\2\2\u029f\u02a0\7u\2\2\u02a0\u02a1\7d\2\2\u02a1\u02b8"+
|
||||
"\7e\2\2\u02a2\u02a3\7k\2\2\u02a3\u02a4\7u\2\2\u02a4\u02b8\7e\2\2\u02a5"+
|
||||
"\u02a6\7k\2\2\u02a6\u02a7\7p\2\2\u02a7\u02b8\7z\2\2\u02a8\u02a9\7d\2\2"+
|
||||
"\u02a9\u02aa\7g\2\2\u02aa\u02b8\7s\2\2\u02ab\u02ac\7u\2\2\u02ac\u02ad"+
|
||||
"\7g\2\2\u02ad\u02b8\7f\2\2\u02ae\u02af\7f\2\2\u02af\u02b0\7g\2\2\u02b0"+
|
||||
"\u02b8\7z\2\2\u02b1\u02b2\7k\2\2\u02b2\u02b3\7p\2\2\u02b3\u02b8\7{\2\2"+
|
||||
"\u02b4\u02b5\7t\2\2\u02b5\u02b6\7q\2\2\u02b6\u02b8\7t\2\2\u02b7\u01d9"+
|
||||
"\3\2\2\2\u02b7\u01dc\3\2\2\2\u02b7\u01df\3\2\2\2\u02b7\u01e2\3\2\2\2\u02b7"+
|
||||
"\u01e5\3\2\2\2\u02b7\u01e8\3\2\2\2\u02b7\u01eb\3\2\2\2\u02b7\u01ee\3\2"+
|
||||
"\2\2\u02b7\u01f1\3\2\2\2\u02b7\u01f4\3\2\2\2\u02b7\u01f7\3\2\2\2\u02b7"+
|
||||
"\u01fa\3\2\2\2\u02b7\u01fd\3\2\2\2\u02b7\u0200\3\2\2\2\u02b7\u0203\3\2"+
|
||||
"\2\2\u02b7\u0206\3\2\2\2\u02b7\u0209\3\2\2\2\u02b7\u020c\3\2\2\2\u02b7"+
|
||||
"\u020f\3\2\2\2\u02b7\u0212\3\2\2\2\u02b7\u0215\3\2\2\2\u02b7\u0218\3\2"+
|
||||
"\2\2\u02b7\u021b\3\2\2\2\u02b7\u021e\3\2\2\2\u02b7\u0221\3\2\2\2\u02b7"+
|
||||
"\u0224\3\2\2\2\u02b7\u0227\3\2\2\2\u02b7\u022a\3\2\2\2\u02b7\u022d\3\2"+
|
||||
"\2\2\u02b7\u0230\3\2\2\2\u02b7\u0233\3\2\2\2\u02b7\u0236\3\2\2\2\u02b7"+
|
||||
"\u0239\3\2\2\2\u02b7\u023c\3\2\2\2\u02b7\u023f\3\2\2\2\u02b7\u0242\3\2"+
|
||||
"\2\2\u02b7\u0245\3\2\2\2\u02b7\u0248\3\2\2\2\u02b7\u024b\3\2\2\2\u02b7"+
|
||||
"\u024e\3\2\2\2\u02b7\u0251\3\2\2\2\u02b7\u0254\3\2\2\2\u02b7\u0257\3\2"+
|
||||
"\2\2\u02b7\u025a\3\2\2\2\u02b7\u025d\3\2\2\2\u02b7\u0260\3\2\2\2\u02b7"+
|
||||
"\u0263\3\2\2\2\u02b7\u0266\3\2\2\2\u02b7\u0269\3\2\2\2\u02b7\u026c\3\2"+
|
||||
"\2\2\u02b7\u026f\3\2\2\2\u02b7\u0272\3\2\2\2\u02b7\u0275\3\2\2\2\u02b7"+
|
||||
"\u0278\3\2\2\2\u02b7\u027b\3\2\2\2\u02b7\u027e\3\2\2\2\u02b7\u0281\3\2"+
|
||||
"\2\2\u02b7\u0284\3\2\2\2\u02b7\u0287\3\2\2\2\u02b7\u028a\3\2\2\2\u02b7"+
|
||||
"\u028d\3\2\2\2\u02b7\u0290\3\2\2\2\u02b7\u0293\3\2\2\2\u02b7\u0296\3\2"+
|
||||
"\2\2\u02b7\u0299\3\2\2\2\u02b7\u029c\3\2\2\2\u02b7\u029f\3\2\2\2\u02b7"+
|
||||
"\u02a2\3\2\2\2\u02b7\u02a5\3\2\2\2\u02b7\u02a8\3\2\2\2\u02b7\u02ab\3\2"+
|
||||
"\2\2\u02b7\u02ae\3\2\2\2\u02b7\u02b1\3\2\2\2\u02b7\u02b4\3\2\2\2\u02b8"+
|
||||
"\u0090\3\2\2\2\u02b9\u02ba\7}\2\2\u02ba\u02bb\7}\2\2\u02bb\u02bf\3\2\2"+
|
||||
"\2\u02bc\u02be\13\2\2\2\u02bd\u02bc\3\2\2\2\u02be\u02c1\3\2\2\2\u02bf"+
|
||||
"\u02c0\3\2\2\2\u02bf\u02bd\3\2\2\2\u02c0\u02c2\3\2\2\2\u02c1\u02bf\3\2"+
|
||||
"\2\2\u02c2\u02c3\7\177\2\2\u02c3\u02c4\7\177\2\2\u02c4\u0092\3\2\2\2\u02c5"+
|
||||
"\u02c6\7d\2\2\u02c6\u02c7\7{\2\2\u02c7\u02c8\7v\2\2\u02c8\u02db\7g\2\2"+
|
||||
"\u02c9\u02ca\7y\2\2\u02ca\u02cb\7q\2\2\u02cb\u02cc\7t\2\2\u02cc\u02db"+
|
||||
"\7f\2\2\u02cd\u02ce\7f\2\2\u02ce\u02cf\7y\2\2\u02cf\u02d0\7q\2\2\u02d0"+
|
||||
"\u02d1\7t\2\2\u02d1\u02db\7f\2\2\u02d2\u02d3\7d\2\2\u02d3\u02d4\7q\2\2"+
|
||||
"\u02d4\u02d5\7q\2\2\u02d5\u02db\7n\2\2\u02d6\u02d7\7x\2\2\u02d7\u02d8"+
|
||||
"\7q\2\2\u02d8\u02d9\7k\2\2\u02d9\u02db\7f\2\2\u02da\u02c5\3\2\2\2\u02da"+
|
||||
"\u02c9\3\2\2\2\u02da\u02cd\3\2\2\2\u02da\u02d2\3\2\2\2\u02da\u02d6\3\2"+
|
||||
"\2\2\u02db\u0094\3\2\2\2\u02dc\u02e2\7$\2\2\u02dd\u02de\7^\2\2\u02de\u02e1"+
|
||||
"\7$\2\2\u02df\u02e1\n\2\2\2\u02e0\u02dd\3\2\2\2\u02e0\u02df\3\2\2\2\u02e1"+
|
||||
"\u02e4\3\2\2\2\u02e2\u02e0\3\2\2\2\u02e2\u02e3\3\2\2\2\u02e3\u02e5\3\2"+
|
||||
"\2\2\u02e4\u02e2\3\2\2\2\u02e5\u02e6\7$\2\2\u02e6\u0096\3\2\2\2\u02e7"+
|
||||
"\u02eb\7)\2\2\u02e8\u02e9\7^\2\2\u02e9\u02ec\7)\2\2\u02ea\u02ec\n\3\2"+
|
||||
"\2\u02eb\u02e8\3\2\2\2\u02eb\u02ea\3\2\2\2\u02ec\u02ed\3\2\2\2\u02ed\u02ee"+
|
||||
"\7)\2\2\u02ee\u0098\3\2\2\2\u02ef\u02f0\7v\2\2\u02f0\u02f1\7t\2\2\u02f1"+
|
||||
"\u02f2\7w\2\2\u02f2\u02f9\7g\2\2\u02f3\u02f4\7h\2\2\u02f4\u02f5\7c\2\2"+
|
||||
"\u02f5\u02f6\7n\2\2\u02f6\u02f7\7u\2\2\u02f7\u02f9\7g\2\2\u02f8\u02ef"+
|
||||
"\3\2\2\2\u02f8\u02f3\3\2\2\2\u02f9\u009a\3\2\2\2\u02fa\u02fd\5\u009dO"+
|
||||
"\2\u02fb\u02fd\5\u00a5S\2\u02fc\u02fa\3\2\2\2\u02fc\u02fb\3\2\2\2\u02fd"+
|
||||
"\u009c\3\2\2\2\u02fe\u0302\5\u009fP\2\u02ff\u0302\5\u00a1Q\2\u0300\u0302"+
|
||||
"\5\u00a3R\2\u0301\u02fe\3\2\2\2\u0301\u02ff\3\2\2\2\u0301\u0300\3\2\2"+
|
||||
"\2\u0302\u009e\3\2\2\2\u0303\u0309\7\'\2\2\u0304\u0305\7\62\2\2\u0305"+
|
||||
"\u0309\7d\2\2\u0306\u0307\7\62\2\2\u0307\u0309\7D\2\2\u0308\u0303\3\2"+
|
||||
"\2\2\u0308\u0304\3\2\2\2\u0308\u0306\3\2\2\2\u0309\u030d\3\2\2\2\u030a"+
|
||||
"\u030c\5\u00adW\2\u030b\u030a\3\2\2\2\u030c\u030f\3\2\2\2\u030d\u030b"+
|
||||
"\3\2\2\2\u030d\u030e\3\2\2\2\u030e\u0310\3\2\2\2\u030f\u030d\3\2\2\2\u0310"+
|
||||
"\u0312\7\60\2\2\u0311\u0313\5\u00adW\2\u0312\u0311\3\2\2\2\u0313\u0314"+
|
||||
"\3\2\2\2\u0314\u0312\3\2\2\2\u0314\u0315\3\2\2\2\u0315\u00a0\3\2\2\2\u0316"+
|
||||
"\u0318\5\u00afX\2\u0317\u0316\3\2\2\2\u0318\u031b\3\2\2\2\u0319\u0317"+
|
||||
"\3\2\2\2\u0319\u031a\3\2\2\2\u031a\u031c\3\2\2\2\u031b\u0319\3\2\2\2\u031c"+
|
||||
"\u031e\7\60\2\2\u031d\u031f\5\u00afX\2\u031e\u031d\3\2\2\2\u031f\u0320"+
|
||||
"\3\2\2\2\u0320\u031e\3\2\2\2\u0320\u0321\3\2\2\2\u0321\u00a2\3\2\2\2\u0322"+
|
||||
"\u0328\7&\2\2\u0323\u0324\7\62\2\2\u0324\u0328\7z\2\2\u0325\u0326\7\62"+
|
||||
"\2\2\u0326\u0328\7Z\2\2\u0327\u0322\3\2\2\2\u0327\u0323\3\2\2\2\u0327"+
|
||||
"\u0325\3\2\2\2\u0328\u032c\3\2\2\2\u0329\u032b\5\u00b1Y\2\u032a\u0329"+
|
||||
"\3\2\2\2\u032b\u032e\3\2\2\2\u032c\u032a\3\2\2\2\u032c\u032d\3\2\2\2\u032d"+
|
||||
"\u032f\3\2\2\2\u032e\u032c\3\2\2\2\u032f\u0331\7\60\2\2\u0330\u0332\5"+
|
||||
"\u00b1Y\2\u0331\u0330\3\2\2\2\u0332\u0333\3\2\2\2\u0333\u0331\3\2\2\2"+
|
||||
"\u0333\u0334\3\2\2\2\u0334\u00a4\3\2\2\2\u0335\u0339\5\u00a9U\2\u0336"+
|
||||
"\u0339\5\u00abV\2\u0337\u0339\5\u00a7T\2\u0338\u0335\3\2\2\2\u0338\u0336"+
|
||||
"\3\2\2\2\u0338\u0337\3\2\2\2\u0339\u00a6\3\2\2\2\u033a\u033b\7\62\2\2"+
|
||||
"\u033b\u033d\t\4\2\2\u033c\u033e\5\u00adW\2\u033d\u033c\3\2\2\2\u033e"+
|
||||
"\u033f\3\2\2\2\u033f\u033d\3\2\2\2\u033f\u0340\3\2\2\2\u0340\u0348\3\2"+
|
||||
"\2\2\u0341\u0343\7\'\2\2\u0342\u0344\5\u00adW\2\u0343\u0342\3\2\2\2\u0344"+
|
||||
"\u0345\3\2\2\2\u0345\u0343\3\2\2\2\u0345\u0346\3\2\2\2\u0346\u0348\3\2"+
|
||||
"\2\2\u0347\u033a\3\2\2\2\u0347\u0341\3\2\2\2\u0348\u00a8\3\2\2\2\u0349"+
|
||||
"\u034b\5\u00afX\2\u034a\u0349\3\2\2\2\u034b\u034c\3\2\2\2\u034c\u034a"+
|
||||
"\3\2\2\2\u034c\u034d\3\2\2\2\u034d\u00aa\3\2\2\2\u034e\u0354\7&\2\2\u034f"+
|
||||
"\u0350\7\62\2\2\u0350\u0354\7z\2\2\u0351\u0352\7\62\2\2\u0352\u0354\7"+
|
||||
"Z\2\2\u0353\u034e\3\2\2\2\u0353\u034f\3\2\2\2\u0353\u0351\3\2\2\2\u0354"+
|
||||
"\u0356\3\2\2\2\u0355\u0357\5\u00b1Y\2\u0356\u0355\3\2\2\2\u0357\u0358"+
|
||||
"\3\2\2\2\u0358\u0356\3\2\2\2\u0358\u0359\3\2\2\2\u0359\u00ac\3\2\2\2\u035a"+
|
||||
"\u035b\t\5\2\2\u035b\u00ae\3\2\2\2\u035c\u035d\t\6\2\2\u035d\u00b0\3\2"+
|
||||
"\2\2\u035e\u035f\t\7\2\2\u035f\u00b2\3\2\2\2\u0360\u0364\5\u00b5[\2\u0361"+
|
||||
"\u0363\5\u00b7\\\2\u0362\u0361\3\2\2\2\u0363\u0366\3\2\2\2\u0364\u0362"+
|
||||
"\3\2\2\2\u0364\u0365\3\2\2\2\u0365\u00b4\3\2\2\2\u0366\u0364\3\2\2\2\u0367"+
|
||||
"\u0368\t\b\2\2\u0368\u00b6\3\2\2\2\u0369\u036a\t\t\2\2\u036a\u00b8\3\2"+
|
||||
"\2\2\u036b\u036f\7#\2\2\u036c\u036e\5\u00b7\\\2\u036d\u036c\3\2\2\2\u036e"+
|
||||
"\u0371\3\2\2\2\u036f\u036d\3\2\2\2\u036f\u0370\3\2\2\2\u0370\u0373\3\2"+
|
||||
"\2\2\u0371\u036f\3\2\2\2\u0372\u0374\t\n\2\2\u0373\u0372\3\2\2\2\u0374"+
|
||||
"\u0375\3\2\2\2\u0375\u0373\3\2\2\2\u0375\u0376\3\2\2\2\u0376\u00ba\3\2"+
|
||||
"\2\2\u0377\u0379\t\13\2\2\u0378\u0377\3\2\2\2\u0379\u037a\3\2\2\2\u037a"+
|
||||
"\u0378\3\2\2\2\u037a\u037b\3\2\2\2\u037b\u037c\3\2\2\2\u037c\u037d\b^"+
|
||||
"\2\2\u037d\u00bc\3\2\2\2\u037e\u037f\7\61\2\2\u037f\u0380\7\61\2\2\u0380"+
|
||||
"\u0384\3\2\2\2\u0381\u0383\n\f\2\2\u0382\u0381\3\2\2\2\u0383\u0386\3\2"+
|
||||
"\2\2\u0384\u0382\3\2\2\2\u0384\u0385\3\2\2\2\u0385\u0387\3\2\2\2\u0386"+
|
||||
"\u0384\3\2\2\2\u0387\u0388\b_\2\2\u0388\u00be\3\2\2\2\u0389\u038a\7\61"+
|
||||
"\2\2\u038a\u038b\7,\2\2\u038b\u038f\3\2\2\2\u038c\u038e\13\2\2\2\u038d"+
|
||||
"\u038c\3\2\2\2\u038e\u0391\3\2\2\2\u038f\u0390\3\2\2\2\u038f\u038d\3\2"+
|
||||
"\2\2\u0390\u0392\3\2\2\2\u0391\u038f\3\2\2\2\u0392\u0393\7,\2\2\u0393"+
|
||||
"\u0394\7\61\2\2\u0394\u0395\3\2\2\2\u0395\u0396\b`\2\2\u0396\u00c0\3\2"+
|
||||
"\2\2!\2\u02b7\u02bf\u02da\u02e0\u02e2\u02eb\u02f8\u02fc\u0301\u0308\u030d"+
|
||||
"\u0314\u0319\u0320\u0327\u032c\u0333\u0338\u033f\u0345\u0347\u034c\u0353"+
|
||||
"\u0358\u0364\u036f\u0375\u037a\u0384\u038f\3\b\2\2";
|
||||
"U\u00a9V\u00abW\u00adX\u00afY\u00b1Z\u00b3[\u00b5\2\u00b7\2\u00b9\2\u00bb"+
|
||||
"\\\u00bd\2\u00bf\2\u00c1]\u00c3^\u00c5_\u00c7`\3\2\r\3\2$$\3\2))\4\2D"+
|
||||
"Ddd\3\2\62\63\3\2\62;\5\2\62;CHch\5\2C\\aac|\6\2\62;C\\aac|\4\2--//\5"+
|
||||
"\2\13\f\17\17\"\"\4\2\f\f\17\17\2\u0418\2\3\3\2\2\2\2\5\3\2\2\2\2\7\3"+
|
||||
"\2\2\2\2\t\3\2\2\2\2\13\3\2\2\2\2\r\3\2\2\2\2\17\3\2\2\2\2\21\3\2\2\2"+
|
||||
"\2\23\3\2\2\2\2\25\3\2\2\2\2\27\3\2\2\2\2\31\3\2\2\2\2\33\3\2\2\2\2\35"+
|
||||
"\3\2\2\2\2\37\3\2\2\2\2!\3\2\2\2\2#\3\2\2\2\2%\3\2\2\2\2\'\3\2\2\2\2)"+
|
||||
"\3\2\2\2\2+\3\2\2\2\2-\3\2\2\2\2/\3\2\2\2\2\61\3\2\2\2\2\63\3\2\2\2\2"+
|
||||
"\65\3\2\2\2\2\67\3\2\2\2\29\3\2\2\2\2;\3\2\2\2\2=\3\2\2\2\2?\3\2\2\2\2"+
|
||||
"A\3\2\2\2\2C\3\2\2\2\2E\3\2\2\2\2G\3\2\2\2\2I\3\2\2\2\2K\3\2\2\2\2M\3"+
|
||||
"\2\2\2\2O\3\2\2\2\2Q\3\2\2\2\2S\3\2\2\2\2U\3\2\2\2\2W\3\2\2\2\2Y\3\2\2"+
|
||||
"\2\2[\3\2\2\2\2]\3\2\2\2\2_\3\2\2\2\2a\3\2\2\2\2c\3\2\2\2\2e\3\2\2\2\2"+
|
||||
"g\3\2\2\2\2i\3\2\2\2\2k\3\2\2\2\2m\3\2\2\2\2o\3\2\2\2\2q\3\2\2\2\2s\3"+
|
||||
"\2\2\2\2u\3\2\2\2\2w\3\2\2\2\2y\3\2\2\2\2{\3\2\2\2\2}\3\2\2\2\2\177\3"+
|
||||
"\2\2\2\2\u0081\3\2\2\2\2\u0083\3\2\2\2\2\u0085\3\2\2\2\2\u0087\3\2\2\2"+
|
||||
"\2\u0089\3\2\2\2\2\u008b\3\2\2\2\2\u008d\3\2\2\2\2\u008f\3\2\2\2\2\u0091"+
|
||||
"\3\2\2\2\2\u0093\3\2\2\2\2\u0095\3\2\2\2\2\u0097\3\2\2\2\2\u0099\3\2\2"+
|
||||
"\2\2\u009b\3\2\2\2\2\u009d\3\2\2\2\2\u009f\3\2\2\2\2\u00a1\3\2\2\2\2\u00a3"+
|
||||
"\3\2\2\2\2\u00a5\3\2\2\2\2\u00a7\3\2\2\2\2\u00a9\3\2\2\2\2\u00ab\3\2\2"+
|
||||
"\2\2\u00ad\3\2\2\2\2\u00af\3\2\2\2\2\u00b1\3\2\2\2\2\u00b3\3\2\2\2\2\u00bb"+
|
||||
"\3\2\2\2\2\u00c1\3\2\2\2\2\u00c3\3\2\2\2\2\u00c5\3\2\2\2\2\u00c7\3\2\2"+
|
||||
"\2\3\u00c9\3\2\2\2\5\u00d0\3\2\2\2\7\u00d2\3\2\2\2\t\u00d4\3\2\2\2\13"+
|
||||
"\u00d6\3\2\2\2\r\u00d8\3\2\2\2\17\u00da\3\2\2\2\21\u00dc\3\2\2\2\23\u00e4"+
|
||||
"\3\2\2\2\25\u00e6\3\2\2\2\27\u00ef\3\2\2\2\31\u00f7\3\2\2\2\33\u00fd\3"+
|
||||
"\2\2\2\35\u00ff\3\2\2\2\37\u0105\3\2\2\2!\u010c\3\2\2\2#\u010f\3\2\2\2"+
|
||||
"%\u0116\3\2\2\2\'\u011c\3\2\2\2)\u0123\3\2\2\2+\u0129\3\2\2\2-\u0132\3"+
|
||||
"\2\2\2/\u013b\3\2\2\2\61\u0145\3\2\2\2\63\u014e\3\2\2\2\65\u0153\3\2\2"+
|
||||
"\2\67\u0157\3\2\2\29\u015e\3\2\2\2;\u0162\3\2\2\2=\u0166\3\2\2\2?\u0169"+
|
||||
"\3\2\2\2A\u016e\3\2\2\2C\u0174\3\2\2\2E\u0177\3\2\2\2G\u017b\3\2\2\2I"+
|
||||
"\u0182\3\2\2\2K\u0186\3\2\2\2M\u0189\3\2\2\2O\u0190\3\2\2\2Q\u0192\3\2"+
|
||||
"\2\2S\u0194\3\2\2\2U\u0196\3\2\2\2W\u0199\3\2\2\2Y\u019c\3\2\2\2[\u019e"+
|
||||
"\3\2\2\2]\u01a0\3\2\2\2_\u01a2\3\2\2\2a\u01a4\3\2\2\2c\u01a6\3\2\2\2e"+
|
||||
"\u01a9\3\2\2\2g\u01ac\3\2\2\2i\u01ae\3\2\2\2k\u01b0\3\2\2\2m\u01b2\3\2"+
|
||||
"\2\2o\u01b4\3\2\2\2q\u01b7\3\2\2\2s\u01ba\3\2\2\2u\u01bd\3\2\2\2w\u01c0"+
|
||||
"\3\2\2\2y\u01c2\3\2\2\2{\u01c4\3\2\2\2}\u01c7\3\2\2\2\177\u01ca\3\2\2"+
|
||||
"\2\u0081\u01cd\3\2\2\2\u0083\u01d0\3\2\2\2\u0085\u01d3\3\2\2\2\u0087\u01d6"+
|
||||
"\3\2\2\2\u0089\u01d9\3\2\2\2\u008b\u01dd\3\2\2\2\u008d\u01e1\3\2\2\2\u008f"+
|
||||
"\u01e4\3\2\2\2\u0091\u01e7\3\2\2\2\u0093\u01ea\3\2\2\2\u0095\u01f0\3\2"+
|
||||
"\2\2\u0097\u02d0\3\2\2\2\u0099\u02d2\3\2\2\2\u009b\u02f3\3\2\2\2\u009d"+
|
||||
"\u02f5\3\2\2\2\u009f\u0300\3\2\2\2\u00a1\u0311\3\2\2\2\u00a3\u0315\3\2"+
|
||||
"\2\2\u00a5\u031a\3\2\2\2\u00a7\u0321\3\2\2\2\u00a9\u0332\3\2\2\2\u00ab"+
|
||||
"\u0340\3\2\2\2\u00ad\u0351\3\2\2\2\u00af\u0360\3\2\2\2\u00b1\u0363\3\2"+
|
||||
"\2\2\u00b3\u036c\3\2\2\2\u00b5\u0373\3\2\2\2\u00b7\u0375\3\2\2\2\u00b9"+
|
||||
"\u0377\3\2\2\2\u00bb\u0379\3\2\2\2\u00bd\u0380\3\2\2\2\u00bf\u0382\3\2"+
|
||||
"\2\2\u00c1\u0384\3\2\2\2\u00c3\u0391\3\2\2\2\u00c5\u0397\3\2\2\2\u00c7"+
|
||||
"\u03a2\3\2\2\2\u00c9\u00ca\7k\2\2\u00ca\u00cb\7o\2\2\u00cb\u00cc\7r\2"+
|
||||
"\2\u00cc\u00cd\7q\2\2\u00cd\u00ce\7t\2\2\u00ce\u00cf\7v\2\2\u00cf\4\3"+
|
||||
"\2\2\2\u00d0\u00d1\7?\2\2\u00d1\6\3\2\2\2\u00d2\u00d3\7=\2\2\u00d3\b\3"+
|
||||
"\2\2\2\u00d4\u00d5\7*\2\2\u00d5\n\3\2\2\2\u00d6\u00d7\7+\2\2\u00d7\f\3"+
|
||||
"\2\2\2\u00d8\u00d9\7}\2\2\u00d9\16\3\2\2\2\u00da\u00db\7\177\2\2\u00db"+
|
||||
"\20\3\2\2\2\u00dc\u00dd\7m\2\2\u00dd\u00de\7k\2\2\u00de\u00df\7e\2\2\u00df"+
|
||||
"\u00e0\7m\2\2\u00e0\u00e1\7c\2\2\u00e1\u00e2\7u\2\2\u00e2\u00e3\7o\2\2"+
|
||||
"\u00e3\22\3\2\2\2\u00e4\u00e5\7.\2\2\u00e5\24\3\2\2\2\u00e6\u00e7\7t\2"+
|
||||
"\2\u00e7\u00e8\7g\2\2\u00e8\u00e9\7u\2\2\u00e9\u00ea\7q\2\2\u00ea\u00eb"+
|
||||
"\7w\2\2\u00eb\u00ec\7t\2\2\u00ec\u00ed\7e\2\2\u00ed\u00ee\7g\2\2\u00ee"+
|
||||
"\26\3\2\2\2\u00ef\u00f0\7e\2\2\u00f0\u00f1\7n\2\2\u00f1\u00f2\7q\2\2\u00f2"+
|
||||
"\u00f3\7d\2\2\u00f3\u00f4\7d\2\2\u00f4\u00f5\7g\2\2\u00f5\u00f6\7t\2\2"+
|
||||
"\u00f6\30\3\2\2\2\u00f7\u00f8\7r\2\2\u00f8\u00f9\7c\2\2\u00f9\u00fa\7"+
|
||||
"t\2\2\u00fa\u00fb\7c\2\2\u00fb\u00fc\7o\2\2\u00fc\32\3\2\2\2\u00fd\u00fe"+
|
||||
"\7<\2\2\u00fe\34\3\2\2\2\u00ff\u0100\7d\2\2\u0100\u0101\7{\2\2\u0101\u0102"+
|
||||
"\7v\2\2\u0102\u0103\7g\2\2\u0103\u0104\7u\2\2\u0104\36\3\2\2\2\u0105\u0106"+
|
||||
"\7e\2\2\u0106\u0107\7{\2\2\u0107\u0108\7e\2\2\u0108\u0109\7n\2\2\u0109"+
|
||||
"\u010a\7g\2\2\u010a\u010b\7u\2\2\u010b \3\2\2\2\u010c\u010d\7r\2\2\u010d"+
|
||||
"\u010e\7e\2\2\u010e\"\3\2\2\2\u010f\u0110\7k\2\2\u0110\u0111\7p\2\2\u0111"+
|
||||
"\u0112\7n\2\2\u0112\u0113\7k\2\2\u0113\u0114\7p\2\2\u0114\u0115\7g\2\2"+
|
||||
"\u0115$\3\2\2\2\u0116\u0117\7e\2\2\u0117\u0118\7q\2\2\u0118\u0119\7p\2"+
|
||||
"\2\u0119\u011a\7u\2\2\u011a\u011b\7v\2\2\u011b&\3\2\2\2\u011c\u011d\7"+
|
||||
"g\2\2\u011d\u011e\7z\2\2\u011e\u011f\7v\2\2\u011f\u0120\7g\2\2\u0120\u0121"+
|
||||
"\7t\2\2\u0121\u0122\7p\2\2\u0122(\3\2\2\2\u0123\u0124\7c\2\2\u0124\u0125"+
|
||||
"\7n\2\2\u0125\u0126\7k\2\2\u0126\u0127\7i\2\2\u0127\u0128\7p\2\2\u0128"+
|
||||
"*\3\2\2\2\u0129\u012a\7t\2\2\u012a\u012b\7g\2\2\u012b\u012c\7i\2\2\u012c"+
|
||||
"\u012d\7k\2\2\u012d\u012e\7u\2\2\u012e\u012f\7v\2\2\u012f\u0130\7g\2\2"+
|
||||
"\u0130\u0131\7t\2\2\u0131,\3\2\2\2\u0132\u0133\7x\2\2\u0133\u0134\7q\2"+
|
||||
"\2\u0134\u0135\7n\2\2\u0135\u0136\7c\2\2\u0136\u0137\7v\2\2\u0137\u0138"+
|
||||
"\7k\2\2\u0138\u0139\7n\2\2\u0139\u013a\7g\2\2\u013a.\3\2\2\2\u013b\u013c"+
|
||||
"\7k\2\2\u013c\u013d\7p\2\2\u013d\u013e\7v\2\2\u013e\u013f\7g\2\2\u013f"+
|
||||
"\u0140\7t\2\2\u0140\u0141\7t\2\2\u0141\u0142\7w\2\2\u0142\u0143\7r\2\2"+
|
||||
"\u0143\u0144\7v\2\2\u0144\60\3\2\2\2\u0145\u0146\7j\2\2\u0146\u0147\7"+
|
||||
"c\2\2\u0147\u0148\7t\2\2\u0148\u0149\7f\2\2\u0149\u014a\7y\2\2\u014a\u014b"+
|
||||
"\7c\2\2\u014b\u014c\7t\2\2\u014c\u014d\7g\2\2\u014d\62\3\2\2\2\u014e\u014f"+
|
||||
"\7p\2\2\u014f\u0150\7q\2\2\u0150\u0151\7p\2\2\u0151\u0152\7g\2\2\u0152"+
|
||||
"\64\3\2\2\2\u0153\u0154\7c\2\2\u0154\u0155\7n\2\2\u0155\u0156\7n\2\2\u0156"+
|
||||
"\66\3\2\2\2\u0157\u0158\7m\2\2\u0158\u0159\7g\2\2\u0159\u015a\7t\2\2\u015a"+
|
||||
"\u015b\7p\2\2\u015b\u015c\7g\2\2\u015c\u015d\7n\2\2\u015d8\3\2\2\2\u015e"+
|
||||
"\u015f\7o\2\2\u015f\u0160\7k\2\2\u0160\u0161\7p\2\2\u0161:\3\2\2\2\u0162"+
|
||||
"\u0163\7u\2\2\u0163\u0164\7v\2\2\u0164\u0165\7f\2\2\u0165<\3\2\2\2\u0166"+
|
||||
"\u0167\7k\2\2\u0167\u0168\7h\2\2\u0168>\3\2\2\2\u0169\u016a\7g\2\2\u016a"+
|
||||
"\u016b\7n\2\2\u016b\u016c\7u\2\2\u016c\u016d\7g\2\2\u016d@\3\2\2\2\u016e"+
|
||||
"\u016f\7y\2\2\u016f\u0170\7j\2\2\u0170\u0171\7k\2\2\u0171\u0172\7n\2\2"+
|
||||
"\u0172\u0173\7g\2\2\u0173B\3\2\2\2\u0174\u0175\7f\2\2\u0175\u0176\7q\2"+
|
||||
"\2\u0176D\3\2\2\2\u0177\u0178\7h\2\2\u0178\u0179\7q\2\2\u0179\u017a\7"+
|
||||
"t\2\2\u017aF\3\2\2\2\u017b\u017c\7t\2\2\u017c\u017d\7g\2\2\u017d\u017e"+
|
||||
"\7v\2\2\u017e\u017f\7w\2\2\u017f\u0180\7t\2\2\u0180\u0181\7p\2\2\u0181"+
|
||||
"H\3\2\2\2\u0182\u0183\7c\2\2\u0183\u0184\7u\2\2\u0184\u0185\7o\2\2\u0185"+
|
||||
"J\3\2\2\2\u0186\u0187\7\60\2\2\u0187\u0188\7\60\2\2\u0188L\3\2\2\2\u0189"+
|
||||
"\u018a\7u\2\2\u018a\u018b\7k\2\2\u018b\u018c\7i\2\2\u018c\u018d\7p\2\2"+
|
||||
"\u018d\u018e\7g\2\2\u018e\u018f\7f\2\2\u018fN\3\2\2\2\u0190\u0191\7,\2"+
|
||||
"\2\u0191P\3\2\2\2\u0192\u0193\7]\2\2\u0193R\3\2\2\2\u0194\u0195\7_\2\2"+
|
||||
"\u0195T\3\2\2\2\u0196\u0197\7/\2\2\u0197\u0198\7/\2\2\u0198V\3\2\2\2\u0199"+
|
||||
"\u019a\7-\2\2\u019a\u019b\7-\2\2\u019bX\3\2\2\2\u019c\u019d\7-\2\2\u019d"+
|
||||
"Z\3\2\2\2\u019e\u019f\7/\2\2\u019f\\\3\2\2\2\u01a0\u01a1\7#\2\2\u01a1"+
|
||||
"^\3\2\2\2\u01a2\u01a3\7(\2\2\u01a3`\3\2\2\2\u01a4\u01a5\7\u0080\2\2\u01a5"+
|
||||
"b\3\2\2\2\u01a6\u01a7\7@\2\2\u01a7\u01a8\7@\2\2\u01a8d\3\2\2\2\u01a9\u01aa"+
|
||||
"\7>\2\2\u01aa\u01ab\7>\2\2\u01abf\3\2\2\2\u01ac\u01ad\7\61\2\2\u01adh"+
|
||||
"\3\2\2\2\u01ae\u01af\7\'\2\2\u01afj\3\2\2\2\u01b0\u01b1\7>\2\2\u01b1l"+
|
||||
"\3\2\2\2\u01b2\u01b3\7@\2\2\u01b3n\3\2\2\2\u01b4\u01b5\7?\2\2\u01b5\u01b6"+
|
||||
"\7?\2\2\u01b6p\3\2\2\2\u01b7\u01b8\7#\2\2\u01b8\u01b9\7?\2\2\u01b9r\3"+
|
||||
"\2\2\2\u01ba\u01bb\7>\2\2\u01bb\u01bc\7?\2\2\u01bct\3\2\2\2\u01bd\u01be"+
|
||||
"\7@\2\2\u01be\u01bf\7?\2\2\u01bfv\3\2\2\2\u01c0\u01c1\7`\2\2\u01c1x\3"+
|
||||
"\2\2\2\u01c2\u01c3\7~\2\2\u01c3z\3\2\2\2\u01c4\u01c5\7(\2\2\u01c5\u01c6"+
|
||||
"\7(\2\2\u01c6|\3\2\2\2\u01c7\u01c8\7~\2\2\u01c8\u01c9\7~\2\2\u01c9~\3"+
|
||||
"\2\2\2\u01ca\u01cb\7-\2\2\u01cb\u01cc\7?\2\2\u01cc\u0080\3\2\2\2\u01cd"+
|
||||
"\u01ce\7/\2\2\u01ce\u01cf\7?\2\2\u01cf\u0082\3\2\2\2\u01d0\u01d1\7,\2"+
|
||||
"\2\u01d1\u01d2\7?\2\2\u01d2\u0084\3\2\2\2\u01d3\u01d4\7\61\2\2\u01d4\u01d5"+
|
||||
"\7?\2\2\u01d5\u0086\3\2\2\2\u01d6\u01d7\7\'\2\2\u01d7\u01d8\7?\2\2\u01d8"+
|
||||
"\u0088\3\2\2\2\u01d9\u01da\7>\2\2\u01da\u01db\7>\2\2\u01db\u01dc\7?\2"+
|
||||
"\2\u01dc\u008a\3\2\2\2\u01dd\u01de\7@\2\2\u01de\u01df\7@\2\2\u01df\u01e0"+
|
||||
"\7?\2\2\u01e0\u008c\3\2\2\2\u01e1\u01e2\7(\2\2\u01e2\u01e3\7?\2\2\u01e3"+
|
||||
"\u008e\3\2\2\2\u01e4\u01e5\7~\2\2\u01e5\u01e6\7?\2\2\u01e6\u0090\3\2\2"+
|
||||
"\2\u01e7\u01e8\7`\2\2\u01e8\u01e9\7?\2\2\u01e9\u0092\3\2\2\2\u01ea\u01eb"+
|
||||
"\7\60\2\2\u01eb\u01ec\7d\2\2\u01ec\u01ed\7{\2\2\u01ed\u01ee\7v\2\2\u01ee"+
|
||||
"\u01ef\7g\2\2\u01ef\u0094\3\2\2\2\u01f0\u01f1\7%\2\2\u01f1\u0096\3\2\2"+
|
||||
"\2\u01f2\u01f3\7d\2\2\u01f3\u01f4\7t\2\2\u01f4\u02d1\7m\2\2\u01f5\u01f6"+
|
||||
"\7q\2\2\u01f6\u01f7\7t\2\2\u01f7\u02d1\7c\2\2\u01f8\u01f9\7m\2\2\u01f9"+
|
||||
"\u01fa\7k\2\2\u01fa\u02d1\7n\2\2\u01fb\u01fc\7u\2\2\u01fc\u01fd\7n\2\2"+
|
||||
"\u01fd\u02d1\7q\2\2\u01fe\u01ff\7p\2\2\u01ff\u0200\7q\2\2\u0200\u02d1"+
|
||||
"\7r\2\2\u0201\u0202\7c\2\2\u0202\u0203\7u\2\2\u0203\u02d1\7n\2\2\u0204"+
|
||||
"\u0205\7r\2\2\u0205\u0206\7j\2\2\u0206\u02d1\7r\2\2\u0207\u0208\7c\2\2"+
|
||||
"\u0208\u0209\7p\2\2\u0209\u02d1\7e\2\2\u020a\u020b\7d\2\2\u020b\u020c"+
|
||||
"\7r\2\2\u020c\u02d1\7n\2\2\u020d\u020e\7e\2\2\u020e\u020f\7n\2\2\u020f"+
|
||||
"\u02d1\7e\2\2\u0210\u0211\7l\2\2\u0211\u0212\7u\2\2\u0212\u02d1\7t\2\2"+
|
||||
"\u0213\u0214\7c\2\2\u0214\u0215\7p\2\2\u0215\u02d1\7f\2\2\u0216\u0217"+
|
||||
"\7t\2\2\u0217\u0218\7n\2\2\u0218\u02d1\7c\2\2\u0219\u021a\7d\2\2\u021a"+
|
||||
"\u021b\7k\2\2\u021b\u02d1\7v\2\2\u021c\u021d\7t\2\2\u021d\u021e\7q\2\2"+
|
||||
"\u021e\u02d1\7n\2\2\u021f\u0220\7r\2\2\u0220\u0221\7n\2\2\u0221\u02d1"+
|
||||
"\7c\2\2\u0222\u0223\7r\2\2\u0223\u0224\7n\2\2\u0224\u02d1\7r\2\2\u0225"+
|
||||
"\u0226\7d\2\2\u0226\u0227\7o\2\2\u0227\u02d1\7k\2\2\u0228\u0229\7u\2\2"+
|
||||
"\u0229\u022a\7g\2\2\u022a\u02d1\7e\2\2\u022b\u022c\7t\2\2\u022c\u022d"+
|
||||
"\7v\2\2\u022d\u02d1\7k\2\2\u022e\u022f\7g\2\2\u022f\u0230\7q\2\2\u0230"+
|
||||
"\u02d1\7t\2\2\u0231\u0232\7u\2\2\u0232\u0233\7t\2\2\u0233\u02d1\7g\2\2"+
|
||||
"\u0234\u0235\7n\2\2\u0235\u0236\7u\2\2\u0236\u02d1\7t\2\2\u0237\u0238"+
|
||||
"\7r\2\2\u0238\u0239\7j\2\2\u0239\u02d1\7c\2\2\u023a\u023b\7c\2\2\u023b"+
|
||||
"\u023c\7n\2\2\u023c\u02d1\7t\2\2\u023d\u023e\7l\2\2\u023e\u023f\7o\2\2"+
|
||||
"\u023f\u02d1\7r\2\2\u0240\u0241\7d\2\2\u0241\u0242\7x\2\2\u0242\u02d1"+
|
||||
"\7e\2\2\u0243\u0244\7e\2\2\u0244\u0245\7n\2\2\u0245\u02d1\7k\2\2\u0246"+
|
||||
"\u0247\7t\2\2\u0247\u0248\7v\2\2\u0248\u02d1\7u\2\2\u0249\u024a\7c\2\2"+
|
||||
"\u024a\u024b\7f\2\2\u024b\u02d1\7e\2\2\u024c\u024d\7t\2\2\u024d\u024e"+
|
||||
"\7t\2\2\u024e\u02d1\7c\2\2\u024f\u0250\7d\2\2\u0250\u0251\7x\2\2\u0251"+
|
||||
"\u02d1\7u\2\2\u0252\u0253\7u\2\2\u0253\u0254\7g\2\2\u0254\u02d1\7k\2\2"+
|
||||
"\u0255\u0256\7u\2\2\u0256\u0257\7c\2\2\u0257\u02d1\7z\2\2\u0258\u0259"+
|
||||
"\7u\2\2\u0259\u025a\7v\2\2\u025a\u02d1\7{\2\2\u025b\u025c\7u\2\2\u025c"+
|
||||
"\u025d\7v\2\2\u025d\u02d1\7c\2\2\u025e\u025f\7u\2\2\u025f\u0260\7v\2\2"+
|
||||
"\u0260\u02d1\7z\2\2\u0261\u0262\7f\2\2\u0262\u0263\7g\2\2\u0263\u02d1"+
|
||||
"\7{\2\2\u0264\u0265\7v\2\2\u0265\u0266\7z\2\2\u0266\u02d1\7c\2\2\u0267"+
|
||||
"\u0268\7z\2\2\u0268\u0269\7c\2\2\u0269\u02d1\7c\2\2\u026a\u026b\7d\2\2"+
|
||||
"\u026b\u026c\7e\2\2\u026c\u02d1\7e\2\2\u026d\u026e\7c\2\2\u026e\u026f"+
|
||||
"\7j\2\2\u026f\u02d1\7z\2\2\u0270\u0271\7v\2\2\u0271\u0272\7{\2\2\u0272"+
|
||||
"\u02d1\7c\2\2\u0273\u0274\7v\2\2\u0274\u0275\7z\2\2\u0275\u02d1\7u\2\2"+
|
||||
"\u0276\u0277\7v\2\2\u0277\u0278\7c\2\2\u0278\u02d1\7u\2\2\u0279\u027a"+
|
||||
"\7u\2\2\u027a\u027b\7j\2\2\u027b\u02d1\7{\2\2\u027c\u027d\7u\2\2\u027d"+
|
||||
"\u027e\7j\2\2\u027e\u02d1\7z\2\2\u027f\u0280\7n\2\2\u0280\u0281\7f\2\2"+
|
||||
"\u0281\u02d1\7{\2\2\u0282\u0283\7n\2\2\u0283\u0284\7f\2\2\u0284\u02d1"+
|
||||
"\7c\2\2\u0285\u0286\7n\2\2\u0286\u0287\7f\2\2\u0287\u02d1\7z\2\2\u0288"+
|
||||
"\u0289\7n\2\2\u0289\u028a\7c\2\2\u028a\u02d1\7z\2\2\u028b\u028c\7v\2\2"+
|
||||
"\u028c\u028d\7c\2\2\u028d\u02d1\7{\2\2\u028e\u028f\7v\2\2\u028f\u0290"+
|
||||
"\7c\2\2\u0290\u02d1\7z\2\2\u0291\u0292\7d\2\2\u0292\u0293\7e\2\2\u0293"+
|
||||
"\u02d1\7u\2\2\u0294\u0295\7e\2\2\u0295\u0296\7n\2\2\u0296\u02d1\7x\2\2"+
|
||||
"\u0297\u0298\7v\2\2\u0298\u0299\7u\2\2\u0299\u02d1\7z\2\2\u029a\u029b"+
|
||||
"\7n\2\2\u029b\u029c\7c\2\2\u029c\u02d1\7u\2\2\u029d\u029e\7e\2\2\u029e"+
|
||||
"\u029f\7r\2\2\u029f\u02d1\7{\2\2\u02a0\u02a1\7e\2\2\u02a1\u02a2\7o\2\2"+
|
||||
"\u02a2\u02d1\7r\2\2\u02a3\u02a4\7e\2\2\u02a4\u02a5\7r\2\2\u02a5\u02d1"+
|
||||
"\7z\2\2\u02a6\u02a7\7f\2\2\u02a7\u02a8\7e\2\2\u02a8\u02d1\7r\2\2\u02a9"+
|
||||
"\u02aa\7f\2\2\u02aa\u02ab\7g\2\2\u02ab\u02d1\7e\2\2\u02ac\u02ad\7k\2\2"+
|
||||
"\u02ad\u02ae\7p\2\2\u02ae\u02d1\7e\2\2\u02af\u02b0\7c\2\2\u02b0\u02b1"+
|
||||
"\7z\2\2\u02b1\u02d1\7u\2\2\u02b2\u02b3\7d\2\2\u02b3\u02b4\7p\2\2\u02b4"+
|
||||
"\u02d1\7g\2\2\u02b5\u02b6\7e\2\2\u02b6\u02b7\7n\2\2\u02b7\u02d1\7f\2\2"+
|
||||
"\u02b8\u02b9\7u\2\2\u02b9\u02ba\7d\2\2\u02ba\u02d1\7e\2\2\u02bb\u02bc"+
|
||||
"\7k\2\2\u02bc\u02bd\7u\2\2\u02bd\u02d1\7e\2\2\u02be\u02bf\7k\2\2\u02bf"+
|
||||
"\u02c0\7p\2\2\u02c0\u02d1\7z\2\2\u02c1\u02c2\7d\2\2\u02c2\u02c3\7g\2\2"+
|
||||
"\u02c3\u02d1\7s\2\2\u02c4\u02c5\7u\2\2\u02c5\u02c6\7g\2\2\u02c6\u02d1"+
|
||||
"\7f\2\2\u02c7\u02c8\7f\2\2\u02c8\u02c9\7g\2\2\u02c9\u02d1\7z\2\2\u02ca"+
|
||||
"\u02cb\7k\2\2\u02cb\u02cc\7p\2\2\u02cc\u02d1\7{\2\2\u02cd\u02ce\7t\2\2"+
|
||||
"\u02ce\u02cf\7q\2\2\u02cf\u02d1\7t\2\2\u02d0\u01f2\3\2\2\2\u02d0\u01f5"+
|
||||
"\3\2\2\2\u02d0\u01f8\3\2\2\2\u02d0\u01fb\3\2\2\2\u02d0\u01fe\3\2\2\2\u02d0"+
|
||||
"\u0201\3\2\2\2\u02d0\u0204\3\2\2\2\u02d0\u0207\3\2\2\2\u02d0\u020a\3\2"+
|
||||
"\2\2\u02d0\u020d\3\2\2\2\u02d0\u0210\3\2\2\2\u02d0\u0213\3\2\2\2\u02d0"+
|
||||
"\u0216\3\2\2\2\u02d0\u0219\3\2\2\2\u02d0\u021c\3\2\2\2\u02d0\u021f\3\2"+
|
||||
"\2\2\u02d0\u0222\3\2\2\2\u02d0\u0225\3\2\2\2\u02d0\u0228\3\2\2\2\u02d0"+
|
||||
"\u022b\3\2\2\2\u02d0\u022e\3\2\2\2\u02d0\u0231\3\2\2\2\u02d0\u0234\3\2"+
|
||||
"\2\2\u02d0\u0237\3\2\2\2\u02d0\u023a\3\2\2\2\u02d0\u023d\3\2\2\2\u02d0"+
|
||||
"\u0240\3\2\2\2\u02d0\u0243\3\2\2\2\u02d0\u0246\3\2\2\2\u02d0\u0249\3\2"+
|
||||
"\2\2\u02d0\u024c\3\2\2\2\u02d0\u024f\3\2\2\2\u02d0\u0252\3\2\2\2\u02d0"+
|
||||
"\u0255\3\2\2\2\u02d0\u0258\3\2\2\2\u02d0\u025b\3\2\2\2\u02d0\u025e\3\2"+
|
||||
"\2\2\u02d0\u0261\3\2\2\2\u02d0\u0264\3\2\2\2\u02d0\u0267\3\2\2\2\u02d0"+
|
||||
"\u026a\3\2\2\2\u02d0\u026d\3\2\2\2\u02d0\u0270\3\2\2\2\u02d0\u0273\3\2"+
|
||||
"\2\2\u02d0\u0276\3\2\2\2\u02d0\u0279\3\2\2\2\u02d0\u027c\3\2\2\2\u02d0"+
|
||||
"\u027f\3\2\2\2\u02d0\u0282\3\2\2\2\u02d0\u0285\3\2\2\2\u02d0\u0288\3\2"+
|
||||
"\2\2\u02d0\u028b\3\2\2\2\u02d0\u028e\3\2\2\2\u02d0\u0291\3\2\2\2\u02d0"+
|
||||
"\u0294\3\2\2\2\u02d0\u0297\3\2\2\2\u02d0\u029a\3\2\2\2\u02d0\u029d\3\2"+
|
||||
"\2\2\u02d0\u02a0\3\2\2\2\u02d0\u02a3\3\2\2\2\u02d0\u02a6\3\2\2\2\u02d0"+
|
||||
"\u02a9\3\2\2\2\u02d0\u02ac\3\2\2\2\u02d0\u02af\3\2\2\2\u02d0\u02b2\3\2"+
|
||||
"\2\2\u02d0\u02b5\3\2\2\2\u02d0\u02b8\3\2\2\2\u02d0\u02bb\3\2\2\2\u02d0"+
|
||||
"\u02be\3\2\2\2\u02d0\u02c1\3\2\2\2\u02d0\u02c4\3\2\2\2\u02d0\u02c7\3\2"+
|
||||
"\2\2\u02d0\u02ca\3\2\2\2\u02d0\u02cd\3\2\2\2\u02d1\u0098\3\2\2\2\u02d2"+
|
||||
"\u02d3\7}\2\2\u02d3\u02d4\7}\2\2\u02d4\u02d8\3\2\2\2\u02d5\u02d7\13\2"+
|
||||
"\2\2\u02d6\u02d5\3\2\2\2\u02d7\u02da\3\2\2\2\u02d8\u02d9\3\2\2\2\u02d8"+
|
||||
"\u02d6\3\2\2\2\u02d9\u02db\3\2\2\2\u02da\u02d8\3\2\2\2\u02db\u02dc\7\177"+
|
||||
"\2\2\u02dc\u02dd\7\177\2\2\u02dd\u009a\3\2\2\2\u02de\u02df\7d\2\2\u02df"+
|
||||
"\u02e0\7{\2\2\u02e0\u02e1\7v\2\2\u02e1\u02f4\7g\2\2\u02e2\u02e3\7y\2\2"+
|
||||
"\u02e3\u02e4\7q\2\2\u02e4\u02e5\7t\2\2\u02e5\u02f4\7f\2\2\u02e6\u02e7"+
|
||||
"\7f\2\2\u02e7\u02e8\7y\2\2\u02e8\u02e9\7q\2\2\u02e9\u02ea\7t\2\2\u02ea"+
|
||||
"\u02f4\7f\2\2\u02eb\u02ec\7d\2\2\u02ec\u02ed\7q\2\2\u02ed\u02ee\7q\2\2"+
|
||||
"\u02ee\u02f4\7n\2\2\u02ef\u02f0\7x\2\2\u02f0\u02f1\7q\2\2\u02f1\u02f2"+
|
||||
"\7k\2\2\u02f2\u02f4\7f\2\2\u02f3\u02de\3\2\2\2\u02f3\u02e2\3\2\2\2\u02f3"+
|
||||
"\u02e6\3\2\2\2\u02f3\u02eb\3\2\2\2\u02f3\u02ef\3\2\2\2\u02f4\u009c\3\2"+
|
||||
"\2\2\u02f5\u02fb\7$\2\2\u02f6\u02f7\7^\2\2\u02f7\u02fa\7$\2\2\u02f8\u02fa"+
|
||||
"\n\2\2\2\u02f9\u02f6\3\2\2\2\u02f9\u02f8\3\2\2\2\u02fa\u02fd\3\2\2\2\u02fb"+
|
||||
"\u02f9\3\2\2\2\u02fb\u02fc\3\2\2\2\u02fc\u02fe\3\2\2\2\u02fd\u02fb\3\2"+
|
||||
"\2\2\u02fe\u02ff\7$\2\2\u02ff\u009e\3\2\2\2\u0300\u0304\7)\2\2\u0301\u0302"+
|
||||
"\7^\2\2\u0302\u0305\7)\2\2\u0303\u0305\n\3\2\2\u0304\u0301\3\2\2\2\u0304"+
|
||||
"\u0303\3\2\2\2\u0305\u0306\3\2\2\2\u0306\u0307\7)\2\2\u0307\u00a0\3\2"+
|
||||
"\2\2\u0308\u0309\7v\2\2\u0309\u030a\7t\2\2\u030a\u030b\7w\2\2\u030b\u0312"+
|
||||
"\7g\2\2\u030c\u030d\7h\2\2\u030d\u030e\7c\2\2\u030e\u030f\7n\2\2\u030f"+
|
||||
"\u0310\7u\2\2\u0310\u0312\7g\2\2\u0311\u0308\3\2\2\2\u0311\u030c\3\2\2"+
|
||||
"\2\u0312\u00a2\3\2\2\2\u0313\u0316\5\u00a5S\2\u0314\u0316\5\u00adW\2\u0315"+
|
||||
"\u0313\3\2\2\2\u0315\u0314\3\2\2\2\u0316\u00a4\3\2\2\2\u0317\u031b\5\u00a7"+
|
||||
"T\2\u0318\u031b\5\u00a9U\2\u0319\u031b\5\u00abV\2\u031a\u0317\3\2\2\2"+
|
||||
"\u031a\u0318\3\2\2\2\u031a\u0319\3\2\2\2\u031b\u00a6\3\2\2\2\u031c\u0322"+
|
||||
"\7\'\2\2\u031d\u031e\7\62\2\2\u031e\u0322\7d\2\2\u031f\u0320\7\62\2\2"+
|
||||
"\u0320\u0322\7D\2\2\u0321\u031c\3\2\2\2\u0321\u031d\3\2\2\2\u0321\u031f"+
|
||||
"\3\2\2\2\u0322\u0326\3\2\2\2\u0323\u0325\5\u00b5[\2\u0324\u0323\3\2\2"+
|
||||
"\2\u0325\u0328\3\2\2\2\u0326\u0324\3\2\2\2\u0326\u0327\3\2\2\2\u0327\u0329"+
|
||||
"\3\2\2\2\u0328\u0326\3\2\2\2\u0329\u032b\7\60\2\2\u032a\u032c\5\u00b5"+
|
||||
"[\2\u032b\u032a\3\2\2\2\u032c\u032d\3\2\2\2\u032d\u032b\3\2\2\2\u032d"+
|
||||
"\u032e\3\2\2\2\u032e\u00a8\3\2\2\2\u032f\u0331\5\u00b7\\\2\u0330\u032f"+
|
||||
"\3\2\2\2\u0331\u0334\3\2\2\2\u0332\u0330\3\2\2\2\u0332\u0333\3\2\2\2\u0333"+
|
||||
"\u0335\3\2\2\2\u0334\u0332\3\2\2\2\u0335\u0337\7\60\2\2\u0336\u0338\5"+
|
||||
"\u00b7\\\2\u0337\u0336\3\2\2\2\u0338\u0339\3\2\2\2\u0339\u0337\3\2\2\2"+
|
||||
"\u0339\u033a\3\2\2\2\u033a\u00aa\3\2\2\2\u033b\u0341\7&\2\2\u033c\u033d"+
|
||||
"\7\62\2\2\u033d\u0341\7z\2\2\u033e\u033f\7\62\2\2\u033f\u0341\7Z\2\2\u0340"+
|
||||
"\u033b\3\2\2\2\u0340\u033c\3\2\2\2\u0340\u033e\3\2\2\2\u0341\u0345\3\2"+
|
||||
"\2\2\u0342\u0344\5\u00b9]\2\u0343\u0342\3\2\2\2\u0344\u0347\3\2\2\2\u0345"+
|
||||
"\u0343\3\2\2\2\u0345\u0346\3\2\2\2\u0346\u0348\3\2\2\2\u0347\u0345\3\2"+
|
||||
"\2\2\u0348\u034a\7\60\2\2\u0349\u034b\5\u00b9]\2\u034a\u0349\3\2\2\2\u034b"+
|
||||
"\u034c\3\2\2\2\u034c\u034a\3\2\2\2\u034c\u034d\3\2\2\2\u034d\u00ac\3\2"+
|
||||
"\2\2\u034e\u0352\5\u00b1Y\2\u034f\u0352\5\u00b3Z\2\u0350\u0352\5\u00af"+
|
||||
"X\2\u0351\u034e\3\2\2\2\u0351\u034f\3\2\2\2\u0351\u0350\3\2\2\2\u0352"+
|
||||
"\u00ae\3\2\2\2\u0353\u0354\7\62\2\2\u0354\u0356\t\4\2\2\u0355\u0357\5"+
|
||||
"\u00b5[\2\u0356\u0355\3\2\2\2\u0357\u0358\3\2\2\2\u0358\u0356\3\2\2\2"+
|
||||
"\u0358\u0359\3\2\2\2\u0359\u0361\3\2\2\2\u035a\u035c\7\'\2\2\u035b\u035d"+
|
||||
"\5\u00b5[\2\u035c\u035b\3\2\2\2\u035d\u035e\3\2\2\2\u035e\u035c\3\2\2"+
|
||||
"\2\u035e\u035f\3\2\2\2\u035f\u0361\3\2\2\2\u0360\u0353\3\2\2\2\u0360\u035a"+
|
||||
"\3\2\2\2\u0361\u00b0\3\2\2\2\u0362\u0364\5\u00b7\\\2\u0363\u0362\3\2\2"+
|
||||
"\2\u0364\u0365\3\2\2\2\u0365\u0363\3\2\2\2\u0365\u0366\3\2\2\2\u0366\u00b2"+
|
||||
"\3\2\2\2\u0367\u036d\7&\2\2\u0368\u0369\7\62\2\2\u0369\u036d\7z\2\2\u036a"+
|
||||
"\u036b\7\62\2\2\u036b\u036d\7Z\2\2\u036c\u0367\3\2\2\2\u036c\u0368\3\2"+
|
||||
"\2\2\u036c\u036a\3\2\2\2\u036d\u036f\3\2\2\2\u036e\u0370\5\u00b9]\2\u036f"+
|
||||
"\u036e\3\2\2\2\u0370\u0371\3\2\2\2\u0371\u036f\3\2\2\2\u0371\u0372\3\2"+
|
||||
"\2\2\u0372\u00b4\3\2\2\2\u0373\u0374\t\5\2\2\u0374\u00b6\3\2\2\2\u0375"+
|
||||
"\u0376\t\6\2\2\u0376\u00b8\3\2\2\2\u0377\u0378\t\7\2\2\u0378\u00ba\3\2"+
|
||||
"\2\2\u0379\u037d\5\u00bd_\2\u037a\u037c\5\u00bf`\2\u037b\u037a\3\2\2\2"+
|
||||
"\u037c\u037f\3\2\2\2\u037d\u037b\3\2\2\2\u037d\u037e\3\2\2\2\u037e\u00bc"+
|
||||
"\3\2\2\2\u037f\u037d\3\2\2\2\u0380\u0381\t\b\2\2\u0381\u00be\3\2\2\2\u0382"+
|
||||
"\u0383\t\t\2\2\u0383\u00c0\3\2\2\2\u0384\u0388\7#\2\2\u0385\u0387\5\u00bf"+
|
||||
"`\2\u0386\u0385\3\2\2\2\u0387\u038a\3\2\2\2\u0388\u0386\3\2\2\2\u0388"+
|
||||
"\u0389\3\2\2\2\u0389\u038c\3\2\2\2\u038a\u0388\3\2\2\2\u038b\u038d\t\n"+
|
||||
"\2\2\u038c\u038b\3\2\2\2\u038d\u038e\3\2\2\2\u038e\u038c\3\2\2\2\u038e"+
|
||||
"\u038f\3\2\2\2\u038f\u00c2\3\2\2\2\u0390\u0392\t\13\2\2\u0391\u0390\3"+
|
||||
"\2\2\2\u0392\u0393\3\2\2\2\u0393\u0391\3\2\2\2\u0393\u0394\3\2\2\2\u0394"+
|
||||
"\u0395\3\2\2\2\u0395\u0396\bb\2\2\u0396\u00c4\3\2\2\2\u0397\u0398\7\61"+
|
||||
"\2\2\u0398\u0399\7\61\2\2\u0399\u039d\3\2\2\2\u039a\u039c\n\f\2\2\u039b"+
|
||||
"\u039a\3\2\2\2\u039c\u039f\3\2\2\2\u039d\u039b\3\2\2\2\u039d\u039e\3\2"+
|
||||
"\2\2\u039e\u03a0\3\2\2\2\u039f\u039d\3\2\2\2\u03a0\u03a1\bc\2\2\u03a1"+
|
||||
"\u00c6\3\2\2\2\u03a2\u03a3\7\61\2\2\u03a3\u03a4\7,\2\2\u03a4\u03a8\3\2"+
|
||||
"\2\2\u03a5\u03a7\13\2\2\2\u03a6\u03a5\3\2\2\2\u03a7\u03aa\3\2\2\2\u03a8"+
|
||||
"\u03a9\3\2\2\2\u03a8\u03a6\3\2\2\2\u03a9\u03ab\3\2\2\2\u03aa\u03a8\3\2"+
|
||||
"\2\2\u03ab\u03ac\7,\2\2\u03ac\u03ad\7\61\2\2\u03ad\u03ae\3\2\2\2\u03ae"+
|
||||
"\u03af\bd\2\2\u03af\u00c8\3\2\2\2!\2\u02d0\u02d8\u02f3\u02f9\u02fb\u0304"+
|
||||
"\u0311\u0315\u031a\u0321\u0326\u032d\u0332\u0339\u0340\u0345\u034c\u0351"+
|
||||
"\u0358\u035e\u0360\u0365\u036c\u0371\u037d\u0388\u038e\u0393\u039d\u03a8"+
|
||||
"\3\b\2\2";
|
||||
public static final ATN _ATN =
|
||||
new ATNDeserializer().deserialize(_serializedATN.toCharArray());
|
||||
static {
|
||||
|
@ -68,26 +68,30 @@ T__66=67
|
||||
T__67=68
|
||||
T__68=69
|
||||
T__69=70
|
||||
MNEMONIC=71
|
||||
KICKASM=72
|
||||
SIMPLETYPE=73
|
||||
STRING=74
|
||||
CHAR=75
|
||||
BOOLEAN=76
|
||||
NUMBER=77
|
||||
NUMFLOAT=78
|
||||
BINFLOAT=79
|
||||
DECFLOAT=80
|
||||
HEXFLOAT=81
|
||||
NUMINT=82
|
||||
BININTEGER=83
|
||||
DECINTEGER=84
|
||||
HEXINTEGER=85
|
||||
NAME=86
|
||||
ASMREL=87
|
||||
WS=88
|
||||
COMMENT_LINE=89
|
||||
COMMENT_BLOCK=90
|
||||
T__70=71
|
||||
T__71=72
|
||||
T__72=73
|
||||
T__73=74
|
||||
MNEMONIC=75
|
||||
KICKASM=76
|
||||
SIMPLETYPE=77
|
||||
STRING=78
|
||||
CHAR=79
|
||||
BOOLEAN=80
|
||||
NUMBER=81
|
||||
NUMFLOAT=82
|
||||
BINFLOAT=83
|
||||
DECFLOAT=84
|
||||
HEXFLOAT=85
|
||||
NUMINT=86
|
||||
BININTEGER=87
|
||||
DECINTEGER=88
|
||||
HEXINTEGER=89
|
||||
NAME=90
|
||||
ASMREL=91
|
||||
WS=92
|
||||
COMMENT_LINE=93
|
||||
COMMENT_BLOCK=94
|
||||
'import'=1
|
||||
'='=2
|
||||
';'=3
|
||||
@ -112,49 +116,53 @@ COMMENT_BLOCK=90
|
||||
'volatile'=22
|
||||
'interrupt'=23
|
||||
'hardware'=24
|
||||
'kernel'=25
|
||||
'if'=26
|
||||
'else'=27
|
||||
'while'=28
|
||||
'do'=29
|
||||
'for'=30
|
||||
'return'=31
|
||||
'asm'=32
|
||||
'..'=33
|
||||
'signed'=34
|
||||
'*'=35
|
||||
'['=36
|
||||
']'=37
|
||||
'--'=38
|
||||
'++'=39
|
||||
'+'=40
|
||||
'-'=41
|
||||
'!'=42
|
||||
'&'=43
|
||||
'~'=44
|
||||
'>>'=45
|
||||
'<<'=46
|
||||
'/'=47
|
||||
'%'=48
|
||||
'<'=49
|
||||
'>'=50
|
||||
'=='=51
|
||||
'!='=52
|
||||
'<='=53
|
||||
'>='=54
|
||||
'^'=55
|
||||
'|'=56
|
||||
'&&'=57
|
||||
'||'=58
|
||||
'+='=59
|
||||
'-='=60
|
||||
'*='=61
|
||||
'/='=62
|
||||
'%='=63
|
||||
'<<='=64
|
||||
'>>='=65
|
||||
'&='=66
|
||||
'|='=67
|
||||
'^='=68
|
||||
'.byte'=69
|
||||
'#'=70
|
||||
'none'=25
|
||||
'all'=26
|
||||
'kernel'=27
|
||||
'min'=28
|
||||
'std'=29
|
||||
'if'=30
|
||||
'else'=31
|
||||
'while'=32
|
||||
'do'=33
|
||||
'for'=34
|
||||
'return'=35
|
||||
'asm'=36
|
||||
'..'=37
|
||||
'signed'=38
|
||||
'*'=39
|
||||
'['=40
|
||||
']'=41
|
||||
'--'=42
|
||||
'++'=43
|
||||
'+'=44
|
||||
'-'=45
|
||||
'!'=46
|
||||
'&'=47
|
||||
'~'=48
|
||||
'>>'=49
|
||||
'<<'=50
|
||||
'/'=51
|
||||
'%'=52
|
||||
'<'=53
|
||||
'>'=54
|
||||
'=='=55
|
||||
'!='=56
|
||||
'<='=57
|
||||
'>='=58
|
||||
'^'=59
|
||||
'|'=60
|
||||
'&&'=61
|
||||
'||'=62
|
||||
'+='=63
|
||||
'-='=64
|
||||
'*='=65
|
||||
'/='=66
|
||||
'%='=67
|
||||
'<<='=68
|
||||
'>>='=69
|
||||
'&='=70
|
||||
'|='=71
|
||||
'^='=72
|
||||
'.byte'=73
|
||||
'#'=74
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -371,12 +371,26 @@ public class Pass0GenerateStatementSequence extends KickCBaseVisitor<Object> {
|
||||
|
||||
@Override
|
||||
public Object visitDirectiveInterrupt(KickCParser.DirectiveInterruptContext ctx) {
|
||||
Procedure.InterruptType interruptType = Procedure.InterruptType.KERNEL;
|
||||
String interruptType = "KERNEL";
|
||||
if(ctx.getChildCount() > 1) {
|
||||
String name = ctx.getChild(2).getText().toUpperCase();
|
||||
interruptType = Procedure.InterruptType.valueOf(name);
|
||||
interruptType = ctx.getChild(2).getText().toUpperCase();
|
||||
}
|
||||
return new DirectiveInterrupt(interruptType);
|
||||
String interruptSubType;
|
||||
if(interruptType.equals("KERNEL")) {
|
||||
// KERNEL - default is STD
|
||||
interruptSubType = "STD";
|
||||
} else {
|
||||
// HARDWARE - default is ALL
|
||||
interruptSubType = "ALL";
|
||||
}
|
||||
if(ctx.getChildCount() > 3) {
|
||||
String subTypeText = ctx.getChild(3).getText();
|
||||
if(!")".equals(subTypeText)) {
|
||||
interruptSubType = subTypeText.toUpperCase();
|
||||
}
|
||||
}
|
||||
Procedure.InterruptType type = Procedure.InterruptType.valueOf(interruptType + "_" + interruptSubType);
|
||||
return new DirectiveInterrupt(type);
|
||||
}
|
||||
|
||||
@Override
|
||||
|
@ -67,10 +67,18 @@ public class Pass4CodeGeneration {
|
||||
addConstants(asm, currentScope);
|
||||
addZpLabels(asm, currentScope);
|
||||
}
|
||||
|
||||
// Generate entry points (if needed)
|
||||
genBlockEntryPoints(asm, block);
|
||||
if(!block.isProcedureEntry(program)) {
|
||||
// Generate label
|
||||
|
||||
if(block.isProcedureEntry(program)) {
|
||||
// Generate interrupt entry if needed
|
||||
Procedure procedure = block.getProcedure(program);
|
||||
if(procedure!=null && procedure.getInterruptType()!=null) {
|
||||
generateInterruptEntry(asm, procedure.getInterruptType());
|
||||
}
|
||||
} else {
|
||||
// Generate label for block inside procedure
|
||||
asm.startSegment(null, block.getLabel().getFullName());
|
||||
asm.addLabel(block.getLabel().getLocalName().replace('@', 'b').replace(':', '_'));
|
||||
}
|
||||
@ -439,12 +447,8 @@ public class Pass4CodeGeneration {
|
||||
}
|
||||
if(interruptType==null) {
|
||||
asm.addInstruction("rts", AsmAddressingMode.NON, null, false);
|
||||
} else if(interruptType.equals(Procedure.InterruptType.KERNEL)) {
|
||||
asm.addInstruction("jmp", AsmAddressingMode.ABS, "$ea81", false);
|
||||
} else if(interruptType.equals(Procedure.InterruptType.HARDWARE)) {
|
||||
asm.addInstruction("rti", AsmAddressingMode.NON, null, false);
|
||||
} else {
|
||||
throw new RuntimeException("Interrupt Type not supported " + statement);
|
||||
generateInterruptExit(asm, statement, interruptType);
|
||||
}
|
||||
} else if(statement instanceof StatementAsm) {
|
||||
StatementAsm statementAsm = (StatementAsm) statement;
|
||||
@ -462,6 +466,57 @@ public class Pass4CodeGeneration {
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Generate exit-code for entering an interrupt procedure based on the interrupt type
|
||||
* @param asm The assembler to generate code into
|
||||
* @param interruptType The type of interrupt to generate
|
||||
*/
|
||||
private void generateInterruptEntry(AsmProgram asm, Procedure.InterruptType interruptType) {
|
||||
if(Procedure.InterruptType.KERNEL_MIN.equals(interruptType)) {
|
||||
// No entry ASM needed
|
||||
} else if(Procedure.InterruptType.KERNEL_STD.equals(interruptType)) {
|
||||
// No entry ASM needed
|
||||
} else if(Procedure.InterruptType.HARDWARE_ALL.equals(interruptType)) {
|
||||
asm.addInstruction("sta", AsmAddressingMode.ABS, "rega+1", false).setDontOptimize(true);
|
||||
asm.addInstruction("stx", AsmAddressingMode.ABS, "regx+1", false).setDontOptimize(true);
|
||||
asm.addInstruction("sty", AsmAddressingMode.ABS, "regy+1", false).setDontOptimize(true);
|
||||
} else if(Procedure.InterruptType.HARDWARE_NONE.equals(interruptType)) {
|
||||
// No entry ASM needed
|
||||
} else if(Procedure.InterruptType.HARDWARE_CLOBBER.equals(interruptType)) {
|
||||
throw new CompileError("Not implemented! "+interruptType.name());
|
||||
} else {
|
||||
throw new RuntimeException("Interrupt Type not supported " + interruptType.name());
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Generate exit-code for ending an interrupt procedure based on the interrupt type
|
||||
* @param asm The assembler to generate code into
|
||||
* @param statement The return statement
|
||||
* @param interruptType The type of interrupt to generate
|
||||
*/
|
||||
private void generateInterruptExit(AsmProgram asm, Statement statement, Procedure.InterruptType interruptType) {
|
||||
if(Procedure.InterruptType.KERNEL_MIN.equals(interruptType)) {
|
||||
asm.addInstruction("jmp", AsmAddressingMode.ABS, "$ea81", false);
|
||||
} else if(Procedure.InterruptType.KERNEL_STD.equals(interruptType)) {
|
||||
asm.addInstruction("jmp", AsmAddressingMode.ABS, "$ea31", false);
|
||||
} else if(Procedure.InterruptType.HARDWARE_ALL.equals(interruptType)) {
|
||||
asm.addLabel("rega").setDontOptimize(true);
|
||||
asm.addInstruction("lda", AsmAddressingMode.IMM, "00", false).setDontOptimize(true);
|
||||
asm.addLabel("regx").setDontOptimize(true);
|
||||
asm.addInstruction("ldx", AsmAddressingMode.IMM, "00", false).setDontOptimize(true);
|
||||
asm.addLabel("regy").setDontOptimize(true);
|
||||
asm.addInstruction("ldy", AsmAddressingMode.IMM, "00", false).setDontOptimize(true);
|
||||
asm.addInstruction("rti", AsmAddressingMode.NON, null, false);
|
||||
} else if(Procedure.InterruptType.HARDWARE_NONE.equals(interruptType)) {
|
||||
asm.addInstruction("rti", AsmAddressingMode.NON, null, false);
|
||||
} else if(Procedure.InterruptType.HARDWARE_CLOBBER.equals(interruptType)) {
|
||||
throw new CompileError("Not implemented! "+interruptType.name());
|
||||
} else {
|
||||
throw new RuntimeException("Interrupt Type not supported " + statement);
|
||||
}
|
||||
}
|
||||
|
||||
private void addKickAsm(AsmProgram asm, StatementKickAsm statementKasm) {
|
||||
Long asmBytes = null;
|
||||
if(statementKasm.getBytes() != null) {
|
||||
|
@ -18,7 +18,6 @@ public class Pass5UnnecesaryLoadElimination extends Pass5AsmOptimization {
|
||||
@Override
|
||||
public boolean optimize() {
|
||||
AsmProgramStaticRegisterValues staticValues = new AsmProgramStaticRegisterValues(getAsmProgram());
|
||||
//List<AsmLine> removes = new ArrayList<>();
|
||||
boolean modified = false;
|
||||
|
||||
for(AsmSegment segment : getAsmProgram().getSegments()) {
|
||||
@ -28,6 +27,9 @@ public class Pass5UnnecesaryLoadElimination extends Pass5AsmOptimization {
|
||||
AsmLine line = lineIt.next();
|
||||
if(line instanceof AsmInstruction) {
|
||||
AsmInstruction instruction = (AsmInstruction) line;
|
||||
if(instruction.isDontOptimize()) {
|
||||
continue;
|
||||
}
|
||||
AsmInstructionType instructionType = instruction.getType();
|
||||
|
||||
if(instructionType.getMnemnonic().equals("lda") && instructionType.getAddressingMode().equals(AsmAddressingMode.IMM)) {
|
||||
|
@ -54,6 +54,9 @@ public class Pass5UnusedLabelElimination extends Pass5AsmOptimization {
|
||||
currentScope = "";
|
||||
} else if(line instanceof AsmLabel) {
|
||||
AsmLabel label = (AsmLabel) line;
|
||||
if(label.isDontOptimize()) {
|
||||
continue;
|
||||
}
|
||||
String labelStr = currentScope + "::" + label.getLabel();
|
||||
if(!labelStr.contains("!") && !usedLabels.contains(labelStr)) {
|
||||
removeLines.add(label);
|
||||
|
@ -46,6 +46,17 @@ public class TestPrograms {
|
||||
AsmFragmentTemplateUsages.logUsages(log, false, false, false, false, false, false);
|
||||
}
|
||||
|
||||
@Test
|
||||
public void testIrqHardware() throws IOException, URISyntaxException {
|
||||
compileAndCompare("irq-hardware");
|
||||
}
|
||||
|
||||
@Test
|
||||
public void testIrqKernel() throws IOException, URISyntaxException {
|
||||
compileAndCompare("irq-kernel");
|
||||
}
|
||||
|
||||
|
||||
@Test
|
||||
public void testIrqHyperscreen() throws IOException, URISyntaxException {
|
||||
compileAndCompare("irq-hyperscreen");
|
||||
|
58
src/test/java/dk/camelot64/kickc/test/kc/irq-hardware.kc
Normal file
58
src/test/java/dk/camelot64/kickc/test/kc/irq-hardware.kc
Normal file
@ -0,0 +1,58 @@
|
||||
// A minimal working raster IRQ
|
||||
|
||||
const void()** KERNEL_IRQ = $0314;
|
||||
const void()** HARDWARE_IRQ = $fffe;
|
||||
const byte* RASTER = $d012;
|
||||
const byte* VIC_CONTROL = $d011;
|
||||
const byte* IRQ_STATUS = $d019;
|
||||
const byte* IRQ_ENABLE = $d01a;
|
||||
const byte IRQ_RASTER = %00000001;
|
||||
const byte IRQ_COLLISION_BG = %00000010;
|
||||
const byte IRQ_COLLISION_SPRITE = %00000100;
|
||||
const byte IRQ_LIGHTPEN = %00001000;
|
||||
const byte* BGCOL = $d020;
|
||||
const byte* FGCOL = $d021;
|
||||
const byte WHITE = 1;
|
||||
const byte BLACK = 0;
|
||||
|
||||
const byte* CIA1_INTERRUPT = $dc0d;
|
||||
const byte CIA_INTERRUPT_CLEAR = $7f;
|
||||
|
||||
// Processor port data direction register
|
||||
const byte* PROCPORT_DDR = $00;
|
||||
// Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written
|
||||
const byte PROCPORT_DDR_MEMORY_MASK = %00000111;
|
||||
|
||||
// Processor Port Register controlling RAM/ROM configuration and the datasette
|
||||
const byte* PROCPORT = $01;
|
||||
// RAM in $A000, $E000 I/O in $D000
|
||||
const byte PROCPORT_RAM_IO = %00110101;
|
||||
// RAM in $A000, $E000 CHAR ROM in $D000
|
||||
|
||||
void main() {
|
||||
asm { sei }
|
||||
// Disable kernal & basic
|
||||
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK;
|
||||
*PROCPORT = PROCPORT_RAM_IO;
|
||||
// Disable CIA 1 Timer IRQ
|
||||
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
// Set raster line to $100
|
||||
*VIC_CONTROL |=$80;
|
||||
*RASTER = $00;
|
||||
// Enable Raster Interrupt
|
||||
*IRQ_ENABLE = IRQ_RASTER;
|
||||
// Set the IRQ routine
|
||||
*HARDWARE_IRQ = &irq;
|
||||
asm { cli }
|
||||
while(true) {
|
||||
(*FGCOL)++;
|
||||
}
|
||||
}
|
||||
|
||||
// Interrupt Routine
|
||||
interrupt(hardware all) void irq() {
|
||||
*BGCOL = WHITE;
|
||||
*BGCOL = BLACK;
|
||||
// Acknowledge the IRQ
|
||||
*IRQ_STATUS = IRQ_RASTER;
|
||||
}
|
39
src/test/java/dk/camelot64/kickc/test/kc/irq-kernel.kc
Normal file
39
src/test/java/dk/camelot64/kickc/test/kc/irq-kernel.kc
Normal file
@ -0,0 +1,39 @@
|
||||
// A minimal working raster IRQ
|
||||
|
||||
const void()** KERNEL_IRQ = $0314;
|
||||
const byte* RASTER = $d012;
|
||||
const byte* VIC_CONTROL = $d011;
|
||||
const byte* IRQ_STATUS = $d019;
|
||||
const byte* IRQ_ENABLE = $d01a;
|
||||
const byte IRQ_RASTER = %00000001;
|
||||
const byte IRQ_COLLISION_BG = %00000010;
|
||||
const byte IRQ_COLLISION_SPRITE = %00000100;
|
||||
const byte IRQ_LIGHTPEN = %00001000;
|
||||
const byte* BGCOL = $d020;
|
||||
const byte WHITE = 1;
|
||||
const byte BLACK = 0;
|
||||
|
||||
const byte* CIA1_INTERRUPT = $dc0d;
|
||||
const byte CIA_INTERRUPT_CLEAR = $7f;
|
||||
|
||||
void main() {
|
||||
asm { sei }
|
||||
// Disable CIA 1 Timer IRQ
|
||||
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
// Set raster line to $100
|
||||
*VIC_CONTROL |=$80;
|
||||
*RASTER = $00;
|
||||
// Enable Raster Interrupt
|
||||
*IRQ_ENABLE = IRQ_RASTER;
|
||||
// Set the IRQ routine
|
||||
*KERNEL_IRQ = &irq;
|
||||
asm { cli }
|
||||
}
|
||||
|
||||
// Interrupt Routine
|
||||
interrupt(kernel std) void irq() {
|
||||
*BGCOL = WHITE;
|
||||
*BGCOL = BLACK;
|
||||
// Acknowledge the IRQ
|
||||
*IRQ_STATUS = IRQ_RASTER;
|
||||
}
|
62
src/test/java/dk/camelot64/kickc/test/ref/irq-hardware.asm
Normal file
62
src/test/java/dk/camelot64/kickc/test/ref/irq-hardware.asm
Normal file
@ -0,0 +1,62 @@
|
||||
.pc = $801 "Basic"
|
||||
:BasicUpstart(main)
|
||||
.pc = $80d "Program"
|
||||
.label HARDWARE_IRQ = $fffe
|
||||
.label RASTER = $d012
|
||||
.label VIC_CONTROL = $d011
|
||||
.label IRQ_STATUS = $d019
|
||||
.label IRQ_ENABLE = $d01a
|
||||
.const IRQ_RASTER = 1
|
||||
.label BGCOL = $d020
|
||||
.label FGCOL = $d021
|
||||
.const WHITE = 1
|
||||
.const BLACK = 0
|
||||
.label CIA1_INTERRUPT = $dc0d
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.label PROCPORT_DDR = 0
|
||||
.const PROCPORT_DDR_MEMORY_MASK = 7
|
||||
.label PROCPORT = 1
|
||||
.const PROCPORT_RAM_IO = $35
|
||||
jsr main
|
||||
main: {
|
||||
sei
|
||||
lda #PROCPORT_DDR_MEMORY_MASK
|
||||
sta PROCPORT_DDR
|
||||
lda #PROCPORT_RAM_IO
|
||||
sta PROCPORT
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
sta CIA1_INTERRUPT
|
||||
lda VIC_CONTROL
|
||||
ora #$80
|
||||
sta VIC_CONTROL
|
||||
lda #0
|
||||
sta RASTER
|
||||
lda #IRQ_RASTER
|
||||
sta IRQ_ENABLE
|
||||
lda #<irq
|
||||
sta HARDWARE_IRQ
|
||||
lda #>irq
|
||||
sta HARDWARE_IRQ+1
|
||||
cli
|
||||
b2:
|
||||
inc FGCOL
|
||||
jmp b2
|
||||
}
|
||||
irq: {
|
||||
sta rega+1
|
||||
stx regx+1
|
||||
sty regy+1
|
||||
lda #WHITE
|
||||
sta BGCOL
|
||||
lda #BLACK
|
||||
sta BGCOL
|
||||
lda #IRQ_RASTER
|
||||
sta IRQ_STATUS
|
||||
rega:
|
||||
lda #00
|
||||
regx:
|
||||
ldx #00
|
||||
regy:
|
||||
ldy #00
|
||||
rti
|
||||
}
|
31
src/test/java/dk/camelot64/kickc/test/ref/irq-hardware.cfg
Normal file
31
src/test/java/dk/camelot64/kickc/test/ref/irq-hardware.cfg
Normal file
@ -0,0 +1,31 @@
|
||||
@begin: scope:[] from
|
||||
[0] phi() [ ] ( )
|
||||
to:@2
|
||||
@2: scope:[] from @begin
|
||||
[1] phi() [ ] ( )
|
||||
[2] call main [ ] ( )
|
||||
to:@end
|
||||
@end: scope:[] from @2
|
||||
[3] phi() [ ] ( )
|
||||
main: scope:[main] from @2
|
||||
asm { sei }
|
||||
[5] *((const byte*) PROCPORT_DDR#0) ← (const byte) PROCPORT_DDR_MEMORY_MASK#0 [ ] ( main:2 [ ] )
|
||||
[6] *((const byte*) PROCPORT#0) ← (const byte) PROCPORT_RAM_IO#0 [ ] ( main:2 [ ] )
|
||||
[7] *((const byte*) CIA1_INTERRUPT#0) ← (const byte) CIA_INTERRUPT_CLEAR#0 [ ] ( main:2 [ ] )
|
||||
[8] *((const byte*) VIC_CONTROL#0) ← *((const byte*) VIC_CONTROL#0) | (byte/word/signed word/dword/signed dword) 128 [ ] ( main:2 [ ] )
|
||||
[9] *((const byte*) RASTER#0) ← (byte/signed byte/word/signed word/dword/signed dword) 0 [ ] ( main:2 [ ] )
|
||||
[10] *((const byte*) IRQ_ENABLE#0) ← (const byte) IRQ_RASTER#0 [ ] ( main:2 [ ] )
|
||||
[11] *((const void()**) HARDWARE_IRQ#0) ← &interrupt(HARDWARE_ALL)(void()) irq() [ ] ( main:2 [ ] )
|
||||
asm { cli }
|
||||
to:main::@2
|
||||
main::@2: scope:[main] from main main::@2
|
||||
[13] *((const byte*) FGCOL#0) ← ++ *((const byte*) FGCOL#0) [ ] ( main:2 [ ] )
|
||||
to:main::@2
|
||||
irq: scope:[irq] from
|
||||
[14] *((const byte*) BGCOL#0) ← (const byte) WHITE#0 [ ] ( )
|
||||
[15] *((const byte*) BGCOL#0) ← (const byte) BLACK#0 [ ] ( )
|
||||
[16] *((const byte*) IRQ_STATUS#0) ← (const byte) IRQ_RASTER#0 [ ] ( )
|
||||
to:irq::@return
|
||||
irq::@return: scope:[irq] from irq
|
||||
[17] return [ ] ( )
|
||||
to:@return
|
791
src/test/java/dk/camelot64/kickc/test/ref/irq-hardware.log
Normal file
791
src/test/java/dk/camelot64/kickc/test/ref/irq-hardware.log
Normal file
@ -0,0 +1,791 @@
|
||||
PARSING src/test/java/dk/camelot64/kickc/test/kc/irq-hardware.kc
|
||||
// A minimal working raster IRQ
|
||||
|
||||
const void()** KERNEL_IRQ = $0314;
|
||||
const void()** HARDWARE_IRQ = $fffe;
|
||||
const byte* RASTER = $d012;
|
||||
const byte* VIC_CONTROL = $d011;
|
||||
const byte* IRQ_STATUS = $d019;
|
||||
const byte* IRQ_ENABLE = $d01a;
|
||||
const byte IRQ_RASTER = %00000001;
|
||||
const byte IRQ_COLLISION_BG = %00000010;
|
||||
const byte IRQ_COLLISION_SPRITE = %00000100;
|
||||
const byte IRQ_LIGHTPEN = %00001000;
|
||||
const byte* BGCOL = $d020;
|
||||
const byte* FGCOL = $d021;
|
||||
const byte WHITE = 1;
|
||||
const byte BLACK = 0;
|
||||
|
||||
const byte* CIA1_INTERRUPT = $dc0d;
|
||||
const byte CIA_INTERRUPT_CLEAR = $7f;
|
||||
|
||||
// Processor port data direction register
|
||||
const byte* PROCPORT_DDR = $00;
|
||||
// Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written
|
||||
const byte PROCPORT_DDR_MEMORY_MASK = %00000111;
|
||||
|
||||
// Processor Port Register controlling RAM/ROM configuration and the datasette
|
||||
const byte* PROCPORT = $01;
|
||||
// RAM in $A000, $E000 I/O in $D000
|
||||
const byte PROCPORT_RAM_IO = %00110101;
|
||||
// RAM in $A000, $E000 CHAR ROM in $D000
|
||||
|
||||
void main() {
|
||||
asm { sei }
|
||||
// Disable kernal & basic
|
||||
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK;
|
||||
*PROCPORT = PROCPORT_RAM_IO;
|
||||
// Disable CIA 1 Timer IRQ
|
||||
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
// Set raster line to $100
|
||||
*VIC_CONTROL |=$80;
|
||||
*RASTER = $00;
|
||||
// Enable Raster Interrupt
|
||||
*IRQ_ENABLE = IRQ_RASTER;
|
||||
// Set the IRQ routine
|
||||
*HARDWARE_IRQ = &irq;
|
||||
asm { cli }
|
||||
while(true) {
|
||||
(*FGCOL)++;
|
||||
}
|
||||
}
|
||||
|
||||
// Interrupt Routine
|
||||
interrupt(hardware all) void irq() {
|
||||
*BGCOL = WHITE;
|
||||
*BGCOL = BLACK;
|
||||
// Acknowledge the IRQ
|
||||
*IRQ_STATUS = IRQ_RASTER;
|
||||
}
|
||||
Adding pre/post-modifier *((byte*) FGCOL) ← ++ *((byte*) FGCOL)
|
||||
Resolved forward reference irq to interrupt(HARDWARE_ALL)(void()) irq()
|
||||
SYMBOLS
|
||||
(label) @1
|
||||
(label) @2
|
||||
(label) @begin
|
||||
(label) @end
|
||||
(byte*) BGCOL
|
||||
(byte) BLACK
|
||||
(byte*) CIA1_INTERRUPT
|
||||
(byte) CIA_INTERRUPT_CLEAR
|
||||
(byte*) FGCOL
|
||||
(void()**) HARDWARE_IRQ
|
||||
(byte) IRQ_COLLISION_BG
|
||||
(byte) IRQ_COLLISION_SPRITE
|
||||
(byte*) IRQ_ENABLE
|
||||
(byte) IRQ_LIGHTPEN
|
||||
(byte) IRQ_RASTER
|
||||
(byte*) IRQ_STATUS
|
||||
(void()**) KERNEL_IRQ
|
||||
(byte*) PROCPORT
|
||||
(byte*) PROCPORT_DDR
|
||||
(byte) PROCPORT_DDR_MEMORY_MASK
|
||||
(byte) PROCPORT_RAM_IO
|
||||
(byte*) RASTER
|
||||
(byte*) VIC_CONTROL
|
||||
(byte) WHITE
|
||||
interrupt(HARDWARE_ALL)(void()) irq()
|
||||
(label) irq::@return
|
||||
(void()) main()
|
||||
(void()*~) main::$0
|
||||
(label) main::@1
|
||||
(label) main::@2
|
||||
(label) main::@3
|
||||
(label) main::@4
|
||||
(label) main::@5
|
||||
(label) main::@6
|
||||
(label) main::@return
|
||||
|
||||
Promoting word/signed word/dword/signed dword to void()** in KERNEL_IRQ ← ((void()**)) 788
|
||||
Promoting word/dword/signed dword to void()** in HARDWARE_IRQ ← ((void()**)) 65534
|
||||
Promoting word/dword/signed dword to byte* in RASTER ← ((byte*)) 53266
|
||||
Promoting word/dword/signed dword to byte* in VIC_CONTROL ← ((byte*)) 53265
|
||||
Promoting word/dword/signed dword to byte* in IRQ_STATUS ← ((byte*)) 53273
|
||||
Promoting word/dword/signed dword to byte* in IRQ_ENABLE ← ((byte*)) 53274
|
||||
Promoting word/dword/signed dword to byte* in BGCOL ← ((byte*)) 53280
|
||||
Promoting word/dword/signed dword to byte* in FGCOL ← ((byte*)) 53281
|
||||
Promoting word/dword/signed dword to byte* in CIA1_INTERRUPT ← ((byte*)) 56333
|
||||
Promoting byte/signed byte/word/signed word/dword/signed dword to byte* in PROCPORT_DDR ← ((byte*)) 0
|
||||
Promoting byte/signed byte/word/signed word/dword/signed dword to byte* in PROCPORT ← ((byte*)) 1
|
||||
INITIAL CONTROL FLOW GRAPH
|
||||
@begin: scope:[] from
|
||||
(void()**) KERNEL_IRQ ← ((void()**)) (word/signed word/dword/signed dword) 788
|
||||
(void()**) HARDWARE_IRQ ← ((void()**)) (word/dword/signed dword) 65534
|
||||
(byte*) RASTER ← ((byte*)) (word/dword/signed dword) 53266
|
||||
(byte*) VIC_CONTROL ← ((byte*)) (word/dword/signed dword) 53265
|
||||
(byte*) IRQ_STATUS ← ((byte*)) (word/dword/signed dword) 53273
|
||||
(byte*) IRQ_ENABLE ← ((byte*)) (word/dword/signed dword) 53274
|
||||
(byte) IRQ_RASTER ← (byte/signed byte/word/signed word/dword/signed dword) 1
|
||||
(byte) IRQ_COLLISION_BG ← (byte/signed byte/word/signed word/dword/signed dword) 2
|
||||
(byte) IRQ_COLLISION_SPRITE ← (byte/signed byte/word/signed word/dword/signed dword) 4
|
||||
(byte) IRQ_LIGHTPEN ← (byte/signed byte/word/signed word/dword/signed dword) 8
|
||||
(byte*) BGCOL ← ((byte*)) (word/dword/signed dword) 53280
|
||||
(byte*) FGCOL ← ((byte*)) (word/dword/signed dword) 53281
|
||||
(byte) WHITE ← (byte/signed byte/word/signed word/dword/signed dword) 1
|
||||
(byte) BLACK ← (byte/signed byte/word/signed word/dword/signed dword) 0
|
||||
(byte*) CIA1_INTERRUPT ← ((byte*)) (word/dword/signed dword) 56333
|
||||
(byte) CIA_INTERRUPT_CLEAR ← (byte/signed byte/word/signed word/dword/signed dword) 127
|
||||
(byte*) PROCPORT_DDR ← ((byte*)) (byte/signed byte/word/signed word/dword/signed dword) 0
|
||||
(byte) PROCPORT_DDR_MEMORY_MASK ← (byte/signed byte/word/signed word/dword/signed dword) 7
|
||||
(byte*) PROCPORT ← ((byte*)) (byte/signed byte/word/signed word/dword/signed dword) 1
|
||||
(byte) PROCPORT_RAM_IO ← (byte/signed byte/word/signed word/dword/signed dword) 53
|
||||
to:@1
|
||||
main: scope:[main] from
|
||||
asm { sei }
|
||||
*((byte*) PROCPORT_DDR) ← (byte) PROCPORT_DDR_MEMORY_MASK
|
||||
*((byte*) PROCPORT) ← (byte) PROCPORT_RAM_IO
|
||||
*((byte*) CIA1_INTERRUPT) ← (byte) CIA_INTERRUPT_CLEAR
|
||||
*((byte*) VIC_CONTROL) ← *((byte*) VIC_CONTROL) | (byte/word/signed word/dword/signed dword) 128
|
||||
*((byte*) RASTER) ← (byte/signed byte/word/signed word/dword/signed dword) 0
|
||||
*((byte*) IRQ_ENABLE) ← (byte) IRQ_RASTER
|
||||
(void()*~) main::$0 ← & interrupt(HARDWARE_ALL)(void()) irq()
|
||||
*((void()**) HARDWARE_IRQ) ← (void()*~) main::$0
|
||||
asm { cli }
|
||||
to:main::@1
|
||||
main::@1: scope:[main] from main main::@2
|
||||
if(true) goto main::@2
|
||||
to:main::@4
|
||||
main::@2: scope:[main] from main::@1 main::@5
|
||||
*((byte*) FGCOL) ← ++ *((byte*) FGCOL)
|
||||
to:main::@1
|
||||
main::@4: scope:[main] from main::@1
|
||||
to:main::@3
|
||||
main::@3: scope:[main] from main::@4 main::@6
|
||||
to:main::@return
|
||||
main::@5: scope:[main] from
|
||||
to:main::@2
|
||||
main::@6: scope:[main] from
|
||||
to:main::@3
|
||||
main::@return: scope:[main] from main::@3
|
||||
return
|
||||
to:@return
|
||||
@1: scope:[] from @begin
|
||||
to:@2
|
||||
irq: scope:[irq] from
|
||||
*((byte*) BGCOL) ← (byte) WHITE
|
||||
*((byte*) BGCOL) ← (byte) BLACK
|
||||
*((byte*) IRQ_STATUS) ← (byte) IRQ_RASTER
|
||||
to:irq::@return
|
||||
irq::@return: scope:[irq] from irq
|
||||
return
|
||||
to:@return
|
||||
@2: scope:[] from @1
|
||||
call main
|
||||
to:@end
|
||||
@end: scope:[] from @2
|
||||
|
||||
Eliminating unused variable (void()**) KERNEL_IRQ and assignment [0] (void()**) KERNEL_IRQ ← ((void()**)) (word/signed word/dword/signed dword) 788
|
||||
Eliminating unused variable (byte) IRQ_COLLISION_BG and assignment [7] (byte) IRQ_COLLISION_BG ← (byte/signed byte/word/signed word/dword/signed dword) 2
|
||||
Eliminating unused variable (byte) IRQ_COLLISION_SPRITE and assignment [8] (byte) IRQ_COLLISION_SPRITE ← (byte/signed byte/word/signed word/dword/signed dword) 4
|
||||
Eliminating unused variable (byte) IRQ_LIGHTPEN and assignment [9] (byte) IRQ_LIGHTPEN ← (byte/signed byte/word/signed word/dword/signed dword) 8
|
||||
Removing empty block main::@4
|
||||
Removing empty block main::@3
|
||||
Removing empty block main::@5
|
||||
Removing empty block main::@6
|
||||
Removing empty block @1
|
||||
PROCEDURE MODIFY VARIABLE ANALYSIS
|
||||
|
||||
Completing Phi functions...
|
||||
|
||||
CONTROL FLOW GRAPH SSA WITH ASSIGNMENT CALL & RETURN
|
||||
@begin: scope:[] from
|
||||
(void()**) HARDWARE_IRQ#0 ← ((void()**)) (word/dword/signed dword) 65534
|
||||
(byte*) RASTER#0 ← ((byte*)) (word/dword/signed dword) 53266
|
||||
(byte*) VIC_CONTROL#0 ← ((byte*)) (word/dword/signed dword) 53265
|
||||
(byte*) IRQ_STATUS#0 ← ((byte*)) (word/dword/signed dword) 53273
|
||||
(byte*) IRQ_ENABLE#0 ← ((byte*)) (word/dword/signed dword) 53274
|
||||
(byte) IRQ_RASTER#0 ← (byte/signed byte/word/signed word/dword/signed dword) 1
|
||||
(byte*) BGCOL#0 ← ((byte*)) (word/dword/signed dword) 53280
|
||||
(byte*) FGCOL#0 ← ((byte*)) (word/dword/signed dword) 53281
|
||||
(byte) WHITE#0 ← (byte/signed byte/word/signed word/dword/signed dword) 1
|
||||
(byte) BLACK#0 ← (byte/signed byte/word/signed word/dword/signed dword) 0
|
||||
(byte*) CIA1_INTERRUPT#0 ← ((byte*)) (word/dword/signed dword) 56333
|
||||
(byte) CIA_INTERRUPT_CLEAR#0 ← (byte/signed byte/word/signed word/dword/signed dword) 127
|
||||
(byte*) PROCPORT_DDR#0 ← ((byte*)) (byte/signed byte/word/signed word/dword/signed dword) 0
|
||||
(byte) PROCPORT_DDR_MEMORY_MASK#0 ← (byte/signed byte/word/signed word/dword/signed dword) 7
|
||||
(byte*) PROCPORT#0 ← ((byte*)) (byte/signed byte/word/signed word/dword/signed dword) 1
|
||||
(byte) PROCPORT_RAM_IO#0 ← (byte/signed byte/word/signed word/dword/signed dword) 53
|
||||
to:@2
|
||||
main: scope:[main] from @2
|
||||
asm { sei }
|
||||
*((byte*) PROCPORT_DDR#0) ← (byte) PROCPORT_DDR_MEMORY_MASK#0
|
||||
*((byte*) PROCPORT#0) ← (byte) PROCPORT_RAM_IO#0
|
||||
*((byte*) CIA1_INTERRUPT#0) ← (byte) CIA_INTERRUPT_CLEAR#0
|
||||
*((byte*) VIC_CONTROL#0) ← *((byte*) VIC_CONTROL#0) | (byte/word/signed word/dword/signed dword) 128
|
||||
*((byte*) RASTER#0) ← (byte/signed byte/word/signed word/dword/signed dword) 0
|
||||
*((byte*) IRQ_ENABLE#0) ← (byte) IRQ_RASTER#0
|
||||
(void()*~) main::$0 ← & interrupt(HARDWARE_ALL)(void()) irq()
|
||||
*((void()**) HARDWARE_IRQ#0) ← (void()*~) main::$0
|
||||
asm { cli }
|
||||
to:main::@1
|
||||
main::@1: scope:[main] from main main::@2
|
||||
if(true) goto main::@2
|
||||
to:main::@return
|
||||
main::@2: scope:[main] from main::@1
|
||||
*((byte*) FGCOL#0) ← ++ *((byte*) FGCOL#0)
|
||||
to:main::@1
|
||||
main::@return: scope:[main] from main::@1
|
||||
return
|
||||
to:@return
|
||||
irq: scope:[irq] from
|
||||
*((byte*) BGCOL#0) ← (byte) WHITE#0
|
||||
*((byte*) BGCOL#0) ← (byte) BLACK#0
|
||||
*((byte*) IRQ_STATUS#0) ← (byte) IRQ_RASTER#0
|
||||
to:irq::@return
|
||||
irq::@return: scope:[irq] from irq
|
||||
return
|
||||
to:@return
|
||||
@2: scope:[] from @begin
|
||||
call main
|
||||
to:@3
|
||||
@3: scope:[] from @2
|
||||
to:@end
|
||||
@end: scope:[] from @3
|
||||
|
||||
SYMBOL TABLE SSA
|
||||
(label) @2
|
||||
(label) @3
|
||||
(label) @begin
|
||||
(label) @end
|
||||
(byte*) BGCOL
|
||||
(byte*) BGCOL#0
|
||||
(byte) BLACK
|
||||
(byte) BLACK#0
|
||||
(byte*) CIA1_INTERRUPT
|
||||
(byte*) CIA1_INTERRUPT#0
|
||||
(byte) CIA_INTERRUPT_CLEAR
|
||||
(byte) CIA_INTERRUPT_CLEAR#0
|
||||
(byte*) FGCOL
|
||||
(byte*) FGCOL#0
|
||||
(void()**) HARDWARE_IRQ
|
||||
(void()**) HARDWARE_IRQ#0
|
||||
(byte*) IRQ_ENABLE
|
||||
(byte*) IRQ_ENABLE#0
|
||||
(byte) IRQ_RASTER
|
||||
(byte) IRQ_RASTER#0
|
||||
(byte*) IRQ_STATUS
|
||||
(byte*) IRQ_STATUS#0
|
||||
(byte*) PROCPORT
|
||||
(byte*) PROCPORT#0
|
||||
(byte*) PROCPORT_DDR
|
||||
(byte*) PROCPORT_DDR#0
|
||||
(byte) PROCPORT_DDR_MEMORY_MASK
|
||||
(byte) PROCPORT_DDR_MEMORY_MASK#0
|
||||
(byte) PROCPORT_RAM_IO
|
||||
(byte) PROCPORT_RAM_IO#0
|
||||
(byte*) RASTER
|
||||
(byte*) RASTER#0
|
||||
(byte*) VIC_CONTROL
|
||||
(byte*) VIC_CONTROL#0
|
||||
(byte) WHITE
|
||||
(byte) WHITE#0
|
||||
interrupt(HARDWARE_ALL)(void()) irq()
|
||||
(label) irq::@return
|
||||
(void()) main()
|
||||
(void()*~) main::$0
|
||||
(label) main::@1
|
||||
(label) main::@2
|
||||
(label) main::@return
|
||||
|
||||
OPTIMIZING CONTROL FLOW GRAPH
|
||||
Culled Empty Block (label) @3
|
||||
Succesful SSA optimization Pass2CullEmptyBlocks
|
||||
Constant (const void()**) HARDWARE_IRQ#0 = ((void()**))65534
|
||||
Constant (const byte*) RASTER#0 = ((byte*))53266
|
||||
Constant (const byte*) VIC_CONTROL#0 = ((byte*))53265
|
||||
Constant (const byte*) IRQ_STATUS#0 = ((byte*))53273
|
||||
Constant (const byte*) IRQ_ENABLE#0 = ((byte*))53274
|
||||
Constant (const byte) IRQ_RASTER#0 = 1
|
||||
Constant (const byte*) BGCOL#0 = ((byte*))53280
|
||||
Constant (const byte*) FGCOL#0 = ((byte*))53281
|
||||
Constant (const byte) WHITE#0 = 1
|
||||
Constant (const byte) BLACK#0 = 0
|
||||
Constant (const byte*) CIA1_INTERRUPT#0 = ((byte*))56333
|
||||
Constant (const byte) CIA_INTERRUPT_CLEAR#0 = 127
|
||||
Constant (const byte*) PROCPORT_DDR#0 = ((byte*))0
|
||||
Constant (const byte) PROCPORT_DDR_MEMORY_MASK#0 = 7
|
||||
Constant (const byte*) PROCPORT#0 = ((byte*))1
|
||||
Constant (const byte) PROCPORT_RAM_IO#0 = 53
|
||||
Constant (const void()*) main::$0 = &irq
|
||||
Succesful SSA optimization Pass2ConstantIdentification
|
||||
if() condition always true - replacing block destination if(true) goto main::@2
|
||||
Succesful SSA optimization Pass2ConstantIfs
|
||||
Removing unused block main::@return
|
||||
Succesful SSA optimization Pass2EliminateUnusedBlocks
|
||||
Culled Empty Block (label) main::@1
|
||||
Succesful SSA optimization Pass2CullEmptyBlocks
|
||||
OPTIMIZING CONTROL FLOW GRAPH
|
||||
Constant inlined main::$0 = &interrupt(HARDWARE_ALL)(void()) irq()
|
||||
Succesful SSA optimization Pass2ConstantInlining
|
||||
Block Sequence Planned @begin @2 @end main main::@2 irq irq::@return
|
||||
Block Sequence Planned @begin @2 @end main main::@2 irq irq::@return
|
||||
Adding NOP phi() at start of @begin
|
||||
Adding NOP phi() at start of @2
|
||||
Adding NOP phi() at start of @end
|
||||
CALL GRAPH
|
||||
Calls in [] to main:2
|
||||
|
||||
Propagating live ranges...
|
||||
Created 0 initial phi equivalence classes
|
||||
Coalesced down to 0 phi equivalence classes
|
||||
Block Sequence Planned @begin @2 @end main main::@2 irq irq::@return
|
||||
Adding NOP phi() at start of @begin
|
||||
Adding NOP phi() at start of @2
|
||||
Adding NOP phi() at start of @end
|
||||
Propagating live ranges...
|
||||
|
||||
FINAL CONTROL FLOW GRAPH
|
||||
@begin: scope:[] from
|
||||
[0] phi() [ ] ( )
|
||||
to:@2
|
||||
@2: scope:[] from @begin
|
||||
[1] phi() [ ] ( )
|
||||
[2] call main [ ] ( )
|
||||
to:@end
|
||||
@end: scope:[] from @2
|
||||
[3] phi() [ ] ( )
|
||||
main: scope:[main] from @2
|
||||
asm { sei }
|
||||
[5] *((const byte*) PROCPORT_DDR#0) ← (const byte) PROCPORT_DDR_MEMORY_MASK#0 [ ] ( main:2 [ ] )
|
||||
[6] *((const byte*) PROCPORT#0) ← (const byte) PROCPORT_RAM_IO#0 [ ] ( main:2 [ ] )
|
||||
[7] *((const byte*) CIA1_INTERRUPT#0) ← (const byte) CIA_INTERRUPT_CLEAR#0 [ ] ( main:2 [ ] )
|
||||
[8] *((const byte*) VIC_CONTROL#0) ← *((const byte*) VIC_CONTROL#0) | (byte/word/signed word/dword/signed dword) 128 [ ] ( main:2 [ ] )
|
||||
[9] *((const byte*) RASTER#0) ← (byte/signed byte/word/signed word/dword/signed dword) 0 [ ] ( main:2 [ ] )
|
||||
[10] *((const byte*) IRQ_ENABLE#0) ← (const byte) IRQ_RASTER#0 [ ] ( main:2 [ ] )
|
||||
[11] *((const void()**) HARDWARE_IRQ#0) ← &interrupt(HARDWARE_ALL)(void()) irq() [ ] ( main:2 [ ] )
|
||||
asm { cli }
|
||||
to:main::@2
|
||||
main::@2: scope:[main] from main main::@2
|
||||
[13] *((const byte*) FGCOL#0) ← ++ *((const byte*) FGCOL#0) [ ] ( main:2 [ ] )
|
||||
to:main::@2
|
||||
irq: scope:[irq] from
|
||||
[14] *((const byte*) BGCOL#0) ← (const byte) WHITE#0 [ ] ( )
|
||||
[15] *((const byte*) BGCOL#0) ← (const byte) BLACK#0 [ ] ( )
|
||||
[16] *((const byte*) IRQ_STATUS#0) ← (const byte) IRQ_RASTER#0 [ ] ( )
|
||||
to:irq::@return
|
||||
irq::@return: scope:[irq] from irq
|
||||
[17] return [ ] ( )
|
||||
to:@return
|
||||
|
||||
DOMINATORS
|
||||
@begin dominated by @begin
|
||||
@2 dominated by @2 @begin
|
||||
@end dominated by @2 @begin @end
|
||||
main dominated by @2 @begin main
|
||||
main::@2 dominated by @2 @begin main::@2 main
|
||||
irq dominated by @2 @begin @end main::@2 irq irq::@return main
|
||||
irq::@return dominated by @2 @begin @end main::@2 irq irq::@return main
|
||||
|
||||
NATURAL LOOPS
|
||||
Found back edge: Loop head: main::@2 tails: main::@2 blocks: null
|
||||
Found back edge: Loop head: irq::@return tails: irq blocks: null
|
||||
Populated: Loop head: main::@2 tails: main::@2 blocks: main::@2
|
||||
Populated: Loop head: irq::@return tails: irq blocks: irq
|
||||
Loop head: main::@2 tails: main::@2 blocks: main::@2
|
||||
Loop head: irq::@return tails: irq blocks: irq
|
||||
|
||||
NATURAL LOOPS WITH DEPTH
|
||||
Found 1 loops in scope [irq]
|
||||
Loop head: irq::@return tails: irq blocks: irq
|
||||
Found 0 loops in scope []
|
||||
Found 1 loops in scope [main]
|
||||
Loop head: main::@2 tails: main::@2 blocks: main::@2
|
||||
Loop head: main::@2 tails: main::@2 blocks: main::@2 depth: 1
|
||||
Loop head: irq::@return tails: irq blocks: irq depth: 1
|
||||
|
||||
|
||||
VARIABLE REGISTER WEIGHTS
|
||||
(byte*) BGCOL
|
||||
(byte) BLACK
|
||||
(byte*) CIA1_INTERRUPT
|
||||
(byte) CIA_INTERRUPT_CLEAR
|
||||
(byte*) FGCOL
|
||||
(void()**) HARDWARE_IRQ
|
||||
(byte*) IRQ_ENABLE
|
||||
(byte) IRQ_RASTER
|
||||
(byte*) IRQ_STATUS
|
||||
(byte*) PROCPORT
|
||||
(byte*) PROCPORT_DDR
|
||||
(byte) PROCPORT_DDR_MEMORY_MASK
|
||||
(byte) PROCPORT_RAM_IO
|
||||
(byte*) RASTER
|
||||
(byte*) VIC_CONTROL
|
||||
(byte) WHITE
|
||||
interrupt(HARDWARE_ALL)(void()) irq()
|
||||
(void()) main()
|
||||
|
||||
Initial phi equivalence classes
|
||||
Complete equivalence classes
|
||||
|
||||
INITIAL ASM
|
||||
//SEG0 Basic Upstart
|
||||
.pc = $801 "Basic"
|
||||
:BasicUpstart(main)
|
||||
.pc = $80d "Program"
|
||||
//SEG1 Global Constants & labels
|
||||
.label HARDWARE_IRQ = $fffe
|
||||
.label RASTER = $d012
|
||||
.label VIC_CONTROL = $d011
|
||||
.label IRQ_STATUS = $d019
|
||||
.label IRQ_ENABLE = $d01a
|
||||
.const IRQ_RASTER = 1
|
||||
.label BGCOL = $d020
|
||||
.label FGCOL = $d021
|
||||
.const WHITE = 1
|
||||
.const BLACK = 0
|
||||
.label CIA1_INTERRUPT = $dc0d
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.label PROCPORT_DDR = 0
|
||||
.const PROCPORT_DDR_MEMORY_MASK = 7
|
||||
.label PROCPORT = 1
|
||||
.const PROCPORT_RAM_IO = $35
|
||||
//SEG2 @begin
|
||||
bbegin:
|
||||
//SEG3 [1] phi from @begin to @2 [phi:@begin->@2]
|
||||
b2_from_bbegin:
|
||||
jmp b2
|
||||
//SEG4 @2
|
||||
b2:
|
||||
//SEG5 [2] call main [ ] ( )
|
||||
jsr main
|
||||
//SEG6 [3] phi from @2 to @end [phi:@2->@end]
|
||||
bend_from_b2:
|
||||
jmp bend
|
||||
//SEG7 @end
|
||||
bend:
|
||||
//SEG8 main
|
||||
main: {
|
||||
//SEG9 asm { sei }
|
||||
sei
|
||||
//SEG10 [5] *((const byte*) PROCPORT_DDR#0) ← (const byte) PROCPORT_DDR_MEMORY_MASK#0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #PROCPORT_DDR_MEMORY_MASK
|
||||
sta PROCPORT_DDR
|
||||
//SEG11 [6] *((const byte*) PROCPORT#0) ← (const byte) PROCPORT_RAM_IO#0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #PROCPORT_RAM_IO
|
||||
sta PROCPORT
|
||||
//SEG12 [7] *((const byte*) CIA1_INTERRUPT#0) ← (const byte) CIA_INTERRUPT_CLEAR#0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
sta CIA1_INTERRUPT
|
||||
//SEG13 [8] *((const byte*) VIC_CONTROL#0) ← *((const byte*) VIC_CONTROL#0) | (byte/word/signed word/dword/signed dword) 128 [ ] ( main:2 [ ] ) -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
|
||||
lda VIC_CONTROL
|
||||
ora #$80
|
||||
sta VIC_CONTROL
|
||||
//SEG14 [9] *((const byte*) RASTER#0) ← (byte/signed byte/word/signed word/dword/signed dword) 0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta RASTER
|
||||
//SEG15 [10] *((const byte*) IRQ_ENABLE#0) ← (const byte) IRQ_RASTER#0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #IRQ_RASTER
|
||||
sta IRQ_ENABLE
|
||||
//SEG16 [11] *((const void()**) HARDWARE_IRQ#0) ← &interrupt(HARDWARE_ALL)(void()) irq() [ ] ( main:2 [ ] ) -- _deref_pptc1=pprc2
|
||||
lda #<irq
|
||||
sta HARDWARE_IRQ
|
||||
lda #>irq
|
||||
sta HARDWARE_IRQ+1
|
||||
//SEG17 asm { cli }
|
||||
cli
|
||||
jmp b2
|
||||
//SEG18 main::@2
|
||||
b2:
|
||||
//SEG19 [13] *((const byte*) FGCOL#0) ← ++ *((const byte*) FGCOL#0) [ ] ( main:2 [ ] ) -- _deref_pbuc1=_inc__deref_pbuc1
|
||||
inc FGCOL
|
||||
jmp b2
|
||||
}
|
||||
//SEG20 irq
|
||||
irq: {
|
||||
sta rega+1
|
||||
stx regx+1
|
||||
sty regy+1
|
||||
//SEG21 [14] *((const byte*) BGCOL#0) ← (const byte) WHITE#0 [ ] ( ) -- _deref_pbuc1=vbuc2
|
||||
lda #WHITE
|
||||
sta BGCOL
|
||||
//SEG22 [15] *((const byte*) BGCOL#0) ← (const byte) BLACK#0 [ ] ( ) -- _deref_pbuc1=vbuc2
|
||||
lda #BLACK
|
||||
sta BGCOL
|
||||
//SEG23 [16] *((const byte*) IRQ_STATUS#0) ← (const byte) IRQ_RASTER#0 [ ] ( ) -- _deref_pbuc1=vbuc2
|
||||
lda #IRQ_RASTER
|
||||
sta IRQ_STATUS
|
||||
jmp breturn
|
||||
//SEG24 irq::@return
|
||||
breturn:
|
||||
//SEG25 [17] return [ ] ( )
|
||||
rega:
|
||||
lda #00
|
||||
regx:
|
||||
ldx #00
|
||||
regy:
|
||||
ldy #00
|
||||
rti
|
||||
}
|
||||
|
||||
REGISTER UPLIFT POTENTIAL REGISTERS
|
||||
Statement [5] *((const byte*) PROCPORT_DDR#0) ← (const byte) PROCPORT_DDR_MEMORY_MASK#0 [ ] ( main:2 [ ] ) always clobbers reg byte a
|
||||
Statement [6] *((const byte*) PROCPORT#0) ← (const byte) PROCPORT_RAM_IO#0 [ ] ( main:2 [ ] ) always clobbers reg byte a
|
||||
Statement [7] *((const byte*) CIA1_INTERRUPT#0) ← (const byte) CIA_INTERRUPT_CLEAR#0 [ ] ( main:2 [ ] ) always clobbers reg byte a
|
||||
Statement [8] *((const byte*) VIC_CONTROL#0) ← *((const byte*) VIC_CONTROL#0) | (byte/word/signed word/dword/signed dword) 128 [ ] ( main:2 [ ] ) always clobbers reg byte a
|
||||
Statement [9] *((const byte*) RASTER#0) ← (byte/signed byte/word/signed word/dword/signed dword) 0 [ ] ( main:2 [ ] ) always clobbers reg byte a
|
||||
Statement [10] *((const byte*) IRQ_ENABLE#0) ← (const byte) IRQ_RASTER#0 [ ] ( main:2 [ ] ) always clobbers reg byte a
|
||||
Statement [11] *((const void()**) HARDWARE_IRQ#0) ← &interrupt(HARDWARE_ALL)(void()) irq() [ ] ( main:2 [ ] ) always clobbers reg byte a
|
||||
Statement [14] *((const byte*) BGCOL#0) ← (const byte) WHITE#0 [ ] ( ) always clobbers reg byte a
|
||||
Statement [15] *((const byte*) BGCOL#0) ← (const byte) BLACK#0 [ ] ( ) always clobbers reg byte a
|
||||
Statement [16] *((const byte*) IRQ_STATUS#0) ← (const byte) IRQ_RASTER#0 [ ] ( ) always clobbers reg byte a
|
||||
Statement [17] return [ ] ( ) always clobbers reg byte a reg byte x reg byte y
|
||||
|
||||
REGISTER UPLIFT SCOPES
|
||||
Uplift Scope [main]
|
||||
Uplift Scope [irq]
|
||||
Uplift Scope []
|
||||
|
||||
Uplifting [main] best 503 combination
|
||||
Uplifting [irq] best 503 combination
|
||||
Uplifting [] best 503 combination
|
||||
|
||||
ASSEMBLER BEFORE OPTIMIZATION
|
||||
//SEG0 Basic Upstart
|
||||
.pc = $801 "Basic"
|
||||
:BasicUpstart(main)
|
||||
.pc = $80d "Program"
|
||||
//SEG1 Global Constants & labels
|
||||
.label HARDWARE_IRQ = $fffe
|
||||
.label RASTER = $d012
|
||||
.label VIC_CONTROL = $d011
|
||||
.label IRQ_STATUS = $d019
|
||||
.label IRQ_ENABLE = $d01a
|
||||
.const IRQ_RASTER = 1
|
||||
.label BGCOL = $d020
|
||||
.label FGCOL = $d021
|
||||
.const WHITE = 1
|
||||
.const BLACK = 0
|
||||
.label CIA1_INTERRUPT = $dc0d
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.label PROCPORT_DDR = 0
|
||||
.const PROCPORT_DDR_MEMORY_MASK = 7
|
||||
.label PROCPORT = 1
|
||||
.const PROCPORT_RAM_IO = $35
|
||||
//SEG2 @begin
|
||||
bbegin:
|
||||
//SEG3 [1] phi from @begin to @2 [phi:@begin->@2]
|
||||
b2_from_bbegin:
|
||||
jmp b2
|
||||
//SEG4 @2
|
||||
b2:
|
||||
//SEG5 [2] call main [ ] ( )
|
||||
jsr main
|
||||
//SEG6 [3] phi from @2 to @end [phi:@2->@end]
|
||||
bend_from_b2:
|
||||
jmp bend
|
||||
//SEG7 @end
|
||||
bend:
|
||||
//SEG8 main
|
||||
main: {
|
||||
//SEG9 asm { sei }
|
||||
sei
|
||||
//SEG10 [5] *((const byte*) PROCPORT_DDR#0) ← (const byte) PROCPORT_DDR_MEMORY_MASK#0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #PROCPORT_DDR_MEMORY_MASK
|
||||
sta PROCPORT_DDR
|
||||
//SEG11 [6] *((const byte*) PROCPORT#0) ← (const byte) PROCPORT_RAM_IO#0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #PROCPORT_RAM_IO
|
||||
sta PROCPORT
|
||||
//SEG12 [7] *((const byte*) CIA1_INTERRUPT#0) ← (const byte) CIA_INTERRUPT_CLEAR#0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
sta CIA1_INTERRUPT
|
||||
//SEG13 [8] *((const byte*) VIC_CONTROL#0) ← *((const byte*) VIC_CONTROL#0) | (byte/word/signed word/dword/signed dword) 128 [ ] ( main:2 [ ] ) -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
|
||||
lda VIC_CONTROL
|
||||
ora #$80
|
||||
sta VIC_CONTROL
|
||||
//SEG14 [9] *((const byte*) RASTER#0) ← (byte/signed byte/word/signed word/dword/signed dword) 0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta RASTER
|
||||
//SEG15 [10] *((const byte*) IRQ_ENABLE#0) ← (const byte) IRQ_RASTER#0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #IRQ_RASTER
|
||||
sta IRQ_ENABLE
|
||||
//SEG16 [11] *((const void()**) HARDWARE_IRQ#0) ← &interrupt(HARDWARE_ALL)(void()) irq() [ ] ( main:2 [ ] ) -- _deref_pptc1=pprc2
|
||||
lda #<irq
|
||||
sta HARDWARE_IRQ
|
||||
lda #>irq
|
||||
sta HARDWARE_IRQ+1
|
||||
//SEG17 asm { cli }
|
||||
cli
|
||||
jmp b2
|
||||
//SEG18 main::@2
|
||||
b2:
|
||||
//SEG19 [13] *((const byte*) FGCOL#0) ← ++ *((const byte*) FGCOL#0) [ ] ( main:2 [ ] ) -- _deref_pbuc1=_inc__deref_pbuc1
|
||||
inc FGCOL
|
||||
jmp b2
|
||||
}
|
||||
//SEG20 irq
|
||||
irq: {
|
||||
sta rega+1
|
||||
stx regx+1
|
||||
sty regy+1
|
||||
//SEG21 [14] *((const byte*) BGCOL#0) ← (const byte) WHITE#0 [ ] ( ) -- _deref_pbuc1=vbuc2
|
||||
lda #WHITE
|
||||
sta BGCOL
|
||||
//SEG22 [15] *((const byte*) BGCOL#0) ← (const byte) BLACK#0 [ ] ( ) -- _deref_pbuc1=vbuc2
|
||||
lda #BLACK
|
||||
sta BGCOL
|
||||
//SEG23 [16] *((const byte*) IRQ_STATUS#0) ← (const byte) IRQ_RASTER#0 [ ] ( ) -- _deref_pbuc1=vbuc2
|
||||
lda #IRQ_RASTER
|
||||
sta IRQ_STATUS
|
||||
jmp breturn
|
||||
//SEG24 irq::@return
|
||||
breturn:
|
||||
//SEG25 [17] return [ ] ( )
|
||||
rega:
|
||||
lda #00
|
||||
regx:
|
||||
ldx #00
|
||||
regy:
|
||||
ldy #00
|
||||
rti
|
||||
}
|
||||
|
||||
ASSEMBLER OPTIMIZATIONS
|
||||
Removing instruction jmp b2
|
||||
Removing instruction jmp bend
|
||||
Removing instruction jmp b2
|
||||
Removing instruction jmp breturn
|
||||
Succesful ASM optimization Pass5NextJumpElimination
|
||||
Removing instruction bbegin:
|
||||
Removing instruction b2_from_bbegin:
|
||||
Removing instruction bend_from_b2:
|
||||
Removing instruction breturn:
|
||||
Succesful ASM optimization Pass5RedundantLabelElimination
|
||||
Removing instruction b2:
|
||||
Removing instruction bend:
|
||||
Succesful ASM optimization Pass5UnusedLabelElimination
|
||||
|
||||
FINAL SYMBOL TABLE
|
||||
(label) @2
|
||||
(label) @begin
|
||||
(label) @end
|
||||
(byte*) BGCOL
|
||||
(const byte*) BGCOL#0 BGCOL = ((byte*))(word/dword/signed dword) 53280
|
||||
(byte) BLACK
|
||||
(const byte) BLACK#0 BLACK = (byte/signed byte/word/signed word/dword/signed dword) 0
|
||||
(byte*) CIA1_INTERRUPT
|
||||
(const byte*) CIA1_INTERRUPT#0 CIA1_INTERRUPT = ((byte*))(word/dword/signed dword) 56333
|
||||
(byte) CIA_INTERRUPT_CLEAR
|
||||
(const byte) CIA_INTERRUPT_CLEAR#0 CIA_INTERRUPT_CLEAR = (byte/signed byte/word/signed word/dword/signed dword) 127
|
||||
(byte*) FGCOL
|
||||
(const byte*) FGCOL#0 FGCOL = ((byte*))(word/dword/signed dword) 53281
|
||||
(void()**) HARDWARE_IRQ
|
||||
(const void()**) HARDWARE_IRQ#0 HARDWARE_IRQ = ((void()**))(word/dword/signed dword) 65534
|
||||
(byte*) IRQ_ENABLE
|
||||
(const byte*) IRQ_ENABLE#0 IRQ_ENABLE = ((byte*))(word/dword/signed dword) 53274
|
||||
(byte) IRQ_RASTER
|
||||
(const byte) IRQ_RASTER#0 IRQ_RASTER = (byte/signed byte/word/signed word/dword/signed dword) 1
|
||||
(byte*) IRQ_STATUS
|
||||
(const byte*) IRQ_STATUS#0 IRQ_STATUS = ((byte*))(word/dword/signed dword) 53273
|
||||
(byte*) PROCPORT
|
||||
(const byte*) PROCPORT#0 PROCPORT = ((byte*))(byte/signed byte/word/signed word/dword/signed dword) 1
|
||||
(byte*) PROCPORT_DDR
|
||||
(const byte*) PROCPORT_DDR#0 PROCPORT_DDR = ((byte*))(byte/signed byte/word/signed word/dword/signed dword) 0
|
||||
(byte) PROCPORT_DDR_MEMORY_MASK
|
||||
(const byte) PROCPORT_DDR_MEMORY_MASK#0 PROCPORT_DDR_MEMORY_MASK = (byte/signed byte/word/signed word/dword/signed dword) 7
|
||||
(byte) PROCPORT_RAM_IO
|
||||
(const byte) PROCPORT_RAM_IO#0 PROCPORT_RAM_IO = (byte/signed byte/word/signed word/dword/signed dword) 53
|
||||
(byte*) RASTER
|
||||
(const byte*) RASTER#0 RASTER = ((byte*))(word/dword/signed dword) 53266
|
||||
(byte*) VIC_CONTROL
|
||||
(const byte*) VIC_CONTROL#0 VIC_CONTROL = ((byte*))(word/dword/signed dword) 53265
|
||||
(byte) WHITE
|
||||
(const byte) WHITE#0 WHITE = (byte/signed byte/word/signed word/dword/signed dword) 1
|
||||
interrupt(HARDWARE_ALL)(void()) irq()
|
||||
(label) irq::@return
|
||||
(void()) main()
|
||||
(label) main::@2
|
||||
|
||||
|
||||
|
||||
FINAL ASSEMBLER
|
||||
Score: 464
|
||||
|
||||
//SEG0 Basic Upstart
|
||||
.pc = $801 "Basic"
|
||||
:BasicUpstart(main)
|
||||
.pc = $80d "Program"
|
||||
//SEG1 Global Constants & labels
|
||||
.label HARDWARE_IRQ = $fffe
|
||||
.label RASTER = $d012
|
||||
.label VIC_CONTROL = $d011
|
||||
.label IRQ_STATUS = $d019
|
||||
.label IRQ_ENABLE = $d01a
|
||||
.const IRQ_RASTER = 1
|
||||
.label BGCOL = $d020
|
||||
.label FGCOL = $d021
|
||||
.const WHITE = 1
|
||||
.const BLACK = 0
|
||||
.label CIA1_INTERRUPT = $dc0d
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
.label PROCPORT_DDR = 0
|
||||
.const PROCPORT_DDR_MEMORY_MASK = 7
|
||||
.label PROCPORT = 1
|
||||
.const PROCPORT_RAM_IO = $35
|
||||
//SEG2 @begin
|
||||
//SEG3 [1] phi from @begin to @2 [phi:@begin->@2]
|
||||
//SEG4 @2
|
||||
//SEG5 [2] call main [ ] ( )
|
||||
jsr main
|
||||
//SEG6 [3] phi from @2 to @end [phi:@2->@end]
|
||||
//SEG7 @end
|
||||
//SEG8 main
|
||||
main: {
|
||||
//SEG9 asm { sei }
|
||||
sei
|
||||
//SEG10 [5] *((const byte*) PROCPORT_DDR#0) ← (const byte) PROCPORT_DDR_MEMORY_MASK#0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #PROCPORT_DDR_MEMORY_MASK
|
||||
sta PROCPORT_DDR
|
||||
//SEG11 [6] *((const byte*) PROCPORT#0) ← (const byte) PROCPORT_RAM_IO#0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #PROCPORT_RAM_IO
|
||||
sta PROCPORT
|
||||
//SEG12 [7] *((const byte*) CIA1_INTERRUPT#0) ← (const byte) CIA_INTERRUPT_CLEAR#0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
sta CIA1_INTERRUPT
|
||||
//SEG13 [8] *((const byte*) VIC_CONTROL#0) ← *((const byte*) VIC_CONTROL#0) | (byte/word/signed word/dword/signed dword) 128 [ ] ( main:2 [ ] ) -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
|
||||
lda VIC_CONTROL
|
||||
ora #$80
|
||||
sta VIC_CONTROL
|
||||
//SEG14 [9] *((const byte*) RASTER#0) ← (byte/signed byte/word/signed word/dword/signed dword) 0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta RASTER
|
||||
//SEG15 [10] *((const byte*) IRQ_ENABLE#0) ← (const byte) IRQ_RASTER#0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #IRQ_RASTER
|
||||
sta IRQ_ENABLE
|
||||
//SEG16 [11] *((const void()**) HARDWARE_IRQ#0) ← &interrupt(HARDWARE_ALL)(void()) irq() [ ] ( main:2 [ ] ) -- _deref_pptc1=pprc2
|
||||
lda #<irq
|
||||
sta HARDWARE_IRQ
|
||||
lda #>irq
|
||||
sta HARDWARE_IRQ+1
|
||||
//SEG17 asm { cli }
|
||||
cli
|
||||
//SEG18 main::@2
|
||||
b2:
|
||||
//SEG19 [13] *((const byte*) FGCOL#0) ← ++ *((const byte*) FGCOL#0) [ ] ( main:2 [ ] ) -- _deref_pbuc1=_inc__deref_pbuc1
|
||||
inc FGCOL
|
||||
jmp b2
|
||||
}
|
||||
//SEG20 irq
|
||||
irq: {
|
||||
sta rega+1
|
||||
stx regx+1
|
||||
sty regy+1
|
||||
//SEG21 [14] *((const byte*) BGCOL#0) ← (const byte) WHITE#0 [ ] ( ) -- _deref_pbuc1=vbuc2
|
||||
lda #WHITE
|
||||
sta BGCOL
|
||||
//SEG22 [15] *((const byte*) BGCOL#0) ← (const byte) BLACK#0 [ ] ( ) -- _deref_pbuc1=vbuc2
|
||||
lda #BLACK
|
||||
sta BGCOL
|
||||
//SEG23 [16] *((const byte*) IRQ_STATUS#0) ← (const byte) IRQ_RASTER#0 [ ] ( ) -- _deref_pbuc1=vbuc2
|
||||
lda #IRQ_RASTER
|
||||
sta IRQ_STATUS
|
||||
//SEG24 irq::@return
|
||||
//SEG25 [17] return [ ] ( )
|
||||
rega:
|
||||
lda #00
|
||||
regx:
|
||||
ldx #00
|
||||
regy:
|
||||
ldy #00
|
||||
rti
|
||||
}
|
||||
|
40
src/test/java/dk/camelot64/kickc/test/ref/irq-hardware.sym
Normal file
40
src/test/java/dk/camelot64/kickc/test/ref/irq-hardware.sym
Normal file
@ -0,0 +1,40 @@
|
||||
(label) @2
|
||||
(label) @begin
|
||||
(label) @end
|
||||
(byte*) BGCOL
|
||||
(const byte*) BGCOL#0 BGCOL = ((byte*))(word/dword/signed dword) 53280
|
||||
(byte) BLACK
|
||||
(const byte) BLACK#0 BLACK = (byte/signed byte/word/signed word/dword/signed dword) 0
|
||||
(byte*) CIA1_INTERRUPT
|
||||
(const byte*) CIA1_INTERRUPT#0 CIA1_INTERRUPT = ((byte*))(word/dword/signed dword) 56333
|
||||
(byte) CIA_INTERRUPT_CLEAR
|
||||
(const byte) CIA_INTERRUPT_CLEAR#0 CIA_INTERRUPT_CLEAR = (byte/signed byte/word/signed word/dword/signed dword) 127
|
||||
(byte*) FGCOL
|
||||
(const byte*) FGCOL#0 FGCOL = ((byte*))(word/dword/signed dword) 53281
|
||||
(void()**) HARDWARE_IRQ
|
||||
(const void()**) HARDWARE_IRQ#0 HARDWARE_IRQ = ((void()**))(word/dword/signed dword) 65534
|
||||
(byte*) IRQ_ENABLE
|
||||
(const byte*) IRQ_ENABLE#0 IRQ_ENABLE = ((byte*))(word/dword/signed dword) 53274
|
||||
(byte) IRQ_RASTER
|
||||
(const byte) IRQ_RASTER#0 IRQ_RASTER = (byte/signed byte/word/signed word/dword/signed dword) 1
|
||||
(byte*) IRQ_STATUS
|
||||
(const byte*) IRQ_STATUS#0 IRQ_STATUS = ((byte*))(word/dword/signed dword) 53273
|
||||
(byte*) PROCPORT
|
||||
(const byte*) PROCPORT#0 PROCPORT = ((byte*))(byte/signed byte/word/signed word/dword/signed dword) 1
|
||||
(byte*) PROCPORT_DDR
|
||||
(const byte*) PROCPORT_DDR#0 PROCPORT_DDR = ((byte*))(byte/signed byte/word/signed word/dword/signed dword) 0
|
||||
(byte) PROCPORT_DDR_MEMORY_MASK
|
||||
(const byte) PROCPORT_DDR_MEMORY_MASK#0 PROCPORT_DDR_MEMORY_MASK = (byte/signed byte/word/signed word/dword/signed dword) 7
|
||||
(byte) PROCPORT_RAM_IO
|
||||
(const byte) PROCPORT_RAM_IO#0 PROCPORT_RAM_IO = (byte/signed byte/word/signed word/dword/signed dword) 53
|
||||
(byte*) RASTER
|
||||
(const byte*) RASTER#0 RASTER = ((byte*))(word/dword/signed dword) 53266
|
||||
(byte*) VIC_CONTROL
|
||||
(const byte*) VIC_CONTROL#0 VIC_CONTROL = ((byte*))(word/dword/signed dword) 53265
|
||||
(byte) WHITE
|
||||
(const byte) WHITE#0 WHITE = (byte/signed byte/word/signed word/dword/signed dword) 1
|
||||
interrupt(HARDWARE_ALL)(void()) irq()
|
||||
(label) irq::@return
|
||||
(void()) main()
|
||||
(label) main::@2
|
||||
|
42
src/test/java/dk/camelot64/kickc/test/ref/irq-kernel.asm
Normal file
42
src/test/java/dk/camelot64/kickc/test/ref/irq-kernel.asm
Normal file
@ -0,0 +1,42 @@
|
||||
.pc = $801 "Basic"
|
||||
:BasicUpstart(main)
|
||||
.pc = $80d "Program"
|
||||
.label KERNEL_IRQ = $314
|
||||
.label RASTER = $d012
|
||||
.label VIC_CONTROL = $d011
|
||||
.label IRQ_STATUS = $d019
|
||||
.label IRQ_ENABLE = $d01a
|
||||
.const IRQ_RASTER = 1
|
||||
.label BGCOL = $d020
|
||||
.const WHITE = 1
|
||||
.const BLACK = 0
|
||||
.label CIA1_INTERRUPT = $dc0d
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
jsr main
|
||||
main: {
|
||||
sei
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
sta CIA1_INTERRUPT
|
||||
lda VIC_CONTROL
|
||||
ora #$80
|
||||
sta VIC_CONTROL
|
||||
lda #0
|
||||
sta RASTER
|
||||
lda #IRQ_RASTER
|
||||
sta IRQ_ENABLE
|
||||
lda #<irq
|
||||
sta KERNEL_IRQ
|
||||
lda #>irq
|
||||
sta KERNEL_IRQ+1
|
||||
cli
|
||||
rts
|
||||
}
|
||||
irq: {
|
||||
lda #WHITE
|
||||
sta BGCOL
|
||||
lda #BLACK
|
||||
sta BGCOL
|
||||
lda #IRQ_RASTER
|
||||
sta IRQ_STATUS
|
||||
jmp $ea31
|
||||
}
|
29
src/test/java/dk/camelot64/kickc/test/ref/irq-kernel.cfg
Normal file
29
src/test/java/dk/camelot64/kickc/test/ref/irq-kernel.cfg
Normal file
@ -0,0 +1,29 @@
|
||||
@begin: scope:[] from
|
||||
[0] phi() [ ] ( )
|
||||
to:@2
|
||||
@2: scope:[] from @begin
|
||||
[1] phi() [ ] ( )
|
||||
[2] call main [ ] ( )
|
||||
to:@end
|
||||
@end: scope:[] from @2
|
||||
[3] phi() [ ] ( )
|
||||
main: scope:[main] from @2
|
||||
asm { sei }
|
||||
[5] *((const byte*) CIA1_INTERRUPT#0) ← (const byte) CIA_INTERRUPT_CLEAR#0 [ ] ( main:2 [ ] )
|
||||
[6] *((const byte*) VIC_CONTROL#0) ← *((const byte*) VIC_CONTROL#0) | (byte/word/signed word/dword/signed dword) 128 [ ] ( main:2 [ ] )
|
||||
[7] *((const byte*) RASTER#0) ← (byte/signed byte/word/signed word/dword/signed dword) 0 [ ] ( main:2 [ ] )
|
||||
[8] *((const byte*) IRQ_ENABLE#0) ← (const byte) IRQ_RASTER#0 [ ] ( main:2 [ ] )
|
||||
[9] *((const void()**) KERNEL_IRQ#0) ← &interrupt(KERNEL_STD)(void()) irq() [ ] ( main:2 [ ] )
|
||||
asm { cli }
|
||||
to:main::@return
|
||||
main::@return: scope:[main] from main
|
||||
[11] return [ ] ( main:2 [ ] )
|
||||
to:@return
|
||||
irq: scope:[irq] from
|
||||
[12] *((const byte*) BGCOL#0) ← (const byte) WHITE#0 [ ] ( )
|
||||
[13] *((const byte*) BGCOL#0) ← (const byte) BLACK#0 [ ] ( )
|
||||
[14] *((const byte*) IRQ_STATUS#0) ← (const byte) IRQ_RASTER#0 [ ] ( )
|
||||
to:irq::@return
|
||||
irq::@return: scope:[irq] from irq
|
||||
[15] return [ ] ( )
|
||||
to:@return
|
604
src/test/java/dk/camelot64/kickc/test/ref/irq-kernel.log
Normal file
604
src/test/java/dk/camelot64/kickc/test/ref/irq-kernel.log
Normal file
@ -0,0 +1,604 @@
|
||||
PARSING src/test/java/dk/camelot64/kickc/test/kc/irq-kernel.kc
|
||||
// A minimal working raster IRQ
|
||||
|
||||
const void()** KERNEL_IRQ = $0314;
|
||||
const byte* RASTER = $d012;
|
||||
const byte* VIC_CONTROL = $d011;
|
||||
const byte* IRQ_STATUS = $d019;
|
||||
const byte* IRQ_ENABLE = $d01a;
|
||||
const byte IRQ_RASTER = %00000001;
|
||||
const byte IRQ_COLLISION_BG = %00000010;
|
||||
const byte IRQ_COLLISION_SPRITE = %00000100;
|
||||
const byte IRQ_LIGHTPEN = %00001000;
|
||||
const byte* BGCOL = $d020;
|
||||
const byte WHITE = 1;
|
||||
const byte BLACK = 0;
|
||||
|
||||
const byte* CIA1_INTERRUPT = $dc0d;
|
||||
const byte CIA_INTERRUPT_CLEAR = $7f;
|
||||
|
||||
void main() {
|
||||
asm { sei }
|
||||
// Disable CIA 1 Timer IRQ
|
||||
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR;
|
||||
// Set raster line to $100
|
||||
*VIC_CONTROL |=$80;
|
||||
*RASTER = $00;
|
||||
// Enable Raster Interrupt
|
||||
*IRQ_ENABLE = IRQ_RASTER;
|
||||
// Set the IRQ routine
|
||||
*KERNEL_IRQ = &irq;
|
||||
asm { cli }
|
||||
}
|
||||
|
||||
// Interrupt Routine
|
||||
interrupt(kernel std) void irq() {
|
||||
*BGCOL = WHITE;
|
||||
*BGCOL = BLACK;
|
||||
// Acknowledge the IRQ
|
||||
*IRQ_STATUS = IRQ_RASTER;
|
||||
}
|
||||
Resolved forward reference irq to interrupt(KERNEL_STD)(void()) irq()
|
||||
SYMBOLS
|
||||
(label) @1
|
||||
(label) @2
|
||||
(label) @begin
|
||||
(label) @end
|
||||
(byte*) BGCOL
|
||||
(byte) BLACK
|
||||
(byte*) CIA1_INTERRUPT
|
||||
(byte) CIA_INTERRUPT_CLEAR
|
||||
(byte) IRQ_COLLISION_BG
|
||||
(byte) IRQ_COLLISION_SPRITE
|
||||
(byte*) IRQ_ENABLE
|
||||
(byte) IRQ_LIGHTPEN
|
||||
(byte) IRQ_RASTER
|
||||
(byte*) IRQ_STATUS
|
||||
(void()**) KERNEL_IRQ
|
||||
(byte*) RASTER
|
||||
(byte*) VIC_CONTROL
|
||||
(byte) WHITE
|
||||
interrupt(KERNEL_STD)(void()) irq()
|
||||
(label) irq::@return
|
||||
(void()) main()
|
||||
(void()*~) main::$0
|
||||
(label) main::@return
|
||||
|
||||
Promoting word/signed word/dword/signed dword to void()** in KERNEL_IRQ ← ((void()**)) 788
|
||||
Promoting word/dword/signed dword to byte* in RASTER ← ((byte*)) 53266
|
||||
Promoting word/dword/signed dword to byte* in VIC_CONTROL ← ((byte*)) 53265
|
||||
Promoting word/dword/signed dword to byte* in IRQ_STATUS ← ((byte*)) 53273
|
||||
Promoting word/dword/signed dword to byte* in IRQ_ENABLE ← ((byte*)) 53274
|
||||
Promoting word/dword/signed dword to byte* in BGCOL ← ((byte*)) 53280
|
||||
Promoting word/dword/signed dword to byte* in CIA1_INTERRUPT ← ((byte*)) 56333
|
||||
INITIAL CONTROL FLOW GRAPH
|
||||
@begin: scope:[] from
|
||||
(void()**) KERNEL_IRQ ← ((void()**)) (word/signed word/dword/signed dword) 788
|
||||
(byte*) RASTER ← ((byte*)) (word/dword/signed dword) 53266
|
||||
(byte*) VIC_CONTROL ← ((byte*)) (word/dword/signed dword) 53265
|
||||
(byte*) IRQ_STATUS ← ((byte*)) (word/dword/signed dword) 53273
|
||||
(byte*) IRQ_ENABLE ← ((byte*)) (word/dword/signed dword) 53274
|
||||
(byte) IRQ_RASTER ← (byte/signed byte/word/signed word/dword/signed dword) 1
|
||||
(byte) IRQ_COLLISION_BG ← (byte/signed byte/word/signed word/dword/signed dword) 2
|
||||
(byte) IRQ_COLLISION_SPRITE ← (byte/signed byte/word/signed word/dword/signed dword) 4
|
||||
(byte) IRQ_LIGHTPEN ← (byte/signed byte/word/signed word/dword/signed dword) 8
|
||||
(byte*) BGCOL ← ((byte*)) (word/dword/signed dword) 53280
|
||||
(byte) WHITE ← (byte/signed byte/word/signed word/dword/signed dword) 1
|
||||
(byte) BLACK ← (byte/signed byte/word/signed word/dword/signed dword) 0
|
||||
(byte*) CIA1_INTERRUPT ← ((byte*)) (word/dword/signed dword) 56333
|
||||
(byte) CIA_INTERRUPT_CLEAR ← (byte/signed byte/word/signed word/dword/signed dword) 127
|
||||
to:@1
|
||||
main: scope:[main] from
|
||||
asm { sei }
|
||||
*((byte*) CIA1_INTERRUPT) ← (byte) CIA_INTERRUPT_CLEAR
|
||||
*((byte*) VIC_CONTROL) ← *((byte*) VIC_CONTROL) | (byte/word/signed word/dword/signed dword) 128
|
||||
*((byte*) RASTER) ← (byte/signed byte/word/signed word/dword/signed dword) 0
|
||||
*((byte*) IRQ_ENABLE) ← (byte) IRQ_RASTER
|
||||
(void()*~) main::$0 ← & interrupt(KERNEL_STD)(void()) irq()
|
||||
*((void()**) KERNEL_IRQ) ← (void()*~) main::$0
|
||||
asm { cli }
|
||||
to:main::@return
|
||||
main::@return: scope:[main] from main
|
||||
return
|
||||
to:@return
|
||||
@1: scope:[] from @begin
|
||||
to:@2
|
||||
irq: scope:[irq] from
|
||||
*((byte*) BGCOL) ← (byte) WHITE
|
||||
*((byte*) BGCOL) ← (byte) BLACK
|
||||
*((byte*) IRQ_STATUS) ← (byte) IRQ_RASTER
|
||||
to:irq::@return
|
||||
irq::@return: scope:[irq] from irq
|
||||
return
|
||||
to:@return
|
||||
@2: scope:[] from @1
|
||||
call main
|
||||
to:@end
|
||||
@end: scope:[] from @2
|
||||
|
||||
Eliminating unused variable (byte) IRQ_COLLISION_BG and assignment [6] (byte) IRQ_COLLISION_BG ← (byte/signed byte/word/signed word/dword/signed dword) 2
|
||||
Eliminating unused variable (byte) IRQ_COLLISION_SPRITE and assignment [7] (byte) IRQ_COLLISION_SPRITE ← (byte/signed byte/word/signed word/dword/signed dword) 4
|
||||
Eliminating unused variable (byte) IRQ_LIGHTPEN and assignment [8] (byte) IRQ_LIGHTPEN ← (byte/signed byte/word/signed word/dword/signed dword) 8
|
||||
Removing empty block @1
|
||||
PROCEDURE MODIFY VARIABLE ANALYSIS
|
||||
|
||||
Completing Phi functions...
|
||||
|
||||
CONTROL FLOW GRAPH SSA WITH ASSIGNMENT CALL & RETURN
|
||||
@begin: scope:[] from
|
||||
(void()**) KERNEL_IRQ#0 ← ((void()**)) (word/signed word/dword/signed dword) 788
|
||||
(byte*) RASTER#0 ← ((byte*)) (word/dword/signed dword) 53266
|
||||
(byte*) VIC_CONTROL#0 ← ((byte*)) (word/dword/signed dword) 53265
|
||||
(byte*) IRQ_STATUS#0 ← ((byte*)) (word/dword/signed dword) 53273
|
||||
(byte*) IRQ_ENABLE#0 ← ((byte*)) (word/dword/signed dword) 53274
|
||||
(byte) IRQ_RASTER#0 ← (byte/signed byte/word/signed word/dword/signed dword) 1
|
||||
(byte*) BGCOL#0 ← ((byte*)) (word/dword/signed dword) 53280
|
||||
(byte) WHITE#0 ← (byte/signed byte/word/signed word/dword/signed dword) 1
|
||||
(byte) BLACK#0 ← (byte/signed byte/word/signed word/dword/signed dword) 0
|
||||
(byte*) CIA1_INTERRUPT#0 ← ((byte*)) (word/dword/signed dword) 56333
|
||||
(byte) CIA_INTERRUPT_CLEAR#0 ← (byte/signed byte/word/signed word/dword/signed dword) 127
|
||||
to:@2
|
||||
main: scope:[main] from @2
|
||||
asm { sei }
|
||||
*((byte*) CIA1_INTERRUPT#0) ← (byte) CIA_INTERRUPT_CLEAR#0
|
||||
*((byte*) VIC_CONTROL#0) ← *((byte*) VIC_CONTROL#0) | (byte/word/signed word/dword/signed dword) 128
|
||||
*((byte*) RASTER#0) ← (byte/signed byte/word/signed word/dword/signed dword) 0
|
||||
*((byte*) IRQ_ENABLE#0) ← (byte) IRQ_RASTER#0
|
||||
(void()*~) main::$0 ← & interrupt(KERNEL_STD)(void()) irq()
|
||||
*((void()**) KERNEL_IRQ#0) ← (void()*~) main::$0
|
||||
asm { cli }
|
||||
to:main::@return
|
||||
main::@return: scope:[main] from main
|
||||
return
|
||||
to:@return
|
||||
irq: scope:[irq] from
|
||||
*((byte*) BGCOL#0) ← (byte) WHITE#0
|
||||
*((byte*) BGCOL#0) ← (byte) BLACK#0
|
||||
*((byte*) IRQ_STATUS#0) ← (byte) IRQ_RASTER#0
|
||||
to:irq::@return
|
||||
irq::@return: scope:[irq] from irq
|
||||
return
|
||||
to:@return
|
||||
@2: scope:[] from @begin
|
||||
call main
|
||||
to:@3
|
||||
@3: scope:[] from @2
|
||||
to:@end
|
||||
@end: scope:[] from @3
|
||||
|
||||
SYMBOL TABLE SSA
|
||||
(label) @2
|
||||
(label) @3
|
||||
(label) @begin
|
||||
(label) @end
|
||||
(byte*) BGCOL
|
||||
(byte*) BGCOL#0
|
||||
(byte) BLACK
|
||||
(byte) BLACK#0
|
||||
(byte*) CIA1_INTERRUPT
|
||||
(byte*) CIA1_INTERRUPT#0
|
||||
(byte) CIA_INTERRUPT_CLEAR
|
||||
(byte) CIA_INTERRUPT_CLEAR#0
|
||||
(byte*) IRQ_ENABLE
|
||||
(byte*) IRQ_ENABLE#0
|
||||
(byte) IRQ_RASTER
|
||||
(byte) IRQ_RASTER#0
|
||||
(byte*) IRQ_STATUS
|
||||
(byte*) IRQ_STATUS#0
|
||||
(void()**) KERNEL_IRQ
|
||||
(void()**) KERNEL_IRQ#0
|
||||
(byte*) RASTER
|
||||
(byte*) RASTER#0
|
||||
(byte*) VIC_CONTROL
|
||||
(byte*) VIC_CONTROL#0
|
||||
(byte) WHITE
|
||||
(byte) WHITE#0
|
||||
interrupt(KERNEL_STD)(void()) irq()
|
||||
(label) irq::@return
|
||||
(void()) main()
|
||||
(void()*~) main::$0
|
||||
(label) main::@return
|
||||
|
||||
OPTIMIZING CONTROL FLOW GRAPH
|
||||
Culled Empty Block (label) @3
|
||||
Succesful SSA optimization Pass2CullEmptyBlocks
|
||||
Constant (const void()**) KERNEL_IRQ#0 = ((void()**))788
|
||||
Constant (const byte*) RASTER#0 = ((byte*))53266
|
||||
Constant (const byte*) VIC_CONTROL#0 = ((byte*))53265
|
||||
Constant (const byte*) IRQ_STATUS#0 = ((byte*))53273
|
||||
Constant (const byte*) IRQ_ENABLE#0 = ((byte*))53274
|
||||
Constant (const byte) IRQ_RASTER#0 = 1
|
||||
Constant (const byte*) BGCOL#0 = ((byte*))53280
|
||||
Constant (const byte) WHITE#0 = 1
|
||||
Constant (const byte) BLACK#0 = 0
|
||||
Constant (const byte*) CIA1_INTERRUPT#0 = ((byte*))56333
|
||||
Constant (const byte) CIA_INTERRUPT_CLEAR#0 = 127
|
||||
Constant (const void()*) main::$0 = &irq
|
||||
Succesful SSA optimization Pass2ConstantIdentification
|
||||
OPTIMIZING CONTROL FLOW GRAPH
|
||||
Constant inlined main::$0 = &interrupt(KERNEL_STD)(void()) irq()
|
||||
Succesful SSA optimization Pass2ConstantInlining
|
||||
Block Sequence Planned @begin @2 @end main main::@return irq irq::@return
|
||||
Block Sequence Planned @begin @2 @end main main::@return irq irq::@return
|
||||
Adding NOP phi() at start of @begin
|
||||
Adding NOP phi() at start of @2
|
||||
Adding NOP phi() at start of @end
|
||||
CALL GRAPH
|
||||
Calls in [] to main:2
|
||||
|
||||
Propagating live ranges...
|
||||
Created 0 initial phi equivalence classes
|
||||
Coalesced down to 0 phi equivalence classes
|
||||
Block Sequence Planned @begin @2 @end main main::@return irq irq::@return
|
||||
Adding NOP phi() at start of @begin
|
||||
Adding NOP phi() at start of @2
|
||||
Adding NOP phi() at start of @end
|
||||
Propagating live ranges...
|
||||
|
||||
FINAL CONTROL FLOW GRAPH
|
||||
@begin: scope:[] from
|
||||
[0] phi() [ ] ( )
|
||||
to:@2
|
||||
@2: scope:[] from @begin
|
||||
[1] phi() [ ] ( )
|
||||
[2] call main [ ] ( )
|
||||
to:@end
|
||||
@end: scope:[] from @2
|
||||
[3] phi() [ ] ( )
|
||||
main: scope:[main] from @2
|
||||
asm { sei }
|
||||
[5] *((const byte*) CIA1_INTERRUPT#0) ← (const byte) CIA_INTERRUPT_CLEAR#0 [ ] ( main:2 [ ] )
|
||||
[6] *((const byte*) VIC_CONTROL#0) ← *((const byte*) VIC_CONTROL#0) | (byte/word/signed word/dword/signed dword) 128 [ ] ( main:2 [ ] )
|
||||
[7] *((const byte*) RASTER#0) ← (byte/signed byte/word/signed word/dword/signed dword) 0 [ ] ( main:2 [ ] )
|
||||
[8] *((const byte*) IRQ_ENABLE#0) ← (const byte) IRQ_RASTER#0 [ ] ( main:2 [ ] )
|
||||
[9] *((const void()**) KERNEL_IRQ#0) ← &interrupt(KERNEL_STD)(void()) irq() [ ] ( main:2 [ ] )
|
||||
asm { cli }
|
||||
to:main::@return
|
||||
main::@return: scope:[main] from main
|
||||
[11] return [ ] ( main:2 [ ] )
|
||||
to:@return
|
||||
irq: scope:[irq] from
|
||||
[12] *((const byte*) BGCOL#0) ← (const byte) WHITE#0 [ ] ( )
|
||||
[13] *((const byte*) BGCOL#0) ← (const byte) BLACK#0 [ ] ( )
|
||||
[14] *((const byte*) IRQ_STATUS#0) ← (const byte) IRQ_RASTER#0 [ ] ( )
|
||||
to:irq::@return
|
||||
irq::@return: scope:[irq] from irq
|
||||
[15] return [ ] ( )
|
||||
to:@return
|
||||
|
||||
DOMINATORS
|
||||
@begin dominated by @begin
|
||||
@2 dominated by @2 @begin
|
||||
@end dominated by @2 @begin @end
|
||||
main dominated by @2 @begin main
|
||||
main::@return dominated by main::@return @2 @begin main
|
||||
irq dominated by main::@return @2 @begin @end irq irq::@return main
|
||||
irq::@return dominated by main::@return @2 @begin @end irq irq::@return main
|
||||
|
||||
NATURAL LOOPS
|
||||
Found back edge: Loop head: irq::@return tails: irq blocks: null
|
||||
Populated: Loop head: irq::@return tails: irq blocks: irq
|
||||
Loop head: irq::@return tails: irq blocks: irq
|
||||
|
||||
NATURAL LOOPS WITH DEPTH
|
||||
Found 1 loops in scope [irq]
|
||||
Loop head: irq::@return tails: irq blocks: irq
|
||||
Found 0 loops in scope []
|
||||
Found 0 loops in scope [main]
|
||||
Loop head: irq::@return tails: irq blocks: irq depth: 1
|
||||
|
||||
|
||||
VARIABLE REGISTER WEIGHTS
|
||||
(byte*) BGCOL
|
||||
(byte) BLACK
|
||||
(byte*) CIA1_INTERRUPT
|
||||
(byte) CIA_INTERRUPT_CLEAR
|
||||
(byte*) IRQ_ENABLE
|
||||
(byte) IRQ_RASTER
|
||||
(byte*) IRQ_STATUS
|
||||
(void()**) KERNEL_IRQ
|
||||
(byte*) RASTER
|
||||
(byte*) VIC_CONTROL
|
||||
(byte) WHITE
|
||||
interrupt(KERNEL_STD)(void()) irq()
|
||||
(void()) main()
|
||||
|
||||
Initial phi equivalence classes
|
||||
Complete equivalence classes
|
||||
|
||||
INITIAL ASM
|
||||
//SEG0 Basic Upstart
|
||||
.pc = $801 "Basic"
|
||||
:BasicUpstart(main)
|
||||
.pc = $80d "Program"
|
||||
//SEG1 Global Constants & labels
|
||||
.label KERNEL_IRQ = $314
|
||||
.label RASTER = $d012
|
||||
.label VIC_CONTROL = $d011
|
||||
.label IRQ_STATUS = $d019
|
||||
.label IRQ_ENABLE = $d01a
|
||||
.const IRQ_RASTER = 1
|
||||
.label BGCOL = $d020
|
||||
.const WHITE = 1
|
||||
.const BLACK = 0
|
||||
.label CIA1_INTERRUPT = $dc0d
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
//SEG2 @begin
|
||||
bbegin:
|
||||
//SEG3 [1] phi from @begin to @2 [phi:@begin->@2]
|
||||
b2_from_bbegin:
|
||||
jmp b2
|
||||
//SEG4 @2
|
||||
b2:
|
||||
//SEG5 [2] call main [ ] ( )
|
||||
jsr main
|
||||
//SEG6 [3] phi from @2 to @end [phi:@2->@end]
|
||||
bend_from_b2:
|
||||
jmp bend
|
||||
//SEG7 @end
|
||||
bend:
|
||||
//SEG8 main
|
||||
main: {
|
||||
//SEG9 asm { sei }
|
||||
sei
|
||||
//SEG10 [5] *((const byte*) CIA1_INTERRUPT#0) ← (const byte) CIA_INTERRUPT_CLEAR#0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
sta CIA1_INTERRUPT
|
||||
//SEG11 [6] *((const byte*) VIC_CONTROL#0) ← *((const byte*) VIC_CONTROL#0) | (byte/word/signed word/dword/signed dword) 128 [ ] ( main:2 [ ] ) -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
|
||||
lda VIC_CONTROL
|
||||
ora #$80
|
||||
sta VIC_CONTROL
|
||||
//SEG12 [7] *((const byte*) RASTER#0) ← (byte/signed byte/word/signed word/dword/signed dword) 0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta RASTER
|
||||
//SEG13 [8] *((const byte*) IRQ_ENABLE#0) ← (const byte) IRQ_RASTER#0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #IRQ_RASTER
|
||||
sta IRQ_ENABLE
|
||||
//SEG14 [9] *((const void()**) KERNEL_IRQ#0) ← &interrupt(KERNEL_STD)(void()) irq() [ ] ( main:2 [ ] ) -- _deref_pptc1=pprc2
|
||||
lda #<irq
|
||||
sta KERNEL_IRQ
|
||||
lda #>irq
|
||||
sta KERNEL_IRQ+1
|
||||
//SEG15 asm { cli }
|
||||
cli
|
||||
jmp breturn
|
||||
//SEG16 main::@return
|
||||
breturn:
|
||||
//SEG17 [11] return [ ] ( main:2 [ ] )
|
||||
rts
|
||||
}
|
||||
//SEG18 irq
|
||||
irq: {
|
||||
//SEG19 [12] *((const byte*) BGCOL#0) ← (const byte) WHITE#0 [ ] ( ) -- _deref_pbuc1=vbuc2
|
||||
lda #WHITE
|
||||
sta BGCOL
|
||||
//SEG20 [13] *((const byte*) BGCOL#0) ← (const byte) BLACK#0 [ ] ( ) -- _deref_pbuc1=vbuc2
|
||||
lda #BLACK
|
||||
sta BGCOL
|
||||
//SEG21 [14] *((const byte*) IRQ_STATUS#0) ← (const byte) IRQ_RASTER#0 [ ] ( ) -- _deref_pbuc1=vbuc2
|
||||
lda #IRQ_RASTER
|
||||
sta IRQ_STATUS
|
||||
jmp breturn
|
||||
//SEG22 irq::@return
|
||||
breturn:
|
||||
//SEG23 [15] return [ ] ( )
|
||||
jmp $ea31
|
||||
}
|
||||
|
||||
REGISTER UPLIFT POTENTIAL REGISTERS
|
||||
Statement [5] *((const byte*) CIA1_INTERRUPT#0) ← (const byte) CIA_INTERRUPT_CLEAR#0 [ ] ( main:2 [ ] ) always clobbers reg byte a
|
||||
Statement [6] *((const byte*) VIC_CONTROL#0) ← *((const byte*) VIC_CONTROL#0) | (byte/word/signed word/dword/signed dword) 128 [ ] ( main:2 [ ] ) always clobbers reg byte a
|
||||
Statement [7] *((const byte*) RASTER#0) ← (byte/signed byte/word/signed word/dword/signed dword) 0 [ ] ( main:2 [ ] ) always clobbers reg byte a
|
||||
Statement [8] *((const byte*) IRQ_ENABLE#0) ← (const byte) IRQ_RASTER#0 [ ] ( main:2 [ ] ) always clobbers reg byte a
|
||||
Statement [9] *((const void()**) KERNEL_IRQ#0) ← &interrupt(KERNEL_STD)(void()) irq() [ ] ( main:2 [ ] ) always clobbers reg byte a
|
||||
Statement [12] *((const byte*) BGCOL#0) ← (const byte) WHITE#0 [ ] ( ) always clobbers reg byte a
|
||||
Statement [13] *((const byte*) BGCOL#0) ← (const byte) BLACK#0 [ ] ( ) always clobbers reg byte a
|
||||
Statement [14] *((const byte*) IRQ_STATUS#0) ← (const byte) IRQ_RASTER#0 [ ] ( ) always clobbers reg byte a
|
||||
|
||||
REGISTER UPLIFT SCOPES
|
||||
Uplift Scope [main]
|
||||
Uplift Scope [irq]
|
||||
Uplift Scope []
|
||||
|
||||
Uplifting [main] best 278 combination
|
||||
Uplifting [irq] best 278 combination
|
||||
Uplifting [] best 278 combination
|
||||
|
||||
ASSEMBLER BEFORE OPTIMIZATION
|
||||
//SEG0 Basic Upstart
|
||||
.pc = $801 "Basic"
|
||||
:BasicUpstart(main)
|
||||
.pc = $80d "Program"
|
||||
//SEG1 Global Constants & labels
|
||||
.label KERNEL_IRQ = $314
|
||||
.label RASTER = $d012
|
||||
.label VIC_CONTROL = $d011
|
||||
.label IRQ_STATUS = $d019
|
||||
.label IRQ_ENABLE = $d01a
|
||||
.const IRQ_RASTER = 1
|
||||
.label BGCOL = $d020
|
||||
.const WHITE = 1
|
||||
.const BLACK = 0
|
||||
.label CIA1_INTERRUPT = $dc0d
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
//SEG2 @begin
|
||||
bbegin:
|
||||
//SEG3 [1] phi from @begin to @2 [phi:@begin->@2]
|
||||
b2_from_bbegin:
|
||||
jmp b2
|
||||
//SEG4 @2
|
||||
b2:
|
||||
//SEG5 [2] call main [ ] ( )
|
||||
jsr main
|
||||
//SEG6 [3] phi from @2 to @end [phi:@2->@end]
|
||||
bend_from_b2:
|
||||
jmp bend
|
||||
//SEG7 @end
|
||||
bend:
|
||||
//SEG8 main
|
||||
main: {
|
||||
//SEG9 asm { sei }
|
||||
sei
|
||||
//SEG10 [5] *((const byte*) CIA1_INTERRUPT#0) ← (const byte) CIA_INTERRUPT_CLEAR#0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
sta CIA1_INTERRUPT
|
||||
//SEG11 [6] *((const byte*) VIC_CONTROL#0) ← *((const byte*) VIC_CONTROL#0) | (byte/word/signed word/dword/signed dword) 128 [ ] ( main:2 [ ] ) -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
|
||||
lda VIC_CONTROL
|
||||
ora #$80
|
||||
sta VIC_CONTROL
|
||||
//SEG12 [7] *((const byte*) RASTER#0) ← (byte/signed byte/word/signed word/dword/signed dword) 0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta RASTER
|
||||
//SEG13 [8] *((const byte*) IRQ_ENABLE#0) ← (const byte) IRQ_RASTER#0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #IRQ_RASTER
|
||||
sta IRQ_ENABLE
|
||||
//SEG14 [9] *((const void()**) KERNEL_IRQ#0) ← &interrupt(KERNEL_STD)(void()) irq() [ ] ( main:2 [ ] ) -- _deref_pptc1=pprc2
|
||||
lda #<irq
|
||||
sta KERNEL_IRQ
|
||||
lda #>irq
|
||||
sta KERNEL_IRQ+1
|
||||
//SEG15 asm { cli }
|
||||
cli
|
||||
jmp breturn
|
||||
//SEG16 main::@return
|
||||
breturn:
|
||||
//SEG17 [11] return [ ] ( main:2 [ ] )
|
||||
rts
|
||||
}
|
||||
//SEG18 irq
|
||||
irq: {
|
||||
//SEG19 [12] *((const byte*) BGCOL#0) ← (const byte) WHITE#0 [ ] ( ) -- _deref_pbuc1=vbuc2
|
||||
lda #WHITE
|
||||
sta BGCOL
|
||||
//SEG20 [13] *((const byte*) BGCOL#0) ← (const byte) BLACK#0 [ ] ( ) -- _deref_pbuc1=vbuc2
|
||||
lda #BLACK
|
||||
sta BGCOL
|
||||
//SEG21 [14] *((const byte*) IRQ_STATUS#0) ← (const byte) IRQ_RASTER#0 [ ] ( ) -- _deref_pbuc1=vbuc2
|
||||
lda #IRQ_RASTER
|
||||
sta IRQ_STATUS
|
||||
jmp breturn
|
||||
//SEG22 irq::@return
|
||||
breturn:
|
||||
//SEG23 [15] return [ ] ( )
|
||||
jmp $ea31
|
||||
}
|
||||
|
||||
ASSEMBLER OPTIMIZATIONS
|
||||
Removing instruction jmp b2
|
||||
Removing instruction jmp bend
|
||||
Removing instruction jmp breturn
|
||||
Removing instruction jmp breturn
|
||||
Succesful ASM optimization Pass5NextJumpElimination
|
||||
Removing instruction bbegin:
|
||||
Removing instruction b2_from_bbegin:
|
||||
Removing instruction bend_from_b2:
|
||||
Succesful ASM optimization Pass5RedundantLabelElimination
|
||||
Removing instruction b2:
|
||||
Removing instruction bend:
|
||||
Removing instruction breturn:
|
||||
Removing instruction breturn:
|
||||
Succesful ASM optimization Pass5UnusedLabelElimination
|
||||
|
||||
FINAL SYMBOL TABLE
|
||||
(label) @2
|
||||
(label) @begin
|
||||
(label) @end
|
||||
(byte*) BGCOL
|
||||
(const byte*) BGCOL#0 BGCOL = ((byte*))(word/dword/signed dword) 53280
|
||||
(byte) BLACK
|
||||
(const byte) BLACK#0 BLACK = (byte/signed byte/word/signed word/dword/signed dword) 0
|
||||
(byte*) CIA1_INTERRUPT
|
||||
(const byte*) CIA1_INTERRUPT#0 CIA1_INTERRUPT = ((byte*))(word/dword/signed dword) 56333
|
||||
(byte) CIA_INTERRUPT_CLEAR
|
||||
(const byte) CIA_INTERRUPT_CLEAR#0 CIA_INTERRUPT_CLEAR = (byte/signed byte/word/signed word/dword/signed dword) 127
|
||||
(byte*) IRQ_ENABLE
|
||||
(const byte*) IRQ_ENABLE#0 IRQ_ENABLE = ((byte*))(word/dword/signed dword) 53274
|
||||
(byte) IRQ_RASTER
|
||||
(const byte) IRQ_RASTER#0 IRQ_RASTER = (byte/signed byte/word/signed word/dword/signed dword) 1
|
||||
(byte*) IRQ_STATUS
|
||||
(const byte*) IRQ_STATUS#0 IRQ_STATUS = ((byte*))(word/dword/signed dword) 53273
|
||||
(void()**) KERNEL_IRQ
|
||||
(const void()**) KERNEL_IRQ#0 KERNEL_IRQ = ((void()**))(word/signed word/dword/signed dword) 788
|
||||
(byte*) RASTER
|
||||
(const byte*) RASTER#0 RASTER = ((byte*))(word/dword/signed dword) 53266
|
||||
(byte*) VIC_CONTROL
|
||||
(const byte*) VIC_CONTROL#0 VIC_CONTROL = ((byte*))(word/dword/signed dword) 53265
|
||||
(byte) WHITE
|
||||
(const byte) WHITE#0 WHITE = (byte/signed byte/word/signed word/dword/signed dword) 1
|
||||
interrupt(KERNEL_STD)(void()) irq()
|
||||
(label) irq::@return
|
||||
(void()) main()
|
||||
(label) main::@return
|
||||
|
||||
|
||||
|
||||
FINAL ASSEMBLER
|
||||
Score: 239
|
||||
|
||||
//SEG0 Basic Upstart
|
||||
.pc = $801 "Basic"
|
||||
:BasicUpstart(main)
|
||||
.pc = $80d "Program"
|
||||
//SEG1 Global Constants & labels
|
||||
.label KERNEL_IRQ = $314
|
||||
.label RASTER = $d012
|
||||
.label VIC_CONTROL = $d011
|
||||
.label IRQ_STATUS = $d019
|
||||
.label IRQ_ENABLE = $d01a
|
||||
.const IRQ_RASTER = 1
|
||||
.label BGCOL = $d020
|
||||
.const WHITE = 1
|
||||
.const BLACK = 0
|
||||
.label CIA1_INTERRUPT = $dc0d
|
||||
.const CIA_INTERRUPT_CLEAR = $7f
|
||||
//SEG2 @begin
|
||||
//SEG3 [1] phi from @begin to @2 [phi:@begin->@2]
|
||||
//SEG4 @2
|
||||
//SEG5 [2] call main [ ] ( )
|
||||
jsr main
|
||||
//SEG6 [3] phi from @2 to @end [phi:@2->@end]
|
||||
//SEG7 @end
|
||||
//SEG8 main
|
||||
main: {
|
||||
//SEG9 asm { sei }
|
||||
sei
|
||||
//SEG10 [5] *((const byte*) CIA1_INTERRUPT#0) ← (const byte) CIA_INTERRUPT_CLEAR#0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #CIA_INTERRUPT_CLEAR
|
||||
sta CIA1_INTERRUPT
|
||||
//SEG11 [6] *((const byte*) VIC_CONTROL#0) ← *((const byte*) VIC_CONTROL#0) | (byte/word/signed word/dword/signed dword) 128 [ ] ( main:2 [ ] ) -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
|
||||
lda VIC_CONTROL
|
||||
ora #$80
|
||||
sta VIC_CONTROL
|
||||
//SEG12 [7] *((const byte*) RASTER#0) ← (byte/signed byte/word/signed word/dword/signed dword) 0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #0
|
||||
sta RASTER
|
||||
//SEG13 [8] *((const byte*) IRQ_ENABLE#0) ← (const byte) IRQ_RASTER#0 [ ] ( main:2 [ ] ) -- _deref_pbuc1=vbuc2
|
||||
lda #IRQ_RASTER
|
||||
sta IRQ_ENABLE
|
||||
//SEG14 [9] *((const void()**) KERNEL_IRQ#0) ← &interrupt(KERNEL_STD)(void()) irq() [ ] ( main:2 [ ] ) -- _deref_pptc1=pprc2
|
||||
lda #<irq
|
||||
sta KERNEL_IRQ
|
||||
lda #>irq
|
||||
sta KERNEL_IRQ+1
|
||||
//SEG15 asm { cli }
|
||||
cli
|
||||
//SEG16 main::@return
|
||||
//SEG17 [11] return [ ] ( main:2 [ ] )
|
||||
rts
|
||||
}
|
||||
//SEG18 irq
|
||||
irq: {
|
||||
//SEG19 [12] *((const byte*) BGCOL#0) ← (const byte) WHITE#0 [ ] ( ) -- _deref_pbuc1=vbuc2
|
||||
lda #WHITE
|
||||
sta BGCOL
|
||||
//SEG20 [13] *((const byte*) BGCOL#0) ← (const byte) BLACK#0 [ ] ( ) -- _deref_pbuc1=vbuc2
|
||||
lda #BLACK
|
||||
sta BGCOL
|
||||
//SEG21 [14] *((const byte*) IRQ_STATUS#0) ← (const byte) IRQ_RASTER#0 [ ] ( ) -- _deref_pbuc1=vbuc2
|
||||
lda #IRQ_RASTER
|
||||
sta IRQ_STATUS
|
||||
//SEG22 irq::@return
|
||||
//SEG23 [15] return [ ] ( )
|
||||
jmp $ea31
|
||||
}
|
||||
|
30
src/test/java/dk/camelot64/kickc/test/ref/irq-kernel.sym
Normal file
30
src/test/java/dk/camelot64/kickc/test/ref/irq-kernel.sym
Normal file
@ -0,0 +1,30 @@
|
||||
(label) @2
|
||||
(label) @begin
|
||||
(label) @end
|
||||
(byte*) BGCOL
|
||||
(const byte*) BGCOL#0 BGCOL = ((byte*))(word/dword/signed dword) 53280
|
||||
(byte) BLACK
|
||||
(const byte) BLACK#0 BLACK = (byte/signed byte/word/signed word/dword/signed dword) 0
|
||||
(byte*) CIA1_INTERRUPT
|
||||
(const byte*) CIA1_INTERRUPT#0 CIA1_INTERRUPT = ((byte*))(word/dword/signed dword) 56333
|
||||
(byte) CIA_INTERRUPT_CLEAR
|
||||
(const byte) CIA_INTERRUPT_CLEAR#0 CIA_INTERRUPT_CLEAR = (byte/signed byte/word/signed word/dword/signed dword) 127
|
||||
(byte*) IRQ_ENABLE
|
||||
(const byte*) IRQ_ENABLE#0 IRQ_ENABLE = ((byte*))(word/dword/signed dword) 53274
|
||||
(byte) IRQ_RASTER
|
||||
(const byte) IRQ_RASTER#0 IRQ_RASTER = (byte/signed byte/word/signed word/dword/signed dword) 1
|
||||
(byte*) IRQ_STATUS
|
||||
(const byte*) IRQ_STATUS#0 IRQ_STATUS = ((byte*))(word/dword/signed dword) 53273
|
||||
(void()**) KERNEL_IRQ
|
||||
(const void()**) KERNEL_IRQ#0 KERNEL_IRQ = ((void()**))(word/signed word/dword/signed dword) 788
|
||||
(byte*) RASTER
|
||||
(const byte*) RASTER#0 RASTER = ((byte*))(word/dword/signed dword) 53266
|
||||
(byte*) VIC_CONTROL
|
||||
(const byte*) VIC_CONTROL#0 VIC_CONTROL = ((byte*))(word/dword/signed dword) 53265
|
||||
(byte) WHITE
|
||||
(const byte) WHITE#0 WHITE = (byte/signed byte/word/signed word/dword/signed dword) 1
|
||||
interrupt(KERNEL_STD)(void()) irq()
|
||||
(label) irq::@return
|
||||
(void()) main()
|
||||
(label) main::@return
|
||||
|
Loading…
x
Reference in New Issue
Block a user